Merge tag 'pull-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / freescale / imx8mm.dtsi
index 1bf070473829244d87dbaccb6eee38bd46698515..afb90f59c83c5df18fa78e35fc409c621e6501b9 100644 (file)
        clk_ext4: clock-ext4 {
                compatible = "fixed-clock";
                #clock-cells = <0>;
-               clock-frequency= <133000000>;
+               clock-frequency = <133000000>;
                clock-output-names = "clk_ext4";
        };
 
                clock-names = "main_clk";
        };
 
-       soc@0 {
+       soc: soc@0 {
                compatible = "fsl,imx8mm-soc", "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                                        wakeup-source;
                                        status = "disabled";
                                };
+
+                               snvs_lpgpr: snvs-lpgpr {
+                                       compatible = "fsl,imx8mm-snvs-lpgpr",
+                                                    "fsl,imx7d-snvs-lpgpr";
+                               };
                        };
 
                        clk: clock-controller@30380000 {
                                        compatible = "fsl,sec-v4.0-job-ring";
                                        reg = <0x1000 0x1000>;
                                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+                                       status = "disabled";
                                };
 
                                sec_jr1: jr@2000 {
                                         <&clk IMX8MM_CLK_USDHC1_ROOT>;
                                clock-names = "ipg", "ahb", "per";
                                fsl,tuning-start-tap = <20>;
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                bus-width = <4>;
                                status = "disabled";
                        };
                                         <&clk IMX8MM_CLK_USDHC2_ROOT>;
                                clock-names = "ipg", "ahb", "per";
                                fsl,tuning-start-tap = <20>;
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                bus-width = <4>;
                                status = "disabled";
                        };
                                         <&clk IMX8MM_CLK_USDHC3_ROOT>;
                                clock-names = "ipg", "ahb", "per";
                                fsl,tuning-start-tap = <20>;
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                bus-width = <4>;
                                status = "disabled";
                        };