Merge tag 'pull-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs

[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / freescale / fsl-ls1028a.dtsi

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index d5cdd77e5a95906e157b478a91c591dea4d8f364..5627dd7734f38f6c7b7d0f3900826d3e7d6ab137 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -96,7 +96,7 @@
        };
 
        reboot {
-               compatible ="syscon-reboot";
+               compatible = "syscon-reboot";
                regmap = <&rst>;
                offset = <0>;
                mask = <0x02>;
@@ -120,13 +120,13 @@
        };
 
        gic: interrupt-controller@6000000 {
-               compatible= "arm,gic-v3";
+               compatible = "arm,gic-v3";
                #address-cells = <2>;
                #size-cells = <2>;
                ranges;
-               reg= <0x0 0x06000000 0 0x10000>, /* GIC Dist */
+               reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
                        <0x0 0x06040000 0 0x40000>; /* GIC Redistributor */
-               #interrupt-cells= <3>;
+               #interrupt-cells = <3>;
                interrupt-controller;
                interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
                                         IRQ_TYPE_LEVEL_LOW)>;
@@ -772,28 +772,28 @@
                        sec_jr0: jr@10000 {
                                compatible = "fsl,sec-v5.0-job-ring",
                                             "fsl,sec-v4.0-job-ring";
-                               reg     = <0x10000 0x10000>;
+                               reg = <0x10000 0x10000>;
                                interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        sec_jr1: jr@20000 {
                                compatible = "fsl,sec-v5.0-job-ring",
                                             "fsl,sec-v4.0-job-ring";
-                               reg     = <0x20000 0x10000>;
+                               reg = <0x20000 0x10000>;
                                interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        sec_jr2: jr@30000 {
                                compatible = "fsl,sec-v5.0-job-ring",
                                             "fsl,sec-v4.0-job-ring";
-                               reg     = <0x30000 0x10000>;
+                               reg = <0x30000 0x10000>;
                                interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        sec_jr3: jr@40000 {
                                compatible = "fsl,sec-v5.0-job-ring",
                                             "fsl,sec-v4.0-job-ring";
-                               reg     = <0x40000 0x10000>;
+                               reg = <0x40000 0x10000>;
                                interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
                        };
                };