Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6

[sfrench/cifs-2.6.git] / arch / arm / mm / proc-feroceon.S

diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index dbc39383e66aaf0d2ec0e5865f15e21dafb02ec7..b304d0104a4ef9c240191e42b7e08460706408b8 100644 (file)
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -75,11 +75,6 @@ ENTRY(cpu_feroceon_proc_init)
  * cpu_feroceon_proc_fin()
  */
 ENTRY(cpu_feroceon_proc_fin)
-       stmfd   sp!, {lr}
-       mov     ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
-       msr     cpsr_c, ip
-       bl      feroceon_flush_kern_cache_all
-
 #if defined(CONFIG_CACHE_FEROCEON_L2) && \
        !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH)
        mov     r0, #0
@@ -91,7 +86,7 @@ ENTRY(cpu_feroceon_proc_fin)
        bic     r0, r0, #0x1000                 @ ...i............
        bic     r0, r0, #0x000e                 @ ............wca.
        mcr     p15, 0, r0, c1, c0, 0           @ disable caches
-       ldmfd   sp!, {pc}
+       mov     pc, lr
 
 /*
  * cpu_feroceon_reset(loc)
@@ -274,7 +269,7 @@ ENTRY(feroceon_range_flush_kern_dcache_area)
  * (same as v4wb)
  */
        .align  5
-ENTRY(feroceon_dma_inv_range)
+feroceon_dma_inv_range:
        tst     r0, #CACHE_DLINESIZE - 1
        bic     r0, r0, #CACHE_DLINESIZE - 1
        mcrne   p15, 0, r0, c7, c10, 1          @ clean D entry
@@ -288,7 +283,7 @@ ENTRY(feroceon_dma_inv_range)
        mov     pc, lr
 
        .align  5
-ENTRY(feroceon_range_dma_inv_range)
+feroceon_range_dma_inv_range:
        mrs     r2, cpsr
        tst     r0, #CACHE_DLINESIZE - 1
        mcrne   p15, 0, r0, c7, c10, 1          @ clean D entry
@@ -314,7 +309,7 @@ ENTRY(feroceon_range_dma_inv_range)
  * (same as v4wb)
  */
        .align  5
-ENTRY(feroceon_dma_clean_range)
+feroceon_dma_clean_range:
        bic     r0, r0, #CACHE_DLINESIZE - 1
 1:     mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
        add     r0, r0, #CACHE_DLINESIZE
@@ -324,7 +319,7 @@ ENTRY(feroceon_dma_clean_range)
        mov     pc, lr
 
        .align  5
-ENTRY(feroceon_range_dma_clean_range)
+feroceon_range_dma_clean_range:
        mrs     r2, cpsr
        cmp     r1, r0
        subne   r1, r1, #1                      @ top address is inclusive
@@ -367,6 +362,44 @@ ENTRY(feroceon_range_dma_flush_range)
        mcr     p15, 0, r0, c7, c10, 4          @ drain WB
        mov     pc, lr
 
+/*
+ *     dma_map_area(start, size, dir)
+ *     - start - kernel virtual start address
+ *     - size  - size of region
+ *     - dir   - DMA direction
+ */
+ENTRY(feroceon_dma_map_area)
+       add     r1, r1, r0
+       cmp     r2, #DMA_TO_DEVICE
+       beq     feroceon_dma_clean_range
+       bcs     feroceon_dma_inv_range
+       b       feroceon_dma_flush_range
+ENDPROC(feroceon_dma_map_area)
+
+/*
+ *     dma_map_area(start, size, dir)
+ *     - start - kernel virtual start address
+ *     - size  - size of region
+ *     - dir   - DMA direction
+ */
+ENTRY(feroceon_range_dma_map_area)
+       add     r1, r1, r0
+       cmp     r2, #DMA_TO_DEVICE
+       beq     feroceon_range_dma_clean_range
+       bcs     feroceon_range_dma_inv_range
+       b       feroceon_range_dma_flush_range
+ENDPROC(feroceon_range_dma_map_area)
+
+/*
+ *     dma_unmap_area(start, size, dir)
+ *     - start - kernel virtual start address
+ *     - size  - size of region
+ *     - dir   - DMA direction
+ */
+ENTRY(feroceon_dma_unmap_area)
+       mov     pc, lr
+ENDPROC(feroceon_dma_unmap_area)
+
 ENTRY(feroceon_cache_fns)
        .long   feroceon_flush_kern_cache_all
        .long   feroceon_flush_user_cache_all
@@ -374,8 +407,8 @@ ENTRY(feroceon_cache_fns)
        .long   feroceon_coherent_kern_range
        .long   feroceon_coherent_user_range
        .long   feroceon_flush_kern_dcache_area
-       .long   feroceon_dma_inv_range
-       .long   feroceon_dma_clean_range
+       .long   feroceon_dma_map_area
+       .long   feroceon_dma_unmap_area
        .long   feroceon_dma_flush_range
 
 ENTRY(feroceon_range_cache_fns)
@@ -385,8 +418,8 @@ ENTRY(feroceon_range_cache_fns)
        .long   feroceon_coherent_kern_range
        .long   feroceon_coherent_user_range
        .long   feroceon_range_flush_kern_dcache_area
-       .long   feroceon_range_dma_inv_range
-       .long   feroceon_range_dma_clean_range
+       .long   feroceon_range_dma_map_area
+       .long   feroceon_dma_unmap_area
        .long   feroceon_range_dma_flush_range
 
        .align  5