ARM: dts: sunxi: Move wakeup-capable IRQs to r_intc

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / sunxi-h3-h5.dtsi

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 9be13378d4df58b8fc54e4b4eec697a942a7400f..c7428df9469e65fa3d4662ef9736fcf1cf32f0a6 100644 (file)
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -395,6 +395,7 @@
                pio: pinctrl@1c20800 {
                        /* compatible is in per SoC .dtsi file */
                        reg = <0x01c20800 0x400>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
@@ -852,6 +853,7 @@
                rtc: rtc@1f00000 {
                        /* compatible is in per SoC .dtsi file */
                        reg = <0x01f00000 0x400>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                        clock-output-names = "osc32k", "osc32k-out", "iosc";
@@ -859,6 +861,15 @@
                        #clock-cells = <1>;
                };
 
+               r_intc: interrupt-controller@1f00c00 {
+                       compatible = "allwinner,sun8i-h3-r-intc",
+                                    "allwinner,sun6i-a31-r-intc";
+                       interrupt-controller;
+                       #interrupt-cells = <3>;
+                       reg = <0x01f00c00 0x400>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
                r_ccu: clock@1f01400 {
                        compatible = "allwinner,sun8i-h3-r-ccu";
                        reg = <0x01f01400 0x100>;
@@ -900,6 +911,7 @@
                r_pio: pinctrl@1f02c00 {
                        compatible = "allwinner,sun8i-h3-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
+                       interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>;
                        clock-names = "apb", "hosc", "losc";