ARM: sunxi: dt: Remove the FSF address

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / sun6i-a31.dtsi

diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 25a97f08d94b3044888101d5f82d8e53784b7d93..27d60e9a4bb806d55f33fe1c447a713bf2f46e69 100644 (file)
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -18,11 +18,6 @@
  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *     GNU General Public License for more details.
  *
- *     You should have received a copy of the GNU General Public
- *     License along with this file; if not, write to the Free
- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- *     MA 02110-1301 USA
- *
  * Or, alternatively,
  *
  *  b) Permission is hereby granted, free of charge, to any person
@@ -241,6 +236,14 @@
                        reg = <0x01c20054 0x4>;
                        clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
                        clock-output-names = "ahb1";
+
+                       /*
+                        * Clock AHB1 from PLL6, instead of CPU/AXI which
+                        * has rate changes due to cpufreq. Also the DMA
+                        * controller requires AHB1 clocked from PLL6.
+                        */
+                       assigned-clocks = <&ahb1>;
+                       assigned-clock-parents = <&pll6 0>;
                };
 
                ahb1_gates: clk@01c20060 {
@@ -426,10 +429,6 @@
                        clocks = <&ahb1_gates 6>;
                        resets = <&ahb1_rst 6>;
                        #dma-cells = <1>;
-
-                       /* DMA controller requires AHB1 clocked from PLL6 */
-                       assigned-clocks = <&ahb1>;
-                       assigned-clock-parents = <&pll6 0>;
                };
 
                mmc0: mmc@01c0f000 {