Merge tag 'zonefs-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal...

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / rockchip / rk3128.dtsi

diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
index e2264c40b924c6feef5822b3430f0aaf4ef02823..fb98873fd94e5994134a6107cadfeae57903ddb7 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
@@ -115,6 +115,12 @@
                };
        };
 
+       display_subsystem: display-subsystem {
+               compatible = "rockchip,display-subsystem";
+               ports = <&vop_out>;
+               status = "disabled";
+       };
+
        gpu_opp_table: opp-table-1 {
                compatible = "operating-points-v2";
 
@@ -246,6 +252,32 @@
                };
        };
 
+       vop: vop@1010e000 {
+               compatible = "rockchip,rk3126-vop";
+               reg = <0x1010e000 0x300>;
+               interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru ACLK_LCDC0>, <&cru DCLK_VOP>,
+                        <&cru HCLK_LCDC0>;
+               clock-names = "aclk_vop", "dclk_vop",
+                             "hclk_vop";
+               resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>,
+                        <&cru SRST_VOP_D>;
+               reset-names = "axi", "ahb",
+                             "dclk";
+               power-domains = <&power RK3128_PD_VIO>;
+               status = "disabled";
+
+               vop_out: port {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       vop_out_hdmi: endpoint@0 {
+                               reg = <0>;
+                               remote-endpoint = <&hdmi_in_vop>;
+                       };
+               };
+       };
+
        qos_gpu: qos@1012d000 {
                compatible = "rockchip,rk3128-qos", "syscon";
                reg = <0x1012d000 0x20>;
@@ -436,6 +468,34 @@
                };
        };
 
+       hdmi: hdmi@20034000 {
+               compatible = "rockchip,rk3128-inno-hdmi";
+               reg = <0x20034000 0x4000>;
+               interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru PCLK_HDMI>, <&cru DCLK_VOP>;
+               clock-names = "pclk", "ref";
+               pinctrl-names = "default";
+               pinctrl-0 = <&hdmii2c_xfer &hdmi_hpd &hdmi_cec>;
+               power-domains = <&power RK3128_PD_VIO>;
+               status = "disabled";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       hdmi_in: port@0 {
+                               reg = <0>;
+                               hdmi_in_vop: endpoint {
+                                       remote-endpoint = <&vop_out_hdmi>;
+                               };
+                       };
+
+                       hdmi_out: port@1 {
+                               reg = <1>;
+                       };
+               };
+       };
+
        timer0: timer@20044000 {
                compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
                reg = <0x20044000 0x20>;