Merge branch 'next/late' with mainline
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / r8a7794.dtsi
index fb576dba748cd97c5e7c253386bd0675ed6852ad..319c1069b7eeb722a79dd2efff221e7627907901 100644 (file)
@@ -71,7 +71,7 @@
                #address-cells = <0>;
                interrupt-controller;
                reg = <0 0xf1001000 0 0x1000>,
-                       <0 0xf1002000 0 0x1000>,
+                       <0 0xf1002000 0 0x2000>,
                        <0 0xf1004000 0 0x2000>,
                        <0 0xf1006000 0 0x2000>;
                interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 
        /* The memory map in the User's Manual maps the cores to bus numbers */
        i2c0: i2c@e6508000 {
-               compatible = "renesas,i2c-r8a7794";
+               compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6508000 0 0x40>;
                interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7794_CLK_I2C0>;
        };
 
        i2c1: i2c@e6518000 {
-               compatible = "renesas,i2c-r8a7794";
+               compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6518000 0 0x40>;
                interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7794_CLK_I2C1>;
        };
 
        i2c2: i2c@e6530000 {
-               compatible = "renesas,i2c-r8a7794";
+               compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6530000 0 0x40>;
                interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7794_CLK_I2C2>;
        };
 
        i2c3: i2c@e6540000 {
-               compatible = "renesas,i2c-r8a7794";
+               compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6540000 0 0x40>;
                interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7794_CLK_I2C3>;
        };
 
        i2c4: i2c@e6520000 {
-               compatible = "renesas,i2c-r8a7794";
+               compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6520000 0 0x40>;
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7794_CLK_I2C4>;
        };
 
        i2c5: i2c@e6528000 {
-               compatible = "renesas,i2c-r8a7794";
+               compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6528000 0 0x40>;
                interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7794_CLK_I2C5>;
        };
 
        i2c6: i2c@e6500000 {
-               compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic";
+               compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
+                            "renesas,rmobile-iic";
                reg = <0 0xe6500000 0 0x425>;
                interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7794_CLK_IIC0>;
        };
 
        i2c7: i2c@e6510000 {
-               compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic";
+               compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
+                            "renesas,rmobile-iic";
                reg = <0 0xe6510000 0 0x425>;
                interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7794_CLK_IIC1>;
        };
 
        usbphy: usb-phy@e6590100 {
-               compatible = "renesas,usb-phy-r8a7794";
+               compatible = "renesas,usb-phy-r8a7794",
+                            "renesas,rcar-gen2-usb-phy";
                reg = <0 0xe6590100 0 0x100>;
                #address-cells = <1>;
                #size-cells = <0>;