Merge tag 'sound-fix-4.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai...

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / nuvoton-npcm750.dtsi

diff --git a/arch/arm/boot/dts/nuvoton-npcm750.dtsi b/arch/arm/boot/dts/nuvoton-npcm750.dtsi
index 839e45cfd695abfa87d2191009b13e1f0ce690e8..6ac34053358737342eb68949e7bf0b552ba0d270 100644 (file)
--- a/arch/arm/boot/dts/nuvoton-npcm750.dtsi
+++ b/arch/arm/boot/dts/nuvoton-npcm750.dtsi
@@ -1,8 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0
-// Copyright (c) 2018 Nuvoton Technology corporation.
+// Copyright (c) 2018 Nuvoton Technology tomer.maimon@nuvoton.com
 // Copyright 2018 Google, Inc.
 
-#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "nuvoton-common-npcm7xx.dtsi"
 
 / {
        #address-cells = <1>;
@@ -17,7 +17,7 @@
                cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
-                       clocks = <&clk 10>;
+                       clocks = <&clk 0>;
                        clock-names = "clk_cpu";
                        reg = <0>;
                        next-level-cache = <&l2>;
@@ -26,140 +26,19 @@
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
-                       clocks = <&clk 10>;
+                       clocks = <&clk 0>;
                        clock-names = "clk_cpu";
                        reg = <1>;
                        next-level-cache = <&l2>;
                };
        };
-
-       /* external clock signal rg1refck, supplied by the phy */
-       clk-rg1refck {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <125000000>;
-       };
-
-       /* external clock signal rg2refck, supplied by the phy */
-       clk-rg2refck {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <125000000>;
-       };
-
-       clk-xin {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <50000000>;
-       };
-
        soc {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               compatible = "simple-bus";
-               interrupt-parent = <&gic>;
-               ranges = <0x0 0xf0000000 0x00900000>;
-
-               gcr: gcr@800000 {
-                       compatible = "nuvoton,npcm750-gcr", "syscon",
-                               "simple-mfd";
-                       reg = <0x800000 0x1000>;
-               };
-
-               scu: scu@3fe000 {
-                       compatible = "arm,cortex-a9-scu";
-                       reg = <0x3fe000 0x1000>;
-               };
-
-               l2: cache-controller@3fc000 {
-                       compatible = "arm,pl310-cache";
-                       reg = <0x3fc000 0x1000>;
-                       interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-                       cache-unified;
-                       cache-level = <2>;
-                       clocks = <&clk 22>;
-                       arm,shared-override;
-               };
-
-               gic: interrupt-controller@3ff000 {
-                       compatible = "arm,cortex-a9-gic";
-                       interrupt-controller;
-                       #interrupt-cells = <3>;
-                       reg = <0x3ff000 0x1000>,
-                           <0x3fe100 0x100>;
-               };
-
                timer@3fe600 {
                        compatible = "arm,cortex-a9-twd-timer";
                        reg = <0x3fe600 0x20>;
                        interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
                                                  IRQ_TYPE_LEVEL_HIGH)>;
-                       clocks = <&clk 15>;
-               };
-       };
-
-       ahb {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               compatible = "simple-bus";
-               interrupt-parent = <&gic>;
-               ranges;
-
-               clk: clock-controller@f0801000 {
-                       compatible = "nuvoton,npcm750-clk";
-                       #clock-cells = <1>;
-                       reg = <0xf0801000 0x1000>;
-               };
-
-               apb {
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       compatible = "simple-bus";
-                       interrupt-parent = <&gic>;
-                       ranges = <0x0 0xf0000000 0x00300000>;
-
-                       timer0: timer@8000 {
-                               compatible = "nuvoton,npcm750-timer";
-                               interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-                               reg = <0x8000 0x1000>;
-                               clocks = <&clk 15>;
-                       };
-
-                       serial0: serial@1000 {
-                               compatible = "ns16550a";
-                               reg = <0x1000 0x1000>;
-                               clocks = <&clk 14>;
-                               interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
-                               reg-shift = <2>;
-                               status = "disabled";
-                       };
-
-                       serial1: serial@2000 {
-                               compatible = "ns16550a";
-                               reg = <0x2000 0x1000>;
-                               clocks = <&clk 14>;
-                               interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-                               reg-shift = <2>;
-                               status = "disabled";
-                       };
-
-                       serial2: serial@3000 {
-                               compatible = "ns16550a";
-                               reg = <0x3000 0x1000>;
-                               clocks = <&clk 14>;
-                               interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
-                               reg-shift = <2>;
-                               status = "disabled";
-                       };
-
-                       serial3: serial@4000 {
-                               compatible = "ns16550a";
-                               reg = <0x4000 0x1000>;
-                               clocks = <&clk 14>;
-                               interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
-                               reg-shift = <2>;
-                               status = "disabled";
-                       };
+                       clocks = <&clk 5>;
                };
        };
 };