Merge git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nf

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6sx.dtsi

diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 5b03ba3beda9e91d47d1bf7ad8e5ed25fc1f347d..fd7879342d0d50252fae6a98c077f2bcb96a8a60 100644 (file)
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -141,6 +141,22 @@
                };
        };
 
+       tempmon: tempmon {
+               compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";
+               interrupt-parent = <&gpc>;
+               interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+               fsl,tempmon = <&anatop>;
+               nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
+               nvmem-cell-names = "calib", "temp_grade";
+               clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
+       };
+
+       pmu {
+               compatible = "arm,cortex-a9-pmu";
+               interrupt-parent = <&gpc>;
+               interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+       };
+
        soc {
                #address-cells = <1>;
                #size-cells = <1>;
@@ -148,11 +164,6 @@
                interrupt-parent = <&gpc>;
                ranges;
 
-               pmu {
-                       compatible = "arm,cortex-a9-pmu";
-                       interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
-               };
-
                ocram: sram@900000 {
                        compatible = "mmio-sram";
                        reg = <0x00900000 0x20000>;
@@ -574,8 +585,11 @@
                                interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
 
-                               regulator-1p1 {
+                               regulator-1p1@20c8110 {
+                                       reg = <0x20c8110>;
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd1p1";
                                        regulator-min-microvolt = <800000>;
@@ -590,7 +604,8 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               regulator-3p0 {
+                               regulator-3p0@20c8120 {
+                                       reg = <0x20c8120>;
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd3p0";
                                        regulator-min-microvolt = <2800000>;
@@ -605,7 +620,8 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               regulator-2p5 {
+                               regulator-2p5@20c8130 {
+                                       reg = <0x20c8130>;
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vdd2p5";
                                        regulator-min-microvolt = <2100000>;
@@ -620,7 +636,8 @@
                                        anatop-enable-bit = <0>;
                                };
 
-                               reg_arm: regulator-vddcore {
+                               reg_arm: regulator-vddcore@20c8140 {
+                                       reg = <0x20c8140>;
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddarm";
                                        regulator-min-microvolt = <725000>;
@@ -637,7 +654,8 @@
                                        anatop-max-voltage = <1450000>;
                                };
 
-                               reg_pcie: regulator-vddpcie {
+                               reg_pcie: regulator-vddpcie@20c8140 {
+                                       reg = <0x20c8140>;
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddpcie";
                                        regulator-min-microvolt = <725000>;
@@ -653,7 +671,8 @@
                                        anatop-max-voltage = <1450000>;
                                };
 
-                               reg_soc: regulator-vddsoc {
+                               reg_soc: regulator-vddsoc@20c8140 {
+                                       reg = <0x20c8140>;
                                        compatible = "fsl,anatop-regulator";
                                        regulator-name = "vddsoc";
                                        regulator-min-microvolt = <725000>;
@@ -671,15 +690,6 @@
                                };
                        };
 
-                       tempmon: tempmon {
-                               compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";
-                               interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
-                               fsl,tempmon = <&anatop>;
-                               nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
-                               nvmem-cell-names = "calib", "temp_grade";
-                               clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
-                       };
-
                        usbphy1: usbphy@20c9000 {
                                compatible = "fsl,imx6sx-usbphy", "fsl,imx23-usbphy";
                                reg = <0x020c9000 0x1000>;
@@ -750,6 +760,19 @@
                                #interrupt-cells = <3>;
                                interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-parent = <&intc>;
+                               clocks = <&clks IMX6SX_CLK_IPG>;
+                               clock-names = "ipg";
+
+                               pgc {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       pd_pci: power-domain@3 {
+                                               reg = <3>;
+                                               #power-domain-cells = <0>;
+                                               power-supply = <&reg_pcie>;
+                                       };
+                               };
                        };
 
                        iomuxc: iomuxc@20e0000 {
@@ -862,6 +885,7 @@
                        fec1: ethernet@2188000 {
                                compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
                                reg = <0x02188000 0x4000>;
+                               interrupt-names = "int0", "pps";
                                interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clks IMX6SX_CLK_ENET>,
@@ -971,6 +995,7 @@
                        fec2: ethernet@21b4000 {
                                compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
                                reg = <0x021b4000 0x4000>;
+                               interrupt-names = "int0", "pps";
                                interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clks IMX6SX_CLK_ENET>,
@@ -1138,7 +1163,7 @@
                        reg = <0x02200000 0x100000>;
                        ranges;
 
-                       spba-bus@2200000 {
+                       spba-bus@2240000 {
                                compatible = "fsl,spba-bus", "simple-bus";
                                #address-cells = <1>;
                                #size-cells = <1>;
@@ -1304,25 +1329,29 @@
 
                pcie: pcie@8ffc000 {
                        compatible = "fsl,imx6sx-pcie", "snps,dw-pcie";
-                       reg = <0x08ffc000 0x4000>; /* DBI */
+                       reg = <0x08ffc000 0x04000>, <0x08f00000 0x80000>;
+                       reg-names = "dbi", "config";
                        #address-cells = <3>;
                        #size-cells = <2>;
                        device_type = "pci";
-                                 /* configuration space */
-                       ranges = <0x00000800 0 0x08f00000 0x08f00000 0 0x00080000
-                                 /* downstream I/O */
-                                 0x81000000 0 0          0x08f80000 0 0x00010000
-                                 /* non-prefetchable memory */
-                                 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>;
                        bus-range = <0x00 0xff>;
+                       ranges = <0x81000000 0 0          0x08f80000 0 0x00010000 /* downstream I/O */
+                                 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; /* non-prefetchable memory */
                        num-lanes = <1>;
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>,
-                                <&clks IMX6SX_CLK_PCIE_AXI>,
+                       interrupt-names = "msi";
+                       #interrupt-cells = <1>;
+                       interrupt-map-mask = <0 0 0 0x7>;
+                       interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks IMX6SX_CLK_PCIE_AXI>,
                                 <&clks IMX6SX_CLK_LVDS1_OUT>,
+                                <&clks IMX6SX_CLK_PCIE_REF_125M>,
                                 <&clks IMX6SX_CLK_DISPLAY_AXI>;
-                       clock-names = "pcie_ref_125m", "pcie_axi",
-                                     "lvds_gate", "display_axi";
+                       clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi";
+                       power-domains = <&pd_pci>;
                        status = "disabled";
                };
        };