Merge tag 'for-linus-4.17-rc5-tag' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / tools / perf / pmu-events / arch / s390 / cf_z13 / extended.json
1 [
2         {
3                 "EventCode": "128",
4                 "EventName": "L1D_RO_EXCL_WRITES",
5                 "BriefDescription": "L1D Read-only Exclusive Writes",
6                 "PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line."
7         },
8         {
9                 "EventCode": "129",
10                 "EventName": "DTLB1_WRITES",
11                 "BriefDescription": "DTLB1 Writes",
12                 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer"
13         },
14         {
15                 "EventCode": "130",
16                 "EventName": "DTLB1_MISSES",
17                 "BriefDescription": "DTLB1 Misses",
18                 "PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB1 miss is in progress."
19         },
20         {
21                 "EventCode": "131",
22                 "EventName": "DTLB1_HPAGE_WRITES",
23                 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
24                 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a one-megabyte page"
25         },
26         {
27                 "EventCode": "132",
28                 "EventName": "DTLB1_GPAGE_WRITES",
29                 "BriefDescription": "DTLB1 Two-Gigabyte Page Writes",
30                 "PublicDescription": "Counter:132       Name:DTLB1_GPAGE_WRITES A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a two-gigabyte page."
31         },
32         {
33                 "EventCode": "133",
34                 "EventName": "L1D_L2D_SOURCED_WRITES",
35                 "BriefDescription": "L1D L2D Sourced Writes",
36                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache"
37         },
38         {
39                 "EventCode": "134",
40                 "EventName": "ITLB1_WRITES",
41                 "BriefDescription": "ITLB1 Writes",
42                 "PublicDescription": "A translation entry has been written to the Level-1 Instruction Translation Lookaside Buffer"
43         },
44         {
45                 "EventCode": "135",
46                 "EventName": "ITLB1_MISSES",
47                 "BriefDescription": "ITLB1 Misses",
48                 "PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle an ITLB1 miss is in progress"
49         },
50         {
51                 "EventCode": "136",
52                 "EventName": "L1I_L2I_SOURCED_WRITES",
53                 "BriefDescription": "L1I L2I Sourced Writes",
54                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache"
55         },
56         {
57                 "EventCode": "137",
58                 "EventName": "TLB2_PTE_WRITES",
59                 "BriefDescription": "TLB2 PTE Writes",
60                 "PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arrays"
61         },
62         {
63                 "EventCode": "138",
64                 "EventName": "TLB2_CRSTE_HPAGE_WRITES",
65                 "BriefDescription": "TLB2 CRSTE One-Megabyte Page Writes",
66                 "PublicDescription": "A translation entry has been written to the Level-2 TLB Combined Region Segment Table Entry arrays for a one-megabyte large page translation"
67         },
68         {
69                 "EventCode": "139",
70                 "EventName": "TLB2_CRSTE_WRITES",
71                 "BriefDescription": "TLB2 CRSTE Writes",
72                 "PublicDescription": "A translation entry has been written to the Level-2 TLB Combined Region Segment Table Entry arrays"
73         },
74         {
75                 "EventCode": "140",
76                 "EventName": "TX_C_TEND",
77                 "BriefDescription": "Completed TEND instructions in constrained TX mode",
78                 "PublicDescription": "A TEND instruction has completed in a constrained transactional-execution mode"
79         },
80         {
81                 "EventCode": "141",
82                 "EventName": "TX_NC_TEND",
83                 "BriefDescription": "Completed TEND instructions in non-constrained TX mode",
84                 "PublicDescription": "A TEND instruction has completed in a non-constrained transactional-execution mode"
85         },
86         {
87                 "EventCode": "143",
88                 "EventName": "L1C_TLB1_MISSES",
89                 "BriefDescription": "L1C TLB1 Misses",
90                 "PublicDescription": "Increments by one for any cycle where a Level-1 cache or Level-1 TLB miss is in progress."
91         },
92         {
93                 "EventCode": "144",
94                 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES",
95                 "BriefDescription": "L1D On-Chip L3 Sourced Writes",
96                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention"
97         },
98         {
99                 "EventCode": "145",
100                 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES_IV",
101                 "BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention",
102                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention"
103         },
104         {
105                 "EventCode": "146",
106                 "EventName": "L1D_ONNODE_L4_SOURCED_WRITES",
107                 "BriefDescription": "L1D On-Node L4 Sourced Writes",
108                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-4 cache"
109         },
110         {
111                 "EventCode": "147",
112                 "EventName": "L1D_ONNODE_L3_SOURCED_WRITES_IV",
113                 "BriefDescription": "L1D On-Node L3 Sourced Writes with Intervention",
114                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-3 cache with intervention"
115         },
116         {
117                 "EventCode": "148",
118                 "EventName": "L1D_ONNODE_L3_SOURCED_WRITES",
119                 "BriefDescription": "L1D On-Node L3 Sourced Writes",
120                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-3 cache without intervention"
121         },
122         {
123                 "EventCode": "149",
124                 "EventName": "L1D_ONDRAWER_L4_SOURCED_WRITES",
125                 "BriefDescription": "L1D On-Drawer L4 Sourced Writes",
126                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Drawer Level-4 cache"
127         },
128         {
129                 "EventCode": "150",
130                 "EventName": "L1D_ONDRAWER_L3_SOURCED_WRITES_IV",
131                 "BriefDescription": "L1D On-Drawer L3 Sourced Writes with Intervention",
132                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache with intervention"
133         },
134         {
135                 "EventCode": "151",
136                 "EventName": "L1D_ONDRAWER_L3_SOURCED_WRITES",
137                 "BriefDescription": "L1D On-Drawer L3 Sourced Writes",
138                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache without intervention"
139         },
140         {
141                 "EventCode": "152",
142                 "EventName": "L1D_OFFDRAWER_SCOL_L4_SOURCED_WRITES",
143                 "BriefDescription": "L1D Off-Drawer Same-Column L4 Sourced Writes",
144                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-4 cache"
145         },
146         {
147                 "EventCode": "153",
148                 "EventName": "L1D_OFFDRAWER_SCOL_L3_SOURCED_WRITES_IV",
149                 "BriefDescription": "L1D Off-Drawer Same-Column L3 Sourced Writes with Intervention",
150                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-3 cache with intervention"
151         },
152         {
153                 "EventCode": "154",
154                 "EventName": "L1D_OFFDRAWER_SCOL_L3_SOURCED_WRITES",
155                 "BriefDescription": "L1D Off-Drawer Same-Column L3 Sourced Writes",
156                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-3 cache without intervention"
157         },
158         {
159                 "EventCode": "155",
160                 "EventName": "L1D_OFFDRAWER_FCOL_L4_SOURCED_WRITES",
161                 "BriefDescription": "L1D Off-Drawer Far-Column L3 Sourced Writes",
162                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-4 cache"
163         },
164         {
165                 "EventCode": "156",
166                 "EventName": "L1D_OFFDRAWER_FCOL_L3_SOURCED_WRITES_IV",
167                 "BriefDescription": "L1D Off-Drawer Far-Column L3 Sourced Writes with Intervention",
168                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-3 cache with intervention"
169         },
170         {
171                 "EventCode": "157",
172                 "EventName": "L1D_OFFDRAWER_FCOL_L3_SOURCED_WRITES",
173                 "BriefDescription": "L1D Off-Drawer Far-Column L3 Sourced Writes",
174                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-3 cache without intervention"
175         },
176         {
177                 "EventCode": "158",
178                 "EventName": "L1D_ONNODE_MEM_SOURCED_WRITES",
179                 "BriefDescription": "L1D On-Node Memory Sourced Writes",
180                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Node memory"
181         },
182         {
183                 "EventCode": "159",
184                 "EventName": "L1D_ONDRAWER_MEM_SOURCED_WRITES",
185                 "BriefDescription": "L1D On-Drawer Memory Sourced Writes",
186                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Drawer memory"
187         },
188         {
189                 "EventCode": "160",
190                 "EventName": "L1D_OFFDRAWER_MEM_SOURCED_WRITES",
191                 "BriefDescription": "L1D Off-Drawer Memory Sourced Writes",
192                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Drawer memory"
193         },
194         {
195                 "EventCode": "161",
196                 "EventName": "L1D_ONCHIP_MEM_SOURCED_WRITES",
197                 "BriefDescription": "L1D On-Chip Memory Sourced Writes",
198                 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Chip memory"
199         },
200         {
201                 "EventCode": "162",
202                 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES",
203                 "BriefDescription": "L1I On-Chip L3 Sourced Writes",
204                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention"
205         },
206         {
207                 "EventCode": "163",
208                 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES_IV",
209                 "BriefDescription": "L1I On-Chip L3 Sourced Writes with Intervention",
210                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On Chip Level-3 cache with intervention"
211         },
212         {
213                 "EventCode": "164",
214                 "EventName": "L1I_ONNODE_L4_SOURCED_WRITES",
215                 "BriefDescription": "L1I On-Chip L4 Sourced Writes",
216                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Node Level-4 cache"
217         },
218         {
219                 "EventCode": "165",
220                 "EventName": "L1I_ONNODE_L3_SOURCED_WRITES_IV",
221                 "BriefDescription": "L1I On-Node L3 Sourced Writes with Intervention",
222                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Node Level-3 cache with intervention"
223         },
224         {
225                 "EventCode": "166",
226                 "EventName": "L1I_ONNODE_L3_SOURCED_WRITES",
227                 "BriefDescription": "L1I On-Node L3 Sourced Writes",
228                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Node Level-3 cache without intervention"
229         },
230         {
231                 "EventCode": "167",
232                 "EventName": "L1I_ONDRAWER_L4_SOURCED_WRITES",
233                 "BriefDescription": "L1I On-Drawer L4 Sourced Writes",
234                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Drawer Level-4 cache"
235         },
236         {
237                 "EventCode": "168",
238                 "EventName": "L1I_ONDRAWER_L3_SOURCED_WRITES_IV",
239                 "BriefDescription": "L1I On-Drawer L3 Sourced Writes with Intervention",
240                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache with intervention"
241         },
242         {
243                 "EventCode": "169",
244                 "EventName": "L1I_ONDRAWER_L3_SOURCED_WRITES",
245                 "BriefDescription": "L1I On-Drawer L3 Sourced Writes",
246                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache without intervention"
247         },
248         {
249                 "EventCode": "170",
250                 "EventName": "L1I_OFFDRAWER_SCOL_L4_SOURCED_WRITES",
251                 "BriefDescription": "L1I Off-Drawer Same-Column L4 Sourced Writes",
252                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-4 cache"
253         },
254         {
255                 "EventCode": "171",
256                 "EventName": "L1I_OFFDRAWER_SCOL_L3_SOURCED_WRITES_IV",
257                 "BriefDescription": "L1I Off-Drawer Same-Column L3 Sourced Writes with Intervention",
258                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-3 cache with intervention"
259         },
260         {
261                 "EventCode": "172",
262                 "EventName": "L1I_OFFDRAWER_SCOL_L3_SOURCED_WRITES",
263                 "BriefDescription": "L1I Off-Drawer Same-Column L3 Sourced Writes",
264                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-3 cache without intervention"
265         },
266         {
267                 "EventCode": "173",
268                 "EventName": "L1I_OFFDRAWER_FCOL_L4_SOURCED_WRITES",
269                 "BriefDescription": "L1I Off-Drawer Far-Column L4 Sourced Writes",
270                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-4 cache"
271         },
272         {
273                 "EventCode": "174",
274                 "EventName": "L1I_OFFDRAWER_FCOL_L3_SOURCED_WRITES_IV",
275                 "BriefDescription": "L1I Off-Drawer Far-Column L3 Sourced Writes with Intervention",
276                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-3 cache with intervention"
277         },
278         {
279                 "EventCode": "175",
280                 "EventName": "L1I_OFFDRAWER_FCOL_L3_SOURCED_WRITES",
281                 "BriefDescription": "L1I Off-Drawer Far-Column L3 Sourced Writes",
282                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-3 cache without intervention"
283         },
284         {
285                 "EventCode": "176",
286                 "EventName": "L1I_ONNODE_MEM_SOURCED_WRITES",
287                 "BriefDescription": "L1I On-Node Memory Sourced Writes",
288                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Node memory"
289         },
290         {
291                 "EventCode": "177",
292                 "EventName": "L1I_ONDRAWER_MEM_SOURCED_WRITES",
293                 "BriefDescription": "L1I On-Drawer Memory Sourced Writes",
294                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Drawer memory"
295         },
296         {
297                 "EventCode": "178",
298                 "EventName": "L1I_OFFDRAWER_MEM_SOURCED_WRITES",
299                 "BriefDescription": "L1I Off-Drawer Memory Sourced Writes",
300                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Drawer memory"
301         },
302         {
303                 "EventCode": "179",
304                 "EventName": "L1I_ONCHIP_MEM_SOURCED_WRITES",
305                 "BriefDescription": "L1I On-Chip Memory Sourced Writes",
306                 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Chip memory"
307         },
308         {
309                 "EventCode": "218",
310                 "EventName": "TX_NC_TABORT",
311                 "BriefDescription": "Aborted transactions in non-constrained TX mode",
312                 "PublicDescription": "A transaction abort has occurred in a non-constrained transactional-execution mode"
313         },
314         {
315                 "EventCode": "219",
316                 "EventName": "TX_C_TABORT_NO_SPECIAL",
317                 "BriefDescription": "Aborted transactions in constrained TX mode not using special completion logic",
318                 "PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is not using any special logic to allow the transaction to complete"
319         },
320         {
321                 "EventCode": "220",
322                 "EventName": "TX_C_TABORT_SPECIAL",
323                 "BriefDescription": "Aborted transactions in constrained TX mode using special completion logic",
324                 "PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is using special logic to allow the transaction to complete"
325         },
326         {
327                 "EventCode": "448",
328                 "EventName": "MT_DIAG_CYCLES_ONE_THR_ACTIVE",
329                 "BriefDescription": "Cycle count with one thread active",
330                 "PublicDescription": "Cycle count with one thread active"
331         },
332         {
333                 "EventCode": "449",
334                 "EventName": "MT_DIAG_CYCLES_TWO_THR_ACTIVE",
335                 "BriefDescription": "Cycle count with two threads active",
336                 "PublicDescription": "Cycle count with two threads active"
337         },
338 ]