1 // SPDX-License-Identifier: GPL-2.0-only
3 * intel_pt.c: Intel Processor Trace support
4 * Copyright (c) 2013-2015, Intel Corporation.
9 #include <linux/kernel.h>
10 #include <linux/types.h>
11 #include <linux/bitops.h>
12 #include <linux/log2.h>
13 #include <linux/zalloc.h>
14 #include <linux/err.h>
17 #include "../../../util/session.h"
18 #include "../../../util/event.h"
19 #include "../../../util/evlist.h"
20 #include "../../../util/evsel.h"
21 #include "../../../util/evsel_config.h"
22 #include "../../../util/cpumap.h"
23 #include "../../../util/mmap.h"
24 #include <subcmd/parse-options.h>
25 #include "../../../util/parse-events.h"
26 #include "../../../util/pmus.h"
27 #include "../../../util/debug.h"
28 #include "../../../util/auxtrace.h"
29 #include "../../../util/perf_api_probe.h"
30 #include "../../../util/record.h"
31 #include "../../../util/target.h"
32 #include "../../../util/tsc.h"
33 #include <internal/lib.h> // page_size
34 #include "../../../util/intel-pt.h"
36 #define KiB(x) ((x) * 1024)
37 #define MiB(x) ((x) * 1024 * 1024)
38 #define KiB_MASK(x) (KiB(x) - 1)
39 #define MiB_MASK(x) (MiB(x) - 1)
41 #define INTEL_PT_PSB_PERIOD_NEAR 256
43 struct intel_pt_snapshot_ref {
49 struct intel_pt_recording {
50 struct auxtrace_record itr;
51 struct perf_pmu *intel_pt_pmu;
52 int have_sched_switch;
53 struct evlist *evlist;
55 bool snapshot_init_done;
57 size_t snapshot_ref_buf_size;
59 struct intel_pt_snapshot_ref *snapshot_refs;
63 static int intel_pt_parse_terms_with_default(const struct perf_pmu *pmu,
67 struct parse_events_terms terms;
68 struct perf_event_attr attr = { .size = 0, };
71 parse_events_terms__init(&terms);
72 err = parse_events_terms(&terms, str, /*input=*/ NULL);
76 attr.config = *config;
77 err = perf_pmu__config_terms(pmu, &attr, &terms, /*zero=*/true, /*err=*/NULL);
81 *config = attr.config;
83 parse_events_terms__exit(&terms);
87 static int intel_pt_parse_terms(const struct perf_pmu *pmu, const char *str, u64 *config)
90 return intel_pt_parse_terms_with_default(pmu, str, config);
93 static u64 intel_pt_masked_bits(u64 mask, u64 bits)
95 const u64 top_bit = 1ULL << 63;
99 for (i = 0; i < 64; i++) {
100 if (mask & top_bit) {
112 static int intel_pt_read_config(struct perf_pmu *intel_pt_pmu, const char *str,
113 struct evlist *evlist, u64 *res)
120 mask = perf_pmu__format_bits(intel_pt_pmu, str);
124 evlist__for_each_entry(evlist, evsel) {
125 if (evsel->core.attr.type == intel_pt_pmu->type) {
126 *res = intel_pt_masked_bits(mask, evsel->core.attr.config);
134 static size_t intel_pt_psb_period(struct perf_pmu *intel_pt_pmu,
135 struct evlist *evlist)
138 int err, topa_multiple_entries;
141 if (perf_pmu__scan_file(intel_pt_pmu, "caps/topa_multiple_entries",
142 "%d", &topa_multiple_entries) != 1)
143 topa_multiple_entries = 0;
146 * Use caps/topa_multiple_entries to indicate early hardware that had
147 * extra frequent PSBs.
149 if (!topa_multiple_entries) {
154 err = intel_pt_read_config(intel_pt_pmu, "psb_period", evlist, &val);
158 psb_period = 1 << (val + 11);
160 pr_debug2("%s psb_period %zu\n", intel_pt_pmu->name, psb_period);
164 static int intel_pt_pick_bit(int bits, int target)
168 for (pos = 0; bits; bits >>= 1, pos++) {
170 if (pos <= target || pick < 0)
180 static u64 intel_pt_default_config(const struct perf_pmu *intel_pt_pmu)
183 int mtc, mtc_periods = 0, mtc_period;
184 int psb_cyc, psb_periods, psb_period;
190 dirfd = perf_pmu__event_source_devices_fd();
192 pos += scnprintf(buf + pos, sizeof(buf) - pos, "tsc");
194 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "caps/mtc", "%d",
199 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "caps/mtc_periods", "%x",
203 mtc_period = intel_pt_pick_bit(mtc_periods, 3);
204 pos += scnprintf(buf + pos, sizeof(buf) - pos,
205 ",mtc,mtc_period=%d", mtc_period);
209 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "caps/psb_cyc", "%d",
213 if (psb_cyc && mtc_periods) {
214 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "caps/psb_periods", "%x",
218 psb_period = intel_pt_pick_bit(psb_periods, 3);
219 pos += scnprintf(buf + pos, sizeof(buf) - pos,
220 ",psb_period=%d", psb_period);
224 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "format/pt", "%c", &c) == 1 &&
225 perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "format/branch", "%c", &c) == 1)
226 pos += scnprintf(buf + pos, sizeof(buf) - pos, ",pt,branch");
228 pr_debug2("%s default config: %s\n", intel_pt_pmu->name, buf);
230 intel_pt_parse_terms(intel_pt_pmu, buf, &config);
236 static int intel_pt_parse_snapshot_options(struct auxtrace_record *itr,
237 struct record_opts *opts,
240 struct intel_pt_recording *ptr =
241 container_of(itr, struct intel_pt_recording, itr);
242 unsigned long long snapshot_size = 0;
246 snapshot_size = strtoull(str, &endptr, 0);
247 if (*endptr || snapshot_size > SIZE_MAX)
251 opts->auxtrace_snapshot_mode = true;
252 opts->auxtrace_snapshot_size = snapshot_size;
254 ptr->snapshot_size = snapshot_size;
259 void intel_pt_pmu_default_config(const struct perf_pmu *intel_pt_pmu,
260 struct perf_event_attr *attr)
263 static bool initialized;
266 config = intel_pt_default_config(intel_pt_pmu);
269 attr->config = config;
272 static const char *intel_pt_find_filter(struct evlist *evlist,
273 struct perf_pmu *intel_pt_pmu)
277 evlist__for_each_entry(evlist, evsel) {
278 if (evsel->core.attr.type == intel_pt_pmu->type)
279 return evsel->filter;
285 static size_t intel_pt_filter_bytes(const char *filter)
287 size_t len = filter ? strlen(filter) : 0;
289 return len ? roundup(len + 1, 8) : 0;
293 intel_pt_info_priv_size(struct auxtrace_record *itr, struct evlist *evlist)
295 struct intel_pt_recording *ptr =
296 container_of(itr, struct intel_pt_recording, itr);
297 const char *filter = intel_pt_find_filter(evlist, ptr->intel_pt_pmu);
299 ptr->priv_size = (INTEL_PT_AUXTRACE_PRIV_MAX * sizeof(u64)) +
300 intel_pt_filter_bytes(filter);
301 ptr->priv_size += sizeof(u64); /* Cap Event Trace */
303 return ptr->priv_size;
306 static void intel_pt_tsc_ctc_ratio(u32 *n, u32 *d)
308 unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;
310 __get_cpuid(0x15, &eax, &ebx, &ecx, &edx);
315 static int intel_pt_info_fill(struct auxtrace_record *itr,
316 struct perf_session *session,
317 struct perf_record_auxtrace_info *auxtrace_info,
320 struct intel_pt_recording *ptr =
321 container_of(itr, struct intel_pt_recording, itr);
322 struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
323 struct perf_event_mmap_page *pc;
324 struct perf_tsc_conversion tc = { .time_mult = 0, };
325 bool cap_user_time_zero = false, per_cpu_mmaps;
326 u64 tsc_bit, mtc_bit, mtc_freq_bits, cyc_bit, noretcomp_bit;
327 u32 tsc_ctc_ratio_n, tsc_ctc_ratio_d;
328 unsigned long max_non_turbo_ratio;
329 size_t filter_str_len;
335 if (priv_size != ptr->priv_size)
338 intel_pt_parse_terms(intel_pt_pmu, "tsc", &tsc_bit);
339 intel_pt_parse_terms(intel_pt_pmu, "noretcomp", &noretcomp_bit);
340 intel_pt_parse_terms(intel_pt_pmu, "mtc", &mtc_bit);
341 mtc_freq_bits = perf_pmu__format_bits(intel_pt_pmu, "mtc_period");
342 intel_pt_parse_terms(intel_pt_pmu, "cyc", &cyc_bit);
344 intel_pt_tsc_ctc_ratio(&tsc_ctc_ratio_n, &tsc_ctc_ratio_d);
346 if (perf_pmu__scan_file(intel_pt_pmu, "max_nonturbo_ratio",
347 "%lu", &max_non_turbo_ratio) != 1)
348 max_non_turbo_ratio = 0;
349 if (perf_pmu__scan_file(intel_pt_pmu, "caps/event_trace",
350 "%d", &event_trace) != 1)
353 filter = intel_pt_find_filter(session->evlist, ptr->intel_pt_pmu);
354 filter_str_len = filter ? strlen(filter) : 0;
356 if (!session->evlist->core.nr_mmaps)
359 pc = session->evlist->mmap[0].core.base;
361 err = perf_read_tsc_conversion(pc, &tc);
363 if (err != -EOPNOTSUPP)
366 cap_user_time_zero = tc.time_mult != 0;
368 if (!cap_user_time_zero)
369 ui__warning("Intel Processor Trace: TSC not available\n");
372 per_cpu_mmaps = !perf_cpu_map__empty(session->evlist->core.user_requested_cpus);
374 auxtrace_info->type = PERF_AUXTRACE_INTEL_PT;
375 auxtrace_info->priv[INTEL_PT_PMU_TYPE] = intel_pt_pmu->type;
376 auxtrace_info->priv[INTEL_PT_TIME_SHIFT] = tc.time_shift;
377 auxtrace_info->priv[INTEL_PT_TIME_MULT] = tc.time_mult;
378 auxtrace_info->priv[INTEL_PT_TIME_ZERO] = tc.time_zero;
379 auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO] = cap_user_time_zero;
380 auxtrace_info->priv[INTEL_PT_TSC_BIT] = tsc_bit;
381 auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT] = noretcomp_bit;
382 auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH] = ptr->have_sched_switch;
383 auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE] = ptr->snapshot_mode;
384 auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS] = per_cpu_mmaps;
385 auxtrace_info->priv[INTEL_PT_MTC_BIT] = mtc_bit;
386 auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS] = mtc_freq_bits;
387 auxtrace_info->priv[INTEL_PT_TSC_CTC_N] = tsc_ctc_ratio_n;
388 auxtrace_info->priv[INTEL_PT_TSC_CTC_D] = tsc_ctc_ratio_d;
389 auxtrace_info->priv[INTEL_PT_CYC_BIT] = cyc_bit;
390 auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO] = max_non_turbo_ratio;
391 auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] = filter_str_len;
393 info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
395 if (filter_str_len) {
396 size_t len = intel_pt_filter_bytes(filter);
398 strncpy((char *)info, filter, len);
402 *info++ = event_trace;
407 #ifdef HAVE_LIBTRACEEVENT
408 static int intel_pt_track_switches(struct evlist *evlist)
410 const char *sched_switch = "sched:sched_switch";
414 if (!evlist__can_select_event(evlist, sched_switch))
417 evsel = evlist__add_sched_switch(evlist, true);
419 err = PTR_ERR(evsel);
420 pr_debug2("%s: failed to create %s, error = %d\n",
421 __func__, sched_switch, err);
425 evsel->immediate = true;
431 static void intel_pt_valid_str(char *str, size_t len, u64 valid)
433 unsigned int val, last = 0, state = 1;
438 for (val = 0; val <= 64; val++, valid >>= 1) {
443 p += scnprintf(str + p, len - p, ",");
446 p += scnprintf(str + p, len - p, "%u", val);
461 p += scnprintf(str + p, len - p, ",%u", last);
465 p += scnprintf(str + p, len - p, "-%u", last);
477 static int intel_pt_val_config_term(struct perf_pmu *intel_pt_pmu, int dirfd,
478 const char *caps, const char *name,
479 const char *supported, u64 config)
483 unsigned long long valid;
487 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, caps, "%llx", &valid) != 1)
491 perf_pmu__scan_file_at(intel_pt_pmu, dirfd, supported, "%d", &ok) == 1 && !ok)
496 bits = perf_pmu__format_bits(intel_pt_pmu, name);
500 for (shift = 0; bits && !(bits & 1); shift++)
508 if (valid & (1 << config))
511 intel_pt_valid_str(valid_str, sizeof(valid_str), valid);
512 pr_err("Invalid %s for %s. Valid values are: %s\n",
513 name, INTEL_PT_PMU_NAME, valid_str);
517 static int intel_pt_validate_config(struct perf_pmu *intel_pt_pmu,
526 dirfd = perf_pmu__event_source_devices_fd();
531 * If supported, force pass-through config term (pt=1) even if user
532 * sets pt=0, which avoids senseless kernel errors.
534 if (perf_pmu__scan_file_at(intel_pt_pmu, dirfd, "format/pt", "%c", &c) == 1 &&
535 !(evsel->core.attr.config & 1)) {
536 pr_warning("pt=0 doesn't make sense, forcing pt=1\n");
537 evsel->core.attr.config |= 1;
540 err = intel_pt_val_config_term(intel_pt_pmu, dirfd, "caps/cycle_thresholds",
541 "cyc_thresh", "caps/psb_cyc",
542 evsel->core.attr.config);
546 err = intel_pt_val_config_term(intel_pt_pmu, dirfd, "caps/mtc_periods",
547 "mtc_period", "caps/mtc",
548 evsel->core.attr.config);
552 err = intel_pt_val_config_term(intel_pt_pmu, dirfd, "caps/psb_periods",
553 "psb_period", "caps/psb_cyc",
554 evsel->core.attr.config);
561 static void intel_pt_min_max_sample_sz(struct evlist *evlist,
562 size_t *min_sz, size_t *max_sz)
566 evlist__for_each_entry(evlist, evsel) {
567 size_t sz = evsel->core.attr.aux_sample_size;
571 if (min_sz && (sz < *min_sz || !*min_sz))
573 if (max_sz && sz > *max_sz)
579 * Currently, there is not enough information to disambiguate different PEBS
580 * events, so only allow one.
582 static bool intel_pt_too_many_aux_output(struct evlist *evlist)
585 int aux_output_cnt = 0;
587 evlist__for_each_entry(evlist, evsel)
588 aux_output_cnt += !!evsel->core.attr.aux_output;
590 if (aux_output_cnt > 1) {
591 pr_err(INTEL_PT_PMU_NAME " supports at most one event with aux-output\n");
598 static int intel_pt_recording_options(struct auxtrace_record *itr,
599 struct evlist *evlist,
600 struct record_opts *opts)
602 struct intel_pt_recording *ptr =
603 container_of(itr, struct intel_pt_recording, itr);
604 struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
605 bool have_timing_info, need_immediate = false;
606 struct evsel *evsel, *intel_pt_evsel = NULL;
607 const struct perf_cpu_map *cpus = evlist->core.user_requested_cpus;
608 bool privileged = perf_event_paranoid_check(-1);
612 ptr->evlist = evlist;
613 ptr->snapshot_mode = opts->auxtrace_snapshot_mode;
615 evlist__for_each_entry(evlist, evsel) {
616 if (evsel->core.attr.type == intel_pt_pmu->type) {
617 if (intel_pt_evsel) {
618 pr_err("There may be only one " INTEL_PT_PMU_NAME " event\n");
621 evsel->core.attr.freq = 0;
622 evsel->core.attr.sample_period = 1;
623 evsel->no_aux_samples = true;
624 evsel->needs_auxtrace_mmap = true;
625 intel_pt_evsel = evsel;
626 opts->full_auxtrace = true;
630 if (opts->auxtrace_snapshot_mode && !opts->full_auxtrace) {
631 pr_err("Snapshot mode (-S option) requires " INTEL_PT_PMU_NAME " PMU event (-e " INTEL_PT_PMU_NAME ")\n");
635 if (opts->auxtrace_snapshot_mode && opts->auxtrace_sample_mode) {
636 pr_err("Snapshot mode (" INTEL_PT_PMU_NAME " PMU) and sample trace cannot be used together\n");
640 if (opts->use_clockid) {
641 pr_err("Cannot use clockid (-k option) with " INTEL_PT_PMU_NAME "\n");
645 if (intel_pt_too_many_aux_output(evlist))
648 if (!opts->full_auxtrace)
651 if (opts->auxtrace_sample_mode)
652 evsel__set_config_if_unset(intel_pt_pmu, intel_pt_evsel,
655 err = intel_pt_validate_config(intel_pt_pmu, intel_pt_evsel);
659 /* Set default sizes for snapshot mode */
660 if (opts->auxtrace_snapshot_mode) {
661 size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist);
663 if (!opts->auxtrace_snapshot_size && !opts->auxtrace_mmap_pages) {
665 opts->auxtrace_mmap_pages = MiB(4) / page_size;
667 opts->auxtrace_mmap_pages = KiB(128) / page_size;
668 if (opts->mmap_pages == UINT_MAX)
669 opts->mmap_pages = KiB(256) / page_size;
671 } else if (!opts->auxtrace_mmap_pages && !privileged &&
672 opts->mmap_pages == UINT_MAX) {
673 opts->mmap_pages = KiB(256) / page_size;
675 if (!opts->auxtrace_snapshot_size)
676 opts->auxtrace_snapshot_size =
677 opts->auxtrace_mmap_pages * (size_t)page_size;
678 if (!opts->auxtrace_mmap_pages) {
679 size_t sz = opts->auxtrace_snapshot_size;
681 sz = round_up(sz, page_size) / page_size;
682 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz);
684 if (opts->auxtrace_snapshot_size >
685 opts->auxtrace_mmap_pages * (size_t)page_size) {
686 pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n",
687 opts->auxtrace_snapshot_size,
688 opts->auxtrace_mmap_pages * (size_t)page_size);
691 if (!opts->auxtrace_snapshot_size || !opts->auxtrace_mmap_pages) {
692 pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n");
695 pr_debug2("Intel PT snapshot size: %zu\n",
696 opts->auxtrace_snapshot_size);
698 opts->auxtrace_snapshot_size <= psb_period +
699 INTEL_PT_PSB_PERIOD_NEAR)
700 ui__warning("Intel PT snapshot size (%zu) may be too small for PSB period (%zu)\n",
701 opts->auxtrace_snapshot_size, psb_period);
704 /* Set default sizes for sample mode */
705 if (opts->auxtrace_sample_mode) {
706 size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist);
707 size_t min_sz = 0, max_sz = 0;
709 intel_pt_min_max_sample_sz(evlist, &min_sz, &max_sz);
710 if (!opts->auxtrace_mmap_pages && !privileged &&
711 opts->mmap_pages == UINT_MAX)
712 opts->mmap_pages = KiB(256) / page_size;
713 if (!opts->auxtrace_mmap_pages) {
714 size_t sz = round_up(max_sz, page_size) / page_size;
716 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz);
718 if (max_sz > opts->auxtrace_mmap_pages * (size_t)page_size) {
719 pr_err("Sample size %zu must not be greater than AUX area tracing mmap size %zu\n",
721 opts->auxtrace_mmap_pages * (size_t)page_size);
724 pr_debug2("Intel PT min. sample size: %zu max. sample size: %zu\n",
727 min_sz <= psb_period + INTEL_PT_PSB_PERIOD_NEAR)
728 ui__warning("Intel PT sample size (%zu) may be too small for PSB period (%zu)\n",
732 /* Set default sizes for full trace mode */
733 if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) {
735 opts->auxtrace_mmap_pages = MiB(4) / page_size;
737 opts->auxtrace_mmap_pages = KiB(128) / page_size;
738 if (opts->mmap_pages == UINT_MAX)
739 opts->mmap_pages = KiB(256) / page_size;
743 /* Validate auxtrace_mmap_pages */
744 if (opts->auxtrace_mmap_pages) {
745 size_t sz = opts->auxtrace_mmap_pages * (size_t)page_size;
748 if (opts->auxtrace_snapshot_mode || opts->auxtrace_sample_mode)
753 if (sz < min_sz || !is_power_of_2(sz)) {
754 pr_err("Invalid mmap size for Intel Processor Trace: must be at least %zuKiB and a power of 2\n",
760 if (!opts->auxtrace_snapshot_mode && !opts->auxtrace_sample_mode) {
761 u32 aux_watermark = opts->auxtrace_mmap_pages * page_size / 4;
763 intel_pt_evsel->core.attr.aux_watermark = aux_watermark;
766 intel_pt_parse_terms(intel_pt_pmu, "tsc", &tsc_bit);
768 if (opts->full_auxtrace && (intel_pt_evsel->core.attr.config & tsc_bit))
769 have_timing_info = true;
771 have_timing_info = false;
774 * Per-cpu recording needs sched_switch events to distinguish different
777 if (have_timing_info && !perf_cpu_map__empty(cpus) &&
778 !record_opts__no_switch_events(opts)) {
779 if (perf_can_record_switch_events()) {
780 bool cpu_wide = !target__none(&opts->target) &&
781 !target__has_task(&opts->target);
783 if (!cpu_wide && perf_can_record_cpu_wide()) {
784 struct evsel *switch_evsel;
786 switch_evsel = evlist__add_dummy_on_all_cpus(evlist);
790 switch_evsel->core.attr.context_switch = 1;
791 switch_evsel->immediate = true;
793 evsel__set_sample_bit(switch_evsel, TID);
794 evsel__set_sample_bit(switch_evsel, TIME);
795 evsel__set_sample_bit(switch_evsel, CPU);
796 evsel__reset_sample_bit(switch_evsel, BRANCH_STACK);
798 opts->record_switch_events = false;
799 ptr->have_sched_switch = 3;
801 opts->record_switch_events = true;
802 need_immediate = true;
804 ptr->have_sched_switch = 3;
806 ptr->have_sched_switch = 2;
809 #ifdef HAVE_LIBTRACEEVENT
810 err = intel_pt_track_switches(evlist);
812 pr_debug2("Unable to select sched:sched_switch\n");
816 ptr->have_sched_switch = 1;
821 if (have_timing_info && !intel_pt_evsel->core.attr.exclude_kernel &&
822 perf_can_record_text_poke_events() && perf_can_record_cpu_wide())
823 opts->text_poke = true;
825 if (intel_pt_evsel) {
827 * To obtain the auxtrace buffer file descriptor, the auxtrace
828 * event must come first.
830 evlist__to_front(evlist, intel_pt_evsel);
832 * In the case of per-cpu mmaps, we need the CPU on the
835 if (!perf_cpu_map__empty(cpus))
836 evsel__set_sample_bit(intel_pt_evsel, CPU);
839 /* Add dummy event to keep tracking */
840 if (opts->full_auxtrace) {
841 bool need_system_wide_tracking;
842 struct evsel *tracking_evsel;
845 * User space tasks can migrate between CPUs, so when tracing
846 * selected CPUs, sideband for all CPUs is still needed.
848 need_system_wide_tracking = opts->target.cpu_list &&
849 !intel_pt_evsel->core.attr.exclude_user;
851 tracking_evsel = evlist__add_aux_dummy(evlist, need_system_wide_tracking);
855 evlist__set_tracking_event(evlist, tracking_evsel);
858 tracking_evsel->immediate = true;
860 /* In per-cpu case, always need the time of mmap events etc */
861 if (!perf_cpu_map__empty(cpus)) {
862 evsel__set_sample_bit(tracking_evsel, TIME);
863 /* And the CPU for switch events */
864 evsel__set_sample_bit(tracking_evsel, CPU);
866 evsel__reset_sample_bit(tracking_evsel, BRANCH_STACK);
870 * Warn the user when we do not have enough information to decode i.e.
871 * per-cpu with no sched_switch (except workload-only).
873 if (!ptr->have_sched_switch && !perf_cpu_map__empty(cpus) &&
874 !target__none(&opts->target) &&
875 !intel_pt_evsel->core.attr.exclude_user)
876 ui__warning("Intel Processor Trace decoding will not be possible except for kernel tracing!\n");
881 static int intel_pt_snapshot_start(struct auxtrace_record *itr)
883 struct intel_pt_recording *ptr =
884 container_of(itr, struct intel_pt_recording, itr);
887 evlist__for_each_entry(ptr->evlist, evsel) {
888 if (evsel->core.attr.type == ptr->intel_pt_pmu->type)
889 return evsel__disable(evsel);
894 static int intel_pt_snapshot_finish(struct auxtrace_record *itr)
896 struct intel_pt_recording *ptr =
897 container_of(itr, struct intel_pt_recording, itr);
900 evlist__for_each_entry(ptr->evlist, evsel) {
901 if (evsel->core.attr.type == ptr->intel_pt_pmu->type)
902 return evsel__enable(evsel);
907 static int intel_pt_alloc_snapshot_refs(struct intel_pt_recording *ptr, int idx)
909 const size_t sz = sizeof(struct intel_pt_snapshot_ref);
910 int cnt = ptr->snapshot_ref_cnt, new_cnt = cnt * 2;
911 struct intel_pt_snapshot_ref *refs;
916 while (new_cnt <= idx)
919 refs = calloc(new_cnt, sz);
923 memcpy(refs, ptr->snapshot_refs, cnt * sz);
925 ptr->snapshot_refs = refs;
926 ptr->snapshot_ref_cnt = new_cnt;
931 static void intel_pt_free_snapshot_refs(struct intel_pt_recording *ptr)
935 for (i = 0; i < ptr->snapshot_ref_cnt; i++)
936 zfree(&ptr->snapshot_refs[i].ref_buf);
937 zfree(&ptr->snapshot_refs);
940 static void intel_pt_recording_free(struct auxtrace_record *itr)
942 struct intel_pt_recording *ptr =
943 container_of(itr, struct intel_pt_recording, itr);
945 intel_pt_free_snapshot_refs(ptr);
949 static int intel_pt_alloc_snapshot_ref(struct intel_pt_recording *ptr, int idx,
950 size_t snapshot_buf_size)
952 size_t ref_buf_size = ptr->snapshot_ref_buf_size;
955 ref_buf = zalloc(ref_buf_size);
959 ptr->snapshot_refs[idx].ref_buf = ref_buf;
960 ptr->snapshot_refs[idx].ref_offset = snapshot_buf_size - ref_buf_size;
965 static size_t intel_pt_snapshot_ref_buf_size(struct intel_pt_recording *ptr,
966 size_t snapshot_buf_size)
968 const size_t max_size = 256 * 1024;
969 size_t buf_size = 0, psb_period;
971 if (ptr->snapshot_size <= 64 * 1024)
974 psb_period = intel_pt_psb_period(ptr->intel_pt_pmu, ptr->evlist);
976 buf_size = psb_period * 2;
978 if (!buf_size || buf_size > max_size)
981 if (buf_size >= snapshot_buf_size)
984 if (buf_size >= ptr->snapshot_size / 2)
990 static int intel_pt_snapshot_init(struct intel_pt_recording *ptr,
991 size_t snapshot_buf_size)
993 if (ptr->snapshot_init_done)
996 ptr->snapshot_init_done = true;
998 ptr->snapshot_ref_buf_size = intel_pt_snapshot_ref_buf_size(ptr,
1005 * intel_pt_compare_buffers - compare bytes in a buffer to a circular buffer.
1006 * @buf1: first buffer
1007 * @compare_size: number of bytes to compare
1008 * @buf2: second buffer (a circular buffer)
1009 * @offs2: offset in second buffer
1010 * @buf2_size: size of second buffer
1012 * The comparison allows for the possibility that the bytes to compare in the
1013 * circular buffer are not contiguous. It is assumed that @compare_size <=
1014 * @buf2_size. This function returns %false if the bytes are identical, %true
1017 static bool intel_pt_compare_buffers(void *buf1, size_t compare_size,
1018 void *buf2, size_t offs2, size_t buf2_size)
1020 size_t end2 = offs2 + compare_size, part_size;
1022 if (end2 <= buf2_size)
1023 return memcmp(buf1, buf2 + offs2, compare_size);
1025 part_size = end2 - buf2_size;
1026 if (memcmp(buf1, buf2 + offs2, part_size))
1029 compare_size -= part_size;
1031 return memcmp(buf1 + part_size, buf2, compare_size);
1034 static bool intel_pt_compare_ref(void *ref_buf, size_t ref_offset,
1035 size_t ref_size, size_t buf_size,
1036 void *data, size_t head)
1038 size_t ref_end = ref_offset + ref_size;
1040 if (ref_end > buf_size) {
1041 if (head > ref_offset || head < ref_end - buf_size)
1043 } else if (head > ref_offset && head < ref_end) {
1047 return intel_pt_compare_buffers(ref_buf, ref_size, data, ref_offset,
1051 static void intel_pt_copy_ref(void *ref_buf, size_t ref_size, size_t buf_size,
1052 void *data, size_t head)
1054 if (head >= ref_size) {
1055 memcpy(ref_buf, data + head - ref_size, ref_size);
1057 memcpy(ref_buf, data, head);
1059 memcpy(ref_buf + head, data + buf_size - ref_size, ref_size);
1063 static bool intel_pt_wrapped(struct intel_pt_recording *ptr, int idx,
1064 struct auxtrace_mmap *mm, unsigned char *data,
1067 struct intel_pt_snapshot_ref *ref = &ptr->snapshot_refs[idx];
1070 wrapped = intel_pt_compare_ref(ref->ref_buf, ref->ref_offset,
1071 ptr->snapshot_ref_buf_size, mm->len,
1074 intel_pt_copy_ref(ref->ref_buf, ptr->snapshot_ref_buf_size, mm->len,
1080 static bool intel_pt_first_wrap(u64 *data, size_t buf_size)
1089 for (i = a; i < b; i++) {
1097 static int intel_pt_find_snapshot(struct auxtrace_record *itr, int idx,
1098 struct auxtrace_mmap *mm, unsigned char *data,
1099 u64 *head, u64 *old)
1101 struct intel_pt_recording *ptr =
1102 container_of(itr, struct intel_pt_recording, itr);
1106 pr_debug3("%s: mmap index %d old head %zu new head %zu\n",
1107 __func__, idx, (size_t)*old, (size_t)*head);
1109 err = intel_pt_snapshot_init(ptr, mm->len);
1113 if (idx >= ptr->snapshot_ref_cnt) {
1114 err = intel_pt_alloc_snapshot_refs(ptr, idx);
1119 if (ptr->snapshot_ref_buf_size) {
1120 if (!ptr->snapshot_refs[idx].ref_buf) {
1121 err = intel_pt_alloc_snapshot_ref(ptr, idx, mm->len);
1125 wrapped = intel_pt_wrapped(ptr, idx, mm, data, *head);
1127 wrapped = ptr->snapshot_refs[idx].wrapped;
1128 if (!wrapped && intel_pt_first_wrap((u64 *)data, mm->len)) {
1129 ptr->snapshot_refs[idx].wrapped = true;
1135 * In full trace mode 'head' continually increases. However in snapshot
1136 * mode 'head' is an offset within the buffer. Here 'old' and 'head'
1137 * are adjusted to match the full trace case which expects that 'old' is
1138 * always less than 'head'.
1152 pr_debug3("%s: wrap-around %sdetected, adjusted old head %zu adjusted new head %zu\n",
1153 __func__, wrapped ? "" : "not ", (size_t)*old, (size_t)*head);
1158 pr_err("%s: failed, error %d\n", __func__, err);
1162 static u64 intel_pt_reference(struct auxtrace_record *itr __maybe_unused)
1167 struct auxtrace_record *intel_pt_recording_init(int *err)
1169 struct perf_pmu *intel_pt_pmu = perf_pmus__find(INTEL_PT_PMU_NAME);
1170 struct intel_pt_recording *ptr;
1175 if (setenv("JITDUMP_USE_ARCH_TIMESTAMP", "1", 1)) {
1180 ptr = zalloc(sizeof(struct intel_pt_recording));
1186 ptr->intel_pt_pmu = intel_pt_pmu;
1187 ptr->itr.pmu = intel_pt_pmu;
1188 ptr->itr.recording_options = intel_pt_recording_options;
1189 ptr->itr.info_priv_size = intel_pt_info_priv_size;
1190 ptr->itr.info_fill = intel_pt_info_fill;
1191 ptr->itr.free = intel_pt_recording_free;
1192 ptr->itr.snapshot_start = intel_pt_snapshot_start;
1193 ptr->itr.snapshot_finish = intel_pt_snapshot_finish;
1194 ptr->itr.find_snapshot = intel_pt_find_snapshot;
1195 ptr->itr.parse_snapshot_options = intel_pt_parse_snapshot_options;
1196 ptr->itr.reference = intel_pt_reference;
1197 ptr->itr.read_finish = auxtrace_record__read_finish;
1199 * Decoding starts at a PSB packet. Minimum PSB period is 2K so 4K
1200 * should give at least 1 PSB per sample.
1202 ptr->itr.default_aux_sample_size = 4096;