1 // SPDX-License-Identifier: GPL-2.0-only
3 * skl.c - Implementation of ASoC Intel SKL HD Audio driver
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
8 * Derived mostly from Intel HDA driver with following copyrights:
9 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
10 * PeiSen Hou <pshou@realtek.com.tw>
11 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
16 #include <linux/module.h>
17 #include <linux/pci.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/platform_device.h>
20 #include <linux/firmware.h>
21 #include <linux/delay.h>
22 #include <sound/pcm.h>
23 #include <sound/soc-acpi.h>
24 #include <sound/soc-acpi-intel-match.h>
25 #include <sound/hda_register.h>
26 #include <sound/hdaudio.h>
27 #include <sound/hda_i915.h>
28 #include <sound/hda_codec.h>
29 #include <sound/intel-nhlt.h>
30 #include <sound/intel-dsp-config.h>
32 #include "skl-sst-dsp.h"
33 #include "skl-sst-ipc.h"
35 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
36 #include "../../../soc/codecs/hdac_hda.h"
38 static int skl_pci_binding;
39 module_param_named(pci_binding, skl_pci_binding, int, 0444);
40 MODULE_PARM_DESC(pci_binding, "PCI binding (0=auto, 1=only legacy, 2=only asoc");
43 * initialize the PCI registers
45 static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg,
46 unsigned char mask, unsigned char val)
50 pci_read_config_byte(pci, reg, &data);
53 pci_write_config_byte(pci, reg, data);
56 static void skl_init_pci(struct skl_dev *skl)
58 struct hdac_bus *bus = skl_to_bus(skl);
61 * Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
62 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
63 * Ensuring these bits are 0 clears playback static on some HD Audio
65 * The PCI register TCSEL is defined in the Intel manuals.
67 dev_dbg(bus->dev, "Clearing TCSEL\n");
68 skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0);
71 static void update_pci_dword(struct pci_dev *pci,
72 unsigned int reg, u32 mask, u32 val)
76 pci_read_config_dword(pci, reg, &data);
79 pci_write_config_dword(pci, reg, data);
83 * skl_enable_miscbdcge - enable/dsiable CGCTL.MISCBDCGE bits
85 * @dev: device pointer
86 * @enable: enable/disable flag
88 static void skl_enable_miscbdcge(struct device *dev, bool enable)
90 struct pci_dev *pci = to_pci_dev(dev);
93 val = enable ? AZX_CGCTL_MISCBDCGE_MASK : 0;
95 update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, val);
99 * skl_clock_power_gating: Enable/Disable clock and power gating
101 * @dev: Device pointer
102 * @enable: Enable/Disable flag
104 static void skl_clock_power_gating(struct device *dev, bool enable)
106 struct pci_dev *pci = to_pci_dev(dev);
107 struct hdac_bus *bus = pci_get_drvdata(pci);
110 /* Update PDCGE bit of CGCTL register */
111 val = enable ? AZX_CGCTL_ADSPDCGE : 0;
112 update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_ADSPDCGE, val);
114 /* Update L1SEN bit of EM2 register */
115 val = enable ? AZX_REG_VS_EM2_L1SEN : 0;
116 snd_hdac_chip_updatel(bus, VS_EM2, AZX_REG_VS_EM2_L1SEN, val);
118 /* Update ADSPPGD bit of PGCTL register */
119 val = enable ? 0 : AZX_PGCTL_ADSPPGD;
120 update_pci_dword(pci, AZX_PCIREG_PGCTL, AZX_PGCTL_ADSPPGD, val);
124 * While performing reset, controller may not come back properly causing
125 * issues, so recommendation is to set CGCTL.MISCBDCGE to 0 then do reset
126 * (init chip) and then again set CGCTL.MISCBDCGE to 1
128 static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
130 struct hdac_ext_link *hlink;
133 snd_hdac_set_codec_wakeup(bus, true);
134 skl_enable_miscbdcge(bus->dev, false);
135 ret = snd_hdac_bus_init_chip(bus, full_reset);
137 /* Reset stream-to-link mapping */
138 list_for_each_entry(hlink, &bus->hlink_list, list)
139 writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
141 skl_enable_miscbdcge(bus->dev, true);
142 snd_hdac_set_codec_wakeup(bus, false);
147 void skl_update_d0i3c(struct device *dev, bool enable)
149 struct pci_dev *pci = to_pci_dev(dev);
150 struct hdac_bus *bus = pci_get_drvdata(pci);
154 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
155 /* Do not write to D0I3C until command in progress bit is cleared */
156 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
158 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
161 /* Highly unlikely. But if it happens, flag error explicitly */
163 dev_err(bus->dev, "Before D0I3C update: D0I3C CIP timeout\n");
168 reg = reg | AZX_REG_VS_D0I3C_I3;
170 reg = reg & (~AZX_REG_VS_D0I3C_I3);
172 snd_hdac_chip_writeb(bus, VS_D0I3C, reg);
175 /* Wait for cmd in progress to be cleared before exiting the function */
176 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
177 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
179 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
182 /* Highly unlikely. But if it happens, flag error explicitly */
184 dev_err(bus->dev, "After D0I3C update: D0I3C CIP timeout\n");
188 dev_dbg(bus->dev, "D0I3C register = 0x%x\n",
189 snd_hdac_chip_readb(bus, VS_D0I3C));
193 * skl_dum_set - set DUM bit in EM2 register
194 * @bus: HD-audio core bus
196 * Addresses incorrect position reporting for capture streams.
197 * Used on device power up.
199 static void skl_dum_set(struct hdac_bus *bus)
201 /* For the DUM bit to be set, CRST needs to be out of reset state */
202 if (!(snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET)) {
203 skl_enable_miscbdcge(bus->dev, false);
204 snd_hdac_bus_exit_link_reset(bus);
205 skl_enable_miscbdcge(bus->dev, true);
208 snd_hdac_chip_updatel(bus, VS_EM2, AZX_VS_EM2_DUM, AZX_VS_EM2_DUM);
211 /* called from IRQ */
212 static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
214 snd_pcm_period_elapsed(hstr->substream);
217 static irqreturn_t skl_interrupt(int irq, void *dev_id)
219 struct hdac_bus *bus = dev_id;
222 if (!pm_runtime_active(bus->dev))
225 spin_lock(&bus->reg_lock);
227 status = snd_hdac_chip_readl(bus, INTSTS);
228 if (status == 0 || status == 0xffffffff) {
229 spin_unlock(&bus->reg_lock);
234 status = snd_hdac_chip_readb(bus, RIRBSTS);
235 if (status & RIRB_INT_MASK) {
236 if (status & RIRB_INT_RESPONSE)
237 snd_hdac_bus_update_rirb(bus);
238 snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
241 spin_unlock(&bus->reg_lock);
243 return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED;
246 static irqreturn_t skl_threaded_handler(int irq, void *dev_id)
248 struct hdac_bus *bus = dev_id;
251 status = snd_hdac_chip_readl(bus, INTSTS);
253 snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update);
258 static int skl_acquire_irq(struct hdac_bus *bus, int do_disconnect)
260 struct skl_dev *skl = bus_to_skl(bus);
263 ret = request_threaded_irq(skl->pci->irq, skl_interrupt,
264 skl_threaded_handler,
266 KBUILD_MODNAME, bus);
269 "unable to grab IRQ %d, disabling device\n",
274 bus->irq = skl->pci->irq;
275 pci_intx(skl->pci, 1);
280 static int skl_suspend_late(struct device *dev)
282 struct pci_dev *pci = to_pci_dev(dev);
283 struct hdac_bus *bus = pci_get_drvdata(pci);
284 struct skl_dev *skl = bus_to_skl(bus);
286 return skl_suspend_late_dsp(skl);
290 static int _skl_suspend(struct hdac_bus *bus)
292 struct skl_dev *skl = bus_to_skl(bus);
293 struct pci_dev *pci = to_pci_dev(bus->dev);
296 snd_hdac_ext_bus_link_power_down_all(bus);
298 ret = skl_suspend_dsp(skl);
302 snd_hdac_bus_stop_chip(bus);
303 update_pci_dword(pci, AZX_PCIREG_PGCTL,
304 AZX_PGCTL_LSRMD_MASK, AZX_PGCTL_LSRMD_MASK);
305 skl_enable_miscbdcge(bus->dev, false);
306 snd_hdac_bus_enter_link_reset(bus);
307 skl_enable_miscbdcge(bus->dev, true);
308 skl_cleanup_resources(skl);
313 static int _skl_resume(struct hdac_bus *bus)
315 struct skl_dev *skl = bus_to_skl(bus);
319 skl_init_chip(bus, true);
321 return skl_resume_dsp(skl);
325 #ifdef CONFIG_PM_SLEEP
329 static int skl_suspend(struct device *dev)
331 struct pci_dev *pci = to_pci_dev(dev);
332 struct hdac_bus *bus = pci_get_drvdata(pci);
333 struct skl_dev *skl = bus_to_skl(bus);
337 * Do not suspend if streams which are marked ignore suspend are
338 * running, we need to save the state for these and continue
340 if (skl->supend_active) {
341 /* turn off the links and stop the CORB/RIRB DMA if it is On */
342 snd_hdac_ext_bus_link_power_down_all(bus);
344 if (bus->cmd_dma_state)
345 snd_hdac_bus_stop_cmd_io(bus);
347 enable_irq_wake(bus->irq);
350 ret = _skl_suspend(bus);
353 skl->fw_loaded = false;
359 static int skl_resume(struct device *dev)
361 struct pci_dev *pci = to_pci_dev(dev);
362 struct hdac_bus *bus = pci_get_drvdata(pci);
363 struct skl_dev *skl = bus_to_skl(bus);
364 struct hdac_ext_link *hlink;
368 * resume only when we are not in suspend active, otherwise need to
371 if (skl->supend_active) {
372 pci_restore_state(pci);
373 snd_hdac_ext_bus_link_power_up_all(bus);
374 disable_irq_wake(bus->irq);
376 * turn On the links which are On before active suspend
377 * and start the CORB/RIRB DMA if On before
380 list_for_each_entry(hlink, &bus->hlink_list, list) {
381 if (hlink->ref_count)
382 snd_hdac_ext_bus_link_power_up(hlink);
386 if (bus->cmd_dma_state)
387 snd_hdac_bus_init_cmd_io(bus);
389 ret = _skl_resume(bus);
391 /* turn off the links which are off before suspend */
392 list_for_each_entry(hlink, &bus->hlink_list, list) {
393 if (!hlink->ref_count)
394 snd_hdac_ext_bus_link_power_down(hlink);
397 if (!bus->cmd_dma_state)
398 snd_hdac_bus_stop_cmd_io(bus);
403 #endif /* CONFIG_PM_SLEEP */
406 static int skl_runtime_suspend(struct device *dev)
408 struct pci_dev *pci = to_pci_dev(dev);
409 struct hdac_bus *bus = pci_get_drvdata(pci);
411 dev_dbg(bus->dev, "in %s\n", __func__);
413 return _skl_suspend(bus);
416 static int skl_runtime_resume(struct device *dev)
418 struct pci_dev *pci = to_pci_dev(dev);
419 struct hdac_bus *bus = pci_get_drvdata(pci);
421 dev_dbg(bus->dev, "in %s\n", __func__);
423 return _skl_resume(bus);
425 #endif /* CONFIG_PM */
427 static const struct dev_pm_ops skl_pm = {
428 SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume)
429 SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL)
430 .suspend_late = skl_suspend_late,
436 static int skl_free(struct hdac_bus *bus)
438 struct skl_dev *skl = bus_to_skl(bus);
440 skl->init_done = 0; /* to be sure */
442 snd_hdac_stop_streams_and_chip(bus);
445 free_irq(bus->irq, (void *)bus);
446 snd_hdac_bus_free_stream_pages(bus);
447 snd_hdac_ext_stream_free_all(bus);
448 snd_hdac_link_free_all(bus);
451 iounmap(bus->remap_addr);
453 pci_release_regions(skl->pci);
454 pci_disable_device(skl->pci);
456 snd_hdac_ext_bus_exit(bus);
458 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
459 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
460 snd_hdac_i915_exit(bus);
467 * For each ssp there are 3 clocks (mclk/sclk/sclkfs).
468 * e.g. for ssp0, clocks will be named as
469 * "ssp0_mclk", "ssp0_sclk", "ssp0_sclkfs"
470 * So for skl+, there are 6 ssps, so 18 clocks will be created.
472 static struct skl_ssp_clk skl_ssp_clks[] = {
473 {.name = "ssp0_mclk"}, {.name = "ssp1_mclk"}, {.name = "ssp2_mclk"},
474 {.name = "ssp3_mclk"}, {.name = "ssp4_mclk"}, {.name = "ssp5_mclk"},
475 {.name = "ssp0_sclk"}, {.name = "ssp1_sclk"}, {.name = "ssp2_sclk"},
476 {.name = "ssp3_sclk"}, {.name = "ssp4_sclk"}, {.name = "ssp5_sclk"},
477 {.name = "ssp0_sclkfs"}, {.name = "ssp1_sclkfs"},
478 {.name = "ssp2_sclkfs"},
479 {.name = "ssp3_sclkfs"}, {.name = "ssp4_sclkfs"},
480 {.name = "ssp5_sclkfs"},
483 static struct snd_soc_acpi_mach *skl_find_hda_machine(struct skl_dev *skl,
484 struct snd_soc_acpi_mach *machines)
486 struct snd_soc_acpi_mach *mach;
488 /* point to common table */
489 mach = snd_soc_acpi_intel_hda_machines;
491 /* all entries in the machine table use the same firmware */
492 mach->fw_filename = machines->fw_filename;
497 static int skl_find_machine(struct skl_dev *skl, void *driver_data)
499 struct hdac_bus *bus = skl_to_bus(skl);
500 struct snd_soc_acpi_mach *mach = driver_data;
501 struct skl_machine_pdata *pdata;
503 mach = snd_soc_acpi_find_machine(mach);
505 dev_dbg(bus->dev, "No matching I2S machine driver found\n");
506 mach = skl_find_hda_machine(skl, driver_data);
508 dev_err(bus->dev, "No matching machine driver found\n");
514 skl->fw_name = mach->fw_filename;
518 skl->use_tplg_pcm = pdata->use_tplg_pcm;
519 mach->mach_params.dmic_num =
520 intel_nhlt_get_dmic_geo(&skl->pci->dev,
527 static int skl_machine_device_register(struct skl_dev *skl)
529 struct snd_soc_acpi_mach *mach = skl->mach;
530 struct hdac_bus *bus = skl_to_bus(skl);
531 struct platform_device *pdev;
534 pdev = platform_device_alloc(mach->drv_name, -1);
536 dev_err(bus->dev, "platform device alloc failed\n");
540 mach->mach_params.platform = dev_name(bus->dev);
541 mach->mach_params.codec_mask = bus->codec_mask;
543 ret = platform_device_add_data(pdev, (const void *)mach, sizeof(*mach));
545 dev_err(bus->dev, "failed to add machine device platform data\n");
546 platform_device_put(pdev);
550 ret = platform_device_add(pdev);
552 dev_err(bus->dev, "failed to add machine device\n");
553 platform_device_put(pdev);
563 static void skl_machine_device_unregister(struct skl_dev *skl)
566 platform_device_unregister(skl->i2s_dev);
569 static int skl_dmic_device_register(struct skl_dev *skl)
571 struct hdac_bus *bus = skl_to_bus(skl);
572 struct platform_device *pdev;
575 /* SKL has one dmic port, so allocate dmic device for this */
576 pdev = platform_device_alloc("dmic-codec", -1);
578 dev_err(bus->dev, "failed to allocate dmic device\n");
582 ret = platform_device_add(pdev);
584 dev_err(bus->dev, "failed to add dmic device: %d\n", ret);
585 platform_device_put(pdev);
588 skl->dmic_dev = pdev;
593 static void skl_dmic_device_unregister(struct skl_dev *skl)
596 platform_device_unregister(skl->dmic_dev);
599 static struct skl_clk_parent_src skl_clk_src[] = {
600 { .clk_id = SKL_XTAL, .name = "xtal" },
601 { .clk_id = SKL_CARDINAL, .name = "cardinal", .rate = 24576000 },
602 { .clk_id = SKL_PLL, .name = "pll", .rate = 96000000 },
605 struct skl_clk_parent_src *skl_get_parent_clk(u8 clk_id)
609 for (i = 0; i < ARRAY_SIZE(skl_clk_src); i++) {
610 if (skl_clk_src[i].clk_id == clk_id)
611 return &skl_clk_src[i];
617 static void init_skl_xtal_rate(int pci_id)
622 skl_clk_src[0].rate = 24000000;
626 skl_clk_src[0].rate = 19200000;
631 static int skl_clock_device_register(struct skl_dev *skl)
633 struct platform_device_info pdevinfo = {NULL};
634 struct skl_clk_pdata *clk_pdata;
639 clk_pdata = devm_kzalloc(&skl->pci->dev, sizeof(*clk_pdata),
644 init_skl_xtal_rate(skl->pci->device);
646 clk_pdata->parent_clks = skl_clk_src;
647 clk_pdata->ssp_clks = skl_ssp_clks;
648 clk_pdata->num_clks = ARRAY_SIZE(skl_ssp_clks);
650 /* Query NHLT to fill the rates and parent */
651 skl_get_clks(skl, clk_pdata->ssp_clks);
652 clk_pdata->pvt_data = skl;
654 /* Register Platform device */
655 pdevinfo.parent = &skl->pci->dev;
657 pdevinfo.name = "skl-ssp-clk";
658 pdevinfo.data = clk_pdata;
659 pdevinfo.size_data = sizeof(*clk_pdata);
660 skl->clk_dev = platform_device_register_full(&pdevinfo);
661 return PTR_ERR_OR_ZERO(skl->clk_dev);
664 static void skl_clock_device_unregister(struct skl_dev *skl)
667 platform_device_unregister(skl->clk_dev);
670 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
672 #define IDISP_INTEL_VENDOR_ID 0x80860000
675 * load the legacy codec driver
677 static void load_codec_module(struct hda_codec *codec)
680 char modalias[MODULE_NAME_LEN];
681 const char *mod = NULL;
683 snd_hdac_codec_modalias(&codec->core, modalias, sizeof(modalias));
685 dev_dbg(&codec->core.dev, "loading %s codec module\n", mod);
690 #endif /* CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC */
692 static void skl_codec_device_exit(struct device *dev)
694 snd_hdac_device_exit(dev_to_hdac_dev(dev));
697 static struct hda_codec *skl_codec_device_init(struct hdac_bus *bus, int addr)
699 struct hda_codec *codec;
702 codec = snd_hda_codec_device_init(to_hda_bus(bus), addr, "ehdaudio%dD%d", bus->idx, addr);
704 dev_err(bus->dev, "device init failed for hdac device\n");
708 codec->core.type = HDA_DEV_ASOC;
709 codec->core.dev.release = skl_codec_device_exit;
711 ret = snd_hdac_device_register(&codec->core);
713 dev_err(bus->dev, "failed to register hdac device\n");
714 snd_hdac_device_exit(&codec->core);
722 * Probe the given codec address
724 static int probe_codec(struct hdac_bus *bus, int addr)
726 unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
727 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
728 unsigned int res = -1;
729 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
730 struct skl_dev *skl = bus_to_skl(bus);
731 struct hdac_hda_priv *hda_codec;
733 struct hda_codec *codec;
735 mutex_lock(&bus->cmd_mutex);
736 snd_hdac_bus_send_cmd(bus, cmd);
737 snd_hdac_bus_get_response(bus, addr, &res);
738 mutex_unlock(&bus->cmd_mutex);
741 dev_dbg(bus->dev, "codec #%d probed OK: %x\n", addr, res);
743 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
744 hda_codec = devm_kzalloc(&skl->pci->dev, sizeof(*hda_codec),
749 codec = skl_codec_device_init(bus, addr);
751 return PTR_ERR(codec);
753 hda_codec->codec = codec;
754 dev_set_drvdata(&codec->core.dev, hda_codec);
756 /* use legacy bus only for HDA codecs, idisp uses ext bus */
757 if ((res & 0xFFFF0000) != IDISP_INTEL_VENDOR_ID) {
758 codec->core.type = HDA_DEV_LEGACY;
759 load_codec_module(hda_codec->codec);
763 codec = skl_codec_device_init(bus, addr);
764 return PTR_ERR_OR_ZERO(codec);
765 #endif /* CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC */
768 /* Codec initialization */
769 static void skl_codec_create(struct hdac_bus *bus)
773 max_slots = HDA_MAX_CODECS;
775 /* First try to probe all given codec slots */
776 for (c = 0; c < max_slots; c++) {
777 if ((bus->codec_mask & (1 << c))) {
778 if (probe_codec(bus, c) < 0) {
780 * Some BIOSen give you wrong codec addresses
784 "Codec #%d probe error; disabling it...\n", c);
785 bus->codec_mask &= ~(1 << c);
787 * More badly, accessing to a non-existing
788 * codec often screws up the controller bus,
789 * and disturbs the further communications.
790 * Thus if an error occurs during probing,
791 * better to reset the controller bus to get
792 * back to the sanity state.
794 snd_hdac_bus_stop_chip(bus);
795 skl_init_chip(bus, true);
801 static int skl_i915_init(struct hdac_bus *bus)
806 * The HDMI codec is in GPU so we need to ensure that it is powered
807 * up and ready for probe
809 err = snd_hdac_i915_init(bus);
813 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, true);
818 static void skl_probe_work(struct work_struct *work)
820 struct skl_dev *skl = container_of(work, struct skl_dev, probe_work);
821 struct hdac_bus *bus = skl_to_bus(skl);
822 struct hdac_ext_link *hlink;
825 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
826 err = skl_i915_init(bus);
834 err = skl_init_chip(bus, true);
836 dev_err(bus->dev, "Init chip failed with err: %d\n", err);
840 /* codec detection */
841 if (!bus->codec_mask)
842 dev_info(bus->dev, "no hda codecs found!\n");
844 /* create codec instances */
845 skl_codec_create(bus);
847 /* register platform dai and controls */
848 err = skl_platform_register(bus->dev);
850 dev_err(bus->dev, "platform register failed: %d\n", err);
854 err = skl_machine_device_register(skl);
856 dev_err(bus->dev, "machine register failed: %d\n", err);
861 * we are done probing so decrement link counts
863 list_for_each_entry(hlink, &bus->hlink_list, list)
864 snd_hdac_ext_bus_link_put(bus, hlink);
866 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
867 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
870 pm_runtime_put_noidle(bus->dev);
871 pm_runtime_allow(bus->dev);
877 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
878 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
884 static int skl_create(struct pci_dev *pci,
885 struct skl_dev **rskl)
887 struct hdac_ext_bus_ops *ext_ops = NULL;
889 struct hdac_bus *bus;
890 struct hda_bus *hbus;
895 err = pci_enable_device(pci);
899 skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL);
901 pci_disable_device(pci);
905 hbus = skl_to_hbus(skl);
906 bus = skl_to_bus(skl);
908 INIT_LIST_HEAD(&skl->ppl_list);
909 INIT_LIST_HEAD(&skl->bind_list);
911 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
912 ext_ops = snd_soc_hdac_hda_get_ops();
914 snd_hdac_ext_bus_init(bus, &pci->dev, NULL, ext_ops);
917 INIT_WORK(&skl->probe_work, skl_probe_work);
918 bus->bdl_pos_adj = 0;
920 mutex_init(&hbus->prepare_mutex);
922 hbus->mixer_assigned = -1;
923 hbus->modelname = "sklbus";
930 static int skl_first_init(struct hdac_bus *bus)
932 struct skl_dev *skl = bus_to_skl(bus);
933 struct pci_dev *pci = skl->pci;
936 int cp_streams, pb_streams, start_idx;
938 err = pci_request_regions(pci, "Skylake HD audio");
942 bus->addr = pci_resource_start(pci, 0);
943 bus->remap_addr = pci_ioremap_bar(pci, 0);
944 if (bus->remap_addr == NULL) {
945 dev_err(bus->dev, "ioremap error\n");
949 snd_hdac_bus_parse_capabilities(bus);
951 /* check if PPCAP exists */
953 dev_err(bus->dev, "bus ppcap not set, HDAudio or DSP not present?\n");
957 if (skl_acquire_irq(bus, 0) < 0)
961 synchronize_irq(bus->irq);
963 gcap = snd_hdac_chip_readw(bus, GCAP);
964 dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap);
966 /* read number of streams from GCAP register */
967 cp_streams = (gcap >> 8) & 0x0f;
968 pb_streams = (gcap >> 12) & 0x0f;
970 if (!pb_streams && !cp_streams) {
971 dev_err(bus->dev, "no streams found in GCAP definitions?\n");
975 bus->num_streams = cp_streams + pb_streams;
977 /* allow 64bit DMA address if supported by H/W */
978 if (dma_set_mask_and_coherent(bus->dev, DMA_BIT_MASK(64)))
979 dma_set_mask_and_coherent(bus->dev, DMA_BIT_MASK(32));
980 dma_set_max_seg_size(bus->dev, UINT_MAX);
982 /* initialize streams */
983 snd_hdac_ext_stream_init_all
984 (bus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
985 start_idx = cp_streams;
986 snd_hdac_ext_stream_init_all
987 (bus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
989 err = snd_hdac_bus_alloc_stream_pages(bus);
996 static int skl_probe(struct pci_dev *pci,
997 const struct pci_device_id *pci_id)
1000 struct hdac_bus *bus = NULL;
1003 switch (skl_pci_binding) {
1004 case SND_SKL_PCI_BIND_AUTO:
1005 err = snd_intel_dsp_driver_probe(pci);
1006 if (err != SND_INTEL_DSP_DRIVER_ANY &&
1007 err != SND_INTEL_DSP_DRIVER_SST)
1010 case SND_SKL_PCI_BIND_LEGACY:
1011 dev_info(&pci->dev, "Module parameter forced binding with HDAudio legacy, aborting probe\n");
1013 case SND_SKL_PCI_BIND_ASOC:
1014 dev_info(&pci->dev, "Module parameter forced binding with SKL driver, bypassed detection logic\n");
1017 dev_err(&pci->dev, "invalid value for skl_pci_binding module parameter, ignored\n");
1021 /* we use ext core ops, so provide NULL for ops here */
1022 err = skl_create(pci, &skl);
1026 bus = skl_to_bus(skl);
1028 err = skl_first_init(bus);
1030 dev_err(bus->dev, "skl_first_init failed with err: %d\n", err);
1034 skl->pci_id = pci->device;
1036 device_disable_async_suspend(bus->dev);
1038 skl->nhlt = intel_nhlt_init(bus->dev);
1040 if (skl->nhlt == NULL) {
1041 #if !IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
1042 dev_err(bus->dev, "no nhlt info found\n");
1046 dev_warn(bus->dev, "no nhlt info found, continuing to try to enable HDAudio codec\n");
1050 err = skl_nhlt_create_sysfs(skl);
1052 dev_err(bus->dev, "skl_nhlt_create_sysfs failed with err: %d\n", err);
1056 skl_nhlt_update_topology_bin(skl);
1058 /* create device for dsp clk */
1059 err = skl_clock_device_register(skl);
1061 dev_err(bus->dev, "skl_clock_device_register failed with err: %d\n", err);
1066 pci_set_drvdata(skl->pci, bus);
1069 err = skl_find_machine(skl, (void *)pci_id->driver_data);
1071 dev_err(bus->dev, "skl_find_machine failed with err: %d\n", err);
1075 err = skl_init_dsp(skl);
1077 dev_dbg(bus->dev, "error failed to register dsp\n");
1080 skl->enable_miscbdcge = skl_enable_miscbdcge;
1081 skl->clock_power_gating = skl_clock_power_gating;
1084 snd_hdac_ext_bus_get_ml_capabilities(bus);
1086 /* create device for soc dmic */
1087 err = skl_dmic_device_register(skl);
1089 dev_err(bus->dev, "skl_dmic_device_register failed with err: %d\n", err);
1093 schedule_work(&skl->probe_work);
1100 skl_clock_device_unregister(skl);
1103 intel_nhlt_free(skl->nhlt);
1110 static void skl_shutdown(struct pci_dev *pci)
1112 struct hdac_bus *bus = pci_get_drvdata(pci);
1113 struct hdac_stream *s;
1114 struct hdac_ext_stream *stream;
1115 struct skl_dev *skl;
1120 skl = bus_to_skl(bus);
1122 if (!skl->init_done)
1125 snd_hdac_stop_streams_and_chip(bus);
1126 list_for_each_entry(s, &bus->stream_list, list) {
1127 stream = stream_to_hdac_ext_stream(s);
1128 snd_hdac_ext_stream_decouple(bus, stream, false);
1131 snd_hdac_bus_stop_chip(bus);
1134 static void skl_remove(struct pci_dev *pci)
1136 struct hdac_bus *bus = pci_get_drvdata(pci);
1137 struct skl_dev *skl = bus_to_skl(bus);
1139 cancel_work_sync(&skl->probe_work);
1141 pm_runtime_get_noresume(&pci->dev);
1143 /* codec removal, invoke bus_device_remove */
1144 snd_hdac_ext_bus_device_remove(bus);
1146 skl_platform_unregister(&pci->dev);
1148 skl_machine_device_unregister(skl);
1149 skl_dmic_device_unregister(skl);
1150 skl_clock_device_unregister(skl);
1151 skl_nhlt_remove_sysfs(skl);
1153 intel_nhlt_free(skl->nhlt);
1158 static const struct pci_device_id skl_ids[] = {
1159 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKL)
1160 /* Sunrise Point-LP */
1161 { PCI_DEVICE(0x8086, 0x9d70),
1162 .driver_data = (unsigned long)&snd_soc_acpi_intel_skl_machines},
1164 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_APL)
1166 { PCI_DEVICE(0x8086, 0x5a98),
1167 .driver_data = (unsigned long)&snd_soc_acpi_intel_bxt_machines},
1169 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_KBL)
1171 { PCI_DEVICE(0x8086, 0x9D71),
1172 .driver_data = (unsigned long)&snd_soc_acpi_intel_kbl_machines},
1174 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_GLK)
1176 { PCI_DEVICE(0x8086, 0x3198),
1177 .driver_data = (unsigned long)&snd_soc_acpi_intel_glk_machines},
1179 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_CNL)
1181 { PCI_DEVICE(0x8086, 0x9dc8),
1182 .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
1184 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_CFL)
1186 { PCI_DEVICE(0x8086, 0xa348),
1187 .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
1189 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_CML_LP)
1191 { PCI_DEVICE(0x8086, 0x02c8),
1192 .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
1194 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_CML_H)
1196 { PCI_DEVICE(0x8086, 0x06c8),
1197 .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
1201 MODULE_DEVICE_TABLE(pci, skl_ids);
1203 /* pci_driver definition */
1204 static struct pci_driver skl_driver = {
1205 .name = KBUILD_MODNAME,
1206 .id_table = skl_ids,
1208 .remove = skl_remove,
1209 .shutdown = skl_shutdown,
1214 module_pci_driver(skl_driver);
1216 MODULE_LICENSE("GPL v2");
1217 MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");