sound/soc/fsl/fsl_rpmsg.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright 2018-2021 NXP
   3
   4 #include <linux/clk.h>
   5 #include <linux/clk-provider.h>
   6 #include <linux/delay.h>
   7 #include <linux/dmaengine.h>
   8 #include <linux/module.h>
   9 #include <linux/of.h>
  10 #include <linux/pm_runtime.h>
  11 #include <linux/rpmsg.h>
  12 #include <linux/slab.h>
  13 #include <sound/core.h>
  14 #include <sound/dmaengine_pcm.h>
  15 #include <sound/pcm_params.h>
  16
  17 #include "fsl_rpmsg.h"
  18 #include "imx-pcm.h"
  19
  20 #define FSL_RPMSG_RATES        (SNDRV_PCM_RATE_8000 | \
  21                                 SNDRV_PCM_RATE_16000 | \
  22                                 SNDRV_PCM_RATE_48000)
  23 #define FSL_RPMSG_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
  24
  25 /* 192kHz/32bit/2ch/60s size is 0x574e00 */
  26 #define LPA_LARGE_BUFFER_SIZE  (0x6000000)
  27
  28 static const unsigned int fsl_rpmsg_rates[] = {
  29         8000, 11025, 16000, 22050, 44100,
  30         32000, 48000, 96000, 88200, 176400, 192000,
  31         352800, 384000, 705600, 768000, 1411200, 2822400,
  32 };
  33
  34 static const struct snd_pcm_hw_constraint_list fsl_rpmsg_rate_constraints = {
  35         .count = ARRAY_SIZE(fsl_rpmsg_rates),
  36         .list = fsl_rpmsg_rates,
  37 };
  38
  39 static int fsl_rpmsg_hw_params(struct snd_pcm_substream *substream,
  40                                struct snd_pcm_hw_params *params,
  41                                struct snd_soc_dai *dai)
  42 {
  43         struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai);
  44         struct clk *p = rpmsg->mclk, *pll = NULL, *npll = NULL;
  45         u64 rate = params_rate(params);
  46         int ret = 0;
  47
  48         /* Get current pll parent */
  49         while (p && rpmsg->pll8k && rpmsg->pll11k) {
  50                 struct clk *pp = clk_get_parent(p);
  51
  52                 if (clk_is_match(pp, rpmsg->pll8k) ||
  53                     clk_is_match(pp, rpmsg->pll11k)) {
  54                         pll = pp;
  55                         break;
  56                 }
  57                 p = pp;
  58         }
  59
  60         /* Switch to another pll parent if needed. */
  61         if (pll) {
  62                 npll = (do_div(rate, 8000) ? rpmsg->pll11k : rpmsg->pll8k);
  63                 if (!clk_is_match(pll, npll)) {
  64                         ret = clk_set_parent(p, npll);
  65                         if (ret < 0)
  66                                 dev_warn(dai->dev, "failed to set parent %s: %d\n",
  67                                          __clk_get_name(npll), ret);
  68                 }
  69         }
  70
  71         if (!(rpmsg->mclk_streams & BIT(substream->stream))) {
  72                 ret = clk_prepare_enable(rpmsg->mclk);
  73                 if (ret) {
  74                         dev_err(dai->dev, "failed to enable mclk: %d\n", ret);
  75                         return ret;
  76                 }
  77
  78                 rpmsg->mclk_streams |= BIT(substream->stream);
  79         }
  80
  81         return ret;
  82 }
  83
  84 static int fsl_rpmsg_hw_free(struct snd_pcm_substream *substream,
  85                              struct snd_soc_dai *dai)
  86 {
  87         struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai);
  88
  89         if (rpmsg->mclk_streams & BIT(substream->stream)) {
  90                 clk_disable_unprepare(rpmsg->mclk);
  91                 rpmsg->mclk_streams &= ~BIT(substream->stream);
  92         }
  93
  94         return 0;
  95 }
  96
  97 static int fsl_rpmsg_startup(struct snd_pcm_substream *substream,
  98                              struct snd_soc_dai *cpu_dai)
  99 {
 100         int ret;
 101
 102         ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
 103                                          SNDRV_PCM_HW_PARAM_RATE,
 104                                          &fsl_rpmsg_rate_constraints);
 105
 106         return ret;
 107 }
 108
 109 static const struct snd_soc_dai_ops fsl_rpmsg_dai_ops = {
 110         .startup        = fsl_rpmsg_startup,
 111         .hw_params      = fsl_rpmsg_hw_params,
 112         .hw_free        = fsl_rpmsg_hw_free,
 113 };
 114
 115 static struct snd_soc_dai_driver fsl_rpmsg_dai = {
 116         .playback = {
 117                 .stream_name = "CPU-Playback",
 118                 .channels_min = 2,
 119                 .channels_max = 32,
 120                 .rates = SNDRV_PCM_RATE_KNOT,
 121                 .formats = FSL_RPMSG_FORMATS,
 122         },
 123         .capture = {
 124                 .stream_name = "CPU-Capture",
 125                 .channels_min = 2,
 126                 .channels_max = 32,
 127                 .rates = SNDRV_PCM_RATE_KNOT,
 128                 .formats = FSL_RPMSG_FORMATS,
 129         },
 130         .symmetric_rate        = 1,
 131         .symmetric_channels    = 1,
 132         .symmetric_sample_bits = 1,
 133         .ops = &fsl_rpmsg_dai_ops,
 134 };
 135
 136 static const struct snd_soc_component_driver fsl_component = {
 137         .name                   = "fsl-rpmsg",
 138         .legacy_dai_naming      = 1,
 139 };
 140
 141 static const struct fsl_rpmsg_soc_data imx7ulp_data = {
 142         .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
 143                  SNDRV_PCM_RATE_48000,
 144         .formats = SNDRV_PCM_FMTBIT_S16_LE,
 145 };
 146
 147 static const struct fsl_rpmsg_soc_data imx8mm_data = {
 148         .rates = SNDRV_PCM_RATE_KNOT,
 149         .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
 150                    SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_DSD_U8 |
 151                    SNDRV_PCM_FMTBIT_DSD_U16_LE | SNDRV_PCM_FMTBIT_DSD_U32_LE,
 152 };
 153
 154 static const struct fsl_rpmsg_soc_data imx8mn_data = {
 155         .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
 156                  SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
 157                  SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
 158                  SNDRV_PCM_RATE_192000,
 159         .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
 160                    SNDRV_PCM_FMTBIT_S32_LE,
 161 };
 162
 163 static const struct fsl_rpmsg_soc_data imx8mp_data = {
 164         .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
 165                  SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
 166                  SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
 167                  SNDRV_PCM_RATE_192000,
 168         .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
 169                    SNDRV_PCM_FMTBIT_S32_LE,
 170 };
 171
 172 static const struct fsl_rpmsg_soc_data imx93_data = {
 173         .rates = SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 |
 174                  SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000,
 175         .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
 176                    SNDRV_PCM_FMTBIT_S32_LE,
 177 };
 178
 179 static const struct of_device_id fsl_rpmsg_ids[] = {
 180         { .compatible = "fsl,imx7ulp-rpmsg-audio", .data = &imx7ulp_data},
 181         { .compatible = "fsl,imx8mm-rpmsg-audio", .data = &imx8mm_data},
 182         { .compatible = "fsl,imx8mn-rpmsg-audio", .data = &imx8mn_data},
 183         { .compatible = "fsl,imx8mp-rpmsg-audio", .data = &imx8mp_data},
 184         { .compatible = "fsl,imx8ulp-rpmsg-audio", .data = &imx7ulp_data},
 185         { .compatible = "fsl,imx93-rpmsg-audio", .data = &imx93_data},
 186         { /* sentinel */ }
 187 };
 188 MODULE_DEVICE_TABLE(of, fsl_rpmsg_ids);
 189
 190 static int fsl_rpmsg_probe(struct platform_device *pdev)
 191 {
 192         struct device_node *np = pdev->dev.of_node;
 193         struct fsl_rpmsg *rpmsg;
 194         int ret;
 195
 196         rpmsg = devm_kzalloc(&pdev->dev, sizeof(struct fsl_rpmsg), GFP_KERNEL);
 197         if (!rpmsg)
 198                 return -ENOMEM;
 199
 200         rpmsg->soc_data = of_device_get_match_data(&pdev->dev);
 201
 202         fsl_rpmsg_dai.playback.rates = rpmsg->soc_data->rates;
 203         fsl_rpmsg_dai.capture.rates = rpmsg->soc_data->rates;
 204         fsl_rpmsg_dai.playback.formats = rpmsg->soc_data->formats;
 205         fsl_rpmsg_dai.capture.formats = rpmsg->soc_data->formats;
 206
 207         if (of_property_read_bool(np, "fsl,enable-lpa")) {
 208                 rpmsg->enable_lpa = 1;
 209                 rpmsg->buffer_size = LPA_LARGE_BUFFER_SIZE;
 210         } else {
 211                 rpmsg->buffer_size = IMX_DEFAULT_DMABUF_SIZE;
 212         }
 213
 214         /* Get the optional clocks */
 215         rpmsg->ipg = devm_clk_get_optional(&pdev->dev, "ipg");
 216         if (IS_ERR(rpmsg->ipg))
 217                 return PTR_ERR(rpmsg->ipg);
 218
 219         rpmsg->mclk = devm_clk_get_optional(&pdev->dev, "mclk");
 220         if (IS_ERR(rpmsg->mclk))
 221                 return PTR_ERR(rpmsg->mclk);
 222
 223         rpmsg->dma = devm_clk_get_optional(&pdev->dev, "dma");
 224         if (IS_ERR(rpmsg->dma))
 225                 return PTR_ERR(rpmsg->dma);
 226
 227         rpmsg->pll8k = devm_clk_get_optional(&pdev->dev, "pll8k");
 228         if (IS_ERR(rpmsg->pll8k))
 229                 return PTR_ERR(rpmsg->pll8k);
 230
 231         rpmsg->pll11k = devm_clk_get_optional(&pdev->dev, "pll11k");
 232         if (IS_ERR(rpmsg->pll11k))
 233                 return PTR_ERR(rpmsg->pll11k);
 234
 235         platform_set_drvdata(pdev, rpmsg);
 236         pm_runtime_enable(&pdev->dev);
 237
 238         ret = devm_snd_soc_register_component(&pdev->dev, &fsl_component,
 239                                               &fsl_rpmsg_dai, 1);
 240         if (ret)
 241                 goto err_pm_disable;
 242
 243         rpmsg->card_pdev = platform_device_register_data(&pdev->dev,
 244                                                          "imx-audio-rpmsg",
 245                                                          PLATFORM_DEVID_AUTO,
 246                                                          NULL,
 247                                                          0);
 248         if (IS_ERR(rpmsg->card_pdev)) {
 249                 dev_err(&pdev->dev, "failed to register rpmsg card\n");
 250                 ret = PTR_ERR(rpmsg->card_pdev);
 251                 goto err_pm_disable;
 252         }
 253
 254         return 0;
 255
 256 err_pm_disable:
 257         pm_runtime_disable(&pdev->dev);
 258         return ret;
 259 }
 260
 261 static void fsl_rpmsg_remove(struct platform_device *pdev)
 262 {
 263         struct fsl_rpmsg *rpmsg = platform_get_drvdata(pdev);
 264
 265         pm_runtime_disable(&pdev->dev);
 266
 267         if (rpmsg->card_pdev)
 268                 platform_device_unregister(rpmsg->card_pdev);
 269 }
 270
 271 #ifdef CONFIG_PM
 272 static int fsl_rpmsg_runtime_resume(struct device *dev)
 273 {
 274         struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev);
 275         int ret;
 276
 277         ret = clk_prepare_enable(rpmsg->ipg);
 278         if (ret) {
 279                 dev_err(dev, "failed to enable ipg clock: %d\n", ret);
 280                 goto ipg_err;
 281         }
 282
 283         ret = clk_prepare_enable(rpmsg->dma);
 284         if (ret) {
 285                 dev_err(dev, "Failed to enable dma clock %d\n", ret);
 286                 goto dma_err;
 287         }
 288
 289         return 0;
 290
 291 dma_err:
 292         clk_disable_unprepare(rpmsg->ipg);
 293 ipg_err:
 294         return ret;
 295 }
 296
 297 static int fsl_rpmsg_runtime_suspend(struct device *dev)
 298 {
 299         struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev);
 300
 301         clk_disable_unprepare(rpmsg->dma);
 302         clk_disable_unprepare(rpmsg->ipg);
 303
 304         return 0;
 305 }
 306 #endif
 307
 308 static const struct dev_pm_ops fsl_rpmsg_pm_ops = {
 309         SET_RUNTIME_PM_OPS(fsl_rpmsg_runtime_suspend,
 310                            fsl_rpmsg_runtime_resume,
 311                            NULL)
 312 };
 313
 314 static struct platform_driver fsl_rpmsg_driver = {
 315         .probe  = fsl_rpmsg_probe,
 316         .remove_new = fsl_rpmsg_remove,
 317         .driver = {
 318                 .name = "fsl_rpmsg",
 319                 .pm = &fsl_rpmsg_pm_ops,
 320                 .of_match_table = fsl_rpmsg_ids,
 321         },
 322 };
 323 module_platform_driver(fsl_rpmsg_driver);
 324
 325 MODULE_DESCRIPTION("Freescale SoC Audio PRMSG CPU Interface");
 326 MODULE_AUTHOR("Shengjiu Wang <shengjiu.wang@nxp.com>");
 327 MODULE_ALIAS("platform:fsl_rpmsg");
 328 MODULE_LICENSE("GPL");