1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Christoph Hellwig.
5 * DMA operations that map physical memory directly without using an IOMMU.
7 #include <linux/bootmem.h> /* for max_pfn */
8 #include <linux/export.h>
10 #include <linux/dma-direct.h>
11 #include <linux/scatterlist.h>
12 #include <linux/dma-contiguous.h>
13 #include <linux/dma-noncoherent.h>
14 #include <linux/pfn.h>
15 #include <linux/set_memory.h>
18 * Most architectures use ZONE_DMA for the first 16 Megabytes, but
19 * some use it for entirely different regions:
21 #ifndef ARCH_ZONE_DMA_BITS
22 #define ARCH_ZONE_DMA_BITS 24
26 * For AMD SEV all DMA must be to unencrypted addresses.
28 static inline bool force_dma_unencrypted(void)
34 check_addr(struct device *dev, dma_addr_t dma_addr, size_t size,
37 if (unlikely(dev && !dma_capable(dev, dma_addr, size))) {
40 "%s: call on device without dma_mask\n",
45 if (*dev->dma_mask >= DMA_BIT_MASK(32) || dev->bus_dma_mask) {
47 "%s: overflow %pad+%zu of device mask %llx bus mask %llx\n",
48 caller, &dma_addr, size,
49 *dev->dma_mask, dev->bus_dma_mask);
56 static inline dma_addr_t phys_to_dma_direct(struct device *dev,
59 if (force_dma_unencrypted())
60 return __phys_to_dma(dev, phys);
61 return phys_to_dma(dev, phys);
64 u64 dma_direct_get_required_mask(struct device *dev)
66 u64 max_dma = phys_to_dma_direct(dev, (max_pfn - 1) << PAGE_SHIFT);
68 if (dev->bus_dma_mask && dev->bus_dma_mask < max_dma)
69 max_dma = dev->bus_dma_mask;
71 return (1ULL << (fls64(max_dma) - 1)) * 2 - 1;
74 static gfp_t __dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask,
77 if (dev->bus_dma_mask && dev->bus_dma_mask < dma_mask)
78 dma_mask = dev->bus_dma_mask;
80 if (force_dma_unencrypted())
81 *phys_mask = __dma_to_phys(dev, dma_mask);
83 *phys_mask = dma_to_phys(dev, dma_mask);
86 * Optimistically try the zone that the physical address mask falls
87 * into first. If that returns memory that isn't actually addressable
88 * we will fallback to the next lower zone and try again.
90 * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding
93 if (*phys_mask <= DMA_BIT_MASK(ARCH_ZONE_DMA_BITS))
95 if (*phys_mask <= DMA_BIT_MASK(32))
100 static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size)
102 return phys_to_dma_direct(dev, phys) + size - 1 <=
103 min_not_zero(dev->coherent_dma_mask, dev->bus_dma_mask);
106 void *dma_direct_alloc_pages(struct device *dev, size_t size,
107 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
109 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
110 int page_order = get_order(size);
111 struct page *page = NULL;
115 if (attrs & DMA_ATTR_NO_WARN)
118 /* we always manually zero the memory once we are done: */
120 gfp |= __dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask,
123 /* CMA can be used only in the context which permits sleeping */
124 if (gfpflags_allow_blocking(gfp)) {
125 page = dma_alloc_from_contiguous(dev, count, page_order,
127 if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
128 dma_release_from_contiguous(dev, page, count);
133 page = alloc_pages_node(dev_to_node(dev), gfp, page_order);
135 if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
136 __free_pages(page, page_order);
139 if (IS_ENABLED(CONFIG_ZONE_DMA32) &&
140 phys_mask < DMA_BIT_MASK(64) &&
141 !(gfp & (GFP_DMA32 | GFP_DMA))) {
146 if (IS_ENABLED(CONFIG_ZONE_DMA) &&
147 phys_mask < DMA_BIT_MASK(32) && !(gfp & GFP_DMA)) {
148 gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
155 ret = page_address(page);
156 if (force_dma_unencrypted()) {
157 set_memory_decrypted((unsigned long)ret, 1 << page_order);
158 *dma_handle = __phys_to_dma(dev, page_to_phys(page));
160 *dma_handle = phys_to_dma(dev, page_to_phys(page));
162 memset(ret, 0, size);
167 * NOTE: this function must never look at the dma_addr argument, because we want
168 * to be able to use it as a helper for iommu implementations as well.
170 void dma_direct_free_pages(struct device *dev, size_t size, void *cpu_addr,
171 dma_addr_t dma_addr, unsigned long attrs)
173 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
174 unsigned int page_order = get_order(size);
176 if (force_dma_unencrypted())
177 set_memory_encrypted((unsigned long)cpu_addr, 1 << page_order);
178 if (!dma_release_from_contiguous(dev, virt_to_page(cpu_addr), count))
179 free_pages((unsigned long)cpu_addr, page_order);
182 void *dma_direct_alloc(struct device *dev, size_t size,
183 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
185 if (!dev_is_dma_coherent(dev))
186 return arch_dma_alloc(dev, size, dma_handle, gfp, attrs);
187 return dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs);
190 void dma_direct_free(struct device *dev, size_t size,
191 void *cpu_addr, dma_addr_t dma_addr, unsigned long attrs)
193 if (!dev_is_dma_coherent(dev))
194 arch_dma_free(dev, size, cpu_addr, dma_addr, attrs);
196 dma_direct_free_pages(dev, size, cpu_addr, dma_addr, attrs);
199 static void dma_direct_sync_single_for_device(struct device *dev,
200 dma_addr_t addr, size_t size, enum dma_data_direction dir)
202 if (dev_is_dma_coherent(dev))
204 arch_sync_dma_for_device(dev, dma_to_phys(dev, addr), size, dir);
207 static void dma_direct_sync_sg_for_device(struct device *dev,
208 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
210 struct scatterlist *sg;
213 if (dev_is_dma_coherent(dev))
216 for_each_sg(sgl, sg, nents, i)
217 arch_sync_dma_for_device(dev, sg_phys(sg), sg->length, dir);
220 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
221 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)
222 static void dma_direct_sync_single_for_cpu(struct device *dev,
223 dma_addr_t addr, size_t size, enum dma_data_direction dir)
225 if (dev_is_dma_coherent(dev))
227 arch_sync_dma_for_cpu(dev, dma_to_phys(dev, addr), size, dir);
228 arch_sync_dma_for_cpu_all(dev);
231 static void dma_direct_sync_sg_for_cpu(struct device *dev,
232 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
234 struct scatterlist *sg;
237 if (dev_is_dma_coherent(dev))
240 for_each_sg(sgl, sg, nents, i)
241 arch_sync_dma_for_cpu(dev, sg_phys(sg), sg->length, dir);
242 arch_sync_dma_for_cpu_all(dev);
245 static void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
246 size_t size, enum dma_data_direction dir, unsigned long attrs)
248 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
249 dma_direct_sync_single_for_cpu(dev, addr, size, dir);
252 static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
253 int nents, enum dma_data_direction dir, unsigned long attrs)
255 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
256 dma_direct_sync_sg_for_cpu(dev, sgl, nents, dir);
260 dma_addr_t dma_direct_map_page(struct device *dev, struct page *page,
261 unsigned long offset, size_t size, enum dma_data_direction dir,
264 phys_addr_t phys = page_to_phys(page) + offset;
265 dma_addr_t dma_addr = phys_to_dma(dev, phys);
267 if (!check_addr(dev, dma_addr, size, __func__))
268 return DIRECT_MAPPING_ERROR;
270 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
271 dma_direct_sync_single_for_device(dev, dma_addr, size, dir);
275 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
276 enum dma_data_direction dir, unsigned long attrs)
279 struct scatterlist *sg;
281 for_each_sg(sgl, sg, nents, i) {
282 BUG_ON(!sg_page(sg));
284 sg_dma_address(sg) = phys_to_dma(dev, sg_phys(sg));
285 if (!check_addr(dev, sg_dma_address(sg), sg->length, __func__))
287 sg_dma_len(sg) = sg->length;
290 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
291 dma_direct_sync_sg_for_device(dev, sgl, nents, dir);
296 * Because 32-bit DMA masks are so common we expect every architecture to be
297 * able to satisfy them - either by not supporting more physical memory, or by
298 * providing a ZONE_DMA32. If neither is the case, the architecture needs to
299 * use an IOMMU instead of the direct mapping.
301 int dma_direct_supported(struct device *dev, u64 mask)
305 if (IS_ENABLED(CONFIG_ZONE_DMA))
306 min_mask = DMA_BIT_MASK(ARCH_ZONE_DMA_BITS);
308 min_mask = DMA_BIT_MASK(32);
310 min_mask = min_t(u64, min_mask, (max_pfn - 1) << PAGE_SHIFT);
312 return mask >= phys_to_dma(dev, min_mask);
315 int dma_direct_mapping_error(struct device *dev, dma_addr_t dma_addr)
317 return dma_addr == DIRECT_MAPPING_ERROR;
320 const struct dma_map_ops dma_direct_ops = {
321 .alloc = dma_direct_alloc,
322 .free = dma_direct_free,
323 .map_page = dma_direct_map_page,
324 .map_sg = dma_direct_map_sg,
325 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE)
326 .sync_single_for_device = dma_direct_sync_single_for_device,
327 .sync_sg_for_device = dma_direct_sync_sg_for_device,
329 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
330 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)
331 .sync_single_for_cpu = dma_direct_sync_single_for_cpu,
332 .sync_sg_for_cpu = dma_direct_sync_sg_for_cpu,
333 .unmap_page = dma_direct_unmap_page,
334 .unmap_sg = dma_direct_unmap_sg,
336 .get_required_mask = dma_direct_get_required_mask,
337 .dma_supported = dma_direct_supported,
338 .mapping_error = dma_direct_mapping_error,
339 .cache_sync = arch_dma_cache_sync,
341 EXPORT_SYMBOL(dma_direct_ops);