2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
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21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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33 #ifndef __MLX5_PORT_H__
34 #define __MLX5_PORT_H__
36 #include <linux/mlx5/driver.h>
38 enum mlx5_beacon_duration {
39 MLX5_BEACON_DURATION_OFF = 0x0,
40 MLX5_BEACON_DURATION_INF = 0xffff,
44 MLX5_MODULE_ID_SFP = 0x3,
45 MLX5_MODULE_ID_QSFP = 0xC,
46 MLX5_MODULE_ID_QSFP_PLUS = 0xD,
47 MLX5_MODULE_ID_QSFP28 = 0x11,
51 MLX5_AN_UNAVAILABLE = 0,
55 MLX5_AN_LINK_DOWN = 4,
58 #define MLX5_EEPROM_MAX_BYTES 32
59 #define MLX5_EEPROM_IDENTIFIER_BYTE_MASK 0x000000ff
60 #define MLX5_I2C_ADDR_LOW 0x50
61 #define MLX5_I2C_ADDR_HIGH 0x51
62 #define MLX5_EEPROM_PAGE_LENGTH 256
64 enum mlx5e_link_mode {
65 MLX5E_1000BASE_CX_SGMII = 0,
66 MLX5E_1000BASE_KX = 1,
67 MLX5E_10GBASE_CX4 = 2,
68 MLX5E_10GBASE_KX4 = 3,
70 MLX5E_20GBASE_KR2 = 5,
71 MLX5E_40GBASE_CR4 = 6,
72 MLX5E_40GBASE_KR4 = 7,
74 MLX5E_10GBASE_CR = 12,
75 MLX5E_10GBASE_SR = 13,
76 MLX5E_10GBASE_ER = 14,
77 MLX5E_40GBASE_SR4 = 15,
78 MLX5E_40GBASE_LR4 = 16,
79 MLX5E_50GBASE_SR2 = 18,
80 MLX5E_100GBASE_CR4 = 20,
81 MLX5E_100GBASE_SR4 = 21,
82 MLX5E_100GBASE_KR4 = 22,
83 MLX5E_100GBASE_LR4 = 23,
84 MLX5E_100BASE_TX = 24,
85 MLX5E_1000BASE_T = 25,
87 MLX5E_25GBASE_CR = 27,
88 MLX5E_25GBASE_KR = 28,
89 MLX5E_25GBASE_SR = 29,
90 MLX5E_50GBASE_CR2 = 30,
91 MLX5E_50GBASE_KR2 = 31,
92 MLX5E_LINK_MODES_NUMBER,
95 enum mlx5e_connector_type {
96 MLX5E_PORT_UNKNOWN = 0,
102 MLX5E_PORT_FIBRE = 6,
104 MLX5E_PORT_OTHER = 8,
105 MLX5E_CONNECTOR_TYPE_NUMBER,
108 #define MLX5E_PROT_MASK(link_mode) (1 << link_mode)
110 #define PORT_MODULE_EVENT_MODULE_STATUS_MASK 0xF
111 #define PORT_MODULE_EVENT_ERROR_TYPE_MASK 0xF
113 int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps);
114 int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys,
115 int ptys_size, int proto_mask, u8 local_port);
116 int mlx5_query_port_proto_cap(struct mlx5_core_dev *dev,
117 u32 *proto_cap, int proto_mask);
118 int mlx5_query_port_proto_admin(struct mlx5_core_dev *dev,
119 u32 *proto_admin, int proto_mask);
120 int mlx5_query_port_link_width_oper(struct mlx5_core_dev *dev,
121 u8 *link_width_oper, u8 local_port);
122 int mlx5_query_port_ib_proto_oper(struct mlx5_core_dev *dev,
123 u8 *proto_oper, u8 local_port);
124 int mlx5_query_port_eth_proto_oper(struct mlx5_core_dev *dev,
125 u32 *proto_oper, u8 local_port);
126 int mlx5_set_port_ptys(struct mlx5_core_dev *dev, bool an_disable,
127 u32 proto_admin, int proto_mask);
128 void mlx5_toggle_port_link(struct mlx5_core_dev *dev);
129 int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,
130 enum mlx5_port_status status);
131 int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
132 enum mlx5_port_status *status);
133 int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);
134 void mlx5_query_port_autoneg(struct mlx5_core_dev *dev, int proto_mask,
136 u8 *an_disable_cap, u8 *an_disable_admin);
138 int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);
139 void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, u16 *max_mtu, u8 port);
140 void mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, u16 *oper_mtu,
143 int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,
144 u8 *vl_hw_cap, u8 local_port);
146 int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause);
147 int mlx5_query_port_pause(struct mlx5_core_dev *dev,
148 u32 *rx_pause, u32 *tx_pause);
150 int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx);
151 int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx,
154 int mlx5_set_port_stall_watermark(struct mlx5_core_dev *dev,
155 u16 stall_critical_watermark,
156 u16 stall_minor_watermark);
157 int mlx5_query_port_stall_watermark(struct mlx5_core_dev *dev,
158 u16 *stall_critical_watermark, u16 *stall_minor_watermark);
160 int mlx5_max_tc(struct mlx5_core_dev *mdev);
162 int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc);
163 int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,
165 int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group);
166 int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,
167 u8 tc, u8 *tc_group);
168 int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw);
169 int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,
171 int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,
174 int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,
177 int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode);
178 int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode);
180 int mlx5_set_port_fcs(struct mlx5_core_dev *mdev, u8 enable);
181 void mlx5_query_port_fcs(struct mlx5_core_dev *mdev, bool *supported,
183 int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,
184 u16 offset, u16 size, u8 *data);
186 int mlx5_query_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *out);
187 int mlx5_set_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *in);
189 int mlx5_set_trust_state(struct mlx5_core_dev *mdev, u8 trust_state);
190 int mlx5_query_trust_state(struct mlx5_core_dev *mdev, u8 *trust_state);
191 int mlx5_set_dscp2prio(struct mlx5_core_dev *mdev, u8 dscp, u8 prio);
192 int mlx5_query_dscp2prio(struct mlx5_core_dev *mdev, u8 *dscp2prio);
193 #endif /* __MLX5_PORT_H__ */