include/asm-x86/kvm.h

   1 #ifndef __LINUX_KVM_X86_H
   2 #define __LINUX_KVM_X86_H
   3
   4 /*
   5  * KVM x86 specific structures and definitions
   6  *
   7  */
   8
   9 #include <asm/types.h>
  10 #include <linux/ioctl.h>
  11
  12 struct kvm_memory_alias {
  13         __u32 slot;  /* this has a different namespace than memory slots */
  14         __u32 flags;
  15         __u64 guest_phys_addr;
  16         __u64 memory_size;
  17         __u64 target_phys_addr;
  18 };
  19
  20 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
  21 struct kvm_pic_state {
  22         __u8 last_irr;  /* edge detection */
  23         __u8 irr;               /* interrupt request register */
  24         __u8 imr;               /* interrupt mask register */
  25         __u8 isr;               /* interrupt service register */
  26         __u8 priority_add;      /* highest irq priority */
  27         __u8 irq_base;
  28         __u8 read_reg_select;
  29         __u8 poll;
  30         __u8 special_mask;
  31         __u8 init_state;
  32         __u8 auto_eoi;
  33         __u8 rotate_on_auto_eoi;
  34         __u8 special_fully_nested_mode;
  35         __u8 init4;             /* true if 4 byte init */
  36         __u8 elcr;              /* PIIX edge/trigger selection */
  37         __u8 elcr_mask;
  38 };
  39
  40 #define KVM_IOAPIC_NUM_PINS  24
  41 struct kvm_ioapic_state {
  42         __u64 base_address;
  43         __u32 ioregsel;
  44         __u32 id;
  45         __u32 irr;
  46         __u32 pad;
  47         union {
  48                 __u64 bits;
  49                 struct {
  50                         __u8 vector;
  51                         __u8 delivery_mode:3;
  52                         __u8 dest_mode:1;
  53                         __u8 delivery_status:1;
  54                         __u8 polarity:1;
  55                         __u8 remote_irr:1;
  56                         __u8 trig_mode:1;
  57                         __u8 mask:1;
  58                         __u8 reserve:7;
  59                         __u8 reserved[4];
  60                         __u8 dest_id;
  61                 } fields;
  62         } redirtbl[KVM_IOAPIC_NUM_PINS];
  63 };
  64
  65 #define KVM_IRQCHIP_PIC_MASTER   0
  66 #define KVM_IRQCHIP_PIC_SLAVE    1
  67 #define KVM_IRQCHIP_IOAPIC       2
  68
  69 #endif