Merge git://git.infradead.org/~kmpark/onenand-mtd-2.6
[sfrench/cifs-2.6.git] / include / asm-powerpc / dcr-native.h
1 /*
2  * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.
3  *                    <benh@kernel.crashing.org>
4  *
5  *   This program is free software;  you can redistribute it and/or modify
6  *   it under the terms of the GNU General Public License as published by
7  *   the Free Software Foundation; either version 2 of the License, or
8  *   (at your option) any later version.
9  *
10  *   This program is distributed in the hope that it will be useful,
11  *   but WITHOUT ANY WARRANTY;  without even the implied warranty of
12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
13  *   the GNU General Public License for more details.
14  *
15  *   You should have received a copy of the GNU General Public License
16  *   along with this program;  if not, write to the Free Software
17  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18  */
19
20 #ifndef _ASM_POWERPC_DCR_NATIVE_H
21 #define _ASM_POWERPC_DCR_NATIVE_H
22 #ifdef __KERNEL__
23 #ifndef __ASSEMBLY__
24
25 #include <linux/spinlock.h>
26
27 typedef struct {
28         unsigned int base;
29 } dcr_host_t;
30
31 #define DCR_MAP_OK(host)        (1)
32
33 #define dcr_map(dev, dcr_n, dcr_c)      ((dcr_host_t){ .base = (dcr_n) })
34 #define dcr_unmap(host, dcr_c)          do {} while (0)
35 #define dcr_read(host, dcr_n)           mfdcr(dcr_n + host.base)
36 #define dcr_write(host, dcr_n, value)   mtdcr(dcr_n + host.base, value)
37
38 /* Device Control Registers */
39 void __mtdcr(int reg, unsigned int val);
40 unsigned int __mfdcr(int reg);
41 #define mfdcr(rn)                                               \
42         ({unsigned int rval;                                    \
43         if (__builtin_constant_p(rn))                           \
44                 asm volatile("mfdcr %0," __stringify(rn)        \
45                               : "=r" (rval));                   \
46         else                                                    \
47                 rval = __mfdcr(rn);                             \
48         rval;})
49
50 #define mtdcr(rn, v)                                            \
51 do {                                                            \
52         if (__builtin_constant_p(rn))                           \
53                 asm volatile("mtdcr " __stringify(rn) ",%0"     \
54                               : : "r" (v));                     \
55         else                                                    \
56                 __mtdcr(rn, v);                                 \
57 } while (0)
58
59 /* R/W of indirect DCRs make use of standard naming conventions for DCRs */
60 extern spinlock_t dcr_ind_lock;
61
62 #define mfdcri(base, reg)                               \
63 ({                                                      \
64         unsigned long flags;                            \
65         unsigned int val;                               \
66         spin_lock_irqsave(&dcr_ind_lock, flags);        \
67         mtdcr(DCRN_ ## base ## _CONFIG_ADDR, reg);      \
68         val = mfdcr(DCRN_ ## base ## _CONFIG_DATA);     \
69         spin_unlock_irqrestore(&dcr_ind_lock, flags);   \
70         val;                                            \
71 })
72
73 #define mtdcri(base, reg, data)                         \
74 do {                                                    \
75         unsigned long flags;                            \
76         spin_lock_irqsave(&dcr_ind_lock, flags);        \
77         mtdcr(DCRN_ ## base ## _CONFIG_ADDR, reg);      \
78         mtdcr(DCRN_ ## base ## _CONFIG_DATA, data);     \
79         spin_unlock_irqrestore(&dcr_ind_lock, flags);   \
80 } while (0)
81
82 #endif /* __ASSEMBLY__ */
83 #endif /* __KERNEL__ */
84 #endif /* _ASM_POWERPC_DCR_NATIVE_H */