1 /* Generic I/O port emulation.
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
11 #ifndef __ASM_GENERIC_IO_H
12 #define __ASM_GENERIC_IO_H
14 #include <asm/page.h> /* I/O is all done through memory accesses */
15 #include <linux/string.h> /* for memset() and memcpy() */
16 #include <linux/types.h>
18 #ifdef CONFIG_GENERIC_IOMAP
19 #include <asm-generic/iomap.h>
22 #include <asm/mmiowb.h>
23 #include <asm-generic/pci_iomap.h>
26 #define __io_br() barrier()
29 /* prevent prefetching of coherent DMA data ahead of a dma-complete */
32 #define __io_ar(v) rmb()
34 #define __io_ar(v) barrier()
38 /* flush writes to coherent DMA data before possibly triggering a DMA read */
41 #define __io_bw() wmb()
43 #define __io_bw() barrier()
47 /* serialize device access against a spin_unlock, usually handled there. */
49 #define __io_aw() mmiowb_set_pending()
53 #define __io_pbw() __io_bw()
57 #define __io_paw() __io_aw()
61 #define __io_pbr() __io_br()
65 #define __io_par(v) __io_ar(v)
70 * __raw_{read,write}{b,w,l,q}() access memory in native endianness.
72 * On some architectures memory mapped IO needs to be accessed differently.
73 * On the simple architectures, we just read/write the memory location
78 #define __raw_readb __raw_readb
79 static inline u8 __raw_readb(const volatile void __iomem *addr)
81 return *(const volatile u8 __force *)addr;
86 #define __raw_readw __raw_readw
87 static inline u16 __raw_readw(const volatile void __iomem *addr)
89 return *(const volatile u16 __force *)addr;
94 #define __raw_readl __raw_readl
95 static inline u32 __raw_readl(const volatile void __iomem *addr)
97 return *(const volatile u32 __force *)addr;
103 #define __raw_readq __raw_readq
104 static inline u64 __raw_readq(const volatile void __iomem *addr)
106 return *(const volatile u64 __force *)addr;
109 #endif /* CONFIG_64BIT */
112 #define __raw_writeb __raw_writeb
113 static inline void __raw_writeb(u8 value, volatile void __iomem *addr)
115 *(volatile u8 __force *)addr = value;
120 #define __raw_writew __raw_writew
121 static inline void __raw_writew(u16 value, volatile void __iomem *addr)
123 *(volatile u16 __force *)addr = value;
128 #define __raw_writel __raw_writel
129 static inline void __raw_writel(u32 value, volatile void __iomem *addr)
131 *(volatile u32 __force *)addr = value;
137 #define __raw_writeq __raw_writeq
138 static inline void __raw_writeq(u64 value, volatile void __iomem *addr)
140 *(volatile u64 __force *)addr = value;
143 #endif /* CONFIG_64BIT */
146 * {read,write}{b,w,l,q}() access little endian memory and return result in
152 static inline u8 readb(const volatile void __iomem *addr)
157 val = __raw_readb(addr);
165 static inline u16 readw(const volatile void __iomem *addr)
170 val = __le16_to_cpu(__raw_readw(addr));
178 static inline u32 readl(const volatile void __iomem *addr)
183 val = __le32_to_cpu(__raw_readl(addr));
192 static inline u64 readq(const volatile void __iomem *addr)
197 val = __le64_to_cpu(__raw_readq(addr));
202 #endif /* CONFIG_64BIT */
205 #define writeb writeb
206 static inline void writeb(u8 value, volatile void __iomem *addr)
209 __raw_writeb(value, addr);
215 #define writew writew
216 static inline void writew(u16 value, volatile void __iomem *addr)
219 __raw_writew(cpu_to_le16(value), addr);
225 #define writel writel
226 static inline void writel(u32 value, volatile void __iomem *addr)
229 __raw_writel(__cpu_to_le32(value), addr);
236 #define writeq writeq
237 static inline void writeq(u64 value, volatile void __iomem *addr)
240 __raw_writeq(__cpu_to_le64(value), addr);
244 #endif /* CONFIG_64BIT */
247 * {read,write}{b,w,l,q}_relaxed() are like the regular version, but
248 * are not guaranteed to provide ordering against spinlocks or memory
251 #ifndef readb_relaxed
252 #define readb_relaxed readb_relaxed
253 static inline u8 readb_relaxed(const volatile void __iomem *addr)
255 return __raw_readb(addr);
259 #ifndef readw_relaxed
260 #define readw_relaxed readw_relaxed
261 static inline u16 readw_relaxed(const volatile void __iomem *addr)
263 return __le16_to_cpu(__raw_readw(addr));
267 #ifndef readl_relaxed
268 #define readl_relaxed readl_relaxed
269 static inline u32 readl_relaxed(const volatile void __iomem *addr)
271 return __le32_to_cpu(__raw_readl(addr));
275 #if defined(readq) && !defined(readq_relaxed)
276 #define readq_relaxed readq_relaxed
277 static inline u64 readq_relaxed(const volatile void __iomem *addr)
279 return __le64_to_cpu(__raw_readq(addr));
283 #ifndef writeb_relaxed
284 #define writeb_relaxed writeb_relaxed
285 static inline void writeb_relaxed(u8 value, volatile void __iomem *addr)
287 __raw_writeb(value, addr);
291 #ifndef writew_relaxed
292 #define writew_relaxed writew_relaxed
293 static inline void writew_relaxed(u16 value, volatile void __iomem *addr)
295 __raw_writew(cpu_to_le16(value), addr);
299 #ifndef writel_relaxed
300 #define writel_relaxed writel_relaxed
301 static inline void writel_relaxed(u32 value, volatile void __iomem *addr)
303 __raw_writel(__cpu_to_le32(value), addr);
307 #if defined(writeq) && !defined(writeq_relaxed)
308 #define writeq_relaxed writeq_relaxed
309 static inline void writeq_relaxed(u64 value, volatile void __iomem *addr)
311 __raw_writeq(__cpu_to_le64(value), addr);
316 * {read,write}s{b,w,l,q}() repeatedly access the same memory address in
317 * native endianness in 8-, 16-, 32- or 64-bit chunks (@count times).
320 #define readsb readsb
321 static inline void readsb(const volatile void __iomem *addr, void *buffer,
328 u8 x = __raw_readb(addr);
336 #define readsw readsw
337 static inline void readsw(const volatile void __iomem *addr, void *buffer,
344 u16 x = __raw_readw(addr);
352 #define readsl readsl
353 static inline void readsl(const volatile void __iomem *addr, void *buffer,
360 u32 x = __raw_readl(addr);
369 #define readsq readsq
370 static inline void readsq(const volatile void __iomem *addr, void *buffer,
377 u64 x = __raw_readq(addr);
383 #endif /* CONFIG_64BIT */
386 #define writesb writesb
387 static inline void writesb(volatile void __iomem *addr, const void *buffer,
391 const u8 *buf = buffer;
394 __raw_writeb(*buf++, addr);
401 #define writesw writesw
402 static inline void writesw(volatile void __iomem *addr, const void *buffer,
406 const u16 *buf = buffer;
409 __raw_writew(*buf++, addr);
416 #define writesl writesl
417 static inline void writesl(volatile void __iomem *addr, const void *buffer,
421 const u32 *buf = buffer;
424 __raw_writel(*buf++, addr);
432 #define writesq writesq
433 static inline void writesq(volatile void __iomem *addr, const void *buffer,
437 const u64 *buf = buffer;
440 __raw_writeq(*buf++, addr);
445 #endif /* CONFIG_64BIT */
448 #define PCI_IOBASE ((void __iomem *)0)
451 #ifndef IO_SPACE_LIMIT
452 #define IO_SPACE_LIMIT 0xffff
455 #include <linux/logic_pio.h>
458 * {in,out}{b,w,l}() access little endian I/O. {in,out}{b,w,l}_p() can be
459 * implemented on hardware that needs an additional delay for I/O accesses to
465 static inline u8 inb(unsigned long addr)
470 val = __raw_readb(PCI_IOBASE + addr);
478 static inline u16 inw(unsigned long addr)
483 val = __le16_to_cpu(__raw_readw(PCI_IOBASE + addr));
491 static inline u32 inl(unsigned long addr)
496 val = __le32_to_cpu(__raw_readl(PCI_IOBASE + addr));
504 static inline void outb(u8 value, unsigned long addr)
507 __raw_writeb(value, PCI_IOBASE + addr);
514 static inline void outw(u16 value, unsigned long addr)
517 __raw_writew(cpu_to_le16(value), PCI_IOBASE + addr);
524 static inline void outl(u32 value, unsigned long addr)
527 __raw_writel(cpu_to_le32(value), PCI_IOBASE + addr);
534 static inline u8 inb_p(unsigned long addr)
542 static inline u16 inw_p(unsigned long addr)
550 static inline u32 inl_p(unsigned long addr)
557 #define outb_p outb_p
558 static inline void outb_p(u8 value, unsigned long addr)
565 #define outw_p outw_p
566 static inline void outw_p(u16 value, unsigned long addr)
573 #define outl_p outl_p
574 static inline void outl_p(u32 value, unsigned long addr)
581 * {in,out}s{b,w,l}{,_p}() are variants of the above that repeatedly access a
582 * single I/O port multiple times.
587 static inline void insb(unsigned long addr, void *buffer, unsigned int count)
589 readsb(PCI_IOBASE + addr, buffer, count);
595 static inline void insw(unsigned long addr, void *buffer, unsigned int count)
597 readsw(PCI_IOBASE + addr, buffer, count);
603 static inline void insl(unsigned long addr, void *buffer, unsigned int count)
605 readsl(PCI_IOBASE + addr, buffer, count);
611 static inline void outsb(unsigned long addr, const void *buffer,
614 writesb(PCI_IOBASE + addr, buffer, count);
620 static inline void outsw(unsigned long addr, const void *buffer,
623 writesw(PCI_IOBASE + addr, buffer, count);
629 static inline void outsl(unsigned long addr, const void *buffer,
632 writesl(PCI_IOBASE + addr, buffer, count);
637 #define insb_p insb_p
638 static inline void insb_p(unsigned long addr, void *buffer, unsigned int count)
640 insb(addr, buffer, count);
645 #define insw_p insw_p
646 static inline void insw_p(unsigned long addr, void *buffer, unsigned int count)
648 insw(addr, buffer, count);
653 #define insl_p insl_p
654 static inline void insl_p(unsigned long addr, void *buffer, unsigned int count)
656 insl(addr, buffer, count);
661 #define outsb_p outsb_p
662 static inline void outsb_p(unsigned long addr, const void *buffer,
665 outsb(addr, buffer, count);
670 #define outsw_p outsw_p
671 static inline void outsw_p(unsigned long addr, const void *buffer,
674 outsw(addr, buffer, count);
679 #define outsl_p outsl_p
680 static inline void outsl_p(unsigned long addr, const void *buffer,
683 outsl(addr, buffer, count);
687 #ifndef CONFIG_GENERIC_IOMAP
689 #define ioread8 ioread8
690 static inline u8 ioread8(const volatile void __iomem *addr)
697 #define ioread16 ioread16
698 static inline u16 ioread16(const volatile void __iomem *addr)
705 #define ioread32 ioread32
706 static inline u32 ioread32(const volatile void __iomem *addr)
714 #define ioread64 ioread64
715 static inline u64 ioread64(const volatile void __iomem *addr)
720 #endif /* CONFIG_64BIT */
723 #define iowrite8 iowrite8
724 static inline void iowrite8(u8 value, volatile void __iomem *addr)
731 #define iowrite16 iowrite16
732 static inline void iowrite16(u16 value, volatile void __iomem *addr)
739 #define iowrite32 iowrite32
740 static inline void iowrite32(u32 value, volatile void __iomem *addr)
748 #define iowrite64 iowrite64
749 static inline void iowrite64(u64 value, volatile void __iomem *addr)
754 #endif /* CONFIG_64BIT */
757 #define ioread16be ioread16be
758 static inline u16 ioread16be(const volatile void __iomem *addr)
760 return swab16(readw(addr));
765 #define ioread32be ioread32be
766 static inline u32 ioread32be(const volatile void __iomem *addr)
768 return swab32(readl(addr));
774 #define ioread64be ioread64be
775 static inline u64 ioread64be(const volatile void __iomem *addr)
777 return swab64(readq(addr));
780 #endif /* CONFIG_64BIT */
783 #define iowrite16be iowrite16be
784 static inline void iowrite16be(u16 value, void volatile __iomem *addr)
786 writew(swab16(value), addr);
791 #define iowrite32be iowrite32be
792 static inline void iowrite32be(u32 value, volatile void __iomem *addr)
794 writel(swab32(value), addr);
800 #define iowrite64be iowrite64be
801 static inline void iowrite64be(u64 value, volatile void __iomem *addr)
803 writeq(swab64(value), addr);
806 #endif /* CONFIG_64BIT */
809 #define ioread8_rep ioread8_rep
810 static inline void ioread8_rep(const volatile void __iomem *addr, void *buffer,
813 readsb(addr, buffer, count);
818 #define ioread16_rep ioread16_rep
819 static inline void ioread16_rep(const volatile void __iomem *addr,
820 void *buffer, unsigned int count)
822 readsw(addr, buffer, count);
827 #define ioread32_rep ioread32_rep
828 static inline void ioread32_rep(const volatile void __iomem *addr,
829 void *buffer, unsigned int count)
831 readsl(addr, buffer, count);
837 #define ioread64_rep ioread64_rep
838 static inline void ioread64_rep(const volatile void __iomem *addr,
839 void *buffer, unsigned int count)
841 readsq(addr, buffer, count);
844 #endif /* CONFIG_64BIT */
847 #define iowrite8_rep iowrite8_rep
848 static inline void iowrite8_rep(volatile void __iomem *addr,
852 writesb(addr, buffer, count);
856 #ifndef iowrite16_rep
857 #define iowrite16_rep iowrite16_rep
858 static inline void iowrite16_rep(volatile void __iomem *addr,
862 writesw(addr, buffer, count);
866 #ifndef iowrite32_rep
867 #define iowrite32_rep iowrite32_rep
868 static inline void iowrite32_rep(volatile void __iomem *addr,
872 writesl(addr, buffer, count);
877 #ifndef iowrite64_rep
878 #define iowrite64_rep iowrite64_rep
879 static inline void iowrite64_rep(volatile void __iomem *addr,
883 writesq(addr, buffer, count);
886 #endif /* CONFIG_64BIT */
887 #endif /* CONFIG_GENERIC_IOMAP */
891 #include <linux/vmalloc.h>
892 #define __io_virt(x) ((void __force *)(x))
894 #ifndef CONFIG_GENERIC_IOMAP
896 extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
899 #define pci_iounmap pci_iounmap
900 static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
904 #endif /* CONFIG_GENERIC_IOMAP */
907 * Change virtual addresses to physical addresses and vv.
908 * These are pretty trivial
911 #define virt_to_phys virt_to_phys
912 static inline unsigned long virt_to_phys(volatile void *address)
914 return __pa((unsigned long)address);
919 #define phys_to_virt phys_to_virt
920 static inline void *phys_to_virt(unsigned long address)
922 return __va(address);
927 * DOC: ioremap() and ioremap_*() variants
929 * If you have an IOMMU your architecture is expected to have both ioremap()
930 * and iounmap() implemented otherwise the asm-generic helpers will provide a
933 * There are ioremap_*() call variants, if you have no IOMMU we naturally will
934 * default to direct mapping for all of them, you can override these defaults.
935 * If you have an IOMMU you are highly encouraged to provide your own
936 * ioremap variant implementation as there currently is no safe architecture
937 * agnostic default. To avoid possible improper behaviour default asm-generic
938 * ioremap_*() variants all return NULL when an IOMMU is available. If you've
939 * defined your own ioremap_*() variant you must then declare your own
940 * ioremap_*() variant as defined to itself to avoid the default NULL return.
946 #define ioremap_uc ioremap_uc
947 static inline void __iomem *ioremap_uc(phys_addr_t offset, size_t size)
953 #else /* !CONFIG_MMU */
956 * Change "struct page" to physical address.
958 * This implementation is for the no-MMU case only... if you have an MMU
959 * you'll need to provide your own definitions.
963 #define ioremap ioremap
964 static inline void __iomem *ioremap(phys_addr_t offset, size_t size)
966 return (void __iomem *)(unsigned long)offset;
971 #define __ioremap __ioremap
972 static inline void __iomem *__ioremap(phys_addr_t offset, size_t size,
975 return ioremap(offset, size);
980 #define iounmap iounmap
982 static inline void iounmap(void __iomem *addr)
986 #endif /* CONFIG_MMU */
987 #ifndef ioremap_nocache
988 void __iomem *ioremap(phys_addr_t phys_addr, size_t size);
989 #define ioremap_nocache ioremap_nocache
990 static inline void __iomem *ioremap_nocache(phys_addr_t offset, size_t size)
992 return ioremap(offset, size);
997 #define ioremap_uc ioremap_uc
998 static inline void __iomem *ioremap_uc(phys_addr_t offset, size_t size)
1000 return ioremap_nocache(offset, size);
1005 #define ioremap_wc ioremap_wc
1006 static inline void __iomem *ioremap_wc(phys_addr_t offset, size_t size)
1008 return ioremap_nocache(offset, size);
1013 #define ioremap_wt ioremap_wt
1014 static inline void __iomem *ioremap_wt(phys_addr_t offset, size_t size)
1016 return ioremap_nocache(offset, size);
1020 #ifdef CONFIG_HAS_IOPORT_MAP
1021 #ifndef CONFIG_GENERIC_IOMAP
1023 #define ioport_map ioport_map
1024 static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
1026 port &= IO_SPACE_LIMIT;
1027 return (port > MMIO_UPPER_LIMIT) ? NULL : PCI_IOBASE + port;
1031 #ifndef ioport_unmap
1032 #define ioport_unmap ioport_unmap
1033 static inline void ioport_unmap(void __iomem *p)
1037 #else /* CONFIG_GENERIC_IOMAP */
1038 extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
1039 extern void ioport_unmap(void __iomem *p);
1040 #endif /* CONFIG_GENERIC_IOMAP */
1041 #endif /* CONFIG_HAS_IOPORT_MAP */
1044 * Convert a virtual cached pointer to an uncached pointer
1046 #ifndef xlate_dev_kmem_ptr
1047 #define xlate_dev_kmem_ptr xlate_dev_kmem_ptr
1048 static inline void *xlate_dev_kmem_ptr(void *addr)
1054 #ifndef xlate_dev_mem_ptr
1055 #define xlate_dev_mem_ptr xlate_dev_mem_ptr
1056 static inline void *xlate_dev_mem_ptr(phys_addr_t addr)
1062 #ifndef unxlate_dev_mem_ptr
1063 #define unxlate_dev_mem_ptr unxlate_dev_mem_ptr
1064 static inline void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr)
1069 #ifdef CONFIG_VIRT_TO_BUS
1071 static inline unsigned long virt_to_bus(void *address)
1073 return (unsigned long)address;
1076 static inline void *bus_to_virt(unsigned long address)
1078 return (void *)address;
1084 #define memset_io memset_io
1086 * memset_io Set a range of I/O memory to a constant value
1087 * @addr: The beginning of the I/O-memory range to set
1088 * @val: The value to set the memory to
1089 * @count: The number of bytes to set
1091 * Set a range of I/O memory to a given value.
1093 static inline void memset_io(volatile void __iomem *addr, int value,
1096 memset(__io_virt(addr), value, size);
1100 #ifndef memcpy_fromio
1101 #define memcpy_fromio memcpy_fromio
1103 * memcpy_fromio Copy a block of data from I/O memory
1104 * @dst: The (RAM) destination for the copy
1105 * @src: The (I/O memory) source for the data
1106 * @count: The number of bytes to copy
1108 * Copy a block of data from I/O memory.
1110 static inline void memcpy_fromio(void *buffer,
1111 const volatile void __iomem *addr,
1114 memcpy(buffer, __io_virt(addr), size);
1119 #define memcpy_toio memcpy_toio
1121 * memcpy_toio Copy a block of data into I/O memory
1122 * @dst: The (I/O memory) destination for the copy
1123 * @src: The (RAM) source for the data
1124 * @count: The number of bytes to copy
1126 * Copy a block of data to I/O memory.
1128 static inline void memcpy_toio(volatile void __iomem *addr, const void *buffer,
1131 memcpy(__io_virt(addr), buffer, size);
1135 #endif /* __KERNEL__ */
1137 #endif /* __ASM_GENERIC_IO_H */