Merge tag 'gvt-fixes-2018-11-26' of https://github.com/intel/gvt-linux into drm-intel...
[sfrench/cifs-2.6.git] / drivers / thunderbolt / nhi.c
1 /*
2  * Thunderbolt driver - NHI driver
3  *
4  * The NHI (native host interface) is the pci device that allows us to send and
5  * receive frames from the thunderbolt bus.
6  *
7  * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
8  * Copyright (C) 2018, Intel Corporation
9  */
10
11 #include <linux/pm_runtime.h>
12 #include <linux/slab.h>
13 #include <linux/errno.h>
14 #include <linux/pci.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/delay.h>
18
19 #include "nhi.h"
20 #include "nhi_regs.h"
21 #include "tb.h"
22
23 #define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring")
24
25 /*
26  * Used to enable end-to-end workaround for missing RX packets. Do not
27  * use this ring for anything else.
28  */
29 #define RING_E2E_UNUSED_HOPID   2
30 /* HopIDs 0-7 are reserved by the Thunderbolt protocol */
31 #define RING_FIRST_USABLE_HOPID 8
32
33 /*
34  * Minimal number of vectors when we use MSI-X. Two for control channel
35  * Rx/Tx and the rest four are for cross domain DMA paths.
36  */
37 #define MSIX_MIN_VECS           6
38 #define MSIX_MAX_VECS           16
39
40 #define NHI_MAILBOX_TIMEOUT     500 /* ms */
41
42 static int ring_interrupt_index(struct tb_ring *ring)
43 {
44         int bit = ring->hop;
45         if (!ring->is_tx)
46                 bit += ring->nhi->hop_count;
47         return bit;
48 }
49
50 /**
51  * ring_interrupt_active() - activate/deactivate interrupts for a single ring
52  *
53  * ring->nhi->lock must be held.
54  */
55 static void ring_interrupt_active(struct tb_ring *ring, bool active)
56 {
57         int reg = REG_RING_INTERRUPT_BASE +
58                   ring_interrupt_index(ring) / 32 * 4;
59         int bit = ring_interrupt_index(ring) & 31;
60         int mask = 1 << bit;
61         u32 old, new;
62
63         if (ring->irq > 0) {
64                 u32 step, shift, ivr, misc;
65                 void __iomem *ivr_base;
66                 int index;
67
68                 if (ring->is_tx)
69                         index = ring->hop;
70                 else
71                         index = ring->hop + ring->nhi->hop_count;
72
73                 /*
74                  * Ask the hardware to clear interrupt status bits automatically
75                  * since we already know which interrupt was triggered.
76                  */
77                 misc = ioread32(ring->nhi->iobase + REG_DMA_MISC);
78                 if (!(misc & REG_DMA_MISC_INT_AUTO_CLEAR)) {
79                         misc |= REG_DMA_MISC_INT_AUTO_CLEAR;
80                         iowrite32(misc, ring->nhi->iobase + REG_DMA_MISC);
81                 }
82
83                 ivr_base = ring->nhi->iobase + REG_INT_VEC_ALLOC_BASE;
84                 step = index / REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
85                 shift = index % REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
86                 ivr = ioread32(ivr_base + step);
87                 ivr &= ~(REG_INT_VEC_ALLOC_MASK << shift);
88                 if (active)
89                         ivr |= ring->vector << shift;
90                 iowrite32(ivr, ivr_base + step);
91         }
92
93         old = ioread32(ring->nhi->iobase + reg);
94         if (active)
95                 new = old | mask;
96         else
97                 new = old & ~mask;
98
99         dev_dbg(&ring->nhi->pdev->dev,
100                 "%s interrupt at register %#x bit %d (%#x -> %#x)\n",
101                 active ? "enabling" : "disabling", reg, bit, old, new);
102
103         if (new == old)
104                 dev_WARN(&ring->nhi->pdev->dev,
105                                          "interrupt for %s %d is already %s\n",
106                                          RING_TYPE(ring), ring->hop,
107                                          active ? "enabled" : "disabled");
108         iowrite32(new, ring->nhi->iobase + reg);
109 }
110
111 /**
112  * nhi_disable_interrupts() - disable interrupts for all rings
113  *
114  * Use only during init and shutdown.
115  */
116 static void nhi_disable_interrupts(struct tb_nhi *nhi)
117 {
118         int i = 0;
119         /* disable interrupts */
120         for (i = 0; i < RING_INTERRUPT_REG_COUNT(nhi); i++)
121                 iowrite32(0, nhi->iobase + REG_RING_INTERRUPT_BASE + 4 * i);
122
123         /* clear interrupt status bits */
124         for (i = 0; i < RING_NOTIFY_REG_COUNT(nhi); i++)
125                 ioread32(nhi->iobase + REG_RING_NOTIFY_BASE + 4 * i);
126 }
127
128 /* ring helper methods */
129
130 static void __iomem *ring_desc_base(struct tb_ring *ring)
131 {
132         void __iomem *io = ring->nhi->iobase;
133         io += ring->is_tx ? REG_TX_RING_BASE : REG_RX_RING_BASE;
134         io += ring->hop * 16;
135         return io;
136 }
137
138 static void __iomem *ring_options_base(struct tb_ring *ring)
139 {
140         void __iomem *io = ring->nhi->iobase;
141         io += ring->is_tx ? REG_TX_OPTIONS_BASE : REG_RX_OPTIONS_BASE;
142         io += ring->hop * 32;
143         return io;
144 }
145
146 static void ring_iowrite16desc(struct tb_ring *ring, u32 value, u32 offset)
147 {
148         iowrite16(value, ring_desc_base(ring) + offset);
149 }
150
151 static void ring_iowrite32desc(struct tb_ring *ring, u32 value, u32 offset)
152 {
153         iowrite32(value, ring_desc_base(ring) + offset);
154 }
155
156 static void ring_iowrite64desc(struct tb_ring *ring, u64 value, u32 offset)
157 {
158         iowrite32(value, ring_desc_base(ring) + offset);
159         iowrite32(value >> 32, ring_desc_base(ring) + offset + 4);
160 }
161
162 static void ring_iowrite32options(struct tb_ring *ring, u32 value, u32 offset)
163 {
164         iowrite32(value, ring_options_base(ring) + offset);
165 }
166
167 static bool ring_full(struct tb_ring *ring)
168 {
169         return ((ring->head + 1) % ring->size) == ring->tail;
170 }
171
172 static bool ring_empty(struct tb_ring *ring)
173 {
174         return ring->head == ring->tail;
175 }
176
177 /**
178  * ring_write_descriptors() - post frames from ring->queue to the controller
179  *
180  * ring->lock is held.
181  */
182 static void ring_write_descriptors(struct tb_ring *ring)
183 {
184         struct ring_frame *frame, *n;
185         struct ring_desc *descriptor;
186         list_for_each_entry_safe(frame, n, &ring->queue, list) {
187                 if (ring_full(ring))
188                         break;
189                 list_move_tail(&frame->list, &ring->in_flight);
190                 descriptor = &ring->descriptors[ring->head];
191                 descriptor->phys = frame->buffer_phy;
192                 descriptor->time = 0;
193                 descriptor->flags = RING_DESC_POSTED | RING_DESC_INTERRUPT;
194                 if (ring->is_tx) {
195                         descriptor->length = frame->size;
196                         descriptor->eof = frame->eof;
197                         descriptor->sof = frame->sof;
198                 }
199                 ring->head = (ring->head + 1) % ring->size;
200                 ring_iowrite16desc(ring, ring->head, ring->is_tx ? 10 : 8);
201         }
202 }
203
204 /**
205  * ring_work() - progress completed frames
206  *
207  * If the ring is shutting down then all frames are marked as canceled and
208  * their callbacks are invoked.
209  *
210  * Otherwise we collect all completed frame from the ring buffer, write new
211  * frame to the ring buffer and invoke the callbacks for the completed frames.
212  */
213 static void ring_work(struct work_struct *work)
214 {
215         struct tb_ring *ring = container_of(work, typeof(*ring), work);
216         struct ring_frame *frame;
217         bool canceled = false;
218         unsigned long flags;
219         LIST_HEAD(done);
220
221         spin_lock_irqsave(&ring->lock, flags);
222
223         if (!ring->running) {
224                 /*  Move all frames to done and mark them as canceled. */
225                 list_splice_tail_init(&ring->in_flight, &done);
226                 list_splice_tail_init(&ring->queue, &done);
227                 canceled = true;
228                 goto invoke_callback;
229         }
230
231         while (!ring_empty(ring)) {
232                 if (!(ring->descriptors[ring->tail].flags
233                                 & RING_DESC_COMPLETED))
234                         break;
235                 frame = list_first_entry(&ring->in_flight, typeof(*frame),
236                                          list);
237                 list_move_tail(&frame->list, &done);
238                 if (!ring->is_tx) {
239                         frame->size = ring->descriptors[ring->tail].length;
240                         frame->eof = ring->descriptors[ring->tail].eof;
241                         frame->sof = ring->descriptors[ring->tail].sof;
242                         frame->flags = ring->descriptors[ring->tail].flags;
243                 }
244                 ring->tail = (ring->tail + 1) % ring->size;
245         }
246         ring_write_descriptors(ring);
247
248 invoke_callback:
249         /* allow callbacks to schedule new work */
250         spin_unlock_irqrestore(&ring->lock, flags);
251         while (!list_empty(&done)) {
252                 frame = list_first_entry(&done, typeof(*frame), list);
253                 /*
254                  * The callback may reenqueue or delete frame.
255                  * Do not hold on to it.
256                  */
257                 list_del_init(&frame->list);
258                 if (frame->callback)
259                         frame->callback(ring, frame, canceled);
260         }
261 }
262
263 int __tb_ring_enqueue(struct tb_ring *ring, struct ring_frame *frame)
264 {
265         unsigned long flags;
266         int ret = 0;
267
268         spin_lock_irqsave(&ring->lock, flags);
269         if (ring->running) {
270                 list_add_tail(&frame->list, &ring->queue);
271                 ring_write_descriptors(ring);
272         } else {
273                 ret = -ESHUTDOWN;
274         }
275         spin_unlock_irqrestore(&ring->lock, flags);
276         return ret;
277 }
278 EXPORT_SYMBOL_GPL(__tb_ring_enqueue);
279
280 /**
281  * tb_ring_poll() - Poll one completed frame from the ring
282  * @ring: Ring to poll
283  *
284  * This function can be called when @start_poll callback of the @ring
285  * has been called. It will read one completed frame from the ring and
286  * return it to the caller. Returns %NULL if there is no more completed
287  * frames.
288  */
289 struct ring_frame *tb_ring_poll(struct tb_ring *ring)
290 {
291         struct ring_frame *frame = NULL;
292         unsigned long flags;
293
294         spin_lock_irqsave(&ring->lock, flags);
295         if (!ring->running)
296                 goto unlock;
297         if (ring_empty(ring))
298                 goto unlock;
299
300         if (ring->descriptors[ring->tail].flags & RING_DESC_COMPLETED) {
301                 frame = list_first_entry(&ring->in_flight, typeof(*frame),
302                                          list);
303                 list_del_init(&frame->list);
304
305                 if (!ring->is_tx) {
306                         frame->size = ring->descriptors[ring->tail].length;
307                         frame->eof = ring->descriptors[ring->tail].eof;
308                         frame->sof = ring->descriptors[ring->tail].sof;
309                         frame->flags = ring->descriptors[ring->tail].flags;
310                 }
311
312                 ring->tail = (ring->tail + 1) % ring->size;
313         }
314
315 unlock:
316         spin_unlock_irqrestore(&ring->lock, flags);
317         return frame;
318 }
319 EXPORT_SYMBOL_GPL(tb_ring_poll);
320
321 static void __ring_interrupt_mask(struct tb_ring *ring, bool mask)
322 {
323         int idx = ring_interrupt_index(ring);
324         int reg = REG_RING_INTERRUPT_BASE + idx / 32 * 4;
325         int bit = idx % 32;
326         u32 val;
327
328         val = ioread32(ring->nhi->iobase + reg);
329         if (mask)
330                 val &= ~BIT(bit);
331         else
332                 val |= BIT(bit);
333         iowrite32(val, ring->nhi->iobase + reg);
334 }
335
336 /* Both @nhi->lock and @ring->lock should be held */
337 static void __ring_interrupt(struct tb_ring *ring)
338 {
339         if (!ring->running)
340                 return;
341
342         if (ring->start_poll) {
343                 __ring_interrupt_mask(ring, true);
344                 ring->start_poll(ring->poll_data);
345         } else {
346                 schedule_work(&ring->work);
347         }
348 }
349
350 /**
351  * tb_ring_poll_complete() - Re-start interrupt for the ring
352  * @ring: Ring to re-start the interrupt
353  *
354  * This will re-start (unmask) the ring interrupt once the user is done
355  * with polling.
356  */
357 void tb_ring_poll_complete(struct tb_ring *ring)
358 {
359         unsigned long flags;
360
361         spin_lock_irqsave(&ring->nhi->lock, flags);
362         spin_lock(&ring->lock);
363         if (ring->start_poll)
364                 __ring_interrupt_mask(ring, false);
365         spin_unlock(&ring->lock);
366         spin_unlock_irqrestore(&ring->nhi->lock, flags);
367 }
368 EXPORT_SYMBOL_GPL(tb_ring_poll_complete);
369
370 static irqreturn_t ring_msix(int irq, void *data)
371 {
372         struct tb_ring *ring = data;
373
374         spin_lock(&ring->nhi->lock);
375         spin_lock(&ring->lock);
376         __ring_interrupt(ring);
377         spin_unlock(&ring->lock);
378         spin_unlock(&ring->nhi->lock);
379
380         return IRQ_HANDLED;
381 }
382
383 static int ring_request_msix(struct tb_ring *ring, bool no_suspend)
384 {
385         struct tb_nhi *nhi = ring->nhi;
386         unsigned long irqflags;
387         int ret;
388
389         if (!nhi->pdev->msix_enabled)
390                 return 0;
391
392         ret = ida_simple_get(&nhi->msix_ida, 0, MSIX_MAX_VECS, GFP_KERNEL);
393         if (ret < 0)
394                 return ret;
395
396         ring->vector = ret;
397
398         ring->irq = pci_irq_vector(ring->nhi->pdev, ring->vector);
399         if (ring->irq < 0)
400                 return ring->irq;
401
402         irqflags = no_suspend ? IRQF_NO_SUSPEND : 0;
403         return request_irq(ring->irq, ring_msix, irqflags, "thunderbolt", ring);
404 }
405
406 static void ring_release_msix(struct tb_ring *ring)
407 {
408         if (ring->irq <= 0)
409                 return;
410
411         free_irq(ring->irq, ring);
412         ida_simple_remove(&ring->nhi->msix_ida, ring->vector);
413         ring->vector = 0;
414         ring->irq = 0;
415 }
416
417 static int nhi_alloc_hop(struct tb_nhi *nhi, struct tb_ring *ring)
418 {
419         int ret = 0;
420
421         spin_lock_irq(&nhi->lock);
422
423         if (ring->hop < 0) {
424                 unsigned int i;
425
426                 /*
427                  * Automatically allocate HopID from the non-reserved
428                  * range 8 .. hop_count - 1.
429                  */
430                 for (i = RING_FIRST_USABLE_HOPID; i < nhi->hop_count; i++) {
431                         if (ring->is_tx) {
432                                 if (!nhi->tx_rings[i]) {
433                                         ring->hop = i;
434                                         break;
435                                 }
436                         } else {
437                                 if (!nhi->rx_rings[i]) {
438                                         ring->hop = i;
439                                         break;
440                                 }
441                         }
442                 }
443         }
444
445         if (ring->hop < 0 || ring->hop >= nhi->hop_count) {
446                 dev_warn(&nhi->pdev->dev, "invalid hop: %d\n", ring->hop);
447                 ret = -EINVAL;
448                 goto err_unlock;
449         }
450         if (ring->is_tx && nhi->tx_rings[ring->hop]) {
451                 dev_warn(&nhi->pdev->dev, "TX hop %d already allocated\n",
452                          ring->hop);
453                 ret = -EBUSY;
454                 goto err_unlock;
455         } else if (!ring->is_tx && nhi->rx_rings[ring->hop]) {
456                 dev_warn(&nhi->pdev->dev, "RX hop %d already allocated\n",
457                          ring->hop);
458                 ret = -EBUSY;
459                 goto err_unlock;
460         }
461
462         if (ring->is_tx)
463                 nhi->tx_rings[ring->hop] = ring;
464         else
465                 nhi->rx_rings[ring->hop] = ring;
466
467 err_unlock:
468         spin_unlock_irq(&nhi->lock);
469
470         return ret;
471 }
472
473 static struct tb_ring *tb_ring_alloc(struct tb_nhi *nhi, u32 hop, int size,
474                                      bool transmit, unsigned int flags,
475                                      u16 sof_mask, u16 eof_mask,
476                                      void (*start_poll)(void *),
477                                      void *poll_data)
478 {
479         struct tb_ring *ring = NULL;
480
481         dev_dbg(&nhi->pdev->dev, "allocating %s ring %d of size %d\n",
482                 transmit ? "TX" : "RX", hop, size);
483
484         /* Tx Ring 2 is reserved for E2E workaround */
485         if (transmit && hop == RING_E2E_UNUSED_HOPID)
486                 return NULL;
487
488         ring = kzalloc(sizeof(*ring), GFP_KERNEL);
489         if (!ring)
490                 return NULL;
491
492         spin_lock_init(&ring->lock);
493         INIT_LIST_HEAD(&ring->queue);
494         INIT_LIST_HEAD(&ring->in_flight);
495         INIT_WORK(&ring->work, ring_work);
496
497         ring->nhi = nhi;
498         ring->hop = hop;
499         ring->is_tx = transmit;
500         ring->size = size;
501         ring->flags = flags;
502         ring->sof_mask = sof_mask;
503         ring->eof_mask = eof_mask;
504         ring->head = 0;
505         ring->tail = 0;
506         ring->running = false;
507         ring->start_poll = start_poll;
508         ring->poll_data = poll_data;
509
510         ring->descriptors = dma_alloc_coherent(&ring->nhi->pdev->dev,
511                         size * sizeof(*ring->descriptors),
512                         &ring->descriptors_dma, GFP_KERNEL | __GFP_ZERO);
513         if (!ring->descriptors)
514                 goto err_free_ring;
515
516         if (ring_request_msix(ring, flags & RING_FLAG_NO_SUSPEND))
517                 goto err_free_descs;
518
519         if (nhi_alloc_hop(nhi, ring))
520                 goto err_release_msix;
521
522         return ring;
523
524 err_release_msix:
525         ring_release_msix(ring);
526 err_free_descs:
527         dma_free_coherent(&ring->nhi->pdev->dev,
528                           ring->size * sizeof(*ring->descriptors),
529                           ring->descriptors, ring->descriptors_dma);
530 err_free_ring:
531         kfree(ring);
532
533         return NULL;
534 }
535
536 /**
537  * tb_ring_alloc_tx() - Allocate DMA ring for transmit
538  * @nhi: Pointer to the NHI the ring is to be allocated
539  * @hop: HopID (ring) to allocate
540  * @size: Number of entries in the ring
541  * @flags: Flags for the ring
542  */
543 struct tb_ring *tb_ring_alloc_tx(struct tb_nhi *nhi, int hop, int size,
544                                  unsigned int flags)
545 {
546         return tb_ring_alloc(nhi, hop, size, true, flags, 0, 0, NULL, NULL);
547 }
548 EXPORT_SYMBOL_GPL(tb_ring_alloc_tx);
549
550 /**
551  * tb_ring_alloc_rx() - Allocate DMA ring for receive
552  * @nhi: Pointer to the NHI the ring is to be allocated
553  * @hop: HopID (ring) to allocate. Pass %-1 for automatic allocation.
554  * @size: Number of entries in the ring
555  * @flags: Flags for the ring
556  * @sof_mask: Mask of PDF values that start a frame
557  * @eof_mask: Mask of PDF values that end a frame
558  * @start_poll: If not %NULL the ring will call this function when an
559  *              interrupt is triggered and masked, instead of callback
560  *              in each Rx frame.
561  * @poll_data: Optional data passed to @start_poll
562  */
563 struct tb_ring *tb_ring_alloc_rx(struct tb_nhi *nhi, int hop, int size,
564                                  unsigned int flags, u16 sof_mask, u16 eof_mask,
565                                  void (*start_poll)(void *), void *poll_data)
566 {
567         return tb_ring_alloc(nhi, hop, size, false, flags, sof_mask, eof_mask,
568                              start_poll, poll_data);
569 }
570 EXPORT_SYMBOL_GPL(tb_ring_alloc_rx);
571
572 /**
573  * tb_ring_start() - enable a ring
574  *
575  * Must not be invoked in parallel with tb_ring_stop().
576  */
577 void tb_ring_start(struct tb_ring *ring)
578 {
579         u16 frame_size;
580         u32 flags;
581
582         spin_lock_irq(&ring->nhi->lock);
583         spin_lock(&ring->lock);
584         if (ring->nhi->going_away)
585                 goto err;
586         if (ring->running) {
587                 dev_WARN(&ring->nhi->pdev->dev, "ring already started\n");
588                 goto err;
589         }
590         dev_dbg(&ring->nhi->pdev->dev, "starting %s %d\n",
591                 RING_TYPE(ring), ring->hop);
592
593         if (ring->flags & RING_FLAG_FRAME) {
594                 /* Means 4096 */
595                 frame_size = 0;
596                 flags = RING_FLAG_ENABLE;
597         } else {
598                 frame_size = TB_FRAME_SIZE;
599                 flags = RING_FLAG_ENABLE | RING_FLAG_RAW;
600         }
601
602         if (ring->flags & RING_FLAG_E2E && !ring->is_tx) {
603                 u32 hop;
604
605                 /*
606                  * In order not to lose Rx packets we enable end-to-end
607                  * workaround which transfers Rx credits to an unused Tx
608                  * HopID.
609                  */
610                 hop = RING_E2E_UNUSED_HOPID << REG_RX_OPTIONS_E2E_HOP_SHIFT;
611                 hop &= REG_RX_OPTIONS_E2E_HOP_MASK;
612                 flags |= hop | RING_FLAG_E2E_FLOW_CONTROL;
613         }
614
615         ring_iowrite64desc(ring, ring->descriptors_dma, 0);
616         if (ring->is_tx) {
617                 ring_iowrite32desc(ring, ring->size, 12);
618                 ring_iowrite32options(ring, 0, 4); /* time releated ? */
619                 ring_iowrite32options(ring, flags, 0);
620         } else {
621                 u32 sof_eof_mask = ring->sof_mask << 16 | ring->eof_mask;
622
623                 ring_iowrite32desc(ring, (frame_size << 16) | ring->size, 12);
624                 ring_iowrite32options(ring, sof_eof_mask, 4);
625                 ring_iowrite32options(ring, flags, 0);
626         }
627         ring_interrupt_active(ring, true);
628         ring->running = true;
629 err:
630         spin_unlock(&ring->lock);
631         spin_unlock_irq(&ring->nhi->lock);
632 }
633 EXPORT_SYMBOL_GPL(tb_ring_start);
634
635 /**
636  * tb_ring_stop() - shutdown a ring
637  *
638  * Must not be invoked from a callback.
639  *
640  * This method will disable the ring. Further calls to
641  * tb_ring_tx/tb_ring_rx will return -ESHUTDOWN until ring_stop has been
642  * called.
643  *
644  * All enqueued frames will be canceled and their callbacks will be executed
645  * with frame->canceled set to true (on the callback thread). This method
646  * returns only after all callback invocations have finished.
647  */
648 void tb_ring_stop(struct tb_ring *ring)
649 {
650         spin_lock_irq(&ring->nhi->lock);
651         spin_lock(&ring->lock);
652         dev_dbg(&ring->nhi->pdev->dev, "stopping %s %d\n",
653                 RING_TYPE(ring), ring->hop);
654         if (ring->nhi->going_away)
655                 goto err;
656         if (!ring->running) {
657                 dev_WARN(&ring->nhi->pdev->dev, "%s %d already stopped\n",
658                          RING_TYPE(ring), ring->hop);
659                 goto err;
660         }
661         ring_interrupt_active(ring, false);
662
663         ring_iowrite32options(ring, 0, 0);
664         ring_iowrite64desc(ring, 0, 0);
665         ring_iowrite16desc(ring, 0, ring->is_tx ? 10 : 8);
666         ring_iowrite32desc(ring, 0, 12);
667         ring->head = 0;
668         ring->tail = 0;
669         ring->running = false;
670
671 err:
672         spin_unlock(&ring->lock);
673         spin_unlock_irq(&ring->nhi->lock);
674
675         /*
676          * schedule ring->work to invoke callbacks on all remaining frames.
677          */
678         schedule_work(&ring->work);
679         flush_work(&ring->work);
680 }
681 EXPORT_SYMBOL_GPL(tb_ring_stop);
682
683 /*
684  * tb_ring_free() - free ring
685  *
686  * When this method returns all invocations of ring->callback will have
687  * finished.
688  *
689  * Ring must be stopped.
690  *
691  * Must NOT be called from ring_frame->callback!
692  */
693 void tb_ring_free(struct tb_ring *ring)
694 {
695         spin_lock_irq(&ring->nhi->lock);
696         /*
697          * Dissociate the ring from the NHI. This also ensures that
698          * nhi_interrupt_work cannot reschedule ring->work.
699          */
700         if (ring->is_tx)
701                 ring->nhi->tx_rings[ring->hop] = NULL;
702         else
703                 ring->nhi->rx_rings[ring->hop] = NULL;
704
705         if (ring->running) {
706                 dev_WARN(&ring->nhi->pdev->dev, "%s %d still running\n",
707                          RING_TYPE(ring), ring->hop);
708         }
709         spin_unlock_irq(&ring->nhi->lock);
710
711         ring_release_msix(ring);
712
713         dma_free_coherent(&ring->nhi->pdev->dev,
714                           ring->size * sizeof(*ring->descriptors),
715                           ring->descriptors, ring->descriptors_dma);
716
717         ring->descriptors = NULL;
718         ring->descriptors_dma = 0;
719
720
721         dev_dbg(&ring->nhi->pdev->dev, "freeing %s %d\n", RING_TYPE(ring),
722                 ring->hop);
723
724         /**
725          * ring->work can no longer be scheduled (it is scheduled only
726          * by nhi_interrupt_work, ring_stop and ring_msix). Wait for it
727          * to finish before freeing the ring.
728          */
729         flush_work(&ring->work);
730         kfree(ring);
731 }
732 EXPORT_SYMBOL_GPL(tb_ring_free);
733
734 /**
735  * nhi_mailbox_cmd() - Send a command through NHI mailbox
736  * @nhi: Pointer to the NHI structure
737  * @cmd: Command to send
738  * @data: Data to be send with the command
739  *
740  * Sends mailbox command to the firmware running on NHI. Returns %0 in
741  * case of success and negative errno in case of failure.
742  */
743 int nhi_mailbox_cmd(struct tb_nhi *nhi, enum nhi_mailbox_cmd cmd, u32 data)
744 {
745         ktime_t timeout;
746         u32 val;
747
748         iowrite32(data, nhi->iobase + REG_INMAIL_DATA);
749
750         val = ioread32(nhi->iobase + REG_INMAIL_CMD);
751         val &= ~(REG_INMAIL_CMD_MASK | REG_INMAIL_ERROR);
752         val |= REG_INMAIL_OP_REQUEST | cmd;
753         iowrite32(val, nhi->iobase + REG_INMAIL_CMD);
754
755         timeout = ktime_add_ms(ktime_get(), NHI_MAILBOX_TIMEOUT);
756         do {
757                 val = ioread32(nhi->iobase + REG_INMAIL_CMD);
758                 if (!(val & REG_INMAIL_OP_REQUEST))
759                         break;
760                 usleep_range(10, 20);
761         } while (ktime_before(ktime_get(), timeout));
762
763         if (val & REG_INMAIL_OP_REQUEST)
764                 return -ETIMEDOUT;
765         if (val & REG_INMAIL_ERROR)
766                 return -EIO;
767
768         return 0;
769 }
770
771 /**
772  * nhi_mailbox_mode() - Return current firmware operation mode
773  * @nhi: Pointer to the NHI structure
774  *
775  * The function reads current firmware operation mode using NHI mailbox
776  * registers and returns it to the caller.
777  */
778 enum nhi_fw_mode nhi_mailbox_mode(struct tb_nhi *nhi)
779 {
780         u32 val;
781
782         val = ioread32(nhi->iobase + REG_OUTMAIL_CMD);
783         val &= REG_OUTMAIL_CMD_OPMODE_MASK;
784         val >>= REG_OUTMAIL_CMD_OPMODE_SHIFT;
785
786         return (enum nhi_fw_mode)val;
787 }
788
789 static void nhi_interrupt_work(struct work_struct *work)
790 {
791         struct tb_nhi *nhi = container_of(work, typeof(*nhi), interrupt_work);
792         int value = 0; /* Suppress uninitialized usage warning. */
793         int bit;
794         int hop = -1;
795         int type = 0; /* current interrupt type 0: TX, 1: RX, 2: RX overflow */
796         struct tb_ring *ring;
797
798         spin_lock_irq(&nhi->lock);
799
800         /*
801          * Starting at REG_RING_NOTIFY_BASE there are three status bitfields
802          * (TX, RX, RX overflow). We iterate over the bits and read a new
803          * dwords as required. The registers are cleared on read.
804          */
805         for (bit = 0; bit < 3 * nhi->hop_count; bit++) {
806                 if (bit % 32 == 0)
807                         value = ioread32(nhi->iobase
808                                          + REG_RING_NOTIFY_BASE
809                                          + 4 * (bit / 32));
810                 if (++hop == nhi->hop_count) {
811                         hop = 0;
812                         type++;
813                 }
814                 if ((value & (1 << (bit % 32))) == 0)
815                         continue;
816                 if (type == 2) {
817                         dev_warn(&nhi->pdev->dev,
818                                  "RX overflow for ring %d\n",
819                                  hop);
820                         continue;
821                 }
822                 if (type == 0)
823                         ring = nhi->tx_rings[hop];
824                 else
825                         ring = nhi->rx_rings[hop];
826                 if (ring == NULL) {
827                         dev_warn(&nhi->pdev->dev,
828                                  "got interrupt for inactive %s ring %d\n",
829                                  type ? "RX" : "TX",
830                                  hop);
831                         continue;
832                 }
833
834                 spin_lock(&ring->lock);
835                 __ring_interrupt(ring);
836                 spin_unlock(&ring->lock);
837         }
838         spin_unlock_irq(&nhi->lock);
839 }
840
841 static irqreturn_t nhi_msi(int irq, void *data)
842 {
843         struct tb_nhi *nhi = data;
844         schedule_work(&nhi->interrupt_work);
845         return IRQ_HANDLED;
846 }
847
848 static int nhi_suspend_noirq(struct device *dev)
849 {
850         struct pci_dev *pdev = to_pci_dev(dev);
851         struct tb *tb = pci_get_drvdata(pdev);
852
853         return tb_domain_suspend_noirq(tb);
854 }
855
856 static void nhi_enable_int_throttling(struct tb_nhi *nhi)
857 {
858         /* Throttling is specified in 256ns increments */
859         u32 throttle = DIV_ROUND_UP(128 * NSEC_PER_USEC, 256);
860         unsigned int i;
861
862         /*
863          * Configure interrupt throttling for all vectors even if we
864          * only use few.
865          */
866         for (i = 0; i < MSIX_MAX_VECS; i++) {
867                 u32 reg = REG_INT_THROTTLING_RATE + i * 4;
868                 iowrite32(throttle, nhi->iobase + reg);
869         }
870 }
871
872 static int nhi_resume_noirq(struct device *dev)
873 {
874         struct pci_dev *pdev = to_pci_dev(dev);
875         struct tb *tb = pci_get_drvdata(pdev);
876
877         /*
878          * Check that the device is still there. It may be that the user
879          * unplugged last device which causes the host controller to go
880          * away on PCs.
881          */
882         if (!pci_device_is_present(pdev))
883                 tb->nhi->going_away = true;
884         else
885                 nhi_enable_int_throttling(tb->nhi);
886
887         return tb_domain_resume_noirq(tb);
888 }
889
890 static int nhi_suspend(struct device *dev)
891 {
892         struct pci_dev *pdev = to_pci_dev(dev);
893         struct tb *tb = pci_get_drvdata(pdev);
894
895         return tb_domain_suspend(tb);
896 }
897
898 static void nhi_complete(struct device *dev)
899 {
900         struct pci_dev *pdev = to_pci_dev(dev);
901         struct tb *tb = pci_get_drvdata(pdev);
902
903         /*
904          * If we were runtime suspended when system suspend started,
905          * schedule runtime resume now. It should bring the domain back
906          * to functional state.
907          */
908         if (pm_runtime_suspended(&pdev->dev))
909                 pm_runtime_resume(&pdev->dev);
910         else
911                 tb_domain_complete(tb);
912 }
913
914 static int nhi_runtime_suspend(struct device *dev)
915 {
916         struct pci_dev *pdev = to_pci_dev(dev);
917         struct tb *tb = pci_get_drvdata(pdev);
918
919         return tb_domain_runtime_suspend(tb);
920 }
921
922 static int nhi_runtime_resume(struct device *dev)
923 {
924         struct pci_dev *pdev = to_pci_dev(dev);
925         struct tb *tb = pci_get_drvdata(pdev);
926
927         nhi_enable_int_throttling(tb->nhi);
928         return tb_domain_runtime_resume(tb);
929 }
930
931 static void nhi_shutdown(struct tb_nhi *nhi)
932 {
933         int i;
934
935         dev_dbg(&nhi->pdev->dev, "shutdown\n");
936
937         for (i = 0; i < nhi->hop_count; i++) {
938                 if (nhi->tx_rings[i])
939                         dev_WARN(&nhi->pdev->dev,
940                                  "TX ring %d is still active\n", i);
941                 if (nhi->rx_rings[i])
942                         dev_WARN(&nhi->pdev->dev,
943                                  "RX ring %d is still active\n", i);
944         }
945         nhi_disable_interrupts(nhi);
946         /*
947          * We have to release the irq before calling flush_work. Otherwise an
948          * already executing IRQ handler could call schedule_work again.
949          */
950         if (!nhi->pdev->msix_enabled) {
951                 devm_free_irq(&nhi->pdev->dev, nhi->pdev->irq, nhi);
952                 flush_work(&nhi->interrupt_work);
953         }
954         ida_destroy(&nhi->msix_ida);
955 }
956
957 static int nhi_init_msi(struct tb_nhi *nhi)
958 {
959         struct pci_dev *pdev = nhi->pdev;
960         int res, irq, nvec;
961
962         /* In case someone left them on. */
963         nhi_disable_interrupts(nhi);
964
965         nhi_enable_int_throttling(nhi);
966
967         ida_init(&nhi->msix_ida);
968
969         /*
970          * The NHI has 16 MSI-X vectors or a single MSI. We first try to
971          * get all MSI-X vectors and if we succeed, each ring will have
972          * one MSI-X. If for some reason that does not work out, we
973          * fallback to a single MSI.
974          */
975         nvec = pci_alloc_irq_vectors(pdev, MSIX_MIN_VECS, MSIX_MAX_VECS,
976                                      PCI_IRQ_MSIX);
977         if (nvec < 0) {
978                 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
979                 if (nvec < 0)
980                         return nvec;
981
982                 INIT_WORK(&nhi->interrupt_work, nhi_interrupt_work);
983
984                 irq = pci_irq_vector(nhi->pdev, 0);
985                 if (irq < 0)
986                         return irq;
987
988                 res = devm_request_irq(&pdev->dev, irq, nhi_msi,
989                                        IRQF_NO_SUSPEND, "thunderbolt", nhi);
990                 if (res) {
991                         dev_err(&pdev->dev, "request_irq failed, aborting\n");
992                         return res;
993                 }
994         }
995
996         return 0;
997 }
998
999 static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1000 {
1001         struct tb_nhi *nhi;
1002         struct tb *tb;
1003         int res;
1004
1005         res = pcim_enable_device(pdev);
1006         if (res) {
1007                 dev_err(&pdev->dev, "cannot enable PCI device, aborting\n");
1008                 return res;
1009         }
1010
1011         res = pcim_iomap_regions(pdev, 1 << 0, "thunderbolt");
1012         if (res) {
1013                 dev_err(&pdev->dev, "cannot obtain PCI resources, aborting\n");
1014                 return res;
1015         }
1016
1017         nhi = devm_kzalloc(&pdev->dev, sizeof(*nhi), GFP_KERNEL);
1018         if (!nhi)
1019                 return -ENOMEM;
1020
1021         nhi->pdev = pdev;
1022         /* cannot fail - table is allocated bin pcim_iomap_regions */
1023         nhi->iobase = pcim_iomap_table(pdev)[0];
1024         nhi->hop_count = ioread32(nhi->iobase + REG_HOP_COUNT) & 0x3ff;
1025         if (nhi->hop_count != 12 && nhi->hop_count != 32)
1026                 dev_warn(&pdev->dev, "unexpected hop count: %d\n",
1027                          nhi->hop_count);
1028
1029         nhi->tx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
1030                                      sizeof(*nhi->tx_rings), GFP_KERNEL);
1031         nhi->rx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
1032                                      sizeof(*nhi->rx_rings), GFP_KERNEL);
1033         if (!nhi->tx_rings || !nhi->rx_rings)
1034                 return -ENOMEM;
1035
1036         res = nhi_init_msi(nhi);
1037         if (res) {
1038                 dev_err(&pdev->dev, "cannot enable MSI, aborting\n");
1039                 return res;
1040         }
1041
1042         spin_lock_init(&nhi->lock);
1043
1044         res = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1045         if (res)
1046                 res = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
1047         if (res) {
1048                 dev_err(&pdev->dev, "failed to set DMA mask\n");
1049                 return res;
1050         }
1051
1052         pci_set_master(pdev);
1053
1054         tb = icm_probe(nhi);
1055         if (!tb)
1056                 tb = tb_probe(nhi);
1057         if (!tb) {
1058                 dev_err(&nhi->pdev->dev,
1059                         "failed to determine connection manager, aborting\n");
1060                 return -ENODEV;
1061         }
1062
1063         dev_dbg(&nhi->pdev->dev, "NHI initialized, starting thunderbolt\n");
1064
1065         res = tb_domain_add(tb);
1066         if (res) {
1067                 /*
1068                  * At this point the RX/TX rings might already have been
1069                  * activated. Do a proper shutdown.
1070                  */
1071                 tb_domain_put(tb);
1072                 nhi_shutdown(nhi);
1073                 return res;
1074         }
1075         pci_set_drvdata(pdev, tb);
1076
1077         pm_runtime_allow(&pdev->dev);
1078         pm_runtime_set_autosuspend_delay(&pdev->dev, TB_AUTOSUSPEND_DELAY);
1079         pm_runtime_use_autosuspend(&pdev->dev);
1080         pm_runtime_put_autosuspend(&pdev->dev);
1081
1082         return 0;
1083 }
1084
1085 static void nhi_remove(struct pci_dev *pdev)
1086 {
1087         struct tb *tb = pci_get_drvdata(pdev);
1088         struct tb_nhi *nhi = tb->nhi;
1089
1090         pm_runtime_get_sync(&pdev->dev);
1091         pm_runtime_dont_use_autosuspend(&pdev->dev);
1092         pm_runtime_forbid(&pdev->dev);
1093
1094         tb_domain_remove(tb);
1095         nhi_shutdown(nhi);
1096 }
1097
1098 /*
1099  * The tunneled pci bridges are siblings of us. Use resume_noirq to reenable
1100  * the tunnels asap. A corresponding pci quirk blocks the downstream bridges
1101  * resume_noirq until we are done.
1102  */
1103 static const struct dev_pm_ops nhi_pm_ops = {
1104         .suspend_noirq = nhi_suspend_noirq,
1105         .resume_noirq = nhi_resume_noirq,
1106         .freeze_noirq = nhi_suspend_noirq, /*
1107                                             * we just disable hotplug, the
1108                                             * pci-tunnels stay alive.
1109                                             */
1110         .thaw_noirq = nhi_resume_noirq,
1111         .restore_noirq = nhi_resume_noirq,
1112         .suspend = nhi_suspend,
1113         .freeze = nhi_suspend,
1114         .poweroff = nhi_suspend,
1115         .complete = nhi_complete,
1116         .runtime_suspend = nhi_runtime_suspend,
1117         .runtime_resume = nhi_runtime_resume,
1118 };
1119
1120 static struct pci_device_id nhi_ids[] = {
1121         /*
1122          * We have to specify class, the TB bridges use the same device and
1123          * vendor (sub)id on gen 1 and gen 2 controllers.
1124          */
1125         {
1126                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1127                 .vendor = PCI_VENDOR_ID_INTEL,
1128                 .device = PCI_DEVICE_ID_INTEL_LIGHT_RIDGE,
1129                 .subvendor = 0x2222, .subdevice = 0x1111,
1130         },
1131         {
1132                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1133                 .vendor = PCI_VENDOR_ID_INTEL,
1134                 .device = PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
1135                 .subvendor = 0x2222, .subdevice = 0x1111,
1136         },
1137         {
1138                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1139                 .vendor = PCI_VENDOR_ID_INTEL,
1140                 .device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI,
1141                 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
1142         },
1143         {
1144                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1145                 .vendor = PCI_VENDOR_ID_INTEL,
1146                 .device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI,
1147                 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
1148         },
1149
1150         /* Thunderbolt 3 */
1151         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_NHI) },
1152         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_NHI) },
1153         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_USBONLY_NHI) },
1154         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_NHI) },
1155         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_USBONLY_NHI) },
1156         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_NHI) },
1157         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_NHI) },
1158         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_USBONLY_NHI) },
1159         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_NHI) },
1160         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_NHI) },
1161
1162         { 0,}
1163 };
1164
1165 MODULE_DEVICE_TABLE(pci, nhi_ids);
1166 MODULE_LICENSE("GPL");
1167
1168 static struct pci_driver nhi_driver = {
1169         .name = "thunderbolt",
1170         .id_table = nhi_ids,
1171         .probe = nhi_probe,
1172         .remove = nhi_remove,
1173         .driver.pm = &nhi_pm_ops,
1174 };
1175
1176 static int __init nhi_init(void)
1177 {
1178         int ret;
1179
1180         ret = tb_domain_init();
1181         if (ret)
1182                 return ret;
1183         ret = pci_register_driver(&nhi_driver);
1184         if (ret)
1185                 tb_domain_exit();
1186         return ret;
1187 }
1188
1189 static void __exit nhi_unload(void)
1190 {
1191         pci_unregister_driver(&nhi_driver);
1192         tb_domain_exit();
1193 }
1194
1195 rootfs_initcall(nhi_init);
1196 module_exit(nhi_unload);