drivers/staging/rt2860/common/rtmp_init.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36 */
  37 #include "../rt_config.h"
  38
  39 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  40 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  41
  42 //
  43 // BBP register initialization set
  44 //
  45 REG_PAIR   BBPRegTable[] = {
  46         {BBP_R65,               0x2C},          // fix rssi issue
  47         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
  48         {BBP_R69,               0x12},
  49         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
  50         {BBP_R73,               0x10},
  51         {BBP_R81,               0x37},
  52         {BBP_R82,               0x62},
  53         {BBP_R83,               0x6A},
  54         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
  55         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
  56         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
  57         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
  58         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
  59         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
  60         {BBP_R106,              0x35},  // for ShortGI throughput
  61 };
  62 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
  63
  64
  65 //
  66 // ASIC register initialization sets
  67 //
  68
  69 RTMP_REG_PAIR   MACRegTable[] = {
  70 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
  71         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
  72         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
  73 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
  74         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
  75         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
  76 #else
  77     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
  78 #endif // HW_BEACON_OFFSET //
  79
  80         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
  81         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
  82         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
  83         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
  84         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
  85         //{TX_SW_CFG0,          0x40a06}, // Gary,2006-08-23
  86         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
  87         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
  88         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
  89         //{TX_TIMEOUT_CFG,      0x00182090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT
  90         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
  91         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
  92         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
  93
  94         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
  95
  96         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
  97
  98         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
  99         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 100         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 101 #ifdef RTMP_MAC_USB
 102         {PBF_CFG,                               0xf40006},              // Only enable Queue 2
 103         {MM40_PROT_CFG,                 0x3F44084},             // Initial Auto_Responder, because QA will turn off Auto-Responder
 104         {WPDMA_GLO_CFG,                 0x00000030},
 105 #endif // RTMP_MAC_USB //
 106         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 107         {GF40_PROT_CFG,                 0x03F44084},
 108         {MM20_PROT_CFG,                 0x01744004},
 109 #ifdef RTMP_MAC_PCI
 110         {MM40_PROT_CFG,                 0x03F54084},
 111 #endif // RTMP_MAC_PCI //
 112         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 113         {TX_RTS_CFG,                    0x00092b20},
 114         {EXP_ACK_TIME,                  0x002400ca},    // default value
 115
 116         {TXOP_HLDR_ET,                  0x00000002},
 117
 118         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 119                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 120                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 121                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 122         {XIFS_TIME_CFG,                 0x33a41010},
 123         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 124 };
 125
 126 RTMP_REG_PAIR   STAMACRegTable[] =      {
 127         {WMM_AIFSN_CFG,         0x00002273},
 128         {WMM_CWMIN_CFG, 0x00002344},
 129         {WMM_CWMAX_CFG, 0x000034aa},
 130 };
 131
 132 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 133 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 134
 135
 136 /*
 137         ========================================================================
 138
 139         Routine Description:
 140                 Allocate RTMP_ADAPTER data block and do some initialization
 141
 142         Arguments:
 143                 Adapter         Pointer to our adapter
 144
 145         Return Value:
 146                 NDIS_STATUS_SUCCESS
 147                 NDIS_STATUS_FAILURE
 148
 149         IRQL = PASSIVE_LEVEL
 150
 151         Note:
 152
 153         ========================================================================
 154 */
 155 NDIS_STATUS     RTMPAllocAdapterBlock(
 156         IN  PVOID       handle,
 157         OUT     PRTMP_ADAPTER   *ppAdapter)
 158 {
 159         PRTMP_ADAPTER   pAd;
 160         NDIS_STATUS             Status;
 161         INT                     index;
 162         UCHAR                   *pBeaconBuf = NULL;
 163
 164         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 165
 166         *ppAdapter = NULL;
 167
 168         do
 169         {
 170                 // Allocate RTMP_ADAPTER memory block
 171                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 172                 if (pBeaconBuf == NULL)
 173                 {
 174                         Status = NDIS_STATUS_FAILURE;
 175                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 176                         break;
 177                 }
 178                 NdisZeroMemory(pBeaconBuf, MAX_BEACON_SIZE);
 179
 180                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 181                 if (Status != NDIS_STATUS_SUCCESS)
 182                 {
 183                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 184                         break;
 185                 }
 186                 pAd->BeaconBuf = pBeaconBuf;
 187                 DBGPRINT(RT_DEBUG_OFF, ("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER)));
 188
 189
 190                 // Init spin locks
 191                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 192 #ifdef RTMP_MAC_PCI
 193                 NdisAllocateSpinLock(&pAd->RxRingLock);
 194 #ifdef RT3090
 195         NdisAllocateSpinLock(&pAd->McuCmdLock);
 196 #endif // RT3090 //
 197 #endif // RTMP_MAC_PCI //
 198
 199                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 200                 {
 201                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 202                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 203                         pAd->DeQueueRunning[index] = FALSE;
 204                 }
 205
 206                 NdisAllocateSpinLock(&pAd->irq_lock);
 207
 208         } while (FALSE);
 209
 210         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 211                 kfree(pBeaconBuf);
 212
 213         *ppAdapter = pAd;
 214
 215         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 216         return Status;
 217 }
 218
 219 /*
 220         ========================================================================
 221
 222         Routine Description:
 223                 Read initial Tx power per MCS and BW from EEPROM
 224
 225         Arguments:
 226                 Adapter                                         Pointer to our adapter
 227
 228         Return Value:
 229                 None
 230
 231         IRQL = PASSIVE_LEVEL
 232
 233         Note:
 234
 235         ========================================================================
 236 */
 237 VOID    RTMPReadTxPwrPerRate(
 238         IN      PRTMP_ADAPTER   pAd)
 239 {
 240         ULONG           data, Adata, Gdata;
 241         USHORT          i, value, value2;
 242         INT                     Apwrdelta, Gpwrdelta;
 243         UCHAR           t1,t2,t3,t4;
 244         BOOLEAN         bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 245
 246         //
 247         // Get power delta for 20MHz and 40MHz.
 248         //
 249         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 250         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 251         Apwrdelta = 0;
 252         Gpwrdelta = 0;
 253
 254         if ((value2 & 0xff) != 0xff)
 255         {
 256                 if ((value2 & 0x80))
 257                         Gpwrdelta = (value2&0xf);
 258
 259                 if ((value2 & 0x40))
 260                         bGpwrdeltaMinus = FALSE;
 261                 else
 262                         bGpwrdeltaMinus = TRUE;
 263         }
 264         if ((value2 & 0xff00) != 0xff00)
 265         {
 266                 if ((value2 & 0x8000))
 267                         Apwrdelta = ((value2&0xf00)>>8);
 268
 269                 if ((value2 & 0x4000))
 270                         bApwrdeltaMinus = FALSE;
 271                 else
 272                         bApwrdeltaMinus = TRUE;
 273         }
 274         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 275
 276         //
 277         // Get Txpower per MCS for 20MHz in 2.4G.
 278         //
 279         for (i=0; i<5; i++)
 280         {
 281                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 282                 data = value;
 283                 if (bApwrdeltaMinus == FALSE)
 284                 {
 285                         t1 = (value&0xf)+(Apwrdelta);
 286                         if (t1 > 0xf)
 287                                 t1 = 0xf;
 288                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 289                         if (t2 > 0xf)
 290                                 t2 = 0xf;
 291                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 292                         if (t3 > 0xf)
 293                                 t3 = 0xf;
 294                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 295                         if (t4 > 0xf)
 296                                 t4 = 0xf;
 297                 }
 298                 else
 299                 {
 300                         if ((value&0xf) > Apwrdelta)
 301                                 t1 = (value&0xf)-(Apwrdelta);
 302                         else
 303                                 t1 = 0;
 304                         if (((value&0xf0)>>4) > Apwrdelta)
 305                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 306                         else
 307                                 t2 = 0;
 308                         if (((value&0xf00)>>8) > Apwrdelta)
 309                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 310                         else
 311                                 t3 = 0;
 312                         if (((value&0xf000)>>12) > Apwrdelta)
 313                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 314                         else
 315                                 t4 = 0;
 316                 }
 317                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 318                 if (bGpwrdeltaMinus == FALSE)
 319                 {
 320                         t1 = (value&0xf)+(Gpwrdelta);
 321                         if (t1 > 0xf)
 322                                 t1 = 0xf;
 323                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 324                         if (t2 > 0xf)
 325                                 t2 = 0xf;
 326                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 327                         if (t3 > 0xf)
 328                                 t3 = 0xf;
 329                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 330                         if (t4 > 0xf)
 331                                 t4 = 0xf;
 332                 }
 333                 else
 334                 {
 335                         if ((value&0xf) > Gpwrdelta)
 336                                 t1 = (value&0xf)-(Gpwrdelta);
 337                         else
 338                                 t1 = 0;
 339                         if (((value&0xf0)>>4) > Gpwrdelta)
 340                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 341                         else
 342                                 t2 = 0;
 343                         if (((value&0xf00)>>8) > Gpwrdelta)
 344                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 345                         else
 346                                 t3 = 0;
 347                         if (((value&0xf000)>>12) > Gpwrdelta)
 348                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 349                         else
 350                                 t4 = 0;
 351                 }
 352                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 353
 354                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 355                 if (bApwrdeltaMinus == FALSE)
 356                 {
 357                         t1 = (value&0xf)+(Apwrdelta);
 358                         if (t1 > 0xf)
 359                                 t1 = 0xf;
 360                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 361                         if (t2 > 0xf)
 362                                 t2 = 0xf;
 363                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 364                         if (t3 > 0xf)
 365                                 t3 = 0xf;
 366                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 367                         if (t4 > 0xf)
 368                                 t4 = 0xf;
 369                 }
 370                 else
 371                 {
 372                         if ((value&0xf) > Apwrdelta)
 373                                 t1 = (value&0xf)-(Apwrdelta);
 374                         else
 375                                 t1 = 0;
 376                         if (((value&0xf0)>>4) > Apwrdelta)
 377                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 378                         else
 379                                 t2 = 0;
 380                         if (((value&0xf00)>>8) > Apwrdelta)
 381                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 382                         else
 383                                 t3 = 0;
 384                         if (((value&0xf000)>>12) > Apwrdelta)
 385                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 386                         else
 387                                 t4 = 0;
 388                 }
 389                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 390                 if (bGpwrdeltaMinus == FALSE)
 391                 {
 392                         t1 = (value&0xf)+(Gpwrdelta);
 393                         if (t1 > 0xf)
 394                                 t1 = 0xf;
 395                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 396                         if (t2 > 0xf)
 397                                 t2 = 0xf;
 398                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 399                         if (t3 > 0xf)
 400                                 t3 = 0xf;
 401                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 402                         if (t4 > 0xf)
 403                                 t4 = 0xf;
 404                 }
 405                 else
 406                 {
 407                         if ((value&0xf) > Gpwrdelta)
 408                                 t1 = (value&0xf)-(Gpwrdelta);
 409                         else
 410                                 t1 = 0;
 411                         if (((value&0xf0)>>4) > Gpwrdelta)
 412                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 413                         else
 414                                 t2 = 0;
 415                         if (((value&0xf00)>>8) > Gpwrdelta)
 416                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 417                         else
 418                                 t3 = 0;
 419                         if (((value&0xf000)>>12) > Gpwrdelta)
 420                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 421                         else
 422                                 t4 = 0;
 423                 }
 424                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 425                 data |= (value<<16);
 426
 427                 /* For 20M/40M Power Delta issue */
 428                 pAd->Tx20MPwrCfgABand[i] = data;
 429                 pAd->Tx20MPwrCfgGBand[i] = data;
 430                 pAd->Tx40MPwrCfgABand[i] = Adata;
 431                 pAd->Tx40MPwrCfgGBand[i] = Gdata;
 432
 433                 if (data != 0xffffffff)
 434                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 435                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 436         }
 437 }
 438
 439
 440 /*
 441         ========================================================================
 442
 443         Routine Description:
 444                 Read initial channel power parameters from EEPROM
 445
 446         Arguments:
 447                 Adapter                                         Pointer to our adapter
 448
 449         Return Value:
 450                 None
 451
 452         IRQL = PASSIVE_LEVEL
 453
 454         Note:
 455
 456         ========================================================================
 457 */
 458 VOID    RTMPReadChannelPwr(
 459         IN      PRTMP_ADAPTER   pAd)
 460 {
 461         UCHAR                           i, choffset;
 462         EEPROM_TX_PWR_STRUC         Power;
 463         EEPROM_TX_PWR_STRUC         Power2;
 464
 465         // Read Tx power value for all channels
 466         // Value from 1 - 0x7f. Default value is 24.
 467         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 468         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 469
 470         // 0. 11b/g, ch1 - ch 14
 471         for (i = 0; i < 7; i++)
 472         {
 473                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 474                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 475                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 476                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 477
 478                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 479                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 480                 else
 481                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 482
 483                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 484                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 485                 else
 486                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 487
 488                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 489                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 490                 else
 491                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 492
 493                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 494                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 495                 else
 496                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 497         }
 498
 499         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 500         // 1.1 Fill up channel
 501         choffset = 14;
 502         for (i = 0; i < 4; i++)
 503         {
 504                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 505                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 506                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 507
 508                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 509                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 510                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 511
 512                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 513                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 514                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 515         }
 516
 517         // 1.2 Fill up power
 518         for (i = 0; i < 6; i++)
 519         {
 520                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 521                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 522
 523                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 524                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 525
 526                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 527                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 528
 529                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 530                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 531
 532                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 533                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 534         }
 535
 536         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 537         // 2.1 Fill up channel
 538         choffset = 14 + 12;
 539         for (i = 0; i < 5; i++)
 540         {
 541                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 542                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 543                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 544
 545                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 546                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 547                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 548
 549                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 550                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 551                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 552         }
 553         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 554         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 555         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 556
 557         // 2.2 Fill up power
 558         for (i = 0; i < 8; i++)
 559         {
 560                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 561                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 562
 563                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 564                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 565
 566                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 567                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 568
 569                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 570                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 571
 572                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 573                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 574         }
 575
 576         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165, 167, 169; 171, 173 (including central frequency in BW 40MHz)
 577         // 3.1 Fill up channel
 578         choffset = 14 + 12 + 16;
 579         /*for (i = 0; i < 2; i++)*/
 580         for (i = 0; i < 3; i++)
 581         {
 582                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
 583                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 584                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 585
 586                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
 587                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 588                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 589
 590                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
 591                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 592                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 593         }
 594         pAd->TxPower[3 * 3 + choffset + 0].Channel              = 171;
 595         pAd->TxPower[3 * 3 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 596         pAd->TxPower[3 * 3 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 597
 598         pAd->TxPower[3 * 3 + choffset + 1].Channel              = 173;
 599         pAd->TxPower[3 * 3 + choffset + 1].Power                = DEFAULT_RF_TX_POWER;
 600         pAd->TxPower[3 * 3 + choffset + 1].Power2               = DEFAULT_RF_TX_POWER;
 601
 602         // 3.2 Fill up power
 603         /*for (i = 0; i < 4; i++)*/
 604         for (i = 0; i < 6; i++)
 605         {
 606                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 607                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 608
 609                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 610                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 611
 612                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 613                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 614
 615                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 616                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 617
 618                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 619                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 620         }
 621
 622         // 4. Print and Debug
 623         /*choffset = 14 + 12 + 16 + 7;*/
 624         choffset = 14 + 12 + 16 + 11;
 625
 626
 627 }
 628
 629 /*
 630         ========================================================================
 631
 632         Routine Description:
 633                 Read the following from the registry
 634                 1. All the parameters
 635                 2. NetworkAddres
 636
 637         Arguments:
 638                 Adapter                                         Pointer to our adapter
 639                 WrapperConfigurationContext     For use by NdisOpenConfiguration
 640
 641         Return Value:
 642                 NDIS_STATUS_SUCCESS
 643                 NDIS_STATUS_FAILURE
 644                 NDIS_STATUS_RESOURCES
 645
 646         IRQL = PASSIVE_LEVEL
 647
 648         Note:
 649
 650         ========================================================================
 651 */
 652 NDIS_STATUS     NICReadRegParameters(
 653         IN      PRTMP_ADAPTER           pAd,
 654         IN      NDIS_HANDLE                     WrapperConfigurationContext
 655         )
 656 {
 657         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
 658         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
 659         return Status;
 660 }
 661
 662
 663 /*
 664         ========================================================================
 665
 666         Routine Description:
 667                 Read initial parameters from EEPROM
 668
 669         Arguments:
 670                 Adapter                                         Pointer to our adapter
 671
 672         Return Value:
 673                 None
 674
 675         IRQL = PASSIVE_LEVEL
 676
 677         Note:
 678
 679         ========================================================================
 680 */
 681 VOID    NICReadEEPROMParameters(
 682         IN      PRTMP_ADAPTER   pAd,
 683         IN      PUCHAR                  mac_addr)
 684 {
 685         UINT32                  data = 0;
 686         USHORT                  i, value, value2;
 687         UCHAR                   TmpPhy;
 688         EEPROM_TX_PWR_STRUC         Power;
 689         EEPROM_VERSION_STRUC    Version;
 690         EEPROM_ANTENNA_STRUC    Antenna;
 691         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
 692
 693         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
 694
 695         if (pAd->chipOps.eeinit)
 696                 pAd->chipOps.eeinit(pAd);
 697 #ifdef RTMP_EFUSE_SUPPORT
 698 #ifdef RT30xx
 699         if(!pAd->bFroceEEPROMBuffer && pAd->bEEPROMFile)
 700         {
 701                 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters::(Efuse)Load  to EEPROM Buffer Mode\n"));
 702                 eFuseLoadEEPROM(pAd);
 703         }
 704 #endif // RT30xx //
 705 #endif // RTMP_EFUSE_SUPPORT //
 706
 707         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
 708         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
 709         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
 710
 711         if((data & 0x30) == 0)
 712                 pAd->EEPROMAddressNum = 6;              // 93C46
 713         else if((data & 0x30) == 0x10)
 714                 pAd->EEPROMAddressNum = 8;     // 93C66
 715         else
 716                 pAd->EEPROMAddressNum = 8;     // 93C86
 717         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
 718
 719         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
 720         // MAC address registers according to E2PROM setting
 721         if (mac_addr == NULL ||
 722                 strlen((PSTRING) mac_addr) != 17 ||
 723                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
 724                 mac_addr[11] != ':' || mac_addr[14] != ':')
 725         {
 726                 USHORT  Addr01,Addr23,Addr45 ;
 727
 728                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
 729                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
 730                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
 731
 732                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
 733                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
 734                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
 735                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
 736                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
 737                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
 738
 739                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
 740         }
 741         else
 742         {
 743                 INT             j;
 744                 PSTRING macptr;
 745
 746                 macptr = (PSTRING) mac_addr;
 747
 748                 for (j=0; j<MAC_ADDR_LEN; j++)
 749                 {
 750                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
 751                         macptr=macptr+3;
 752                 }
 753
 754                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
 755         }
 756
 757
 758         {
 759                 //more conveninet to test mbssid, so ap's bssid &0xf1
 760                 if (pAd->PermanentAddress[0] == 0xff)
 761                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
 762
 763                 //if (pAd->PermanentAddress[5] == 0xff)
 764                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
 765
 766                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
 767                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
 768                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
 769                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
 770                 if (pAd->bLocalAdminMAC == FALSE)
 771                 {
 772                         MAC_DW0_STRUC csr2;
 773                         MAC_DW1_STRUC csr3;
 774                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
 775                         csr2.field.Byte0 = pAd->CurrentAddress[0];
 776                         csr2.field.Byte1 = pAd->CurrentAddress[1];
 777                         csr2.field.Byte2 = pAd->CurrentAddress[2];
 778                         csr2.field.Byte3 = pAd->CurrentAddress[3];
 779                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
 780                         csr3.word = 0;
 781                         csr3.field.Byte4 = pAd->CurrentAddress[4];
 782                         csr3.field.Byte5 = pAd->CurrentAddress[5];
 783                         csr3.field.U2MeMask = 0xff;
 784                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
 785                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
 786                                                         PRINT_MAC(pAd->PermanentAddress)));
 787                 }
 788         }
 789
 790         // if not return early. cause fail at emulation.
 791         // Init the channel number for TX channel power
 792         RTMPReadChannelPwr(pAd);
 793
 794         // if E2PROM version mismatch with driver's expectation, then skip
 795         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
 796         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
 797         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
 798         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
 799
 800         if (Version.field.Version > VALID_EEPROM_VERSION)
 801         {
 802                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
 803                 /*pAd->SystemErrorBitmap |= 0x00000001;
 804
 805                 // hard-code default value when no proper E2PROM installed
 806                 pAd->bAutoTxAgcA = FALSE;
 807                 pAd->bAutoTxAgcG = FALSE;
 808
 809                 // Default the channel power
 810                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
 811                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
 812
 813                 // Default the channel power
 814                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
 815                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
 816
 817                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
 818                         pAd->EEPROMDefaultValue[i] = 0xffff;
 819                 return;  */
 820         }
 821
 822         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
 823         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
 824         pAd->EEPROMDefaultValue[0] = value;
 825
 826         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
 827         pAd->EEPROMDefaultValue[1] = value;
 828
 829         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
 830         pAd->EEPROMDefaultValue[2] = value;
 831
 832         for(i = 0; i < 8; i++)
 833         {
 834                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
 835                 pAd->EEPROMDefaultValue[i+3] = value;
 836         }
 837
 838         // We have to parse NIC configuration 0 at here.
 839         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
 840         // Therefore, we have to read TxAutoAgc control beforehand.
 841         // Read Tx AGC control bit
 842         Antenna.word = pAd->EEPROMDefaultValue[0];
 843         if (Antenna.word == 0xFFFF)
 844         {
 845 #ifdef RT30xx
 846                 if(IS_RT3090(pAd)|| IS_RT3390(pAd))
 847                 {
 848                         Antenna.word = 0;
 849                         Antenna.field.RfIcType = RFIC_3020;
 850                         Antenna.field.TxPath = 1;
 851                         Antenna.field.RxPath = 1;
 852                 }
 853                 else
 854 #endif // RT30xx //
 855                 {
 856
 857                 Antenna.word = 0;
 858                 Antenna.field.RfIcType = RFIC_2820;
 859                 Antenna.field.TxPath = 1;
 860                 Antenna.field.RxPath = 2;
 861                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
 862                 }
 863         }
 864
 865         // Choose the desired Tx&Rx stream.
 866         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
 867                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
 868
 869         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
 870         {
 871                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
 872
 873                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
 874                         (pAd->CommonCfg.RxStream > 2))
 875                 {
 876                         // only 2 Rx streams for RT2860 series
 877                         pAd->CommonCfg.RxStream = 2;
 878                 }
 879         }
 880
 881         // 3*3
 882         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
 883         // yet implement
 884         for(i=0; i<3; i++)
 885         {
 886         }
 887
 888         NicConfig2.word = pAd->EEPROMDefaultValue[1];
 889
 890         {
 891                 if ((NicConfig2.word & 0x00ff) == 0xff)
 892                 {
 893                         NicConfig2.word &= 0xff00;
 894                 }
 895
 896                 if ((NicConfig2.word >> 8) == 0xff)
 897                 {
 898                         NicConfig2.word &= 0x00ff;
 899                 }
 900         }
 901
 902         if (NicConfig2.field.DynamicTxAgcControl == 1)
 903                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
 904         else
 905                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
 906
 907         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
 908
 909         // Save the antenna for future use
 910         pAd->Antenna.word = Antenna.word;
 911
 912         // Set the RfICType here, then we can initialize RFIC related operation callbacks
 913         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
 914         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
 915
 916 #ifdef RTMP_RF_RW_SUPPORT
 917         RtmpChipOpsRFHook(pAd);
 918 #endif // RTMP_RF_RW_SUPPORT //
 919
 920 #ifdef RTMP_MAC_PCI
 921                 sprintf((PSTRING) pAd->nickname, "RT2860STA");
 922 #endif // RTMP_MAC_PCI //
 923
 924
 925         //
 926         // Reset PhyMode if we don't support 802.11a
 927         // Only RFIC_2850 & RFIC_2750 support 802.11a
 928         //
 929         if ((Antenna.field.RfIcType != RFIC_2850)
 930                 && (Antenna.field.RfIcType != RFIC_2750)
 931                 && (Antenna.field.RfIcType != RFIC_3052))
 932         {
 933                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
 934                         (pAd->CommonCfg.PhyMode == PHY_11A))
 935                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
 936                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
 937                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
 938                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
 939                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
 940                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
 941         }
 942
 943         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
 944         // 0. 11b/g
 945         {
 946                 /* these are tempature reference value (0x00 ~ 0xFE)
 947                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
 948                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
 949                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
 950                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
 951                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
 952                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
 953                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
 954                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
 955                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
 956                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
 957                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
 958                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
 959                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
 960                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
 961                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
 962                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
 963                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
 964                 pAd->TxAgcStepG = Power.field.Byte1;
 965                 pAd->TxAgcCompensateG = 0;
 966                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
 967                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
 968
 969                 // Disable TxAgc if the based value is not right
 970                 if (pAd->TssiRefG == 0xff)
 971                         pAd->bAutoTxAgcG = FALSE;
 972
 973                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
 974                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
 975                         pAd->TssiRefG,
 976                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
 977                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
 978         }
 979         // 1. 11a
 980         {
 981                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
 982                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
 983                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
 984                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
 985                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
 986                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
 987                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
 988                 pAd->TssiRefA   = Power.field.Byte0;
 989                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
 990                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
 991                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
 992                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
 993                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
 994                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
 995                 pAd->TxAgcStepA = Power.field.Byte1;
 996                 pAd->TxAgcCompensateA = 0;
 997                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
 998                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
 999
1000                 // Disable TxAgc if the based value is not right
1001                 if (pAd->TssiRefA == 0xff)
1002                         pAd->bAutoTxAgcA = FALSE;
1003
1004                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1005                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1006                         pAd->TssiRefA,
1007                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1008                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1009         }
1010         pAd->BbpRssiToDbmDelta = 0x0;
1011
1012         // Read frequency offset setting for RF
1013         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1014         if ((value & 0x00FF) != 0x00FF)
1015                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1016         else
1017                 pAd->RfFreqOffset = 0;
1018         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1019
1020         //CountryRegion byte offset (38h)
1021         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1022         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1023
1024         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1025         {
1026                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1027                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1028                 TmpPhy = pAd->CommonCfg.PhyMode;
1029                 pAd->CommonCfg.PhyMode = 0xff;
1030                 RTMPSetPhyMode(pAd, TmpPhy);
1031                 SetCommonHT(pAd);
1032         }
1033
1034         //
1035         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1036         // The valid value are (-10 ~ 10)
1037         //
1038         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1039         pAd->BGRssiOffset0 = value & 0x00ff;
1040         pAd->BGRssiOffset1 = (value >> 8);
1041         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1042         pAd->BGRssiOffset2 = value & 0x00ff;
1043         pAd->ALNAGain1 = (value >> 8);
1044         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1045         pAd->BLNAGain = value & 0x00ff;
1046         pAd->ALNAGain0 = (value >> 8);
1047
1048         // Validate 11b/g RSSI_0 offset.
1049         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1050                 pAd->BGRssiOffset0 = 0;
1051
1052         // Validate 11b/g RSSI_1 offset.
1053         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1054                 pAd->BGRssiOffset1 = 0;
1055
1056         // Validate 11b/g RSSI_2 offset.
1057         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1058                 pAd->BGRssiOffset2 = 0;
1059
1060         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1061         pAd->ARssiOffset0 = value & 0x00ff;
1062         pAd->ARssiOffset1 = (value >> 8);
1063         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1064         pAd->ARssiOffset2 = value & 0x00ff;
1065         pAd->ALNAGain2 = (value >> 8);
1066
1067         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1068                 pAd->ALNAGain1 = pAd->ALNAGain0;
1069         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1070                 pAd->ALNAGain2 = pAd->ALNAGain0;
1071
1072         // Validate 11a RSSI_0 offset.
1073         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1074                 pAd->ARssiOffset0 = 0;
1075
1076         // Validate 11a RSSI_1 offset.
1077         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1078                 pAd->ARssiOffset1 = 0;
1079
1080         //Validate 11a RSSI_2 offset.
1081         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1082                 pAd->ARssiOffset2 = 0;
1083
1084 #ifdef RT30xx
1085         //
1086         // Get TX mixer gain setting
1087         // 0xff are invalid value
1088         // Note: RT30xX default value is 0x00 and will program to RF_R17 only when this value is not zero.
1089         //       RT359X default value is 0x02
1090         //
1091         if (IS_RT30xx(pAd) || IS_RT3572(pAd))
1092         {
1093                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXMIXER_GAIN_2_4G, value);
1094                 pAd->TxMixerGain24G = 0;
1095                 value &= 0x00ff;
1096                 if (value != 0xff)
1097                 {
1098                         value &= 0x07;
1099                         pAd->TxMixerGain24G = (UCHAR)value;
1100                 }
1101         }
1102 #endif // RT30xx //
1103
1104         //
1105         // Get LED Setting.
1106         //
1107         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1108         pAd->LedCntl.word = (value>>8);
1109         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1110         pAd->Led1 = value;
1111         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1112         pAd->Led2 = value;
1113         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1114         pAd->Led3 = value;
1115
1116         RTMPReadTxPwrPerRate(pAd);
1117
1118 #ifdef RT30xx
1119 #ifdef RTMP_EFUSE_SUPPORT
1120         RtmpEfuseSupportCheck(pAd);
1121 #endif // RTMP_EFUSE_SUPPORT //
1122 #endif // RT30xx //
1123
1124         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1125 }
1126
1127 /*
1128         ========================================================================
1129
1130         Routine Description:
1131                 Set default value from EEPROM
1132
1133         Arguments:
1134                 Adapter                                         Pointer to our adapter
1135
1136         Return Value:
1137                 None
1138
1139         IRQL = PASSIVE_LEVEL
1140
1141         Note:
1142
1143         ========================================================================
1144 */
1145 VOID    NICInitAsicFromEEPROM(
1146         IN      PRTMP_ADAPTER   pAd)
1147 {
1148         UINT32                                  data = 0;
1149         UCHAR   BBPR1 = 0;
1150         USHORT                                  i;
1151 //      EEPROM_ANTENNA_STRUC    Antenna;
1152         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1153         UCHAR   BBPR3 = 0;
1154
1155         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1156         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1157         {
1158                 UCHAR BbpRegIdx, BbpValue;
1159
1160                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1161                 {
1162                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1163                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1164                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1165                 }
1166         }
1167
1168
1169         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1170
1171         {
1172                 if ((NicConfig2.word & 0x00ff) == 0xff)
1173                 {
1174                         NicConfig2.word &= 0xff00;
1175                 }
1176
1177                 if ((NicConfig2.word >> 8) == 0xff)
1178                 {
1179                         NicConfig2.word &= 0x00ff;
1180                 }
1181         }
1182
1183         // Save the antenna for future use
1184         pAd->NicConfig2.word = NicConfig2.word;
1185
1186 #ifdef RT30xx
1187         // set default antenna as main
1188         if (pAd->RfIcType == RFIC_3020)
1189                 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1190 #endif // RT30xx //
1191
1192         //
1193         // Send LED Setting to MCU.
1194         //
1195         if (pAd->LedCntl.word == 0xFF)
1196         {
1197                 pAd->LedCntl.word = 0x01;
1198                 pAd->Led1 = 0x5555;
1199                 pAd->Led2 = 0x2221;
1200
1201 #ifdef RTMP_MAC_PCI
1202                 pAd->Led3 = 0xA9F8;
1203 #endif // RTMP_MAC_PCI //
1204 #ifdef RTMP_MAC_USB
1205                 pAd->Led3 = 0x5627;
1206 #endif // RTMP_MAC_USB //
1207         }
1208
1209         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1210         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1211         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1212         AsicSendCommandToMcu(pAd, 0x51, 0xff, 0, pAd->LedCntl.field.Polarity);
1213
1214         pAd->LedIndicatorStrength = 0xFF;
1215     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1216
1217         {
1218                 // Read Hardware controlled Radio state enable bit
1219                 if (NicConfig2.field.HardwareRadioControl == 1)
1220                 {
1221                         pAd->StaCfg.bHardwareRadio = TRUE;
1222
1223                         // Read GPIO pin2 as Hardware controlled radio state
1224                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1225                         if ((data & 0x04) == 0)
1226                         {
1227                                 pAd->StaCfg.bHwRadio = FALSE;
1228                                 pAd->StaCfg.bRadio = FALSE;
1229 //                              RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1230                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1231                         }
1232                 }
1233                 else
1234                         pAd->StaCfg.bHardwareRadio = FALSE;
1235
1236                 if (pAd->StaCfg.bRadio == FALSE)
1237                 {
1238                         RTMPSetLED(pAd, LED_RADIO_OFF);
1239                 }
1240                 else
1241                 {
1242                         RTMPSetLED(pAd, LED_RADIO_ON);
1243 #ifdef RTMP_MAC_PCI
1244 #ifdef RT3090
1245                         AsicSendCommandToMcu(pAd, 0x30, PowerRadioOffCID, 0xff, 0x02);
1246                         AsicCheckCommanOk(pAd, PowerRadioOffCID);
1247 #endif // RT3090 //
1248 #ifndef RT3090
1249                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1250 #endif // RT3090 //
1251                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1252                         // 2-1. wait command ok.
1253                         AsicCheckCommanOk(pAd, PowerWakeCID);
1254 #endif // RTMP_MAC_PCI //
1255                 }
1256         }
1257
1258 #ifdef RTMP_MAC_PCI
1259 #ifdef RT30xx
1260                 if (IS_RT3090(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd))
1261                 {
1262                         RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
1263                         if (pChipOps->AsicReverseRfFromSleepMode)
1264                                 pChipOps->AsicReverseRfFromSleepMode(pAd);
1265                 }
1266                 // 3090 MCU Wakeup command needs more time to be stable.
1267                 // Before stable, don't issue other MCU command to prevent from firmware error.
1268
1269                 if ((IS_RT3090(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd)) && IS_VERSION_AFTER_F(pAd)
1270                         && (pAd->StaCfg.PSControl.field.rt30xxPowerMode == 3)
1271                         && (pAd->StaCfg.PSControl.field.EnableNewPS == TRUE))
1272                 {
1273                         DBGPRINT(RT_DEBUG_TRACE,("%s::%d,release Mcu Lock\n",__FUNCTION__,__LINE__));
1274                         RTMP_SEM_LOCK(&pAd->McuCmdLock);
1275                         pAd->brt30xxBanMcuCmd = FALSE;
1276                         RTMP_SEM_UNLOCK(&pAd->McuCmdLock);
1277                 }
1278 #endif // RT30xx //
1279 #endif // RTMP_MAC_PCI //
1280
1281         // Turn off patching for cardbus controller
1282         if (NicConfig2.field.CardbusAcceleration == 1)
1283         {
1284 //              pAd->bTest1 = TRUE;
1285         }
1286
1287         if (NicConfig2.field.DynamicTxAgcControl == 1)
1288                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1289         else
1290                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1291         //
1292         // Since BBP has been progamed, to make sure BBP setting will be
1293         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1294         //
1295         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1296
1297         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1298         BBPR3 &= (~0x18);
1299         if(pAd->Antenna.field.RxPath == 3)
1300         {
1301                 BBPR3 |= (0x10);
1302         }
1303         else if(pAd->Antenna.field.RxPath == 2)
1304         {
1305                 BBPR3 |= (0x8);
1306         }
1307         else if(pAd->Antenna.field.RxPath == 1)
1308         {
1309                 BBPR3 |= (0x0);
1310         }
1311         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1312
1313         {
1314                 // Handle the difference when 1T
1315                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1316                 if(pAd->Antenna.field.TxPath == 1)
1317                 {
1318                 BBPR1 &= (~0x18);
1319                 }
1320                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1321
1322                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n",
1323                                         pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1324         }
1325
1326 #ifdef RTMP_MAC_USB
1327 #ifdef RT30xx
1328         // update registers from EEPROM for RT3071 or later(3572/3592).
1329
1330         if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
1331         {
1332                 UCHAR RegIdx, RegValue;
1333                 USHORT value;
1334
1335                 // after RT3071, write BBP from EEPROM 0xF0 to 0x102
1336                 for (i = 0xF0; i <= 0x102; i = i+2)
1337                 {
1338                         value = 0xFFFF;
1339                         RT28xx_EEPROM_READ16(pAd, i, value);
1340                         if ((value != 0xFFFF) && (value != 0))
1341                         {
1342                                 RegIdx = (UCHAR)(value >> 8);
1343                                 RegValue  = (UCHAR)(value & 0xff);
1344                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, RegIdx, RegValue);
1345                                 DBGPRINT(RT_DEBUG_TRACE, ("Update BBP Registers from EEPROM(0x%0x), BBP(0x%x) = 0x%x\n", i, RegIdx, RegValue));
1346                         }
1347                 }
1348
1349                 // after RT3071, write RF from EEPROM 0x104 to 0x116
1350                 for (i = 0x104; i <= 0x116; i = i+2)
1351                 {
1352                         value = 0xFFFF;
1353                         RT28xx_EEPROM_READ16(pAd, i, value);
1354                         if ((value != 0xFFFF) && (value != 0))
1355                         {
1356                                 RegIdx = (UCHAR)(value >> 8);
1357                                 RegValue  = (UCHAR)(value & 0xff);
1358                                 RT30xxWriteRFRegister(pAd, RegIdx, RegValue);
1359                                 DBGPRINT(RT_DEBUG_TRACE, ("Update RF Registers from EEPROM0x%x), BBP(0x%x) = 0x%x\n", i, RegIdx, RegValue));
1360                         }
1361                 }
1362         }
1363 #endif // RT30xx //
1364 #endif // RTMP_MAC_USB //
1365
1366         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n",
1367                                 pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath,
1368                                 pAd->RfIcType, pAd->LedCntl.word));
1369         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1370 }
1371
1372 /*
1373         ========================================================================
1374
1375         Routine Description:
1376                 Initialize NIC hardware
1377
1378         Arguments:
1379                 Adapter                                         Pointer to our adapter
1380
1381         Return Value:
1382                 None
1383
1384         IRQL = PASSIVE_LEVEL
1385
1386         Note:
1387
1388         ========================================================================
1389 */
1390 NDIS_STATUS     NICInitializeAdapter(
1391         IN      PRTMP_ADAPTER   pAd,
1392         IN   BOOLEAN    bHardReset)
1393 {
1394         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1395         WPDMA_GLO_CFG_STRUC     GloCfg;
1396 #ifdef RTMP_MAC_PCI
1397         UINT32                  Value;
1398         DELAY_INT_CFG_STRUC     IntCfg;
1399 #endif // RTMP_MAC_PCI //
1400 //      INT_MASK_CSR_STRUC              IntMask;
1401         ULONG   i =0, j=0;
1402         AC_TXOP_CSR0_STRUC      csr0;
1403
1404         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1405
1406         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1407 retry:
1408         i = 0;
1409         do
1410         {
1411                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1412                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1413                         break;
1414
1415                 RTMPusecDelay(1000);
1416                 i++;
1417         }while ( i<100);
1418         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1419         GloCfg.word &= 0xff0;
1420         GloCfg.field.EnTXWriteBackDDONE =1;
1421         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1422
1423         // Record HW Beacon offset
1424         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1425         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1426         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1427         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1428         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1429         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1430         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1431         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1432
1433         //
1434         // write all shared Ring's base address into ASIC
1435         //
1436
1437         // asic simulation sequence put this ahead before loading firmware.
1438         // pbf hardware reset
1439 #ifdef RTMP_MAC_PCI
1440         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1441         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1442         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1443 #endif // RTMP_MAC_PCI //
1444
1445         // Initialze ASIC for TX & Rx operation
1446         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1447         {
1448                 if (j++ == 0)
1449                 {
1450                         NICLoadFirmware(pAd);
1451                         goto retry;
1452                 }
1453                 return NDIS_STATUS_FAILURE;
1454         }
1455
1456
1457 #ifdef RTMP_MAC_PCI
1458         // Write AC_BK base address register
1459         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1460         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1461         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1462
1463         // Write AC_BE base address register
1464         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1465         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1466         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1467
1468         // Write AC_VI base address register
1469         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1470         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1471         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1472
1473         // Write AC_VO base address register
1474         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1475         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1476         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1477
1478         // Write MGMT_BASE_CSR register
1479         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1480         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1481         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1482
1483         // Write RX_BASE_CSR register
1484         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1485         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1486         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1487
1488         // Init RX Ring index pointer
1489         pAd->RxRing.RxSwReadIdx = 0;
1490         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1491         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1492
1493         // Init TX rings index pointer
1494         {
1495                 for (i=0; i<NUM_OF_TX_RING; i++)
1496                 {
1497                         pAd->TxRing[i].TxSwFreeIdx = 0;
1498                         pAd->TxRing[i].TxCpuIdx = 0;
1499                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
1500                 }
1501         }
1502
1503         // init MGMT ring index pointer
1504         pAd->MgmtRing.TxSwFreeIdx = 0;
1505         pAd->MgmtRing.TxCpuIdx = 0;
1506         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
1507
1508         //
1509         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
1510         //
1511
1512         // Write TX_RING_CSR0 register
1513         Value = TX_RING_SIZE;
1514         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1515         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1516         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1517         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1518         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1519         Value = MGMT_RING_SIZE;
1520         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1521
1522         // Write RX_RING_CSR register
1523         Value = RX_RING_SIZE;
1524         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1525 #endif // RTMP_MAC_PCI //
1526
1527
1528         // WMM parameter
1529         csr0.word = 0;
1530         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1531         if (pAd->CommonCfg.PhyMode == PHY_11B)
1532         {
1533                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
1534                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
1535         }
1536         else
1537         {
1538                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
1539                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
1540         }
1541         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1542
1543
1544 #ifdef RTMP_MAC_PCI
1545         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1546         i = 0;
1547         do
1548         {
1549                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1550                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1551                         break;
1552
1553                 RTMPusecDelay(1000);
1554                 i++;
1555         }while ( i < 100);
1556
1557         GloCfg.word &= 0xff0;
1558         GloCfg.field.EnTXWriteBackDDONE =1;
1559         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1560
1561         IntCfg.word = 0;
1562         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1563 #endif // RTMP_MAC_PCI //
1564
1565
1566         // reset action
1567         // Load firmware
1568         //  Status = NICLoadFirmware(pAd);
1569
1570         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1571         return Status;
1572 }
1573
1574 /*
1575         ========================================================================
1576
1577         Routine Description:
1578                 Initialize ASIC
1579
1580         Arguments:
1581                 Adapter                                         Pointer to our adapter
1582
1583         Return Value:
1584                 None
1585
1586         IRQL = PASSIVE_LEVEL
1587
1588         Note:
1589
1590         ========================================================================
1591 */
1592 NDIS_STATUS     NICInitializeAsic(
1593         IN      PRTMP_ADAPTER   pAd,
1594         IN  BOOLEAN             bHardReset)
1595 {
1596         ULONG                   Index = 0;
1597         UCHAR                   R0 = 0xff;
1598         UINT32                  MacCsr12 = 0, Counter = 0;
1599 #ifdef RTMP_MAC_USB
1600         UINT32                  MacCsr0 = 0;
1601         NTSTATUS                Status;
1602         UCHAR                   Value = 0xff;
1603 #endif // RTMP_MAC_USB //
1604 #ifdef RT30xx
1605         UCHAR                   bbpreg=0;
1606         UCHAR                   RFValue=0;
1607 #endif // RT30xx //
1608         USHORT                  KeyIdx;
1609         INT                             i,apidx;
1610
1611         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1612
1613 #ifdef RTMP_MAC_PCI
1614         RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x3); // To fix driver disable/enable hang issue when radio off
1615         if (bHardReset == TRUE)
1616         {
1617                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1618         }
1619         else
1620                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1621
1622         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1623         // Initialize MAC register to default value
1624         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1625         {
1626                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1627         }
1628
1629         {
1630                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1631                 {
1632                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1633                 }
1634         }
1635 #endif // RTMP_MAC_PCI //
1636 #ifdef RTMP_MAC_USB
1637         //
1638         // Make sure MAC gets ready after NICLoadFirmware().
1639         //
1640         Index = 0;
1641
1642         //To avoid hang-on issue when interface up in kernel 2.4,
1643         //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
1644         do
1645         {
1646                 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
1647
1648                 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
1649                         break;
1650
1651                 RTMPusecDelay(10);
1652         } while (Index++ < 100);
1653
1654         pAd->MACVersion = MacCsr0;
1655         DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
1656         // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
1657         RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
1658         MacCsr12 &= (~0x2000);
1659         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
1660
1661         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1662         RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
1663         Status = RTUSBVenderReset(pAd);
1664
1665         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1666
1667         // Initialize MAC register to default value
1668         for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
1669         {
1670 #ifdef RT30xx
1671                 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd) || IS_RT3090(pAd) ||  IS_RT3390(pAd)))
1672                 {
1673                         MACRegTable[Index].Value = 0x00000400;
1674                 }
1675 #endif // RT30xx //
1676                 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
1677         }
1678
1679         {
1680                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1681                 {
1682                         RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1683                 }
1684         }
1685 #endif // RTMP_MAC_USB //
1686
1687 #ifdef RT30xx
1688         // Initialize RT3070 serial MAC registers which is different from RT2870 serial
1689         if (IS_RT3090(pAd) || IS_RT3572(pAd)||IS_RT3390(pAd))
1690         {
1691                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1692
1693                 // RT3071 version E has fixed this issue
1694                 if ((pAd->MACVersion & 0xffff) < 0x0211)
1695                 {
1696                         if (pAd->NicConfig2.field.DACTestBit == 1)
1697                         {
1698                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); // To fix throughput drop drastically
1699                         }
1700                         else
1701                         {
1702                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
1703                         }
1704                 }
1705                 else
1706                 {
1707                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
1708                 }
1709         }
1710         else if (IS_RT3070(pAd))
1711         {
1712                 if (((pAd->MACVersion & 0xffff) < 0x0201))
1713                 {
1714                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1715                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); // To fix throughput drop drastically
1716                 }
1717                 else
1718                 {
1719                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0);
1720                 }
1721         }
1722 #endif // RT30xx //
1723
1724         //
1725         // Before program BBP, we need to wait BBP/RF get wake up.
1726         //
1727         Index = 0;
1728         do
1729         {
1730                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1731
1732                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
1733                         break;
1734
1735                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
1736                 RTMPusecDelay(1000);
1737         } while (Index++ < 100);
1738
1739     // The commands to firmware should be after these commands, these commands will init firmware
1740         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1741         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1742         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1743 #ifdef RT3090
1744         //2008/11/28:KH add to fix the dead rf frequency offset bug<--
1745         AsicSendCommandToMcu(pAd, 0x72, 0, 0, 0);
1746         //2008/11/28:KH add to fix the dead rf frequency offset bug-->
1747 #endif // RT3090 //
1748         RTMPusecDelay(1000);
1749
1750         // Read BBP register, make sure BBP is up and running before write new data
1751         Index = 0;
1752         do
1753         {
1754                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1755                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1756         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1757         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1758
1759         if ((R0 == 0xff) || (R0 == 0x00))
1760                 return NDIS_STATUS_FAILURE;
1761
1762         // Initialize BBP register to default value
1763         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1764         {
1765                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1766         }
1767
1768 #ifdef RTMP_MAC_PCI
1769         // TODO: shiang, check MACVersion, currently, rbus-based chip use this.
1770         if (pAd->MACVersion == 0x28720200)
1771         {
1772                 //UCHAR value;
1773                 ULONG value2;
1774
1775                 //disable MLD by Bruce 20080704
1776                 //BBP_IO_READ8_BY_REG_ID(pAd, BBP_R105, &value);
1777                 //BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, value | 4);
1778
1779                 //Maximum PSDU length from 16K to 32K bytes
1780                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &value2);
1781                 value2 &= ~(0x3<<12);
1782                 value2 |= (0x2<<12);
1783                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, value2);
1784         }
1785 #endif // RTMP_MAC_PCI //
1786
1787         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1788         // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
1789         //3070/71/72,3090,3090A( are included in RT30xx),3572,3390
1790         if (((pAd->MACVersion & 0xffff) != 0x0101) && !(IS_RT30xx(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd)))
1791                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1792
1793 #ifdef RT30xx
1794 // add by johnli, RF power sequence setup
1795         if (IS_RT30xx(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
1796         {       //update for RT3070/71/72/90/91/92,3572,3390.
1797                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
1798                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
1799                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
1800         }
1801
1802         if (IS_RT3090(pAd)||IS_RT3390(pAd))     // RT309x, RT3071/72
1803         {
1804                 // enable DC filter
1805                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
1806                 {
1807                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1808                 }
1809
1810                 // improve power consumption
1811                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
1812                 if (pAd->Antenna.field.TxPath == 1)
1813                 {
1814                         // turn off tx DAC_1
1815                         bbpreg = (bbpreg | 0x20);
1816                 }
1817
1818                 if (pAd->Antenna.field.RxPath == 1)
1819                 {
1820                         // turn off tx ADC_1
1821                         bbpreg &= (~0x2);
1822                 }
1823                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
1824
1825                 // improve power consumption in RT3071 Ver.E
1826                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
1827                 {
1828                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1829                         bbpreg &= (~0x3);
1830                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1831                 }
1832         }
1833         else if (IS_RT3070(pAd))
1834         {
1835                 if ((pAd->MACVersion & 0xffff) >= 0x0201)
1836                 {
1837                         // enable DC filter
1838                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1839
1840                         // improve power consumption in RT3070 Ver.F
1841                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1842                         bbpreg &= (~0x3);
1843                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1844                 }
1845
1846                 // TX_LO1_en, RF R17 register Bit 3 to 0
1847                 RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
1848                 RFValue &= (~0x08);
1849                 // to fix rx long range issue
1850                 if (pAd->NicConfig2.field.ExternalLNAForG == 0)
1851                 {
1852                         RFValue |= 0x20;
1853                 }
1854                 // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h
1855                 if (pAd->TxMixerGain24G >= 1)
1856                 {
1857                         RFValue &= (~0x7);  // clean bit [2:0]
1858                         RFValue |= pAd->TxMixerGain24G;
1859                 }
1860                 RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
1861         }
1862 // end johnli
1863 #endif // RT30xx //
1864
1865         if (pAd->MACVersion == 0x28600100)
1866         {
1867                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1868                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1869     }
1870
1871         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1872         {
1873                 // enlarge MAX_LEN_CFG
1874                 UINT32 csr;
1875                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1876                 csr &= 0xFFF;
1877                 csr |= 0x2000;
1878                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1879         }
1880
1881 #ifdef RTMP_MAC_USB
1882 {
1883         UCHAR   MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
1884
1885         //Initialize WCID table
1886         Value = 0xff;
1887         for(Index =0 ;Index < 254;Index++)
1888         {
1889                 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
1890         }
1891 }
1892 #endif // RTMP_MAC_USB //
1893
1894         // Add radio off control
1895         {
1896                 if (pAd->StaCfg.bRadio == FALSE)
1897                 {
1898 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1899                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1900                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1901                 }
1902         }
1903
1904         // Clear raw counters
1905         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1906         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1907         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1908         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1909         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1910         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1911
1912         // ASIC will keep garbage value after boot
1913         // Clear all shared key table when initial
1914         // This routine can be ignored in radio-ON/OFF operation.
1915         if (bHardReset)
1916         {
1917                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
1918                 {
1919                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
1920                 }
1921
1922                 // Clear all pairwise key table when initial
1923                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
1924                 {
1925                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1926                 }
1927         }
1928
1929         // assert HOST ready bit
1930 //  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0); // 2004-09-14 asked by Mark
1931 //  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4);
1932
1933         // It isn't necessary to clear this space when not hard reset.
1934         if (bHardReset == TRUE)
1935         {
1936                 // clear all on-chip BEACON frame space
1937                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
1938                 {
1939                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
1940                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
1941                 }
1942         }
1943
1944 #ifdef RTMP_MAC_USB
1945         AsicDisableSync(pAd);
1946         // Clear raw counters
1947         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1948         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1949         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1950         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1951         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1952         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1953         // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
1954         RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
1955         Counter&=0xffffff00;
1956         Counter|=0x000001e;
1957         RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
1958 #endif // RTMP_MAC_USB //
1959
1960         {
1961                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
1962                 if ((pAd->MACVersion&0xffff) != 0x0101)
1963                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
1964         }
1965
1966         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
1967         return NDIS_STATUS_SUCCESS;
1968 }
1969
1970 /*
1971         ========================================================================
1972
1973         Routine Description:
1974                 Reset NIC Asics
1975
1976         Arguments:
1977                 Adapter                                         Pointer to our adapter
1978
1979         Return Value:
1980                 None
1981
1982         IRQL = PASSIVE_LEVEL
1983
1984         Note:
1985                 Reset NIC to initial state AS IS system boot up time.
1986
1987         ========================================================================
1988 */
1989 VOID    NICIssueReset(
1990         IN      PRTMP_ADAPTER   pAd)
1991 {
1992         UINT32  Value = 0;
1993         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
1994
1995         // Abort Tx, prevent ASIC from writing to Host memory
1996         //RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x001f0000);
1997
1998         // Disable Rx, register value supposed will remain after reset
1999         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2000         Value &= (0xfffffff3);
2001         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2002
2003         // Issue reset and clear from reset state
2004         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2005         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2006
2007         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2008 }
2009
2010 /*
2011         ========================================================================
2012
2013         Routine Description:
2014                 Check ASIC registers and find any reason the system might hang
2015
2016         Arguments:
2017                 Adapter                                         Pointer to our adapter
2018
2019         Return Value:
2020                 None
2021
2022         IRQL = DISPATCH_LEVEL
2023
2024         ========================================================================
2025 */
2026 BOOLEAN NICCheckForHang(
2027         IN      PRTMP_ADAPTER   pAd)
2028 {
2029         return (FALSE);
2030 }
2031
2032 VOID NICUpdateFifoStaCounters(
2033         IN PRTMP_ADAPTER pAd)
2034 {
2035         TX_STA_FIFO_STRUC       StaFifo;
2036         MAC_TABLE_ENTRY         *pEntry;
2037         UCHAR                           i = 0;
2038         UCHAR                   pid = 0, wcid = 0;
2039         CHAR                            reTry;
2040         UCHAR                           succMCS;
2041
2042                 do
2043                 {
2044                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2045
2046                         if (StaFifo.field.bValid == 0)
2047                                 break;
2048
2049                         wcid = (UCHAR)StaFifo.field.wcid;
2050
2051
2052                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2053                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2054                         {
2055                                 i++;
2056                                 continue;
2057                         }
2058
2059                         /* PID store Tx MCS Rate */
2060                         pid = (UCHAR)StaFifo.field.PidType;
2061
2062                         pEntry = &pAd->MacTab.Content[wcid];
2063
2064                         pEntry->DebugFIFOCount++;
2065
2066                         if (StaFifo.field.TxBF) // 3*3
2067                                 pEntry->TxBFCount++;
2068
2069                         if (!StaFifo.field.TxSuccess)
2070                         {
2071                                 pEntry->FIFOCount++;
2072                                 pEntry->OneSecTxFailCount++;
2073
2074                                 if (pEntry->FIFOCount >= 1)
2075                                 {
2076                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2077                                         pEntry->NoBADataCountDown = 64;
2078
2079                                         if(pEntry->PsMode == PWR_ACTIVE)
2080                                         {
2081                                                 int tid;
2082                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2083                                                 {
2084                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2085                                                 }
2086
2087                                                 // Update the continuous transmission counter except PS mode
2088                                                 pEntry->ContinueTxFailCnt++;
2089                                         }
2090                                         else
2091                                         {
2092                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2093                                                 //     this tx error happened due to sta just go to sleep.
2094                                                 pEntry->FIFOCount = 0;
2095                                                 pEntry->ContinueTxFailCnt = 0;
2096                                         }
2097                                         //pEntry->FIFOCount = 0;
2098                                 }
2099                                 //pEntry->bSendBAR = TRUE;
2100                         }
2101                         else
2102                         {
2103                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2104                                 {
2105                                         pEntry->NoBADataCountDown--;
2106                                         if (pEntry->NoBADataCountDown==0)
2107                                         {
2108                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2109                                         }
2110                                 }
2111
2112                                 pEntry->FIFOCount = 0;
2113                                 pEntry->OneSecTxNoRetryOkCount++;
2114                                 // update NoDataIdleCount when sucessful send packet to STA.
2115                                 pEntry->NoDataIdleCount = 0;
2116                                 pEntry->ContinueTxFailCnt = 0;
2117                         }
2118
2119                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2120
2121                         reTry = pid - succMCS;
2122
2123                         if (StaFifo.field.TxSuccess)
2124                         {
2125                                 pEntry->TXMCSExpected[pid]++;
2126                                 if (pid == succMCS)
2127                                 {
2128                                         pEntry->TXMCSSuccessful[pid]++;
2129                                 }
2130                                 else
2131                                 {
2132                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2133                                 }
2134                         }
2135                         else
2136                         {
2137                                 pEntry->TXMCSFailed[pid]++;
2138                         }
2139
2140                         if (reTry > 0)
2141                         {
2142                                 if ((pid >= 12) && succMCS <=7)
2143                                 {
2144                                         reTry -= 4;
2145                                 }
2146                                 pEntry->OneSecTxRetryOkCount += reTry;
2147                         }
2148
2149                         i++;
2150                         // ASIC store 16 stack
2151                 } while ( i < (2*TX_RING_SIZE) );
2152
2153 }
2154
2155 /*
2156         ========================================================================
2157
2158         Routine Description:
2159                 Read statistical counters from hardware registers and record them
2160                 in software variables for later on query
2161
2162         Arguments:
2163                 pAd                                     Pointer to our adapter
2164
2165         Return Value:
2166                 None
2167
2168         IRQL = DISPATCH_LEVEL
2169
2170         ========================================================================
2171 */
2172 VOID NICUpdateRawCounters(
2173         IN PRTMP_ADAPTER pAd)
2174 {
2175         UINT32  OldValue;//, Value2;
2176         //ULONG PageSum, OneSecTransmitCount;
2177         //ULONG TxErrorRatio, Retry, Fail;
2178         RX_STA_CNT0_STRUC        RxStaCnt0;
2179         RX_STA_CNT1_STRUC   RxStaCnt1;
2180         RX_STA_CNT2_STRUC   RxStaCnt2;
2181         TX_STA_CNT0_STRUC        TxStaCnt0;
2182         TX_STA_CNT1_STRUC        StaTx1;
2183         TX_STA_CNT2_STRUC        StaTx2;
2184         TX_AGG_CNT_STRUC        TxAggCnt;
2185         TX_AGG_CNT0_STRUC       TxAggCnt0;
2186         TX_AGG_CNT1_STRUC       TxAggCnt1;
2187         TX_AGG_CNT2_STRUC       TxAggCnt2;
2188         TX_AGG_CNT3_STRUC       TxAggCnt3;
2189         TX_AGG_CNT4_STRUC       TxAggCnt4;
2190         TX_AGG_CNT5_STRUC       TxAggCnt5;
2191         TX_AGG_CNT6_STRUC       TxAggCnt6;
2192         TX_AGG_CNT7_STRUC       TxAggCnt7;
2193         COUNTER_RALINK          *pRalinkCounters;
2194
2195
2196         pRalinkCounters = &pAd->RalinkCounters;
2197
2198         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2199         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2200
2201         {
2202                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2203             // Update RX PLCP error counter
2204             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2205                 // Update False CCA counter
2206                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2207         }
2208
2209         // Update FCS counters
2210         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2211         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2212         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2213                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2214
2215         // Add FCS error count to private counters
2216         pRalinkCounters->OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2217         OldValue = pRalinkCounters->RealFcsErrCount.u.LowPart;
2218         pRalinkCounters->RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2219         if (pRalinkCounters->RealFcsErrCount.u.LowPart < OldValue)
2220                 pRalinkCounters->RealFcsErrCount.u.HighPart++;
2221
2222         // Update Duplicate Rcv check
2223         pRalinkCounters->DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2224         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2225         // Update RX Overflow counter
2226         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2227
2228         //pAd->RalinkCounters.RxCount = 0;
2229 #ifdef RTMP_MAC_USB
2230         if (pRalinkCounters->RxCount != pAd->watchDogRxCnt)
2231         {
2232                 pAd->watchDogRxCnt = pRalinkCounters->RxCount;
2233                 pAd->watchDogRxOverFlowCnt = 0;
2234         }
2235         else
2236         {
2237                 if (RxStaCnt2.field.RxFifoOverflowCount)
2238                         pAd->watchDogRxOverFlowCnt++;
2239                 else
2240                         pAd->watchDogRxOverFlowCnt = 0;
2241         }
2242 #endif // RTMP_MAC_USB //
2243
2244
2245         //if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) ||
2246         //      (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1)))
2247         if (!pAd->bUpdateBcnCntDone)
2248         {
2249         // Update BEACON sent count
2250         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2251         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2252         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2253         pRalinkCounters->OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2254         pRalinkCounters->OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2255         pRalinkCounters->OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2256         pRalinkCounters->OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2257         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2258         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2259         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2260         }
2261
2262
2263         //if (pAd->bStaFifoTest == TRUE)
2264         {
2265                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2266                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2267                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2268                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2269                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2270                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2271                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2272                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2273                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2274                 pRalinkCounters->TxAggCount += TxAggCnt.field.AggTxCount;
2275                 pRalinkCounters->TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2276                 pRalinkCounters->TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2277                 pRalinkCounters->TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2278
2279                 pRalinkCounters->TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2280                 pRalinkCounters->TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2281                 pRalinkCounters->TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2282                 pRalinkCounters->TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2283
2284                 pRalinkCounters->TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2285                 pRalinkCounters->TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2286                 pRalinkCounters->TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2287                 pRalinkCounters->TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2288
2289                 pRalinkCounters->TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2290                 pRalinkCounters->TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2291                 pRalinkCounters->TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2292                 pRalinkCounters->TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2293
2294                 pRalinkCounters->TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2295                 pRalinkCounters->TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2296
2297                 // Calculate the transmitted A-MPDU count
2298                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2299                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2300
2301                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2302                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2303
2304                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2305                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2306
2307                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2308                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2309
2310                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2311                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2312
2313                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2314                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2315
2316                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2317                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2318
2319                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2320                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2321         }
2322
2323
2324
2325 }
2326
2327
2328 /*
2329         ========================================================================
2330
2331         Routine Description:
2332                 Reset NIC from error
2333
2334         Arguments:
2335                 Adapter                                         Pointer to our adapter
2336
2337         Return Value:
2338                 None
2339
2340         IRQL = PASSIVE_LEVEL
2341
2342         Note:
2343                 Reset NIC from error state
2344
2345         ========================================================================
2346 */
2347 VOID    NICResetFromError(
2348         IN      PRTMP_ADAPTER   pAd)
2349 {
2350         // Reset BBP (according to alex, reset ASIC will force reset BBP
2351         // Therefore, skip the reset BBP
2352         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2353
2354         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2355         // Remove ASIC from reset state
2356         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2357
2358         NICInitializeAdapter(pAd, FALSE);
2359         NICInitAsicFromEEPROM(pAd);
2360
2361         // Switch to current channel, since during reset process, the connection should remains on.
2362         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2363         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2364 }
2365
2366
2367 NDIS_STATUS NICLoadFirmware(
2368         IN PRTMP_ADAPTER pAd)
2369 {
2370         NDIS_STATUS      status = NDIS_STATUS_SUCCESS;
2371         if (pAd->chipOps.loadFirmware)
2372                 status = pAd->chipOps.loadFirmware(pAd);
2373
2374         return status;
2375 }
2376
2377
2378 /*
2379         ========================================================================
2380
2381         Routine Description:
2382                 erase 8051 firmware image in MAC ASIC
2383
2384         Arguments:
2385                 Adapter                                         Pointer to our adapter
2386
2387         IRQL = PASSIVE_LEVEL
2388
2389         ========================================================================
2390 */
2391 VOID NICEraseFirmware(
2392         IN PRTMP_ADAPTER pAd)
2393 {
2394         if (pAd->chipOps.eraseFirmware)
2395                 pAd->chipOps.eraseFirmware(pAd);
2396
2397 }/* End of NICEraseFirmware */
2398
2399
2400 /*
2401         ========================================================================
2402
2403         Routine Description:
2404                 Load Tx rate switching parameters
2405
2406         Arguments:
2407                 Adapter                                         Pointer to our adapter
2408
2409         Return Value:
2410                 NDIS_STATUS_SUCCESS         firmware image load ok
2411                 NDIS_STATUS_FAILURE         image not found
2412
2413         IRQL = PASSIVE_LEVEL
2414
2415         Rate Table Format:
2416                 1. (B0: Valid Item number) (B1:Initial item from zero)
2417                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2418
2419         ========================================================================
2420 */
2421 NDIS_STATUS NICLoadRateSwitchingParams(
2422         IN PRTMP_ADAPTER pAd)
2423 {
2424         return NDIS_STATUS_SUCCESS;
2425 }
2426
2427
2428 /*
2429         ========================================================================
2430
2431         Routine Description:
2432                 Compare two memory block
2433
2434         Arguments:
2435                 pSrc1           Pointer to first memory address
2436                 pSrc2           Pointer to second memory address
2437
2438         Return Value:
2439                 0:                      memory is equal
2440                 1:                      pSrc1 memory is larger
2441                 2:                      pSrc2 memory is larger
2442
2443         IRQL = DISPATCH_LEVEL
2444
2445         Note:
2446
2447         ========================================================================
2448 */
2449 ULONG   RTMPCompareMemory(
2450         IN      PVOID   pSrc1,
2451         IN      PVOID   pSrc2,
2452         IN      ULONG   Length)
2453 {
2454         PUCHAR  pMem1;
2455         PUCHAR  pMem2;
2456         ULONG   Index = 0;
2457
2458         pMem1 = (PUCHAR) pSrc1;
2459         pMem2 = (PUCHAR) pSrc2;
2460
2461         for (Index = 0; Index < Length; Index++)
2462         {
2463                 if (pMem1[Index] > pMem2[Index])
2464                         return (1);
2465                 else if (pMem1[Index] < pMem2[Index])
2466                         return (2);
2467         }
2468
2469         // Equal
2470         return (0);
2471 }
2472
2473 /*
2474         ========================================================================
2475
2476         Routine Description:
2477                 Zero out memory block
2478
2479         Arguments:
2480                 pSrc1           Pointer to memory address
2481                 Length          Size
2482
2483         Return Value:
2484                 None
2485
2486         IRQL = PASSIVE_LEVEL
2487         IRQL = DISPATCH_LEVEL
2488
2489         Note:
2490
2491         ========================================================================
2492 */
2493 VOID    RTMPZeroMemory(
2494         IN      PVOID   pSrc,
2495         IN      ULONG   Length)
2496 {
2497         PUCHAR  pMem;
2498         ULONG   Index = 0;
2499
2500         pMem = (PUCHAR) pSrc;
2501
2502         for (Index = 0; Index < Length; Index++)
2503         {
2504                 pMem[Index] = 0x00;
2505         }
2506 }
2507
2508
2509 /*
2510         ========================================================================
2511
2512         Routine Description:
2513                 Copy data from memory block 1 to memory block 2
2514
2515         Arguments:
2516                 pDest           Pointer to destination memory address
2517                 pSrc            Pointer to source memory address
2518                 Length          Copy size
2519
2520         Return Value:
2521                 None
2522
2523         IRQL = PASSIVE_LEVEL
2524         IRQL = DISPATCH_LEVEL
2525
2526         Note:
2527
2528         ========================================================================
2529 */
2530 VOID    RTMPMoveMemory(
2531         OUT     PVOID   pDest,
2532         IN      PVOID   pSrc,
2533         IN      ULONG   Length)
2534 {
2535         PUCHAR  pMem1;
2536         PUCHAR  pMem2;
2537         UINT    Index;
2538
2539         ASSERT((Length==0) || (pDest && pSrc));
2540
2541         pMem1 = (PUCHAR) pDest;
2542         pMem2 = (PUCHAR) pSrc;
2543
2544         for (Index = 0; Index < Length; Index++)
2545         {
2546                 pMem1[Index] = pMem2[Index];
2547         }
2548 }
2549
2550 /*
2551         ========================================================================
2552
2553         Routine Description:
2554                 Initialize port configuration structure
2555
2556         Arguments:
2557                 Adapter                                         Pointer to our adapter
2558
2559         Return Value:
2560                 None
2561
2562         IRQL = PASSIVE_LEVEL
2563
2564         Note:
2565
2566         ========================================================================
2567 */
2568 VOID    UserCfgInit(
2569         IN      PRTMP_ADAPTER pAd)
2570 {
2571     UINT key_index, bss_index;
2572
2573         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
2574
2575         //
2576         //  part I. intialize common configuration
2577         //
2578 #ifdef RTMP_MAC_USB
2579         pAd->BulkOutReq = 0;
2580
2581         pAd->BulkOutComplete = 0;
2582         pAd->BulkOutCompleteOther = 0;
2583         pAd->BulkOutCompleteCancel = 0;
2584         pAd->BulkInReq = 0;
2585         pAd->BulkInComplete = 0;
2586         pAd->BulkInCompleteFail = 0;
2587
2588         //pAd->QuickTimerP = 100;
2589         //pAd->TurnAggrBulkInCount = 0;
2590         pAd->bUsbTxBulkAggre = 0;
2591
2592         // init as unsed value to ensure driver will set to MCU once.
2593         pAd->LedIndicatorStrength = 0xFF;
2594
2595         pAd->CommonCfg.MaxPktOneTxBulk = 2;
2596         pAd->CommonCfg.TxBulkFactor = 1;
2597         pAd->CommonCfg.RxBulkFactor =1;
2598
2599         pAd->CommonCfg.TxPower = 100; //mW
2600
2601         NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
2602 #endif // RTMP_MAC_USB //
2603
2604         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
2605         {
2606                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
2607                 {
2608                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
2609                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
2610                 }
2611         }
2612
2613         pAd->EepromAccess = FALSE;
2614
2615         pAd->Antenna.word = 0;
2616         pAd->CommonCfg.BBPCurrentBW = BW_20;
2617
2618         pAd->LedCntl.word = 0;
2619 #ifdef RTMP_MAC_PCI
2620         pAd->LedIndicatorStrength = 0;
2621         pAd->RLnkCtrlOffset = 0;
2622         pAd->HostLnkCtrlOffset = 0;
2623         pAd->StaCfg.PSControl.field.EnableNewPS=TRUE;
2624         pAd->CheckDmaBusyCount = 0;
2625 #endif // RTMP_MAC_PCI //
2626
2627         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
2628         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
2629         pAd->RfIcType = RFIC_2820;
2630
2631         // Init timer for reset complete event
2632         pAd->CommonCfg.CentralChannel = 1;
2633         pAd->bForcePrintTX = FALSE;
2634         pAd->bForcePrintRX = FALSE;
2635         pAd->bStaFifoTest = FALSE;
2636         pAd->bProtectionTest = FALSE;
2637         pAd->CommonCfg.Dsifs = 10;      // in units of usec
2638         pAd->CommonCfg.TxPower = 100; //mW
2639         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
2640         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
2641         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
2642         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
2643         pAd->CommonCfg.RtsThreshold = 2347;
2644         pAd->CommonCfg.FragmentThreshold = 2346;
2645         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
2646         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
2647         pAd->CommonCfg.PhyMode = 0xff;     // unknown
2648         pAd->CommonCfg.BandState = UNKNOWN_BAND;
2649         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
2650         pAd->CommonCfg.RadarDetect.CSCount = 0;
2651         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
2652
2653
2654
2655
2656         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
2657         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
2658         pAd->CommonCfg.bAPSDCapable = FALSE;
2659         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
2660         pAd->CommonCfg.TriggerTimerCount = 0;
2661         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
2662         pAd->CommonCfg.bCountryFlag = FALSE;
2663         pAd->CommonCfg.TxStream = 0;
2664         pAd->CommonCfg.RxStream = 0;
2665
2666         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
2667
2668         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
2669         pAd->HTCEnable = FALSE;
2670         pAd->bBroadComHT = FALSE;
2671         pAd->CommonCfg.bRdg = FALSE;
2672
2673         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
2674         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
2675         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
2676         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
2677         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
2678         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
2679         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
2680
2681         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
2682         BATableInit(pAd, &pAd->BATable);
2683
2684         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
2685         pAd->CommonCfg.bHTProtect = 1;
2686         pAd->CommonCfg.bMIMOPSEnable = TRUE;
2687         //2008/11/05:KH add to support Antenna power-saving of AP<--
2688         pAd->CommonCfg.bGreenAPEnable=FALSE;
2689         //2008/11/05:KH add to support Antenna power-saving of AP-->
2690         pAd->CommonCfg.bBADecline = FALSE;
2691         pAd->CommonCfg.bDisableReordering = FALSE;
2692
2693         if (pAd->MACVersion == 0x28720200)
2694         {
2695                 pAd->CommonCfg.TxBASize = 13; //by Jerry recommend
2696         }else{
2697         pAd->CommonCfg.TxBASize = 7;
2698         }
2699
2700         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
2701
2702         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
2703         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
2704         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
2705         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
2706         pAd->CommonCfg.TxRate = RATE_6;
2707
2708         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
2709         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
2710         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
2711
2712         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
2713
2714         //
2715         // part II. intialize STA specific configuration
2716         //
2717         {
2718                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
2719                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
2720                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
2721                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
2722
2723                 pAd->StaCfg.Psm = PWR_ACTIVE;
2724
2725                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
2726                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
2727                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
2728                 pAd->StaCfg.bMixCipher = FALSE;
2729                 pAd->StaCfg.DefaultKeyId = 0;
2730
2731                 // 802.1x port control
2732                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
2733                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
2734                 pAd->StaCfg.LastMicErrorTime = 0;
2735                 pAd->StaCfg.MicErrCnt        = 0;
2736                 pAd->StaCfg.bBlockAssoc      = FALSE;
2737                 pAd->StaCfg.WpaState         = SS_NOTUSE;
2738
2739                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
2740
2741                 pAd->StaCfg.RssiTrigger = 0;
2742                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
2743                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
2744                 pAd->StaCfg.AtimWin = 0;
2745                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
2746                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
2747                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
2748                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
2749                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
2750
2751                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
2752                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
2753         }
2754
2755 #ifdef PCIE_PS_SUPPORT
2756 pAd->brt30xxBanMcuCmd = FALSE;
2757 pAd->b3090ESpecialChip = FALSE;
2758 //KH Debug:the following must be removed
2759 pAd->StaCfg.PSControl.field.rt30xxPowerMode=3;
2760 pAd->StaCfg.PSControl.field.rt30xxForceASPMTest=0;
2761 pAd->StaCfg.PSControl.field.rt30xxFollowHostASPM=1;
2762 #endif // PCIE_PS_SUPPORT //
2763
2764         // global variables mXXXX used in MAC protocol state machines
2765         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
2766         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
2767         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
2768
2769         // PHY specification
2770         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
2771         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
2772
2773         {
2774                 // user desired power mode
2775                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
2776                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
2777                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
2778
2779                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
2780                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
2781
2782                 // Patch for Ndtest
2783                 pAd->StaCfg.ScanCnt = 0;
2784
2785                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
2786                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
2787                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
2788                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
2789                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
2790
2791                 // Nitro mode control
2792                 pAd->StaCfg.bAutoReconnect = TRUE;
2793
2794                 // Save the init time as last scan time, the system should do scan after 2 seconds.
2795                 // This patch is for driver wake up from standby mode, system will do scan right away.
2796                 NdisGetSystemUpTime(&pAd->StaCfg.LastScanTime);
2797                 if (pAd->StaCfg.LastScanTime > 10 * OS_HZ)
2798                         pAd->StaCfg.LastScanTime -= (10 * OS_HZ);
2799
2800                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
2801 #ifdef RTMP_MAC_PCI
2802                 sprintf((PSTRING) pAd->nickname, "RT2860STA");
2803 #endif // RTMP_MAC_PCI //
2804 #ifdef RTMP_MAC_USB
2805                         sprintf((PSTRING) pAd->nickname, "RT2870STA");
2806 #endif // RTMP_MAC_USB //
2807                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
2808                 pAd->StaCfg.IEEE8021X = FALSE;
2809                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
2810                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
2811                 pAd->StaCfg.bRSN_IE_FromWpaSupplicant = FALSE;
2812                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
2813
2814                 NdisZeroMemory(pAd->StaCfg.ReplayCounter, 8);
2815
2816
2817                 pAd->StaCfg.bAutoConnectByBssid = FALSE;
2818                 pAd->StaCfg.BeaconLostTime = BEACON_LOST_TIME;
2819                 NdisZeroMemory(pAd->StaCfg.WpaPassPhrase, 64);
2820                 pAd->StaCfg.WpaPassPhraseLen = 0;
2821                 pAd->StaCfg.bAutoRoaming = FALSE;
2822                 pAd->StaCfg.bForceTxBurst = FALSE;
2823         }
2824
2825         // Default for extra information is not valid
2826         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
2827
2828         // Default Config change flag
2829         pAd->bConfigChanged = FALSE;
2830
2831         //
2832         // part III. AP configurations
2833         //
2834
2835
2836         //
2837         // part IV. others
2838         //
2839         // dynamic BBP R66:sensibity tuning to overcome background noise
2840         pAd->BbpTuning.bEnable                = TRUE;
2841         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
2842         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
2843         pAd->BbpTuning.R66Delta               = 4;
2844         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
2845
2846         //
2847         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
2848         // if not initial this value, the default value will be 0.
2849         //
2850         pAd->BbpTuning.R66CurrentValue = 0x38;
2851
2852         pAd->Bbp94 = BBPR94_DEFAULT;
2853         pAd->BbpForCCK = FALSE;
2854
2855         // Default is FALSE for test bit 1
2856         //pAd->bTest1 = FALSE;
2857
2858         // initialize MAC table and allocate spin lock
2859         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
2860         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
2861         NdisAllocateSpinLock(&pAd->MacTabLock);
2862
2863         //RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE);
2864         //RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV);
2865
2866
2867
2868         pAd->CommonCfg.bWiFiTest = FALSE;
2869 #ifdef RTMP_MAC_PCI
2870         pAd->bPCIclkOff = FALSE;
2871 #endif // RTMP_MAC_PCI //
2872
2873 RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
2874         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
2875 }
2876
2877 // IRQL = PASSIVE_LEVEL
2878 UCHAR BtoH(STRING ch)
2879 {
2880         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
2881         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
2882         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
2883         return(255);
2884 }
2885
2886 //
2887 //  FUNCTION: AtoH(char *, UCHAR *, int)
2888 //
2889 //  PURPOSE:  Converts ascii string to network order hex
2890 //
2891 //  PARAMETERS:
2892 //    src    - pointer to input ascii string
2893 //    dest   - pointer to output hex
2894 //    destlen - size of dest
2895 //
2896 //  COMMENTS:
2897 //
2898 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
2899 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
2900 //
2901 // IRQL = PASSIVE_LEVEL
2902
2903 void AtoH(PSTRING src, PUCHAR dest, int destlen)
2904 {
2905         PSTRING srcptr;
2906         PUCHAR destTemp;
2907
2908         srcptr = src;
2909         destTemp = (PUCHAR) dest;
2910
2911         while(destlen--)
2912         {
2913                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
2914                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
2915                 destTemp++;
2916         }
2917 }
2918
2919
2920 //+++Mark by shiang, not use now, need to remove after confirm
2921 //---Mark by shiang, not use now, need to remove after confirm
2922
2923
2924 /*
2925         ========================================================================
2926
2927         Routine Description:
2928                 Init timer objects
2929
2930         Arguments:
2931                 pAd                     Pointer to our adapter
2932                 pTimer                          Timer structure
2933                 pTimerFunc                      Function to execute when timer expired
2934                 Repeat                          Ture for period timer
2935
2936         Return Value:
2937                 None
2938
2939         Note:
2940
2941         ========================================================================
2942 */
2943 VOID    RTMPInitTimer(
2944         IN      PRTMP_ADAPTER                   pAd,
2945         IN      PRALINK_TIMER_STRUCT    pTimer,
2946         IN      PVOID                                   pTimerFunc,
2947         IN      PVOID                                   pData,
2948         IN      BOOLEAN                                 Repeat)
2949 {
2950         //
2951         // Set Valid to TRUE for later used.
2952         // It will crash if we cancel a timer or set a timer
2953         // that we haven't initialize before.
2954         //
2955         pTimer->Valid      = TRUE;
2956
2957         pTimer->PeriodicType = Repeat;
2958         pTimer->State      = FALSE;
2959         pTimer->cookie = (ULONG) pData;
2960
2961 #ifdef RTMP_TIMER_TASK_SUPPORT
2962         pTimer->pAd = pAd;
2963 #endif // RTMP_TIMER_TASK_SUPPORT //
2964
2965         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
2966 }
2967
2968 /*
2969         ========================================================================
2970
2971         Routine Description:
2972                 Init timer objects
2973
2974         Arguments:
2975                 pTimer                          Timer structure
2976                 Value                           Timer value in milliseconds
2977
2978         Return Value:
2979                 None
2980
2981         Note:
2982                 To use this routine, must call RTMPInitTimer before.
2983
2984         ========================================================================
2985 */
2986 VOID    RTMPSetTimer(
2987         IN      PRALINK_TIMER_STRUCT    pTimer,
2988         IN      ULONG                                   Value)
2989 {
2990         if (pTimer->Valid)
2991         {
2992                 pTimer->TimerValue = Value;
2993                 pTimer->State      = FALSE;
2994                 if (pTimer->PeriodicType == TRUE)
2995                 {
2996                         pTimer->Repeat = TRUE;
2997                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
2998                 }
2999                 else
3000                 {
3001                         pTimer->Repeat = FALSE;
3002                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3003                 }
3004         }
3005         else
3006         {
3007                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3008         }
3009 }
3010
3011
3012 /*
3013         ========================================================================
3014
3015         Routine Description:
3016                 Init timer objects
3017
3018         Arguments:
3019                 pTimer                          Timer structure
3020                 Value                           Timer value in milliseconds
3021
3022         Return Value:
3023                 None
3024
3025         Note:
3026                 To use this routine, must call RTMPInitTimer before.
3027
3028         ========================================================================
3029 */
3030 VOID    RTMPModTimer(
3031         IN      PRALINK_TIMER_STRUCT    pTimer,
3032         IN      ULONG                                   Value)
3033 {
3034         BOOLEAN Cancel;
3035
3036         if (pTimer->Valid)
3037         {
3038                 pTimer->TimerValue = Value;
3039                 pTimer->State      = FALSE;
3040                 if (pTimer->PeriodicType == TRUE)
3041                 {
3042                         RTMPCancelTimer(pTimer, &Cancel);
3043                         RTMPSetTimer(pTimer, Value);
3044                 }
3045                 else
3046                 {
3047                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3048                 }
3049         }
3050         else
3051         {
3052                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3053         }
3054 }
3055
3056 /*
3057         ========================================================================
3058
3059         Routine Description:
3060                 Cancel timer objects
3061
3062         Arguments:
3063                 Adapter                                         Pointer to our adapter
3064
3065         Return Value:
3066                 None
3067
3068         IRQL = PASSIVE_LEVEL
3069         IRQL = DISPATCH_LEVEL
3070
3071         Note:
3072                 1.) To use this routine, must call RTMPInitTimer before.
3073                 2.) Reset NIC to initial state AS IS system boot up time.
3074
3075         ========================================================================
3076 */
3077 VOID    RTMPCancelTimer(
3078         IN      PRALINK_TIMER_STRUCT    pTimer,
3079         OUT     BOOLEAN                                 *pCancelled)
3080 {
3081         if (pTimer->Valid)
3082         {
3083                 if (pTimer->State == FALSE)
3084                         pTimer->Repeat = FALSE;
3085
3086                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3087
3088                 if (*pCancelled == TRUE)
3089                         pTimer->State = TRUE;
3090
3091 #ifdef RTMP_TIMER_TASK_SUPPORT
3092                 // We need to go-through the TimerQ to findout this timer handler and remove it if
3093                 //              it's still waiting for execution.
3094                 RtmpTimerQRemove(pTimer->pAd, pTimer);
3095 #endif // RTMP_TIMER_TASK_SUPPORT //
3096         }
3097         else
3098         {
3099                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3100         }
3101 }
3102
3103 /*
3104         ========================================================================
3105
3106         Routine Description:
3107                 Set LED Status
3108
3109         Arguments:
3110                 pAd                                             Pointer to our adapter
3111                 Status                                  LED Status
3112
3113         Return Value:
3114                 None
3115
3116         IRQL = PASSIVE_LEVEL
3117         IRQL = DISPATCH_LEVEL
3118
3119         Note:
3120
3121         ========================================================================
3122 */
3123 VOID RTMPSetLED(
3124         IN PRTMP_ADAPTER        pAd,
3125         IN UCHAR                        Status)
3126 {
3127         //ULONG                 data;
3128         UCHAR                   HighByte = 0;
3129         UCHAR                   LowByte;
3130
3131         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3132         switch (Status)
3133         {
3134                 case LED_LINK_DOWN:
3135                         HighByte = 0x20;
3136                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3137                         pAd->LedIndicatorStrength = 0;
3138                         break;
3139                 case LED_LINK_UP:
3140                         if (pAd->CommonCfg.Channel > 14)
3141                                 HighByte = 0xa0;
3142                         else
3143                                 HighByte = 0x60;
3144                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3145                         break;
3146                 case LED_RADIO_ON:
3147                         HighByte = 0x20;
3148                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3149                         break;
3150                 case LED_HALT:
3151                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3152                 case LED_RADIO_OFF:
3153                         HighByte = 0;
3154                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3155                         break;
3156         case LED_WPS:
3157                         HighByte = 0x10;
3158                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3159                         break;
3160                 case LED_ON_SITE_SURVEY:
3161                         HighByte = 0x08;
3162                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3163                         break;
3164                 case LED_POWER_UP:
3165                         HighByte = 0x04;
3166                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3167                         break;
3168                 default:
3169                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3170                         break;
3171         }
3172
3173     //
3174         // Keep LED status for LED SiteSurvey mode.
3175         // After SiteSurvey, we will set the LED mode to previous status.
3176         //
3177         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3178                 pAd->LedStatus = Status;
3179
3180         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3181 }
3182
3183 /*
3184         ========================================================================
3185
3186         Routine Description:
3187                 Set LED Signal Stregth
3188
3189         Arguments:
3190                 pAd                                             Pointer to our adapter
3191                 Dbm                                             Signal Stregth
3192
3193         Return Value:
3194                 None
3195
3196         IRQL = PASSIVE_LEVEL
3197
3198         Note:
3199                 Can be run on any IRQL level.
3200
3201                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3202                 <= -90  No Signal
3203                 <= -81  Very Low
3204                 <= -71  Low
3205                 <= -67  Good
3206                 <= -57  Very Good
3207                  > -57  Excellent
3208         ========================================================================
3209 */
3210 VOID RTMPSetSignalLED(
3211         IN PRTMP_ADAPTER        pAd,
3212         IN NDIS_802_11_RSSI Dbm)
3213 {
3214         UCHAR           nLed = 0;
3215
3216         if (pAd->LedCntl.field.LedMode == LED_MODE_SIGNAL_STREGTH)
3217         {
3218         if (Dbm <= -90)
3219                 nLed = 0;
3220         else if (Dbm <= -81)
3221                 nLed = 1;
3222         else if (Dbm <= -71)
3223                 nLed = 3;
3224         else if (Dbm <= -67)
3225                 nLed = 7;
3226         else if (Dbm <= -57)
3227                 nLed = 15;
3228         else
3229                 nLed = 31;
3230
3231         //
3232         // Update Signal Stregth to firmware if changed.
3233         //
3234         if (pAd->LedIndicatorStrength != nLed)
3235         {
3236                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3237                 pAd->LedIndicatorStrength = nLed;
3238         }
3239         }
3240 }
3241
3242 /*
3243         ========================================================================
3244
3245         Routine Description:
3246                 Enable RX
3247
3248         Arguments:
3249                 pAd                                             Pointer to our adapter
3250
3251         Return Value:
3252                 None
3253
3254         IRQL <= DISPATCH_LEVEL
3255
3256         Note:
3257                 Before Enable RX, make sure you have enabled Interrupt.
3258         ========================================================================
3259 */
3260 VOID RTMPEnableRxTx(
3261         IN PRTMP_ADAPTER        pAd)
3262 {
3263 //      WPDMA_GLO_CFG_STRUC     GloCfg;
3264 //      ULONG   i = 0;
3265         UINT32 rx_filter_flag;
3266
3267         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3268
3269         // Enable Rx DMA.
3270         RT28XXDMAEnable(pAd);
3271
3272         // enable RX of MAC block
3273         if (pAd->OpMode == OPMODE_AP)
3274         {
3275                 rx_filter_flag = APNORMAL;
3276
3277
3278                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3279         }
3280         else
3281         {
3282                 if (pAd->CommonCfg.PSPXlink)
3283                         rx_filter_flag = PSPXLINK;
3284                 else
3285                         rx_filter_flag = STANORMAL;     // Staion not drop control frame will fail WiFi Certification.
3286                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);
3287         }
3288
3289         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3290         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3291 }
3292
3293
3294 //+++Add by shiang, move from os/linux/rt_main_dev.c
3295 void CfgInitHook(PRTMP_ADAPTER pAd)
3296 {
3297         pAd->bBroadComHT = TRUE;
3298 }
3299
3300
3301 int rt28xx_init(
3302         IN PRTMP_ADAPTER pAd,
3303         IN PSTRING pDefaultMac,
3304         IN PSTRING pHostName)
3305 {
3306         UINT                                    index;
3307         UCHAR                                   TmpPhy;
3308         NDIS_STATUS                             Status;
3309         UINT32                                  MacCsr0 = 0;
3310
3311
3312 #ifdef RTMP_MAC_PCI
3313         {
3314         // If dirver doesn't wake up firmware here,
3315         // NICLoadFirmware will hang forever when interface is up again.
3316         // RT2860 PCI
3317         if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) &&
3318                 OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_PCIE_DEVICE))
3319         {
3320                 AUTO_WAKEUP_STRUC AutoWakeupCfg;
3321                         AsicForceWakeup(pAd, TRUE);
3322                 AutoWakeupCfg.word = 0;
3323                 RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG, AutoWakeupCfg.word);
3324                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3325         }
3326         }
3327 #endif // RTMP_MAC_PCI //
3328
3329
3330         // reset Adapter flags
3331         RTMP_CLEAR_FLAGS(pAd);
3332
3333         // Init BssTab & ChannelInfo tabbles for auto channel select.
3334
3335         // Allocate BA Reordering memory
3336         ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM);
3337
3338         // Make sure MAC gets ready.
3339         index = 0;
3340         do
3341         {
3342                 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
3343                 pAd->MACVersion = MacCsr0;
3344
3345                 if ((pAd->MACVersion != 0x00) && (pAd->MACVersion != 0xFFFFFFFF))
3346                         break;
3347
3348                 RTMPusecDelay(10);
3349         } while (index++ < 100);
3350         DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
3351
3352 #ifdef RTMP_MAC_PCI
3353 #ifdef PCIE_PS_SUPPORT
3354         /*Iverson patch PCIE L1 issue to make sure that driver can be read,write ,BBP and RF register  at pcie L.1 level */
3355         if ((IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))&&OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_PCIE_DEVICE))
3356         {
3357                 RTMP_IO_READ32(pAd, AUX_CTRL, &MacCsr0);
3358                 MacCsr0 |= 0x402;
3359                 RTMP_IO_WRITE32(pAd, AUX_CTRL, MacCsr0);
3360                 DBGPRINT(RT_DEBUG_TRACE, ("AUX_CTRL = 0x%x\n", MacCsr0));
3361         }
3362 #endif // PCIE_PS_SUPPORT //
3363
3364         // To fix driver disable/enable hang issue when radio off
3365         RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x2);
3366 #endif // RTMP_MAC_PCI //
3367
3368         // Disable DMA
3369         RT28XXDMADisable(pAd);
3370
3371
3372         // Load 8051 firmware
3373         Status = NICLoadFirmware(pAd);
3374         if (Status != NDIS_STATUS_SUCCESS)
3375         {
3376                 DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status));
3377                 goto err1;
3378         }
3379
3380         NICLoadRateSwitchingParams(pAd);
3381
3382         // Disable interrupts here which is as soon as possible
3383         // This statement should never be true. We might consider to remove it later
3384 #ifdef RTMP_MAC_PCI
3385         if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE))
3386         {
3387                 RTMP_ASIC_INTERRUPT_DISABLE(pAd);
3388         }
3389 #endif // RTMP_MAC_PCI //
3390
3391         Status = RTMPAllocTxRxRingMemory(pAd);
3392         if (Status != NDIS_STATUS_SUCCESS)
3393         {
3394                 DBGPRINT_ERR(("RTMPAllocDMAMemory failed, Status[=0x%08x]\n", Status));
3395                 goto err1;
3396         }
3397
3398         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3399
3400         // initialize MLME
3401         //
3402
3403         Status = RtmpMgmtTaskInit(pAd);
3404         if (Status != NDIS_STATUS_SUCCESS)
3405                 goto err2;
3406
3407         Status = MlmeInit(pAd);
3408         if (Status != NDIS_STATUS_SUCCESS)
3409         {
3410                 DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status));
3411                 goto err2;
3412         }
3413
3414         // Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default
3415         //
3416         UserCfgInit(pAd);
3417         Status = RtmpNetTaskInit(pAd);
3418         if (Status != NDIS_STATUS_SUCCESS)
3419                 goto err3;
3420
3421 //      COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr);
3422 //      pAd->bForcePrintTX = TRUE;
3423
3424         CfgInitHook(pAd);
3425
3426                 NdisAllocateSpinLock(&pAd->MacTabLock);
3427
3428         MeasureReqTabInit(pAd);
3429         TpcReqTabInit(pAd);
3430
3431         //
3432         // Init the hardware, we need to init asic before read registry, otherwise mac register will be reset
3433         //
3434         Status = NICInitializeAdapter(pAd, TRUE);
3435         if (Status != NDIS_STATUS_SUCCESS)
3436         {
3437                 DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status));
3438                 if (Status != NDIS_STATUS_SUCCESS)
3439                 goto err3;
3440         }
3441
3442         DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3443
3444 #ifdef RTMP_MAC_USB
3445         pAd->CommonCfg.bMultipleIRP = FALSE;
3446
3447         if (pAd->CommonCfg.bMultipleIRP)
3448                 pAd->CommonCfg.NumOfBulkInIRP = RX_RING_SIZE;
3449         else
3450                 pAd->CommonCfg.NumOfBulkInIRP = 1;
3451 #endif // RTMP_MAC_USB //
3452
3453         //Init Ba Capability parameters.
3454 //      RT28XX_BA_INIT(pAd);
3455         pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
3456         pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable;
3457         pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
3458         pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
3459         // UPdata to HT IE
3460         pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
3461         pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
3462         pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
3463
3464         // after reading Registry, we now know if in AP mode or STA mode
3465
3466         // Load 8051 firmware; crash when FW image not existent
3467         // Status = NICLoadFirmware(pAd);
3468         // if (Status != NDIS_STATUS_SUCCESS)
3469         //    break;
3470
3471         DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3472
3473         // We should read EEPROM for all cases.  rt2860b
3474         NICReadEEPROMParameters(pAd, (PUCHAR)pDefaultMac);
3475
3476         DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3477
3478         NICInitAsicFromEEPROM(pAd); //rt2860b
3479
3480         // Set PHY to appropriate mode
3481         TmpPhy = pAd->CommonCfg.PhyMode;
3482         pAd->CommonCfg.PhyMode = 0xff;
3483         RTMPSetPhyMode(pAd, TmpPhy);
3484         SetCommonHT(pAd);
3485
3486         // No valid channels.
3487         if (pAd->ChannelListNum == 0)
3488         {
3489                 DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n"));
3490                 goto err4;
3491         }
3492
3493         DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0],
3494            pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2],
3495            pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4]));
3496
3497 #ifdef RTMP_RF_RW_SUPPORT
3498         //Init RT30xx RFRegisters after read RFIC type from EEPROM
3499         NICInitRFRegisters(pAd);
3500 #endif // RTMP_RF_RW_SUPPORT //
3501
3502 //              APInitialize(pAd);
3503
3504
3505                 //
3506         // Initialize RF register to default value
3507         //
3508         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3509         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3510
3511         // 8051 firmware require the signal during booting time.
3512         //2008/11/28:KH marked the following codes to patch Frequency offset bug
3513         //AsicSendCommandToMcu(pAd, 0x72, 0xFF, 0x00, 0x00);
3514
3515         if (pAd && (Status != NDIS_STATUS_SUCCESS))
3516         {
3517                 //
3518                 // Undo everything if it failed
3519                 //
3520                 if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
3521                 {
3522 //                      NdisMDeregisterInterrupt(&pAd->Interrupt);
3523                         RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3524                 }
3525 //              RTMPFreeAdapter(pAd); // we will free it in disconnect()
3526         }
3527         else if (pAd)
3528         {
3529                 // Microsoft HCT require driver send a disconnect event after driver initialization.
3530                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
3531 //              pAd->IndicateMediaState = NdisMediaStateDisconnected;
3532                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE);
3533
3534                 DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n"));
3535
3536 #ifdef RTMP_MAC_USB
3537                 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS);
3538                 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
3539
3540                 //
3541                 // Support multiple BulkIn IRP,
3542                 // the value on pAd->CommonCfg.NumOfBulkInIRP may be large than 1.
3543                 //
3544                 for(index=0; index<pAd->CommonCfg.NumOfBulkInIRP; index++)
3545                 {
3546                         RTUSBBulkReceive(pAd);
3547                         DBGPRINT(RT_DEBUG_TRACE, ("RTUSBBulkReceive!\n" ));
3548                 }
3549 #endif // RTMP_MAC_USB //
3550         }// end of else
3551
3552
3553         // Set up the Mac address
3554         RtmpOSNetDevAddrSet(pAd->net_dev, &pAd->CurrentAddress[0]);
3555
3556         DBGPRINT_S(Status, ("<==== rt28xx_init, Status=%x\n", Status));
3557
3558         return TRUE;
3559
3560
3561 err4:
3562 err3:
3563         MlmeHalt(pAd);
3564 err2:
3565         RTMPFreeTxRxRingMemory(pAd);
3566 err1:
3567
3568         os_free_mem(pAd, pAd->mpdu_blk_pool.mem); // free BA pool
3569
3570         // shall not set priv to NULL here because the priv didn't been free yet.
3571         //net_dev->ml_priv = 0;
3572 #ifdef ST
3573 err0:
3574 #endif // ST //
3575
3576         DBGPRINT(RT_DEBUG_ERROR, ("!!! rt28xx Initialized fail !!!\n"));
3577         return FALSE;
3578 }
3579 //---Add by shiang, move from os/linux/rt_main_dev.c
3580
3581
3582 static INT RtmpChipOpsRegister(
3583         IN RTMP_ADAPTER *pAd,
3584         IN INT                  infType)
3585 {
3586         RTMP_CHIP_OP    *pChipOps = &pAd->chipOps;
3587         int status;
3588
3589         memset(pChipOps, 0, sizeof(RTMP_CHIP_OP));
3590
3591         /* set eeprom related hook functions */
3592         status = RtmpChipOpsEepromHook(pAd, infType);
3593
3594         /* set mcu related hook functions */
3595         switch(infType)
3596         {
3597 #ifdef RTMP_PCI_SUPPORT
3598                 case RTMP_DEV_INF_PCI:
3599                         pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3600                         pChipOps->eraseFirmware = RtmpAsicEraseFirmware;
3601                         pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3602                         break;
3603 #endif // RTMP_PCI_SUPPORT //
3604 #ifdef RTMP_USB_SUPPORT
3605                 case RTMP_DEV_INF_USB:
3606                         pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3607                         pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3608                         break;
3609 #endif // RTMP_USB_SUPPORT //
3610                 default:
3611                         break;
3612         }
3613
3614         return status;
3615 }
3616
3617
3618 INT RtmpRaDevCtrlInit(
3619         IN RTMP_ADAPTER *pAd,
3620         IN RTMP_INF_TYPE infType)
3621 {
3622         //VOID  *handle;
3623
3624         // Assign the interface type. We need use it when do register/EEPROM access.
3625         pAd->infType = infType;
3626
3627
3628         pAd->OpMode = OPMODE_STA;
3629         DBGPRINT(RT_DEBUG_TRACE, ("STA Driver version-%s\n", STA_DRIVER_VERSION));
3630
3631 #ifdef RTMP_MAC_USB
3632         init_MUTEX(&(pAd->UsbVendorReq_semaphore));
3633         os_alloc_mem(pAd, (PUCHAR)&pAd->UsbVendorReqBuf, MAX_PARAM_BUFFER_SIZE - 1);
3634         if (pAd->UsbVendorReqBuf == NULL)
3635         {
3636                 DBGPRINT(RT_DEBUG_ERROR, ("Allocate vendor request temp buffer failed!\n"));
3637                 return FALSE;
3638         }
3639 #endif // RTMP_MAC_USB //
3640
3641         RtmpChipOpsRegister(pAd, infType);
3642
3643
3644         return 0;
3645 }
3646
3647
3648 BOOLEAN RtmpRaDevCtrlExit(IN RTMP_ADAPTER *pAd)
3649 {
3650
3651
3652         RTMPFreeAdapter(pAd);
3653
3654         return TRUE;
3655 }
3656
3657
3658 // not yet support MBSS
3659 PNET_DEV get_netdev_from_bssid(
3660         IN      PRTMP_ADAPTER   pAd,
3661         IN      UCHAR                   FromWhichBSSID)
3662 {
3663         PNET_DEV dev_p = NULL;
3664
3665         {
3666                 dev_p = pAd->net_dev;
3667         }
3668
3669         ASSERT(dev_p);
3670         return dev_p; /* return one of MBSS */
3671 }