drivers/staging/rt2860/common/rtmp_init.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36 */
  37 #include "../rt_config.h"
  38
  39 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  40 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  41
  42 //
  43 // BBP register initialization set
  44 //
  45 REG_PAIR   BBPRegTable[] = {
  46         {BBP_R65,               0x2C},          // fix rssi issue
  47         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
  48         {BBP_R69,               0x12},
  49         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
  50         {BBP_R73,               0x10},
  51         {BBP_R81,               0x37},
  52         {BBP_R82,               0x62},
  53         {BBP_R83,               0x6A},
  54         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
  55         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
  56         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
  57         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
  58         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
  59         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
  60         {BBP_R106,              0x35},  // for ShortGI throughput
  61 };
  62 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
  63
  64
  65 //
  66 // ASIC register initialization sets
  67 //
  68
  69 RTMP_REG_PAIR   MACRegTable[] = {
  70 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
  71         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
  72         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
  73 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
  74         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
  75         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
  76 #else
  77     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
  78 #endif // HW_BEACON_OFFSET //
  79
  80         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
  81         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
  82         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
  83         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
  84         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
  85         //{TX_SW_CFG0,          0x40a06}, // Gary,2006-08-23
  86         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
  87         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
  88         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
  89         //{TX_TIMEOUT_CFG,      0x00182090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT
  90         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
  91         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
  92         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
  93
  94         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
  95
  96         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
  97
  98         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
  99         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 100         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 101 #ifdef RTMP_MAC_USB
 102         {PBF_CFG,                               0xf40006},              // Only enable Queue 2
 103         {MM40_PROT_CFG,                 0x3F44084},             // Initial Auto_Responder, because QA will turn off Auto-Responder
 104         {WPDMA_GLO_CFG,                 0x00000030},
 105 #endif // RTMP_MAC_USB //
 106         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 107         {GF40_PROT_CFG,                 0x03F44084},
 108         {MM20_PROT_CFG,                 0x01744004},
 109 #ifdef RTMP_MAC_PCI
 110         {MM40_PROT_CFG,                 0x03F54084},
 111 #endif // RTMP_MAC_PCI //
 112         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 113         {TX_RTS_CFG,                    0x00092b20},
 114         {EXP_ACK_TIME,                  0x002400ca},    // default value
 115
 116         {TXOP_HLDR_ET,                  0x00000002},
 117
 118         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 119                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 120                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 121                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 122         {XIFS_TIME_CFG,                 0x33a41010},
 123         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 124 };
 125
 126 RTMP_REG_PAIR   STAMACRegTable[] =      {
 127         {WMM_AIFSN_CFG,         0x00002273},
 128         {WMM_CWMIN_CFG, 0x00002344},
 129         {WMM_CWMAX_CFG, 0x000034aa},
 130 };
 131
 132 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 133 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 134
 135
 136 /*
 137         ========================================================================
 138
 139         Routine Description:
 140                 Allocate RTMP_ADAPTER data block and do some initialization
 141
 142         Arguments:
 143                 Adapter         Pointer to our adapter
 144
 145         Return Value:
 146                 NDIS_STATUS_SUCCESS
 147                 NDIS_STATUS_FAILURE
 148
 149         IRQL = PASSIVE_LEVEL
 150
 151         Note:
 152
 153         ========================================================================
 154 */
 155 NDIS_STATUS     RTMPAllocAdapterBlock(
 156         IN  PVOID       handle,
 157         OUT     PRTMP_ADAPTER   *ppAdapter)
 158 {
 159         PRTMP_ADAPTER   pAd;
 160         NDIS_STATUS             Status;
 161         INT                     index;
 162         UCHAR                   *pBeaconBuf = NULL;
 163
 164         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 165
 166         *ppAdapter = NULL;
 167
 168         do
 169         {
 170                 // Allocate RTMP_ADAPTER memory block
 171                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 172                 if (pBeaconBuf == NULL)
 173                 {
 174                         Status = NDIS_STATUS_FAILURE;
 175                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 176                         break;
 177                 }
 178                 NdisZeroMemory(pBeaconBuf, MAX_BEACON_SIZE);
 179
 180                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 181                 if (Status != NDIS_STATUS_SUCCESS)
 182                 {
 183                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 184                         break;
 185                 }
 186                 pAd->BeaconBuf = pBeaconBuf;
 187                 DBGPRINT(RT_DEBUG_OFF, ("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER)));
 188
 189
 190                 // Init spin locks
 191                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 192 #ifdef RTMP_MAC_PCI
 193                 NdisAllocateSpinLock(&pAd->RxRingLock);
 194 #ifdef RT3090
 195         NdisAllocateSpinLock(&pAd->McuCmdLock);
 196 #endif // RT3090 //
 197 #endif // RTMP_MAC_PCI //
 198
 199                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 200                 {
 201                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 202                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 203                         pAd->DeQueueRunning[index] = FALSE;
 204                 }
 205
 206                 NdisAllocateSpinLock(&pAd->irq_lock);
 207
 208         } while (FALSE);
 209
 210         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 211                 kfree(pBeaconBuf);
 212
 213         *ppAdapter = pAd;
 214
 215         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 216         return Status;
 217 }
 218
 219 /*
 220         ========================================================================
 221
 222         Routine Description:
 223                 Read initial Tx power per MCS and BW from EEPROM
 224
 225         Arguments:
 226                 Adapter                                         Pointer to our adapter
 227
 228         Return Value:
 229                 None
 230
 231         IRQL = PASSIVE_LEVEL
 232
 233         Note:
 234
 235         ========================================================================
 236 */
 237 VOID    RTMPReadTxPwrPerRate(
 238         IN      PRTMP_ADAPTER   pAd)
 239 {
 240         ULONG           data, Adata, Gdata;
 241         USHORT          i, value, value2;
 242         INT                     Apwrdelta, Gpwrdelta;
 243         UCHAR           t1,t2,t3,t4;
 244         BOOLEAN         bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 245
 246         //
 247         // Get power delta for 20MHz and 40MHz.
 248         //
 249         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 250         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 251         Apwrdelta = 0;
 252         Gpwrdelta = 0;
 253
 254         if ((value2 & 0xff) != 0xff)
 255         {
 256                 if ((value2 & 0x80))
 257                         Gpwrdelta = (value2&0xf);
 258
 259                 if ((value2 & 0x40))
 260                         bGpwrdeltaMinus = FALSE;
 261                 else
 262                         bGpwrdeltaMinus = TRUE;
 263         }
 264         if ((value2 & 0xff00) != 0xff00)
 265         {
 266                 if ((value2 & 0x8000))
 267                         Apwrdelta = ((value2&0xf00)>>8);
 268
 269                 if ((value2 & 0x4000))
 270                         bApwrdeltaMinus = FALSE;
 271                 else
 272                         bApwrdeltaMinus = TRUE;
 273         }
 274         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 275
 276         //
 277         // Get Txpower per MCS for 20MHz in 2.4G.
 278         //
 279         for (i=0; i<5; i++)
 280         {
 281                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 282                 data = value;
 283                 if (bApwrdeltaMinus == FALSE)
 284                 {
 285                         t1 = (value&0xf)+(Apwrdelta);
 286                         if (t1 > 0xf)
 287                                 t1 = 0xf;
 288                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 289                         if (t2 > 0xf)
 290                                 t2 = 0xf;
 291                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 292                         if (t3 > 0xf)
 293                                 t3 = 0xf;
 294                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 295                         if (t4 > 0xf)
 296                                 t4 = 0xf;
 297                 }
 298                 else
 299                 {
 300                         if ((value&0xf) > Apwrdelta)
 301                                 t1 = (value&0xf)-(Apwrdelta);
 302                         else
 303                                 t1 = 0;
 304                         if (((value&0xf0)>>4) > Apwrdelta)
 305                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 306                         else
 307                                 t2 = 0;
 308                         if (((value&0xf00)>>8) > Apwrdelta)
 309                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 310                         else
 311                                 t3 = 0;
 312                         if (((value&0xf000)>>12) > Apwrdelta)
 313                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 314                         else
 315                                 t4 = 0;
 316                 }
 317                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 318                 if (bGpwrdeltaMinus == FALSE)
 319                 {
 320                         t1 = (value&0xf)+(Gpwrdelta);
 321                         if (t1 > 0xf)
 322                                 t1 = 0xf;
 323                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 324                         if (t2 > 0xf)
 325                                 t2 = 0xf;
 326                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 327                         if (t3 > 0xf)
 328                                 t3 = 0xf;
 329                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 330                         if (t4 > 0xf)
 331                                 t4 = 0xf;
 332                 }
 333                 else
 334                 {
 335                         if ((value&0xf) > Gpwrdelta)
 336                                 t1 = (value&0xf)-(Gpwrdelta);
 337                         else
 338                                 t1 = 0;
 339                         if (((value&0xf0)>>4) > Gpwrdelta)
 340                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 341                         else
 342                                 t2 = 0;
 343                         if (((value&0xf00)>>8) > Gpwrdelta)
 344                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 345                         else
 346                                 t3 = 0;
 347                         if (((value&0xf000)>>12) > Gpwrdelta)
 348                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 349                         else
 350                                 t4 = 0;
 351                 }
 352                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 353
 354                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 355                 if (bApwrdeltaMinus == FALSE)
 356                 {
 357                         t1 = (value&0xf)+(Apwrdelta);
 358                         if (t1 > 0xf)
 359                                 t1 = 0xf;
 360                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 361                         if (t2 > 0xf)
 362                                 t2 = 0xf;
 363                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 364                         if (t3 > 0xf)
 365                                 t3 = 0xf;
 366                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 367                         if (t4 > 0xf)
 368                                 t4 = 0xf;
 369                 }
 370                 else
 371                 {
 372                         if ((value&0xf) > Apwrdelta)
 373                                 t1 = (value&0xf)-(Apwrdelta);
 374                         else
 375                                 t1 = 0;
 376                         if (((value&0xf0)>>4) > Apwrdelta)
 377                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 378                         else
 379                                 t2 = 0;
 380                         if (((value&0xf00)>>8) > Apwrdelta)
 381                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 382                         else
 383                                 t3 = 0;
 384                         if (((value&0xf000)>>12) > Apwrdelta)
 385                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 386                         else
 387                                 t4 = 0;
 388                 }
 389                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 390                 if (bGpwrdeltaMinus == FALSE)
 391                 {
 392                         t1 = (value&0xf)+(Gpwrdelta);
 393                         if (t1 > 0xf)
 394                                 t1 = 0xf;
 395                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 396                         if (t2 > 0xf)
 397                                 t2 = 0xf;
 398                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 399                         if (t3 > 0xf)
 400                                 t3 = 0xf;
 401                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 402                         if (t4 > 0xf)
 403                                 t4 = 0xf;
 404                 }
 405                 else
 406                 {
 407                         if ((value&0xf) > Gpwrdelta)
 408                                 t1 = (value&0xf)-(Gpwrdelta);
 409                         else
 410                                 t1 = 0;
 411                         if (((value&0xf0)>>4) > Gpwrdelta)
 412                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 413                         else
 414                                 t2 = 0;
 415                         if (((value&0xf00)>>8) > Gpwrdelta)
 416                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 417                         else
 418                                 t3 = 0;
 419                         if (((value&0xf000)>>12) > Gpwrdelta)
 420                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 421                         else
 422                                 t4 = 0;
 423                 }
 424                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 425                 data |= (value<<16);
 426
 427                 /* For 20M/40M Power Delta issue */
 428                 pAd->Tx20MPwrCfgABand[i] = data;
 429                 pAd->Tx20MPwrCfgGBand[i] = data;
 430                 pAd->Tx40MPwrCfgABand[i] = Adata;
 431                 pAd->Tx40MPwrCfgGBand[i] = Gdata;
 432
 433                 if (data != 0xffffffff)
 434                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 435                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 436         }
 437 }
 438
 439
 440 /*
 441         ========================================================================
 442
 443         Routine Description:
 444                 Read initial channel power parameters from EEPROM
 445
 446         Arguments:
 447                 Adapter                                         Pointer to our adapter
 448
 449         Return Value:
 450                 None
 451
 452         IRQL = PASSIVE_LEVEL
 453
 454         Note:
 455
 456         ========================================================================
 457 */
 458 VOID    RTMPReadChannelPwr(
 459         IN      PRTMP_ADAPTER   pAd)
 460 {
 461         UCHAR                           i, choffset;
 462         EEPROM_TX_PWR_STRUC         Power;
 463         EEPROM_TX_PWR_STRUC         Power2;
 464
 465         // Read Tx power value for all channels
 466         // Value from 1 - 0x7f. Default value is 24.
 467         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 468         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 469
 470         // 0. 11b/g, ch1 - ch 14
 471         for (i = 0; i < 7; i++)
 472         {
 473                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 474                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 475                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 476                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 477
 478                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 479                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 480                 else
 481                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 482
 483                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 484                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 485                 else
 486                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 487
 488                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 489                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 490                 else
 491                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 492
 493                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 494                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 495                 else
 496                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 497         }
 498
 499         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 500         // 1.1 Fill up channel
 501         choffset = 14;
 502         for (i = 0; i < 4; i++)
 503         {
 504                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 505                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 506                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 507
 508                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 509                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 510                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 511
 512                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 513                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 514                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 515         }
 516
 517         // 1.2 Fill up power
 518         for (i = 0; i < 6; i++)
 519         {
 520                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 521                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 522
 523                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 524                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 525
 526                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 527                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 528
 529                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 530                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 531
 532                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 533                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 534         }
 535
 536         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 537         // 2.1 Fill up channel
 538         choffset = 14 + 12;
 539         for (i = 0; i < 5; i++)
 540         {
 541                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 542                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 543                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 544
 545                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 546                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 547                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 548
 549                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 550                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 551                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 552         }
 553         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 554         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 555         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 556
 557         // 2.2 Fill up power
 558         for (i = 0; i < 8; i++)
 559         {
 560                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 561                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 562
 563                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 564                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 565
 566                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 567                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 568
 569                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 570                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 571
 572                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 573                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 574         }
 575
 576         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165, 167, 169; 171, 173 (including central frequency in BW 40MHz)
 577         // 3.1 Fill up channel
 578         choffset = 14 + 12 + 16;
 579         /*for (i = 0; i < 2; i++)*/
 580         for (i = 0; i < 3; i++)
 581         {
 582                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
 583                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 584                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 585
 586                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
 587                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 588                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 589
 590                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
 591                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 592                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 593         }
 594         pAd->TxPower[3 * 3 + choffset + 0].Channel              = 171;
 595         pAd->TxPower[3 * 3 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 596         pAd->TxPower[3 * 3 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 597
 598         pAd->TxPower[3 * 3 + choffset + 1].Channel              = 173;
 599         pAd->TxPower[3 * 3 + choffset + 1].Power                = DEFAULT_RF_TX_POWER;
 600         pAd->TxPower[3 * 3 + choffset + 1].Power2               = DEFAULT_RF_TX_POWER;
 601
 602         // 3.2 Fill up power
 603         /*for (i = 0; i < 4; i++)*/
 604         for (i = 0; i < 6; i++)
 605         {
 606                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 607                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 608
 609                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 610                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 611
 612                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 613                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 614
 615                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 616                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 617
 618                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 619                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 620         }
 621
 622         // 4. Print and Debug
 623         /*choffset = 14 + 12 + 16 + 7;*/
 624         choffset = 14 + 12 + 16 + 11;
 625
 626
 627 }
 628
 629 /*
 630         ========================================================================
 631
 632         Routine Description:
 633                 Read the following from the registry
 634                 1. All the parameters
 635                 2. NetworkAddres
 636
 637         Arguments:
 638                 Adapter                                         Pointer to our adapter
 639                 WrapperConfigurationContext     For use by NdisOpenConfiguration
 640
 641         Return Value:
 642                 NDIS_STATUS_SUCCESS
 643                 NDIS_STATUS_FAILURE
 644                 NDIS_STATUS_RESOURCES
 645
 646         IRQL = PASSIVE_LEVEL
 647
 648         Note:
 649
 650         ========================================================================
 651 */
 652 NDIS_STATUS     NICReadRegParameters(
 653         IN      PRTMP_ADAPTER           pAd,
 654         IN      NDIS_HANDLE                     WrapperConfigurationContext
 655         )
 656 {
 657         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
 658         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
 659         return Status;
 660 }
 661
 662
 663 /*
 664         ========================================================================
 665
 666         Routine Description:
 667                 Read initial parameters from EEPROM
 668
 669         Arguments:
 670                 Adapter                                         Pointer to our adapter
 671
 672         Return Value:
 673                 None
 674
 675         IRQL = PASSIVE_LEVEL
 676
 677         Note:
 678
 679         ========================================================================
 680 */
 681 VOID    NICReadEEPROMParameters(
 682         IN      PRTMP_ADAPTER   pAd,
 683         IN      PUCHAR                  mac_addr)
 684 {
 685         UINT32                  data = 0;
 686         USHORT                  i, value, value2;
 687         UCHAR                   TmpPhy;
 688         EEPROM_TX_PWR_STRUC         Power;
 689         EEPROM_VERSION_STRUC    Version;
 690         EEPROM_ANTENNA_STRUC    Antenna;
 691         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
 692
 693         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
 694
 695         if (pAd->chipOps.eeinit)
 696                 pAd->chipOps.eeinit(pAd);
 697
 698         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
 699         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
 700         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
 701
 702         if((data & 0x30) == 0)
 703                 pAd->EEPROMAddressNum = 6;              // 93C46
 704         else if((data & 0x30) == 0x10)
 705                 pAd->EEPROMAddressNum = 8;     // 93C66
 706         else
 707                 pAd->EEPROMAddressNum = 8;     // 93C86
 708         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
 709
 710         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
 711         // MAC address registers according to E2PROM setting
 712         if (mac_addr == NULL ||
 713                 strlen((PSTRING) mac_addr) != 17 ||
 714                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
 715                 mac_addr[11] != ':' || mac_addr[14] != ':')
 716         {
 717                 USHORT  Addr01,Addr23,Addr45 ;
 718
 719                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
 720                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
 721                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
 722
 723                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
 724                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
 725                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
 726                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
 727                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
 728                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
 729
 730                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
 731         }
 732         else
 733         {
 734                 INT             j;
 735                 PSTRING macptr;
 736
 737                 macptr = (PSTRING) mac_addr;
 738
 739                 for (j=0; j<MAC_ADDR_LEN; j++)
 740                 {
 741                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
 742                         macptr=macptr+3;
 743                 }
 744
 745                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
 746         }
 747
 748
 749         {
 750                 //more conveninet to test mbssid, so ap's bssid &0xf1
 751                 if (pAd->PermanentAddress[0] == 0xff)
 752                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
 753
 754                 //if (pAd->PermanentAddress[5] == 0xff)
 755                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
 756
 757                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
 758                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
 759                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
 760                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
 761                 if (pAd->bLocalAdminMAC == FALSE)
 762                 {
 763                         MAC_DW0_STRUC csr2;
 764                         MAC_DW1_STRUC csr3;
 765                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
 766                         csr2.field.Byte0 = pAd->CurrentAddress[0];
 767                         csr2.field.Byte1 = pAd->CurrentAddress[1];
 768                         csr2.field.Byte2 = pAd->CurrentAddress[2];
 769                         csr2.field.Byte3 = pAd->CurrentAddress[3];
 770                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
 771                         csr3.word = 0;
 772                         csr3.field.Byte4 = pAd->CurrentAddress[4];
 773                         csr3.field.Byte5 = pAd->CurrentAddress[5];
 774                         csr3.field.U2MeMask = 0xff;
 775                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
 776                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
 777                                                         PRINT_MAC(pAd->PermanentAddress)));
 778                 }
 779         }
 780
 781         // if not return early. cause fail at emulation.
 782         // Init the channel number for TX channel power
 783         RTMPReadChannelPwr(pAd);
 784
 785         // if E2PROM version mismatch with driver's expectation, then skip
 786         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
 787         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
 788         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
 789         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
 790
 791         if (Version.field.Version > VALID_EEPROM_VERSION)
 792         {
 793                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
 794                 /*pAd->SystemErrorBitmap |= 0x00000001;
 795
 796                 // hard-code default value when no proper E2PROM installed
 797                 pAd->bAutoTxAgcA = FALSE;
 798                 pAd->bAutoTxAgcG = FALSE;
 799
 800                 // Default the channel power
 801                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
 802                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
 803
 804                 // Default the channel power
 805                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
 806                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
 807
 808                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
 809                         pAd->EEPROMDefaultValue[i] = 0xffff;
 810                 return;  */
 811         }
 812
 813         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
 814         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
 815         pAd->EEPROMDefaultValue[0] = value;
 816
 817         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
 818         pAd->EEPROMDefaultValue[1] = value;
 819
 820         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
 821         pAd->EEPROMDefaultValue[2] = value;
 822
 823         for(i = 0; i < 8; i++)
 824         {
 825                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
 826                 pAd->EEPROMDefaultValue[i+3] = value;
 827         }
 828
 829         // We have to parse NIC configuration 0 at here.
 830         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
 831         // Therefore, we have to read TxAutoAgc control beforehand.
 832         // Read Tx AGC control bit
 833         Antenna.word = pAd->EEPROMDefaultValue[0];
 834         if (Antenna.word == 0xFFFF)
 835         {
 836 #ifdef RT30xx
 837                 if(IS_RT3090(pAd)|| IS_RT3390(pAd))
 838                 {
 839                         Antenna.word = 0;
 840                         Antenna.field.RfIcType = RFIC_3020;
 841                         Antenna.field.TxPath = 1;
 842                         Antenna.field.RxPath = 1;
 843                 }
 844                 else
 845 #endif // RT30xx //
 846                 {
 847
 848                 Antenna.word = 0;
 849                 Antenna.field.RfIcType = RFIC_2820;
 850                 Antenna.field.TxPath = 1;
 851                 Antenna.field.RxPath = 2;
 852                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
 853                 }
 854         }
 855
 856         // Choose the desired Tx&Rx stream.
 857         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
 858                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
 859
 860         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
 861         {
 862                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
 863
 864                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
 865                         (pAd->CommonCfg.RxStream > 2))
 866                 {
 867                         // only 2 Rx streams for RT2860 series
 868                         pAd->CommonCfg.RxStream = 2;
 869                 }
 870         }
 871
 872         // 3*3
 873         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
 874         // yet implement
 875         for(i=0; i<3; i++)
 876         {
 877         }
 878
 879         NicConfig2.word = pAd->EEPROMDefaultValue[1];
 880
 881         {
 882                 if ((NicConfig2.word & 0x00ff) == 0xff)
 883                 {
 884                         NicConfig2.word &= 0xff00;
 885                 }
 886
 887                 if ((NicConfig2.word >> 8) == 0xff)
 888                 {
 889                         NicConfig2.word &= 0x00ff;
 890                 }
 891         }
 892
 893         if (NicConfig2.field.DynamicTxAgcControl == 1)
 894                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
 895         else
 896                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
 897
 898         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
 899
 900         // Save the antenna for future use
 901         pAd->Antenna.word = Antenna.word;
 902
 903         // Set the RfICType here, then we can initialize RFIC related operation callbacks
 904         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
 905         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
 906
 907 #ifdef RTMP_RF_RW_SUPPORT
 908         RtmpChipOpsRFHook(pAd);
 909 #endif // RTMP_RF_RW_SUPPORT //
 910
 911 #ifdef RTMP_MAC_PCI
 912                 sprintf((PSTRING) pAd->nickname, "RT2860STA");
 913 #endif // RTMP_MAC_PCI //
 914
 915
 916         //
 917         // Reset PhyMode if we don't support 802.11a
 918         // Only RFIC_2850 & RFIC_2750 support 802.11a
 919         //
 920         if ((Antenna.field.RfIcType != RFIC_2850)
 921                 && (Antenna.field.RfIcType != RFIC_2750)
 922                 && (Antenna.field.RfIcType != RFIC_3052))
 923         {
 924                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
 925                         (pAd->CommonCfg.PhyMode == PHY_11A))
 926                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
 927                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
 928                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
 929                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
 930                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
 931                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
 932         }
 933
 934         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
 935         // 0. 11b/g
 936         {
 937                 /* these are tempature reference value (0x00 ~ 0xFE)
 938                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
 939                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
 940                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
 941                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
 942                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
 943                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
 944                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
 945                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
 946                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
 947                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
 948                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
 949                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
 950                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
 951                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
 952                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
 953                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
 954                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
 955                 pAd->TxAgcStepG = Power.field.Byte1;
 956                 pAd->TxAgcCompensateG = 0;
 957                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
 958                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
 959
 960                 // Disable TxAgc if the based value is not right
 961                 if (pAd->TssiRefG == 0xff)
 962                         pAd->bAutoTxAgcG = FALSE;
 963
 964                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
 965                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
 966                         pAd->TssiRefG,
 967                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
 968                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
 969         }
 970         // 1. 11a
 971         {
 972                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
 973                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
 974                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
 975                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
 976                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
 977                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
 978                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
 979                 pAd->TssiRefA   = Power.field.Byte0;
 980                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
 981                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
 982                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
 983                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
 984                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
 985                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
 986                 pAd->TxAgcStepA = Power.field.Byte1;
 987                 pAd->TxAgcCompensateA = 0;
 988                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
 989                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
 990
 991                 // Disable TxAgc if the based value is not right
 992                 if (pAd->TssiRefA == 0xff)
 993                         pAd->bAutoTxAgcA = FALSE;
 994
 995                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
 996                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
 997                         pAd->TssiRefA,
 998                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
 999                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1000         }
1001         pAd->BbpRssiToDbmDelta = 0x0;
1002
1003         // Read frequency offset setting for RF
1004         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1005         if ((value & 0x00FF) != 0x00FF)
1006                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1007         else
1008                 pAd->RfFreqOffset = 0;
1009         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1010
1011         //CountryRegion byte offset (38h)
1012         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1013         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1014
1015         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1016         {
1017                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1018                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1019                 TmpPhy = pAd->CommonCfg.PhyMode;
1020                 pAd->CommonCfg.PhyMode = 0xff;
1021                 RTMPSetPhyMode(pAd, TmpPhy);
1022                 SetCommonHT(pAd);
1023         }
1024
1025         //
1026         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1027         // The valid value are (-10 ~ 10)
1028         //
1029         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1030         pAd->BGRssiOffset0 = value & 0x00ff;
1031         pAd->BGRssiOffset1 = (value >> 8);
1032         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1033         pAd->BGRssiOffset2 = value & 0x00ff;
1034         pAd->ALNAGain1 = (value >> 8);
1035         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1036         pAd->BLNAGain = value & 0x00ff;
1037         pAd->ALNAGain0 = (value >> 8);
1038
1039         // Validate 11b/g RSSI_0 offset.
1040         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1041                 pAd->BGRssiOffset0 = 0;
1042
1043         // Validate 11b/g RSSI_1 offset.
1044         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1045                 pAd->BGRssiOffset1 = 0;
1046
1047         // Validate 11b/g RSSI_2 offset.
1048         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1049                 pAd->BGRssiOffset2 = 0;
1050
1051         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1052         pAd->ARssiOffset0 = value & 0x00ff;
1053         pAd->ARssiOffset1 = (value >> 8);
1054         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1055         pAd->ARssiOffset2 = value & 0x00ff;
1056         pAd->ALNAGain2 = (value >> 8);
1057
1058         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1059                 pAd->ALNAGain1 = pAd->ALNAGain0;
1060         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1061                 pAd->ALNAGain2 = pAd->ALNAGain0;
1062
1063         // Validate 11a RSSI_0 offset.
1064         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1065                 pAd->ARssiOffset0 = 0;
1066
1067         // Validate 11a RSSI_1 offset.
1068         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1069                 pAd->ARssiOffset1 = 0;
1070
1071         //Validate 11a RSSI_2 offset.
1072         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1073                 pAd->ARssiOffset2 = 0;
1074
1075 #ifdef RT30xx
1076         //
1077         // Get TX mixer gain setting
1078         // 0xff are invalid value
1079         // Note: RT30xX default value is 0x00 and will program to RF_R17 only when this value is not zero.
1080         //       RT359X default value is 0x02
1081         //
1082         if (IS_RT30xx(pAd) || IS_RT3572(pAd))
1083         {
1084                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXMIXER_GAIN_2_4G, value);
1085                 pAd->TxMixerGain24G = 0;
1086                 value &= 0x00ff;
1087                 if (value != 0xff)
1088                 {
1089                         value &= 0x07;
1090                         pAd->TxMixerGain24G = (UCHAR)value;
1091                 }
1092         }
1093 #endif // RT30xx //
1094
1095         //
1096         // Get LED Setting.
1097         //
1098         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1099         pAd->LedCntl.word = (value>>8);
1100         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1101         pAd->Led1 = value;
1102         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1103         pAd->Led2 = value;
1104         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1105         pAd->Led3 = value;
1106
1107         RTMPReadTxPwrPerRate(pAd);
1108
1109 #ifdef RT30xx
1110 #ifdef RTMP_EFUSE_SUPPORT
1111         RtmpEfuseSupportCheck(pAd);
1112 #endif // RTMP_EFUSE_SUPPORT //
1113 #endif // RT30xx //
1114
1115         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1116 }
1117
1118 /*
1119         ========================================================================
1120
1121         Routine Description:
1122                 Set default value from EEPROM
1123
1124         Arguments:
1125                 Adapter                                         Pointer to our adapter
1126
1127         Return Value:
1128                 None
1129
1130         IRQL = PASSIVE_LEVEL
1131
1132         Note:
1133
1134         ========================================================================
1135 */
1136 VOID    NICInitAsicFromEEPROM(
1137         IN      PRTMP_ADAPTER   pAd)
1138 {
1139         UINT32                                  data = 0;
1140         UCHAR   BBPR1 = 0;
1141         USHORT                                  i;
1142 //      EEPROM_ANTENNA_STRUC    Antenna;
1143         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1144         UCHAR   BBPR3 = 0;
1145
1146         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1147         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1148         {
1149                 UCHAR BbpRegIdx, BbpValue;
1150
1151                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1152                 {
1153                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1154                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1155                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1156                 }
1157         }
1158
1159
1160         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1161
1162         {
1163                 if ((NicConfig2.word & 0x00ff) == 0xff)
1164                 {
1165                         NicConfig2.word &= 0xff00;
1166                 }
1167
1168                 if ((NicConfig2.word >> 8) == 0xff)
1169                 {
1170                         NicConfig2.word &= 0x00ff;
1171                 }
1172         }
1173
1174         // Save the antenna for future use
1175         pAd->NicConfig2.word = NicConfig2.word;
1176
1177 #ifdef RT30xx
1178         // set default antenna as main
1179         if (pAd->RfIcType == RFIC_3020)
1180                 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1181 #endif // RT30xx //
1182
1183         //
1184         // Send LED Setting to MCU.
1185         //
1186         if (pAd->LedCntl.word == 0xFF)
1187         {
1188                 pAd->LedCntl.word = 0x01;
1189                 pAd->Led1 = 0x5555;
1190                 pAd->Led2 = 0x2221;
1191
1192 #ifdef RTMP_MAC_PCI
1193                 pAd->Led3 = 0xA9F8;
1194 #endif // RTMP_MAC_PCI //
1195 #ifdef RTMP_MAC_USB
1196                 pAd->Led3 = 0x5627;
1197 #endif // RTMP_MAC_USB //
1198         }
1199
1200         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1201         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1202         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1203         AsicSendCommandToMcu(pAd, 0x51, 0xff, 0, pAd->LedCntl.field.Polarity);
1204
1205         pAd->LedIndicatorStrength = 0xFF;
1206     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1207
1208         {
1209                 // Read Hardware controlled Radio state enable bit
1210                 if (NicConfig2.field.HardwareRadioControl == 1)
1211                 {
1212                         pAd->StaCfg.bHardwareRadio = TRUE;
1213
1214                         // Read GPIO pin2 as Hardware controlled radio state
1215                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1216                         if ((data & 0x04) == 0)
1217                         {
1218                                 pAd->StaCfg.bHwRadio = FALSE;
1219                                 pAd->StaCfg.bRadio = FALSE;
1220 //                              RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1221                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1222                         }
1223                 }
1224                 else
1225                         pAd->StaCfg.bHardwareRadio = FALSE;
1226
1227                 if (pAd->StaCfg.bRadio == FALSE)
1228                 {
1229                         RTMPSetLED(pAd, LED_RADIO_OFF);
1230                 }
1231                 else
1232                 {
1233                         RTMPSetLED(pAd, LED_RADIO_ON);
1234 #ifdef RTMP_MAC_PCI
1235 #ifdef RT3090
1236                         AsicSendCommandToMcu(pAd, 0x30, PowerRadioOffCID, 0xff, 0x02);
1237                         AsicCheckCommanOk(pAd, PowerRadioOffCID);
1238 #endif // RT3090 //
1239 #ifndef RT3090
1240                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1241 #endif // RT3090 //
1242                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1243                         // 2-1. wait command ok.
1244                         AsicCheckCommanOk(pAd, PowerWakeCID);
1245 #endif // RTMP_MAC_PCI //
1246                 }
1247         }
1248
1249 #ifdef RTMP_MAC_PCI
1250 #ifdef RT30xx
1251                 if (IS_RT3090(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd))
1252                 {
1253                         RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
1254                         if (pChipOps->AsicReverseRfFromSleepMode)
1255                                 pChipOps->AsicReverseRfFromSleepMode(pAd);
1256                 }
1257                 // 3090 MCU Wakeup command needs more time to be stable.
1258                 // Before stable, don't issue other MCU command to prevent from firmware error.
1259
1260                 if ((IS_RT3090(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd)) && IS_VERSION_AFTER_F(pAd)
1261                         && (pAd->StaCfg.PSControl.field.rt30xxPowerMode == 3)
1262                         && (pAd->StaCfg.PSControl.field.EnableNewPS == TRUE))
1263                 {
1264                         DBGPRINT(RT_DEBUG_TRACE,("%s::%d,release Mcu Lock\n",__FUNCTION__,__LINE__));
1265                         RTMP_SEM_LOCK(&pAd->McuCmdLock);
1266                         pAd->brt30xxBanMcuCmd = FALSE;
1267                         RTMP_SEM_UNLOCK(&pAd->McuCmdLock);
1268                 }
1269 #endif // RT30xx //
1270 #endif // RTMP_MAC_PCI //
1271
1272         // Turn off patching for cardbus controller
1273         if (NicConfig2.field.CardbusAcceleration == 1)
1274         {
1275 //              pAd->bTest1 = TRUE;
1276         }
1277
1278         if (NicConfig2.field.DynamicTxAgcControl == 1)
1279                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1280         else
1281                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1282         //
1283         // Since BBP has been progamed, to make sure BBP setting will be
1284         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1285         //
1286         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1287
1288         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1289         BBPR3 &= (~0x18);
1290         if(pAd->Antenna.field.RxPath == 3)
1291         {
1292                 BBPR3 |= (0x10);
1293         }
1294         else if(pAd->Antenna.field.RxPath == 2)
1295         {
1296                 BBPR3 |= (0x8);
1297         }
1298         else if(pAd->Antenna.field.RxPath == 1)
1299         {
1300                 BBPR3 |= (0x0);
1301         }
1302         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1303
1304         {
1305                 // Handle the difference when 1T
1306                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1307                 if(pAd->Antenna.field.TxPath == 1)
1308                 {
1309                 BBPR1 &= (~0x18);
1310                 }
1311                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1312
1313                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n",
1314                                         pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1315         }
1316
1317 #ifdef RTMP_MAC_USB
1318 #ifdef RT30xx
1319         // update registers from EEPROM for RT3071 or later(3572/3592).
1320
1321         if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
1322         {
1323                 UCHAR RegIdx, RegValue;
1324                 USHORT value;
1325
1326                 // after RT3071, write BBP from EEPROM 0xF0 to 0x102
1327                 for (i = 0xF0; i <= 0x102; i = i+2)
1328                 {
1329                         value = 0xFFFF;
1330                         RT28xx_EEPROM_READ16(pAd, i, value);
1331                         if ((value != 0xFFFF) && (value != 0))
1332                         {
1333                                 RegIdx = (UCHAR)(value >> 8);
1334                                 RegValue  = (UCHAR)(value & 0xff);
1335                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, RegIdx, RegValue);
1336                                 DBGPRINT(RT_DEBUG_TRACE, ("Update BBP Registers from EEPROM(0x%0x), BBP(0x%x) = 0x%x\n", i, RegIdx, RegValue));
1337                         }
1338                 }
1339
1340                 // after RT3071, write RF from EEPROM 0x104 to 0x116
1341                 for (i = 0x104; i <= 0x116; i = i+2)
1342                 {
1343                         value = 0xFFFF;
1344                         RT28xx_EEPROM_READ16(pAd, i, value);
1345                         if ((value != 0xFFFF) && (value != 0))
1346                         {
1347                                 RegIdx = (UCHAR)(value >> 8);
1348                                 RegValue  = (UCHAR)(value & 0xff);
1349                                 RT30xxWriteRFRegister(pAd, RegIdx, RegValue);
1350                                 DBGPRINT(RT_DEBUG_TRACE, ("Update RF Registers from EEPROM0x%x), BBP(0x%x) = 0x%x\n", i, RegIdx, RegValue));
1351                         }
1352                 }
1353         }
1354 #endif // RT30xx //
1355 #endif // RTMP_MAC_USB //
1356
1357         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n",
1358                                 pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath,
1359                                 pAd->RfIcType, pAd->LedCntl.word));
1360         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1361 }
1362
1363 /*
1364         ========================================================================
1365
1366         Routine Description:
1367                 Initialize NIC hardware
1368
1369         Arguments:
1370                 Adapter                                         Pointer to our adapter
1371
1372         Return Value:
1373                 None
1374
1375         IRQL = PASSIVE_LEVEL
1376
1377         Note:
1378
1379         ========================================================================
1380 */
1381 NDIS_STATUS     NICInitializeAdapter(
1382         IN      PRTMP_ADAPTER   pAd,
1383         IN   BOOLEAN    bHardReset)
1384 {
1385         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1386         WPDMA_GLO_CFG_STRUC     GloCfg;
1387 #ifdef RTMP_MAC_PCI
1388         UINT32                  Value;
1389         DELAY_INT_CFG_STRUC     IntCfg;
1390 #endif // RTMP_MAC_PCI //
1391 //      INT_MASK_CSR_STRUC              IntMask;
1392         ULONG   i =0, j=0;
1393         AC_TXOP_CSR0_STRUC      csr0;
1394
1395         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1396
1397         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1398 retry:
1399         i = 0;
1400         do
1401         {
1402                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1403                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1404                         break;
1405
1406                 RTMPusecDelay(1000);
1407                 i++;
1408         }while ( i<100);
1409         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1410         GloCfg.word &= 0xff0;
1411         GloCfg.field.EnTXWriteBackDDONE =1;
1412         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1413
1414         // Record HW Beacon offset
1415         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1416         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1417         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1418         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1419         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1420         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1421         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1422         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1423
1424         //
1425         // write all shared Ring's base address into ASIC
1426         //
1427
1428         // asic simulation sequence put this ahead before loading firmware.
1429         // pbf hardware reset
1430 #ifdef RTMP_MAC_PCI
1431         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1432         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1433         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1434 #endif // RTMP_MAC_PCI //
1435
1436         // Initialze ASIC for TX & Rx operation
1437         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1438         {
1439                 if (j++ == 0)
1440                 {
1441                         NICLoadFirmware(pAd);
1442                         goto retry;
1443                 }
1444                 return NDIS_STATUS_FAILURE;
1445         }
1446
1447
1448 #ifdef RTMP_MAC_PCI
1449         // Write AC_BK base address register
1450         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1451         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1452         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1453
1454         // Write AC_BE base address register
1455         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1456         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1457         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1458
1459         // Write AC_VI base address register
1460         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1461         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1462         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1463
1464         // Write AC_VO base address register
1465         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1466         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1467         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1468
1469         // Write MGMT_BASE_CSR register
1470         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1471         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1472         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1473
1474         // Write RX_BASE_CSR register
1475         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1476         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1477         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1478
1479         // Init RX Ring index pointer
1480         pAd->RxRing.RxSwReadIdx = 0;
1481         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1482         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1483
1484         // Init TX rings index pointer
1485         {
1486                 for (i=0; i<NUM_OF_TX_RING; i++)
1487                 {
1488                         pAd->TxRing[i].TxSwFreeIdx = 0;
1489                         pAd->TxRing[i].TxCpuIdx = 0;
1490                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
1491                 }
1492         }
1493
1494         // init MGMT ring index pointer
1495         pAd->MgmtRing.TxSwFreeIdx = 0;
1496         pAd->MgmtRing.TxCpuIdx = 0;
1497         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
1498
1499         //
1500         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
1501         //
1502
1503         // Write TX_RING_CSR0 register
1504         Value = TX_RING_SIZE;
1505         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1506         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1507         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1508         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1509         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1510         Value = MGMT_RING_SIZE;
1511         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1512
1513         // Write RX_RING_CSR register
1514         Value = RX_RING_SIZE;
1515         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1516 #endif // RTMP_MAC_PCI //
1517
1518
1519         // WMM parameter
1520         csr0.word = 0;
1521         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1522         if (pAd->CommonCfg.PhyMode == PHY_11B)
1523         {
1524                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
1525                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
1526         }
1527         else
1528         {
1529                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
1530                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
1531         }
1532         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1533
1534
1535 #ifdef RTMP_MAC_PCI
1536         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1537         i = 0;
1538         do
1539         {
1540                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1541                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1542                         break;
1543
1544                 RTMPusecDelay(1000);
1545                 i++;
1546         }while ( i < 100);
1547
1548         GloCfg.word &= 0xff0;
1549         GloCfg.field.EnTXWriteBackDDONE =1;
1550         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1551
1552         IntCfg.word = 0;
1553         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1554 #endif // RTMP_MAC_PCI //
1555
1556
1557         // reset action
1558         // Load firmware
1559         //  Status = NICLoadFirmware(pAd);
1560
1561         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1562         return Status;
1563 }
1564
1565 /*
1566         ========================================================================
1567
1568         Routine Description:
1569                 Initialize ASIC
1570
1571         Arguments:
1572                 Adapter                                         Pointer to our adapter
1573
1574         Return Value:
1575                 None
1576
1577         IRQL = PASSIVE_LEVEL
1578
1579         Note:
1580
1581         ========================================================================
1582 */
1583 NDIS_STATUS     NICInitializeAsic(
1584         IN      PRTMP_ADAPTER   pAd,
1585         IN  BOOLEAN             bHardReset)
1586 {
1587         ULONG                   Index = 0;
1588         UCHAR                   R0 = 0xff;
1589         UINT32                  MacCsr12 = 0, Counter = 0;
1590 #ifdef RTMP_MAC_USB
1591         UINT32                  MacCsr0 = 0;
1592         NTSTATUS                Status;
1593         UCHAR                   Value = 0xff;
1594 #endif // RTMP_MAC_USB //
1595 #ifdef RT30xx
1596         UCHAR                   bbpreg=0;
1597         UCHAR                   RFValue=0;
1598 #endif // RT30xx //
1599         USHORT                  KeyIdx;
1600         INT                             i,apidx;
1601
1602         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1603
1604 #ifdef RTMP_MAC_PCI
1605         RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x3); // To fix driver disable/enable hang issue when radio off
1606         if (bHardReset == TRUE)
1607         {
1608                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1609         }
1610         else
1611                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1612
1613         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1614         // Initialize MAC register to default value
1615         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1616         {
1617                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1618         }
1619
1620         {
1621                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1622                 {
1623                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1624                 }
1625         }
1626 #endif // RTMP_MAC_PCI //
1627 #ifdef RTMP_MAC_USB
1628         //
1629         // Make sure MAC gets ready after NICLoadFirmware().
1630         //
1631         Index = 0;
1632
1633         //To avoid hang-on issue when interface up in kernel 2.4,
1634         //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
1635         do
1636         {
1637                 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
1638
1639                 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
1640                         break;
1641
1642                 RTMPusecDelay(10);
1643         } while (Index++ < 100);
1644
1645         pAd->MACVersion = MacCsr0;
1646         DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
1647         // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
1648         RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
1649         MacCsr12 &= (~0x2000);
1650         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
1651
1652         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1653         RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
1654         Status = RTUSBVenderReset(pAd);
1655
1656         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1657
1658         // Initialize MAC register to default value
1659         for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
1660         {
1661 #ifdef RT30xx
1662                 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd) || IS_RT3090(pAd) ||  IS_RT3390(pAd)))
1663                 {
1664                         MACRegTable[Index].Value = 0x00000400;
1665                 }
1666 #endif // RT30xx //
1667                 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
1668         }
1669
1670         {
1671                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1672                 {
1673                         RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1674                 }
1675         }
1676 #endif // RTMP_MAC_USB //
1677
1678 #ifdef RT30xx
1679         // Initialize RT3070 serial MAC registers which is different from RT2870 serial
1680         if (IS_RT3090(pAd) || IS_RT3572(pAd)||IS_RT3390(pAd))
1681         {
1682                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1683
1684                 // RT3071 version E has fixed this issue
1685                 if ((pAd->MACVersion & 0xffff) < 0x0211)
1686                 {
1687                         if (pAd->NicConfig2.field.DACTestBit == 1)
1688                         {
1689                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); // To fix throughput drop drastically
1690                         }
1691                         else
1692                         {
1693                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
1694                         }
1695                 }
1696                 else
1697                 {
1698                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
1699                 }
1700         }
1701         else if (IS_RT3070(pAd))
1702         {
1703                 if (((pAd->MACVersion & 0xffff) < 0x0201))
1704                 {
1705                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1706                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); // To fix throughput drop drastically
1707                 }
1708                 else
1709                 {
1710                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0);
1711                 }
1712         }
1713 #endif // RT30xx //
1714
1715         //
1716         // Before program BBP, we need to wait BBP/RF get wake up.
1717         //
1718         Index = 0;
1719         do
1720         {
1721                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1722
1723                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
1724                         break;
1725
1726                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
1727                 RTMPusecDelay(1000);
1728         } while (Index++ < 100);
1729
1730     // The commands to firmware should be after these commands, these commands will init firmware
1731         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1732         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1733         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1734 #ifdef RT3090
1735         //2008/11/28:KH add to fix the dead rf frequency offset bug<--
1736         AsicSendCommandToMcu(pAd, 0x72, 0, 0, 0);
1737         //2008/11/28:KH add to fix the dead rf frequency offset bug-->
1738 #endif // RT3090 //
1739         RTMPusecDelay(1000);
1740
1741         // Read BBP register, make sure BBP is up and running before write new data
1742         Index = 0;
1743         do
1744         {
1745                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1746                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1747         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1748         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1749
1750         if ((R0 == 0xff) || (R0 == 0x00))
1751                 return NDIS_STATUS_FAILURE;
1752
1753         // Initialize BBP register to default value
1754         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1755         {
1756                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1757         }
1758
1759 #ifdef RTMP_MAC_PCI
1760         // TODO: shiang, check MACVersion, currently, rbus-based chip use this.
1761         if (pAd->MACVersion == 0x28720200)
1762         {
1763                 //UCHAR value;
1764                 ULONG value2;
1765
1766                 //disable MLD by Bruce 20080704
1767                 //BBP_IO_READ8_BY_REG_ID(pAd, BBP_R105, &value);
1768                 //BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, value | 4);
1769
1770                 //Maximum PSDU length from 16K to 32K bytes
1771                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &value2);
1772                 value2 &= ~(0x3<<12);
1773                 value2 |= (0x2<<12);
1774                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, value2);
1775         }
1776 #endif // RTMP_MAC_PCI //
1777
1778         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1779         // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
1780         //3070/71/72,3090,3090A( are included in RT30xx),3572,3390
1781         if (((pAd->MACVersion & 0xffff) != 0x0101) && !(IS_RT30xx(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd)))
1782                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1783
1784 #ifdef RT30xx
1785 // add by johnli, RF power sequence setup
1786         if (IS_RT30xx(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
1787         {       //update for RT3070/71/72/90/91/92,3572,3390.
1788                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
1789                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
1790                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
1791         }
1792
1793         if (IS_RT3090(pAd)||IS_RT3390(pAd))     // RT309x, RT3071/72
1794         {
1795                 // enable DC filter
1796                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
1797                 {
1798                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1799                 }
1800
1801                 // improve power consumption
1802                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
1803                 if (pAd->Antenna.field.TxPath == 1)
1804                 {
1805                         // turn off tx DAC_1
1806                         bbpreg = (bbpreg | 0x20);
1807                 }
1808
1809                 if (pAd->Antenna.field.RxPath == 1)
1810                 {
1811                         // turn off tx ADC_1
1812                         bbpreg &= (~0x2);
1813                 }
1814                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
1815
1816                 // improve power consumption in RT3071 Ver.E
1817                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
1818                 {
1819                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1820                         bbpreg &= (~0x3);
1821                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1822                 }
1823         }
1824         else if (IS_RT3070(pAd))
1825         {
1826                 if ((pAd->MACVersion & 0xffff) >= 0x0201)
1827                 {
1828                         // enable DC filter
1829                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1830
1831                         // improve power consumption in RT3070 Ver.F
1832                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1833                         bbpreg &= (~0x3);
1834                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1835                 }
1836
1837                 // TX_LO1_en, RF R17 register Bit 3 to 0
1838                 RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
1839                 RFValue &= (~0x08);
1840                 // to fix rx long range issue
1841                 if (pAd->NicConfig2.field.ExternalLNAForG == 0)
1842                 {
1843                         RFValue |= 0x20;
1844                 }
1845                 // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h
1846                 if (pAd->TxMixerGain24G >= 1)
1847                 {
1848                         RFValue &= (~0x7);  // clean bit [2:0]
1849                         RFValue |= pAd->TxMixerGain24G;
1850                 }
1851                 RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
1852         }
1853 // end johnli
1854 #endif // RT30xx //
1855
1856         if (pAd->MACVersion == 0x28600100)
1857         {
1858                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1859                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1860     }
1861
1862         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1863         {
1864                 // enlarge MAX_LEN_CFG
1865                 UINT32 csr;
1866                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1867                 csr &= 0xFFF;
1868                 csr |= 0x2000;
1869                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1870         }
1871
1872 #ifdef RTMP_MAC_USB
1873 {
1874         UCHAR   MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
1875
1876         //Initialize WCID table
1877         Value = 0xff;
1878         for(Index =0 ;Index < 254;Index++)
1879         {
1880                 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
1881         }
1882 }
1883 #endif // RTMP_MAC_USB //
1884
1885         // Add radio off control
1886         {
1887                 if (pAd->StaCfg.bRadio == FALSE)
1888                 {
1889 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1890                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1891                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1892                 }
1893         }
1894
1895         // Clear raw counters
1896         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1897         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1898         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1899         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1900         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1901         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1902
1903         // ASIC will keep garbage value after boot
1904         // Clear all shared key table when initial
1905         // This routine can be ignored in radio-ON/OFF operation.
1906         if (bHardReset)
1907         {
1908                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
1909                 {
1910                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
1911                 }
1912
1913                 // Clear all pairwise key table when initial
1914                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
1915                 {
1916                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1917                 }
1918         }
1919
1920         // assert HOST ready bit
1921 //  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0); // 2004-09-14 asked by Mark
1922 //  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4);
1923
1924         // It isn't necessary to clear this space when not hard reset.
1925         if (bHardReset == TRUE)
1926         {
1927                 // clear all on-chip BEACON frame space
1928                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
1929                 {
1930                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
1931                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
1932                 }
1933         }
1934
1935 #ifdef RTMP_MAC_USB
1936         AsicDisableSync(pAd);
1937         // Clear raw counters
1938         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1939         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1940         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1941         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1942         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1943         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1944         // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
1945         RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
1946         Counter&=0xffffff00;
1947         Counter|=0x000001e;
1948         RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
1949 #endif // RTMP_MAC_USB //
1950
1951         {
1952                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
1953                 if ((pAd->MACVersion&0xffff) != 0x0101)
1954                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
1955         }
1956
1957         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
1958         return NDIS_STATUS_SUCCESS;
1959 }
1960
1961 /*
1962         ========================================================================
1963
1964         Routine Description:
1965                 Reset NIC Asics
1966
1967         Arguments:
1968                 Adapter                                         Pointer to our adapter
1969
1970         Return Value:
1971                 None
1972
1973         IRQL = PASSIVE_LEVEL
1974
1975         Note:
1976                 Reset NIC to initial state AS IS system boot up time.
1977
1978         ========================================================================
1979 */
1980 VOID    NICIssueReset(
1981         IN      PRTMP_ADAPTER   pAd)
1982 {
1983         UINT32  Value = 0;
1984         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
1985
1986         // Abort Tx, prevent ASIC from writing to Host memory
1987         //RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x001f0000);
1988
1989         // Disable Rx, register value supposed will remain after reset
1990         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1991         Value &= (0xfffffff3);
1992         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1993
1994         // Issue reset and clear from reset state
1995         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
1996         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
1997
1998         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
1999 }
2000
2001 /*
2002         ========================================================================
2003
2004         Routine Description:
2005                 Check ASIC registers and find any reason the system might hang
2006
2007         Arguments:
2008                 Adapter                                         Pointer to our adapter
2009
2010         Return Value:
2011                 None
2012
2013         IRQL = DISPATCH_LEVEL
2014
2015         ========================================================================
2016 */
2017 BOOLEAN NICCheckForHang(
2018         IN      PRTMP_ADAPTER   pAd)
2019 {
2020         return (FALSE);
2021 }
2022
2023 VOID NICUpdateFifoStaCounters(
2024         IN PRTMP_ADAPTER pAd)
2025 {
2026         TX_STA_FIFO_STRUC       StaFifo;
2027         MAC_TABLE_ENTRY         *pEntry;
2028         UCHAR                           i = 0;
2029         UCHAR                   pid = 0, wcid = 0;
2030         CHAR                            reTry;
2031         UCHAR                           succMCS;
2032
2033                 do
2034                 {
2035                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2036
2037                         if (StaFifo.field.bValid == 0)
2038                                 break;
2039
2040                         wcid = (UCHAR)StaFifo.field.wcid;
2041
2042
2043                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2044                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2045                         {
2046                                 i++;
2047                                 continue;
2048                         }
2049
2050                         /* PID store Tx MCS Rate */
2051                         pid = (UCHAR)StaFifo.field.PidType;
2052
2053                         pEntry = &pAd->MacTab.Content[wcid];
2054
2055                         pEntry->DebugFIFOCount++;
2056
2057                         if (StaFifo.field.TxBF) // 3*3
2058                                 pEntry->TxBFCount++;
2059
2060                         if (!StaFifo.field.TxSuccess)
2061                         {
2062                                 pEntry->FIFOCount++;
2063                                 pEntry->OneSecTxFailCount++;
2064
2065                                 if (pEntry->FIFOCount >= 1)
2066                                 {
2067                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2068                                         pEntry->NoBADataCountDown = 64;
2069
2070                                         if(pEntry->PsMode == PWR_ACTIVE)
2071                                         {
2072                                                 int tid;
2073                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2074                                                 {
2075                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2076                                                 }
2077
2078                                                 // Update the continuous transmission counter except PS mode
2079                                                 pEntry->ContinueTxFailCnt++;
2080                                         }
2081                                         else
2082                                         {
2083                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2084                                                 //     this tx error happened due to sta just go to sleep.
2085                                                 pEntry->FIFOCount = 0;
2086                                                 pEntry->ContinueTxFailCnt = 0;
2087                                         }
2088                                         //pEntry->FIFOCount = 0;
2089                                 }
2090                                 //pEntry->bSendBAR = TRUE;
2091                         }
2092                         else
2093                         {
2094                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2095                                 {
2096                                         pEntry->NoBADataCountDown--;
2097                                         if (pEntry->NoBADataCountDown==0)
2098                                         {
2099                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2100                                         }
2101                                 }
2102
2103                                 pEntry->FIFOCount = 0;
2104                                 pEntry->OneSecTxNoRetryOkCount++;
2105                                 // update NoDataIdleCount when sucessful send packet to STA.
2106                                 pEntry->NoDataIdleCount = 0;
2107                                 pEntry->ContinueTxFailCnt = 0;
2108                         }
2109
2110                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2111
2112                         reTry = pid - succMCS;
2113
2114                         if (StaFifo.field.TxSuccess)
2115                         {
2116                                 pEntry->TXMCSExpected[pid]++;
2117                                 if (pid == succMCS)
2118                                 {
2119                                         pEntry->TXMCSSuccessful[pid]++;
2120                                 }
2121                                 else
2122                                 {
2123                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2124                                 }
2125                         }
2126                         else
2127                         {
2128                                 pEntry->TXMCSFailed[pid]++;
2129                         }
2130
2131                         if (reTry > 0)
2132                         {
2133                                 if ((pid >= 12) && succMCS <=7)
2134                                 {
2135                                         reTry -= 4;
2136                                 }
2137                                 pEntry->OneSecTxRetryOkCount += reTry;
2138                         }
2139
2140                         i++;
2141                         // ASIC store 16 stack
2142                 } while ( i < (2*TX_RING_SIZE) );
2143
2144 }
2145
2146 /*
2147         ========================================================================
2148
2149         Routine Description:
2150                 Read statistical counters from hardware registers and record them
2151                 in software variables for later on query
2152
2153         Arguments:
2154                 pAd                                     Pointer to our adapter
2155
2156         Return Value:
2157                 None
2158
2159         IRQL = DISPATCH_LEVEL
2160
2161         ========================================================================
2162 */
2163 VOID NICUpdateRawCounters(
2164         IN PRTMP_ADAPTER pAd)
2165 {
2166         UINT32  OldValue;//, Value2;
2167         //ULONG PageSum, OneSecTransmitCount;
2168         //ULONG TxErrorRatio, Retry, Fail;
2169         RX_STA_CNT0_STRUC        RxStaCnt0;
2170         RX_STA_CNT1_STRUC   RxStaCnt1;
2171         RX_STA_CNT2_STRUC   RxStaCnt2;
2172         TX_STA_CNT0_STRUC        TxStaCnt0;
2173         TX_STA_CNT1_STRUC        StaTx1;
2174         TX_STA_CNT2_STRUC        StaTx2;
2175         TX_AGG_CNT_STRUC        TxAggCnt;
2176         TX_AGG_CNT0_STRUC       TxAggCnt0;
2177         TX_AGG_CNT1_STRUC       TxAggCnt1;
2178         TX_AGG_CNT2_STRUC       TxAggCnt2;
2179         TX_AGG_CNT3_STRUC       TxAggCnt3;
2180         TX_AGG_CNT4_STRUC       TxAggCnt4;
2181         TX_AGG_CNT5_STRUC       TxAggCnt5;
2182         TX_AGG_CNT6_STRUC       TxAggCnt6;
2183         TX_AGG_CNT7_STRUC       TxAggCnt7;
2184         COUNTER_RALINK          *pRalinkCounters;
2185
2186
2187         pRalinkCounters = &pAd->RalinkCounters;
2188
2189         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2190         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2191
2192         {
2193                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2194             // Update RX PLCP error counter
2195             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2196                 // Update False CCA counter
2197                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2198         }
2199
2200         // Update FCS counters
2201         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2202         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2203         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2204                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2205
2206         // Add FCS error count to private counters
2207         pRalinkCounters->OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2208         OldValue = pRalinkCounters->RealFcsErrCount.u.LowPart;
2209         pRalinkCounters->RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2210         if (pRalinkCounters->RealFcsErrCount.u.LowPart < OldValue)
2211                 pRalinkCounters->RealFcsErrCount.u.HighPart++;
2212
2213         // Update Duplicate Rcv check
2214         pRalinkCounters->DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2215         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2216         // Update RX Overflow counter
2217         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2218
2219         //pAd->RalinkCounters.RxCount = 0;
2220 #ifdef RTMP_MAC_USB
2221         if (pRalinkCounters->RxCount != pAd->watchDogRxCnt)
2222         {
2223                 pAd->watchDogRxCnt = pRalinkCounters->RxCount;
2224                 pAd->watchDogRxOverFlowCnt = 0;
2225         }
2226         else
2227         {
2228                 if (RxStaCnt2.field.RxFifoOverflowCount)
2229                         pAd->watchDogRxOverFlowCnt++;
2230                 else
2231                         pAd->watchDogRxOverFlowCnt = 0;
2232         }
2233 #endif // RTMP_MAC_USB //
2234
2235
2236         //if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) ||
2237         //      (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1)))
2238         if (!pAd->bUpdateBcnCntDone)
2239         {
2240         // Update BEACON sent count
2241         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2242         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2243         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2244         pRalinkCounters->OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2245         pRalinkCounters->OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2246         pRalinkCounters->OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2247         pRalinkCounters->OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2248         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2249         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2250         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2251         }
2252
2253
2254         //if (pAd->bStaFifoTest == TRUE)
2255         {
2256                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2257                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2258                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2259                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2260                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2261                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2262                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2263                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2264                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2265                 pRalinkCounters->TxAggCount += TxAggCnt.field.AggTxCount;
2266                 pRalinkCounters->TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2267                 pRalinkCounters->TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2268                 pRalinkCounters->TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2269
2270                 pRalinkCounters->TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2271                 pRalinkCounters->TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2272                 pRalinkCounters->TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2273                 pRalinkCounters->TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2274
2275                 pRalinkCounters->TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2276                 pRalinkCounters->TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2277                 pRalinkCounters->TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2278                 pRalinkCounters->TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2279
2280                 pRalinkCounters->TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2281                 pRalinkCounters->TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2282                 pRalinkCounters->TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2283                 pRalinkCounters->TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2284
2285                 pRalinkCounters->TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2286                 pRalinkCounters->TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2287
2288                 // Calculate the transmitted A-MPDU count
2289                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2290                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2291
2292                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2293                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2294
2295                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2296                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2297
2298                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2299                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2300
2301                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2302                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2303
2304                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2305                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2306
2307                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2308                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2309
2310                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2311                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2312         }
2313
2314
2315
2316 }
2317
2318
2319 /*
2320         ========================================================================
2321
2322         Routine Description:
2323                 Reset NIC from error
2324
2325         Arguments:
2326                 Adapter                                         Pointer to our adapter
2327
2328         Return Value:
2329                 None
2330
2331         IRQL = PASSIVE_LEVEL
2332
2333         Note:
2334                 Reset NIC from error state
2335
2336         ========================================================================
2337 */
2338 VOID    NICResetFromError(
2339         IN      PRTMP_ADAPTER   pAd)
2340 {
2341         // Reset BBP (according to alex, reset ASIC will force reset BBP
2342         // Therefore, skip the reset BBP
2343         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2344
2345         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2346         // Remove ASIC from reset state
2347         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2348
2349         NICInitializeAdapter(pAd, FALSE);
2350         NICInitAsicFromEEPROM(pAd);
2351
2352         // Switch to current channel, since during reset process, the connection should remains on.
2353         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2354         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2355 }
2356
2357
2358 NDIS_STATUS NICLoadFirmware(
2359         IN PRTMP_ADAPTER pAd)
2360 {
2361         NDIS_STATUS      status = NDIS_STATUS_SUCCESS;
2362         if (pAd->chipOps.loadFirmware)
2363                 status = pAd->chipOps.loadFirmware(pAd);
2364
2365         return status;
2366 }
2367
2368
2369 /*
2370         ========================================================================
2371
2372         Routine Description:
2373                 erase 8051 firmware image in MAC ASIC
2374
2375         Arguments:
2376                 Adapter                                         Pointer to our adapter
2377
2378         IRQL = PASSIVE_LEVEL
2379
2380         ========================================================================
2381 */
2382 VOID NICEraseFirmware(
2383         IN PRTMP_ADAPTER pAd)
2384 {
2385         if (pAd->chipOps.eraseFirmware)
2386                 pAd->chipOps.eraseFirmware(pAd);
2387
2388 }/* End of NICEraseFirmware */
2389
2390
2391 /*
2392         ========================================================================
2393
2394         Routine Description:
2395                 Load Tx rate switching parameters
2396
2397         Arguments:
2398                 Adapter                                         Pointer to our adapter
2399
2400         Return Value:
2401                 NDIS_STATUS_SUCCESS         firmware image load ok
2402                 NDIS_STATUS_FAILURE         image not found
2403
2404         IRQL = PASSIVE_LEVEL
2405
2406         Rate Table Format:
2407                 1. (B0: Valid Item number) (B1:Initial item from zero)
2408                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2409
2410         ========================================================================
2411 */
2412 NDIS_STATUS NICLoadRateSwitchingParams(
2413         IN PRTMP_ADAPTER pAd)
2414 {
2415         return NDIS_STATUS_SUCCESS;
2416 }
2417
2418
2419 /*
2420         ========================================================================
2421
2422         Routine Description:
2423                 Compare two memory block
2424
2425         Arguments:
2426                 pSrc1           Pointer to first memory address
2427                 pSrc2           Pointer to second memory address
2428
2429         Return Value:
2430                 0:                      memory is equal
2431                 1:                      pSrc1 memory is larger
2432                 2:                      pSrc2 memory is larger
2433
2434         IRQL = DISPATCH_LEVEL
2435
2436         Note:
2437
2438         ========================================================================
2439 */
2440 ULONG   RTMPCompareMemory(
2441         IN      PVOID   pSrc1,
2442         IN      PVOID   pSrc2,
2443         IN      ULONG   Length)
2444 {
2445         PUCHAR  pMem1;
2446         PUCHAR  pMem2;
2447         ULONG   Index = 0;
2448
2449         pMem1 = (PUCHAR) pSrc1;
2450         pMem2 = (PUCHAR) pSrc2;
2451
2452         for (Index = 0; Index < Length; Index++)
2453         {
2454                 if (pMem1[Index] > pMem2[Index])
2455                         return (1);
2456                 else if (pMem1[Index] < pMem2[Index])
2457                         return (2);
2458         }
2459
2460         // Equal
2461         return (0);
2462 }
2463
2464 /*
2465         ========================================================================
2466
2467         Routine Description:
2468                 Zero out memory block
2469
2470         Arguments:
2471                 pSrc1           Pointer to memory address
2472                 Length          Size
2473
2474         Return Value:
2475                 None
2476
2477         IRQL = PASSIVE_LEVEL
2478         IRQL = DISPATCH_LEVEL
2479
2480         Note:
2481
2482         ========================================================================
2483 */
2484 VOID    RTMPZeroMemory(
2485         IN      PVOID   pSrc,
2486         IN      ULONG   Length)
2487 {
2488         PUCHAR  pMem;
2489         ULONG   Index = 0;
2490
2491         pMem = (PUCHAR) pSrc;
2492
2493         for (Index = 0; Index < Length; Index++)
2494         {
2495                 pMem[Index] = 0x00;
2496         }
2497 }
2498
2499
2500 /*
2501         ========================================================================
2502
2503         Routine Description:
2504                 Copy data from memory block 1 to memory block 2
2505
2506         Arguments:
2507                 pDest           Pointer to destination memory address
2508                 pSrc            Pointer to source memory address
2509                 Length          Copy size
2510
2511         Return Value:
2512                 None
2513
2514         IRQL = PASSIVE_LEVEL
2515         IRQL = DISPATCH_LEVEL
2516
2517         Note:
2518
2519         ========================================================================
2520 */
2521 VOID    RTMPMoveMemory(
2522         OUT     PVOID   pDest,
2523         IN      PVOID   pSrc,
2524         IN      ULONG   Length)
2525 {
2526         PUCHAR  pMem1;
2527         PUCHAR  pMem2;
2528         UINT    Index;
2529
2530         ASSERT((Length==0) || (pDest && pSrc));
2531
2532         pMem1 = (PUCHAR) pDest;
2533         pMem2 = (PUCHAR) pSrc;
2534
2535         for (Index = 0; Index < Length; Index++)
2536         {
2537                 pMem1[Index] = pMem2[Index];
2538         }
2539 }
2540
2541 /*
2542         ========================================================================
2543
2544         Routine Description:
2545                 Initialize port configuration structure
2546
2547         Arguments:
2548                 Adapter                                         Pointer to our adapter
2549
2550         Return Value:
2551                 None
2552
2553         IRQL = PASSIVE_LEVEL
2554
2555         Note:
2556
2557         ========================================================================
2558 */
2559 VOID    UserCfgInit(
2560         IN      PRTMP_ADAPTER pAd)
2561 {
2562     UINT key_index, bss_index;
2563
2564         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
2565
2566         //
2567         //  part I. intialize common configuration
2568         //
2569 #ifdef RTMP_MAC_USB
2570         pAd->BulkOutReq = 0;
2571
2572         pAd->BulkOutComplete = 0;
2573         pAd->BulkOutCompleteOther = 0;
2574         pAd->BulkOutCompleteCancel = 0;
2575         pAd->BulkInReq = 0;
2576         pAd->BulkInComplete = 0;
2577         pAd->BulkInCompleteFail = 0;
2578
2579         //pAd->QuickTimerP = 100;
2580         //pAd->TurnAggrBulkInCount = 0;
2581         pAd->bUsbTxBulkAggre = 0;
2582
2583         // init as unsed value to ensure driver will set to MCU once.
2584         pAd->LedIndicatorStrength = 0xFF;
2585
2586         pAd->CommonCfg.MaxPktOneTxBulk = 2;
2587         pAd->CommonCfg.TxBulkFactor = 1;
2588         pAd->CommonCfg.RxBulkFactor =1;
2589
2590         pAd->CommonCfg.TxPower = 100; //mW
2591
2592         NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
2593 #endif // RTMP_MAC_USB //
2594
2595         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
2596         {
2597                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
2598                 {
2599                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
2600                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
2601                 }
2602         }
2603
2604         pAd->EepromAccess = FALSE;
2605
2606         pAd->Antenna.word = 0;
2607         pAd->CommonCfg.BBPCurrentBW = BW_20;
2608
2609         pAd->LedCntl.word = 0;
2610 #ifdef RTMP_MAC_PCI
2611         pAd->LedIndicatorStrength = 0;
2612         pAd->RLnkCtrlOffset = 0;
2613         pAd->HostLnkCtrlOffset = 0;
2614         pAd->StaCfg.PSControl.field.EnableNewPS=TRUE;
2615         pAd->CheckDmaBusyCount = 0;
2616 #endif // RTMP_MAC_PCI //
2617
2618         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
2619         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
2620         pAd->RfIcType = RFIC_2820;
2621
2622         // Init timer for reset complete event
2623         pAd->CommonCfg.CentralChannel = 1;
2624         pAd->bForcePrintTX = FALSE;
2625         pAd->bForcePrintRX = FALSE;
2626         pAd->bStaFifoTest = FALSE;
2627         pAd->bProtectionTest = FALSE;
2628         pAd->CommonCfg.Dsifs = 10;      // in units of usec
2629         pAd->CommonCfg.TxPower = 100; //mW
2630         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
2631         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
2632         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
2633         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
2634         pAd->CommonCfg.RtsThreshold = 2347;
2635         pAd->CommonCfg.FragmentThreshold = 2346;
2636         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
2637         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
2638         pAd->CommonCfg.PhyMode = 0xff;     // unknown
2639         pAd->CommonCfg.BandState = UNKNOWN_BAND;
2640         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
2641         pAd->CommonCfg.RadarDetect.CSCount = 0;
2642         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
2643
2644
2645
2646
2647         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
2648         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
2649         pAd->CommonCfg.bAPSDCapable = FALSE;
2650         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
2651         pAd->CommonCfg.TriggerTimerCount = 0;
2652         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
2653         pAd->CommonCfg.bCountryFlag = FALSE;
2654         pAd->CommonCfg.TxStream = 0;
2655         pAd->CommonCfg.RxStream = 0;
2656
2657         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
2658
2659         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
2660         pAd->HTCEnable = FALSE;
2661         pAd->bBroadComHT = FALSE;
2662         pAd->CommonCfg.bRdg = FALSE;
2663
2664         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
2665         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
2666         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
2667         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
2668         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
2669         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
2670         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
2671
2672         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
2673         BATableInit(pAd, &pAd->BATable);
2674
2675         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
2676         pAd->CommonCfg.bHTProtect = 1;
2677         pAd->CommonCfg.bMIMOPSEnable = TRUE;
2678         //2008/11/05:KH add to support Antenna power-saving of AP<--
2679         pAd->CommonCfg.bGreenAPEnable=FALSE;
2680         //2008/11/05:KH add to support Antenna power-saving of AP-->
2681         pAd->CommonCfg.bBADecline = FALSE;
2682         pAd->CommonCfg.bDisableReordering = FALSE;
2683
2684         if (pAd->MACVersion == 0x28720200)
2685         {
2686                 pAd->CommonCfg.TxBASize = 13; //by Jerry recommend
2687         }else{
2688         pAd->CommonCfg.TxBASize = 7;
2689         }
2690
2691         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
2692
2693         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
2694         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
2695         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
2696         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
2697         pAd->CommonCfg.TxRate = RATE_6;
2698
2699         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
2700         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
2701         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
2702
2703         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
2704
2705         //
2706         // part II. intialize STA specific configuration
2707         //
2708         {
2709                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
2710                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
2711                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
2712                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
2713
2714                 pAd->StaCfg.Psm = PWR_ACTIVE;
2715
2716                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
2717                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
2718                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
2719                 pAd->StaCfg.bMixCipher = FALSE;
2720                 pAd->StaCfg.DefaultKeyId = 0;
2721
2722                 // 802.1x port control
2723                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
2724                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
2725                 pAd->StaCfg.LastMicErrorTime = 0;
2726                 pAd->StaCfg.MicErrCnt        = 0;
2727                 pAd->StaCfg.bBlockAssoc      = FALSE;
2728                 pAd->StaCfg.WpaState         = SS_NOTUSE;
2729
2730                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
2731
2732                 pAd->StaCfg.RssiTrigger = 0;
2733                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
2734                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
2735                 pAd->StaCfg.AtimWin = 0;
2736                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
2737                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
2738                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
2739                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
2740                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
2741
2742                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
2743                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
2744         }
2745
2746 #ifdef PCIE_PS_SUPPORT
2747 pAd->brt30xxBanMcuCmd = FALSE;
2748 pAd->b3090ESpecialChip = FALSE;
2749 //KH Debug:the following must be removed
2750 pAd->StaCfg.PSControl.field.rt30xxPowerMode=3;
2751 pAd->StaCfg.PSControl.field.rt30xxForceASPMTest=0;
2752 pAd->StaCfg.PSControl.field.rt30xxFollowHostASPM=1;
2753 #endif // PCIE_PS_SUPPORT //
2754
2755         // global variables mXXXX used in MAC protocol state machines
2756         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
2757         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
2758         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
2759
2760         // PHY specification
2761         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
2762         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
2763
2764         {
2765                 // user desired power mode
2766                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
2767                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
2768                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
2769
2770                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
2771                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
2772
2773                 // Patch for Ndtest
2774                 pAd->StaCfg.ScanCnt = 0;
2775
2776                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
2777                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
2778                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
2779                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
2780                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
2781
2782                 // Nitro mode control
2783                 pAd->StaCfg.bAutoReconnect = TRUE;
2784
2785                 // Save the init time as last scan time, the system should do scan after 2 seconds.
2786                 // This patch is for driver wake up from standby mode, system will do scan right away.
2787                 NdisGetSystemUpTime(&pAd->StaCfg.LastScanTime);
2788                 if (pAd->StaCfg.LastScanTime > 10 * OS_HZ)
2789                         pAd->StaCfg.LastScanTime -= (10 * OS_HZ);
2790
2791                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
2792 #ifdef RTMP_MAC_PCI
2793                 sprintf((PSTRING) pAd->nickname, "RT2860STA");
2794 #endif // RTMP_MAC_PCI //
2795 #ifdef RTMP_MAC_USB
2796                         sprintf((PSTRING) pAd->nickname, "RT2870STA");
2797 #endif // RTMP_MAC_USB //
2798                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
2799                 pAd->StaCfg.IEEE8021X = FALSE;
2800                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
2801                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
2802                 pAd->StaCfg.bRSN_IE_FromWpaSupplicant = FALSE;
2803                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
2804
2805                 NdisZeroMemory(pAd->StaCfg.ReplayCounter, 8);
2806
2807
2808                 pAd->StaCfg.bAutoConnectByBssid = FALSE;
2809                 pAd->StaCfg.BeaconLostTime = BEACON_LOST_TIME;
2810                 NdisZeroMemory(pAd->StaCfg.WpaPassPhrase, 64);
2811                 pAd->StaCfg.WpaPassPhraseLen = 0;
2812                 pAd->StaCfg.bAutoRoaming = FALSE;
2813                 pAd->StaCfg.bForceTxBurst = FALSE;
2814         }
2815
2816         // Default for extra information is not valid
2817         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
2818
2819         // Default Config change flag
2820         pAd->bConfigChanged = FALSE;
2821
2822         //
2823         // part III. AP configurations
2824         //
2825
2826
2827         //
2828         // part IV. others
2829         //
2830         // dynamic BBP R66:sensibity tuning to overcome background noise
2831         pAd->BbpTuning.bEnable                = TRUE;
2832         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
2833         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
2834         pAd->BbpTuning.R66Delta               = 4;
2835         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
2836
2837         //
2838         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
2839         // if not initial this value, the default value will be 0.
2840         //
2841         pAd->BbpTuning.R66CurrentValue = 0x38;
2842
2843         pAd->Bbp94 = BBPR94_DEFAULT;
2844         pAd->BbpForCCK = FALSE;
2845
2846         // Default is FALSE for test bit 1
2847         //pAd->bTest1 = FALSE;
2848
2849         // initialize MAC table and allocate spin lock
2850         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
2851         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
2852         NdisAllocateSpinLock(&pAd->MacTabLock);
2853
2854         //RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE);
2855         //RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV);
2856
2857
2858
2859         pAd->CommonCfg.bWiFiTest = FALSE;
2860 #ifdef RTMP_MAC_PCI
2861         pAd->bPCIclkOff = FALSE;
2862 #endif // RTMP_MAC_PCI //
2863
2864 RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
2865         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
2866 }
2867
2868 // IRQL = PASSIVE_LEVEL
2869 UCHAR BtoH(STRING ch)
2870 {
2871         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
2872         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
2873         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
2874         return(255);
2875 }
2876
2877 //
2878 //  FUNCTION: AtoH(char *, UCHAR *, int)
2879 //
2880 //  PURPOSE:  Converts ascii string to network order hex
2881 //
2882 //  PARAMETERS:
2883 //    src    - pointer to input ascii string
2884 //    dest   - pointer to output hex
2885 //    destlen - size of dest
2886 //
2887 //  COMMENTS:
2888 //
2889 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
2890 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
2891 //
2892 // IRQL = PASSIVE_LEVEL
2893
2894 void AtoH(PSTRING src, PUCHAR dest, int destlen)
2895 {
2896         PSTRING srcptr;
2897         PUCHAR destTemp;
2898
2899         srcptr = src;
2900         destTemp = (PUCHAR) dest;
2901
2902         while(destlen--)
2903         {
2904                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
2905                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
2906                 destTemp++;
2907         }
2908 }
2909
2910
2911 //+++Mark by shiang, not use now, need to remove after confirm
2912 //---Mark by shiang, not use now, need to remove after confirm
2913
2914
2915 /*
2916         ========================================================================
2917
2918         Routine Description:
2919                 Init timer objects
2920
2921         Arguments:
2922                 pAd                     Pointer to our adapter
2923                 pTimer                          Timer structure
2924                 pTimerFunc                      Function to execute when timer expired
2925                 Repeat                          Ture for period timer
2926
2927         Return Value:
2928                 None
2929
2930         Note:
2931
2932         ========================================================================
2933 */
2934 VOID    RTMPInitTimer(
2935         IN      PRTMP_ADAPTER                   pAd,
2936         IN      PRALINK_TIMER_STRUCT    pTimer,
2937         IN      PVOID                                   pTimerFunc,
2938         IN      PVOID                                   pData,
2939         IN      BOOLEAN                                 Repeat)
2940 {
2941         //
2942         // Set Valid to TRUE for later used.
2943         // It will crash if we cancel a timer or set a timer
2944         // that we haven't initialize before.
2945         //
2946         pTimer->Valid      = TRUE;
2947
2948         pTimer->PeriodicType = Repeat;
2949         pTimer->State      = FALSE;
2950         pTimer->cookie = (ULONG) pData;
2951
2952 #ifdef RTMP_TIMER_TASK_SUPPORT
2953         pTimer->pAd = pAd;
2954 #endif // RTMP_TIMER_TASK_SUPPORT //
2955
2956         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
2957 }
2958
2959 /*
2960         ========================================================================
2961
2962         Routine Description:
2963                 Init timer objects
2964
2965         Arguments:
2966                 pTimer                          Timer structure
2967                 Value                           Timer value in milliseconds
2968
2969         Return Value:
2970                 None
2971
2972         Note:
2973                 To use this routine, must call RTMPInitTimer before.
2974
2975         ========================================================================
2976 */
2977 VOID    RTMPSetTimer(
2978         IN      PRALINK_TIMER_STRUCT    pTimer,
2979         IN      ULONG                                   Value)
2980 {
2981         if (pTimer->Valid)
2982         {
2983                 pTimer->TimerValue = Value;
2984                 pTimer->State      = FALSE;
2985                 if (pTimer->PeriodicType == TRUE)
2986                 {
2987                         pTimer->Repeat = TRUE;
2988                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
2989                 }
2990                 else
2991                 {
2992                         pTimer->Repeat = FALSE;
2993                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
2994                 }
2995         }
2996         else
2997         {
2998                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
2999         }
3000 }
3001
3002
3003 /*
3004         ========================================================================
3005
3006         Routine Description:
3007                 Init timer objects
3008
3009         Arguments:
3010                 pTimer                          Timer structure
3011                 Value                           Timer value in milliseconds
3012
3013         Return Value:
3014                 None
3015
3016         Note:
3017                 To use this routine, must call RTMPInitTimer before.
3018
3019         ========================================================================
3020 */
3021 VOID    RTMPModTimer(
3022         IN      PRALINK_TIMER_STRUCT    pTimer,
3023         IN      ULONG                                   Value)
3024 {
3025         BOOLEAN Cancel;
3026
3027         if (pTimer->Valid)
3028         {
3029                 pTimer->TimerValue = Value;
3030                 pTimer->State      = FALSE;
3031                 if (pTimer->PeriodicType == TRUE)
3032                 {
3033                         RTMPCancelTimer(pTimer, &Cancel);
3034                         RTMPSetTimer(pTimer, Value);
3035                 }
3036                 else
3037                 {
3038                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3039                 }
3040         }
3041         else
3042         {
3043                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3044         }
3045 }
3046
3047 /*
3048         ========================================================================
3049
3050         Routine Description:
3051                 Cancel timer objects
3052
3053         Arguments:
3054                 Adapter                                         Pointer to our adapter
3055
3056         Return Value:
3057                 None
3058
3059         IRQL = PASSIVE_LEVEL
3060         IRQL = DISPATCH_LEVEL
3061
3062         Note:
3063                 1.) To use this routine, must call RTMPInitTimer before.
3064                 2.) Reset NIC to initial state AS IS system boot up time.
3065
3066         ========================================================================
3067 */
3068 VOID    RTMPCancelTimer(
3069         IN      PRALINK_TIMER_STRUCT    pTimer,
3070         OUT     BOOLEAN                                 *pCancelled)
3071 {
3072         if (pTimer->Valid)
3073         {
3074                 if (pTimer->State == FALSE)
3075                         pTimer->Repeat = FALSE;
3076
3077                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3078
3079                 if (*pCancelled == TRUE)
3080                         pTimer->State = TRUE;
3081
3082 #ifdef RTMP_TIMER_TASK_SUPPORT
3083                 // We need to go-through the TimerQ to findout this timer handler and remove it if
3084                 //              it's still waiting for execution.
3085                 RtmpTimerQRemove(pTimer->pAd, pTimer);
3086 #endif // RTMP_TIMER_TASK_SUPPORT //
3087         }
3088         else
3089         {
3090                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3091         }
3092 }
3093
3094 /*
3095         ========================================================================
3096
3097         Routine Description:
3098                 Set LED Status
3099
3100         Arguments:
3101                 pAd                                             Pointer to our adapter
3102                 Status                                  LED Status
3103
3104         Return Value:
3105                 None
3106
3107         IRQL = PASSIVE_LEVEL
3108         IRQL = DISPATCH_LEVEL
3109
3110         Note:
3111
3112         ========================================================================
3113 */
3114 VOID RTMPSetLED(
3115         IN PRTMP_ADAPTER        pAd,
3116         IN UCHAR                        Status)
3117 {
3118         //ULONG                 data;
3119         UCHAR                   HighByte = 0;
3120         UCHAR                   LowByte;
3121
3122         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3123         switch (Status)
3124         {
3125                 case LED_LINK_DOWN:
3126                         HighByte = 0x20;
3127                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3128                         pAd->LedIndicatorStrength = 0;
3129                         break;
3130                 case LED_LINK_UP:
3131                         if (pAd->CommonCfg.Channel > 14)
3132                                 HighByte = 0xa0;
3133                         else
3134                                 HighByte = 0x60;
3135                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3136                         break;
3137                 case LED_RADIO_ON:
3138                         HighByte = 0x20;
3139                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3140                         break;
3141                 case LED_HALT:
3142                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3143                 case LED_RADIO_OFF:
3144                         HighByte = 0;
3145                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3146                         break;
3147         case LED_WPS:
3148                         HighByte = 0x10;
3149                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3150                         break;
3151                 case LED_ON_SITE_SURVEY:
3152                         HighByte = 0x08;
3153                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3154                         break;
3155                 case LED_POWER_UP:
3156                         HighByte = 0x04;
3157                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3158                         break;
3159                 default:
3160                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3161                         break;
3162         }
3163
3164     //
3165         // Keep LED status for LED SiteSurvey mode.
3166         // After SiteSurvey, we will set the LED mode to previous status.
3167         //
3168         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3169                 pAd->LedStatus = Status;
3170
3171         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3172 }
3173
3174 /*
3175         ========================================================================
3176
3177         Routine Description:
3178                 Set LED Signal Stregth
3179
3180         Arguments:
3181                 pAd                                             Pointer to our adapter
3182                 Dbm                                             Signal Stregth
3183
3184         Return Value:
3185                 None
3186
3187         IRQL = PASSIVE_LEVEL
3188
3189         Note:
3190                 Can be run on any IRQL level.
3191
3192                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3193                 <= -90  No Signal
3194                 <= -81  Very Low
3195                 <= -71  Low
3196                 <= -67  Good
3197                 <= -57  Very Good
3198                  > -57  Excellent
3199         ========================================================================
3200 */
3201 VOID RTMPSetSignalLED(
3202         IN PRTMP_ADAPTER        pAd,
3203         IN NDIS_802_11_RSSI Dbm)
3204 {
3205         UCHAR           nLed = 0;
3206
3207         if (pAd->LedCntl.field.LedMode == LED_MODE_SIGNAL_STREGTH)
3208         {
3209         if (Dbm <= -90)
3210                 nLed = 0;
3211         else if (Dbm <= -81)
3212                 nLed = 1;
3213         else if (Dbm <= -71)
3214                 nLed = 3;
3215         else if (Dbm <= -67)
3216                 nLed = 7;
3217         else if (Dbm <= -57)
3218                 nLed = 15;
3219         else
3220                 nLed = 31;
3221
3222         //
3223         // Update Signal Stregth to firmware if changed.
3224         //
3225         if (pAd->LedIndicatorStrength != nLed)
3226         {
3227                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3228                 pAd->LedIndicatorStrength = nLed;
3229         }
3230         }
3231 }
3232
3233 /*
3234         ========================================================================
3235
3236         Routine Description:
3237                 Enable RX
3238
3239         Arguments:
3240                 pAd                                             Pointer to our adapter
3241
3242         Return Value:
3243                 None
3244
3245         IRQL <= DISPATCH_LEVEL
3246
3247         Note:
3248                 Before Enable RX, make sure you have enabled Interrupt.
3249         ========================================================================
3250 */
3251 VOID RTMPEnableRxTx(
3252         IN PRTMP_ADAPTER        pAd)
3253 {
3254 //      WPDMA_GLO_CFG_STRUC     GloCfg;
3255 //      ULONG   i = 0;
3256         UINT32 rx_filter_flag;
3257
3258         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3259
3260         // Enable Rx DMA.
3261         RT28XXDMAEnable(pAd);
3262
3263         // enable RX of MAC block
3264         if (pAd->OpMode == OPMODE_AP)
3265         {
3266                 rx_filter_flag = APNORMAL;
3267
3268
3269                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3270         }
3271         else
3272         {
3273                 if (pAd->CommonCfg.PSPXlink)
3274                         rx_filter_flag = PSPXLINK;
3275                 else
3276                         rx_filter_flag = STANORMAL;     // Staion not drop control frame will fail WiFi Certification.
3277                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);
3278         }
3279
3280         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3281         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3282 }
3283
3284
3285 //+++Add by shiang, move from os/linux/rt_main_dev.c
3286 void CfgInitHook(PRTMP_ADAPTER pAd)
3287 {
3288         pAd->bBroadComHT = TRUE;
3289 }
3290
3291
3292 int rt28xx_init(
3293         IN PRTMP_ADAPTER pAd,
3294         IN PSTRING pDefaultMac,
3295         IN PSTRING pHostName)
3296 {
3297         UINT                                    index;
3298         UCHAR                                   TmpPhy;
3299         NDIS_STATUS                             Status;
3300         UINT32                                  MacCsr0 = 0;
3301
3302
3303 #ifdef RTMP_MAC_PCI
3304         {
3305         // If dirver doesn't wake up firmware here,
3306         // NICLoadFirmware will hang forever when interface is up again.
3307         // RT2860 PCI
3308         if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) &&
3309                 OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_PCIE_DEVICE))
3310         {
3311                 AUTO_WAKEUP_STRUC AutoWakeupCfg;
3312                         AsicForceWakeup(pAd, TRUE);
3313                 AutoWakeupCfg.word = 0;
3314                 RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG, AutoWakeupCfg.word);
3315                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3316         }
3317         }
3318 #endif // RTMP_MAC_PCI //
3319
3320
3321         // reset Adapter flags
3322         RTMP_CLEAR_FLAGS(pAd);
3323
3324         // Init BssTab & ChannelInfo tabbles for auto channel select.
3325
3326         // Allocate BA Reordering memory
3327         ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM);
3328
3329         // Make sure MAC gets ready.
3330         index = 0;
3331         do
3332         {
3333                 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
3334                 pAd->MACVersion = MacCsr0;
3335
3336                 if ((pAd->MACVersion != 0x00) && (pAd->MACVersion != 0xFFFFFFFF))
3337                         break;
3338
3339                 RTMPusecDelay(10);
3340         } while (index++ < 100);
3341         DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
3342
3343 #ifdef RTMP_MAC_PCI
3344 #ifdef PCIE_PS_SUPPORT
3345         /*Iverson patch PCIE L1 issue to make sure that driver can be read,write ,BBP and RF register  at pcie L.1 level */
3346         if ((IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))&&OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_PCIE_DEVICE))
3347         {
3348                 RTMP_IO_READ32(pAd, AUX_CTRL, &MacCsr0);
3349                 MacCsr0 |= 0x402;
3350                 RTMP_IO_WRITE32(pAd, AUX_CTRL, MacCsr0);
3351                 DBGPRINT(RT_DEBUG_TRACE, ("AUX_CTRL = 0x%x\n", MacCsr0));
3352         }
3353 #endif // PCIE_PS_SUPPORT //
3354
3355         // To fix driver disable/enable hang issue when radio off
3356         RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x2);
3357 #endif // RTMP_MAC_PCI //
3358
3359         // Disable DMA
3360         RT28XXDMADisable(pAd);
3361
3362
3363         // Load 8051 firmware
3364         Status = NICLoadFirmware(pAd);
3365         if (Status != NDIS_STATUS_SUCCESS)
3366         {
3367                 DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status));
3368                 goto err1;
3369         }
3370
3371         NICLoadRateSwitchingParams(pAd);
3372
3373         // Disable interrupts here which is as soon as possible
3374         // This statement should never be true. We might consider to remove it later
3375 #ifdef RTMP_MAC_PCI
3376         if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE))
3377         {
3378                 RTMP_ASIC_INTERRUPT_DISABLE(pAd);
3379         }
3380 #endif // RTMP_MAC_PCI //
3381
3382         Status = RTMPAllocTxRxRingMemory(pAd);
3383         if (Status != NDIS_STATUS_SUCCESS)
3384         {
3385                 DBGPRINT_ERR(("RTMPAllocDMAMemory failed, Status[=0x%08x]\n", Status));
3386                 goto err1;
3387         }
3388
3389         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3390
3391         // initialize MLME
3392         //
3393
3394         Status = RtmpMgmtTaskInit(pAd);
3395         if (Status != NDIS_STATUS_SUCCESS)
3396                 goto err2;
3397
3398         Status = MlmeInit(pAd);
3399         if (Status != NDIS_STATUS_SUCCESS)
3400         {
3401                 DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status));
3402                 goto err2;
3403         }
3404
3405         // Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default
3406         //
3407         UserCfgInit(pAd);
3408         Status = RtmpNetTaskInit(pAd);
3409         if (Status != NDIS_STATUS_SUCCESS)
3410                 goto err3;
3411
3412 //      COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr);
3413 //      pAd->bForcePrintTX = TRUE;
3414
3415         CfgInitHook(pAd);
3416
3417                 NdisAllocateSpinLock(&pAd->MacTabLock);
3418
3419         MeasureReqTabInit(pAd);
3420         TpcReqTabInit(pAd);
3421
3422         //
3423         // Init the hardware, we need to init asic before read registry, otherwise mac register will be reset
3424         //
3425         Status = NICInitializeAdapter(pAd, TRUE);
3426         if (Status != NDIS_STATUS_SUCCESS)
3427         {
3428                 DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status));
3429                 if (Status != NDIS_STATUS_SUCCESS)
3430                 goto err3;
3431         }
3432
3433         DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3434
3435 #ifdef RTMP_MAC_USB
3436         pAd->CommonCfg.bMultipleIRP = FALSE;
3437
3438         if (pAd->CommonCfg.bMultipleIRP)
3439                 pAd->CommonCfg.NumOfBulkInIRP = RX_RING_SIZE;
3440         else
3441                 pAd->CommonCfg.NumOfBulkInIRP = 1;
3442 #endif // RTMP_MAC_USB //
3443
3444         //Init Ba Capability parameters.
3445 //      RT28XX_BA_INIT(pAd);
3446         pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
3447         pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable;
3448         pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
3449         pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
3450         // UPdata to HT IE
3451         pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
3452         pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
3453         pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
3454
3455         // after reading Registry, we now know if in AP mode or STA mode
3456
3457         // Load 8051 firmware; crash when FW image not existent
3458         // Status = NICLoadFirmware(pAd);
3459         // if (Status != NDIS_STATUS_SUCCESS)
3460         //    break;
3461
3462         DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3463
3464         // We should read EEPROM for all cases.  rt2860b
3465         NICReadEEPROMParameters(pAd, (PUCHAR)pDefaultMac);
3466
3467         DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3468
3469         NICInitAsicFromEEPROM(pAd); //rt2860b
3470
3471         // Set PHY to appropriate mode
3472         TmpPhy = pAd->CommonCfg.PhyMode;
3473         pAd->CommonCfg.PhyMode = 0xff;
3474         RTMPSetPhyMode(pAd, TmpPhy);
3475         SetCommonHT(pAd);
3476
3477         // No valid channels.
3478         if (pAd->ChannelListNum == 0)
3479         {
3480                 DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n"));
3481                 goto err4;
3482         }
3483
3484         DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0],
3485            pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2],
3486            pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4]));
3487
3488 #ifdef RTMP_RF_RW_SUPPORT
3489         //Init RT30xx RFRegisters after read RFIC type from EEPROM
3490         NICInitRFRegisters(pAd);
3491 #endif // RTMP_RF_RW_SUPPORT //
3492
3493 //              APInitialize(pAd);
3494
3495
3496                 //
3497         // Initialize RF register to default value
3498         //
3499         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3500         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3501
3502         // 8051 firmware require the signal during booting time.
3503         //2008/11/28:KH marked the following codes to patch Frequency offset bug
3504         //AsicSendCommandToMcu(pAd, 0x72, 0xFF, 0x00, 0x00);
3505
3506         if (pAd && (Status != NDIS_STATUS_SUCCESS))
3507         {
3508                 //
3509                 // Undo everything if it failed
3510                 //
3511                 if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
3512                 {
3513 //                      NdisMDeregisterInterrupt(&pAd->Interrupt);
3514                         RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3515                 }
3516 //              RTMPFreeAdapter(pAd); // we will free it in disconnect()
3517         }
3518         else if (pAd)
3519         {
3520                 // Microsoft HCT require driver send a disconnect event after driver initialization.
3521                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
3522 //              pAd->IndicateMediaState = NdisMediaStateDisconnected;
3523                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE);
3524
3525                 DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n"));
3526
3527 #ifdef RTMP_MAC_USB
3528                 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS);
3529                 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
3530
3531                 //
3532                 // Support multiple BulkIn IRP,
3533                 // the value on pAd->CommonCfg.NumOfBulkInIRP may be large than 1.
3534                 //
3535                 for(index=0; index<pAd->CommonCfg.NumOfBulkInIRP; index++)
3536                 {
3537                         RTUSBBulkReceive(pAd);
3538                         DBGPRINT(RT_DEBUG_TRACE, ("RTUSBBulkReceive!\n" ));
3539                 }
3540 #endif // RTMP_MAC_USB //
3541         }// end of else
3542
3543
3544         // Set up the Mac address
3545         RtmpOSNetDevAddrSet(pAd->net_dev, &pAd->CurrentAddress[0]);
3546
3547         DBGPRINT_S(Status, ("<==== rt28xx_init, Status=%x\n", Status));
3548
3549         return TRUE;
3550
3551
3552 err4:
3553 err3:
3554         MlmeHalt(pAd);
3555 err2:
3556         RTMPFreeTxRxRingMemory(pAd);
3557 err1:
3558
3559         os_free_mem(pAd, pAd->mpdu_blk_pool.mem); // free BA pool
3560
3561         // shall not set priv to NULL here because the priv didn't been free yet.
3562         //net_dev->ml_priv = 0;
3563 #ifdef ST
3564 err0:
3565 #endif // ST //
3566
3567         DBGPRINT(RT_DEBUG_ERROR, ("!!! rt28xx Initialized fail !!!\n"));
3568         return FALSE;
3569 }
3570 //---Add by shiang, move from os/linux/rt_main_dev.c
3571
3572
3573 static INT RtmpChipOpsRegister(
3574         IN RTMP_ADAPTER *pAd,
3575         IN INT                  infType)
3576 {
3577         RTMP_CHIP_OP    *pChipOps = &pAd->chipOps;
3578         int status;
3579
3580         memset(pChipOps, 0, sizeof(RTMP_CHIP_OP));
3581
3582         /* set eeprom related hook functions */
3583         status = RtmpChipOpsEepromHook(pAd, infType);
3584
3585         /* set mcu related hook functions */
3586         switch(infType)
3587         {
3588 #ifdef RTMP_PCI_SUPPORT
3589                 case RTMP_DEV_INF_PCI:
3590                         pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3591                         pChipOps->eraseFirmware = RtmpAsicEraseFirmware;
3592                         pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3593                         break;
3594 #endif // RTMP_PCI_SUPPORT //
3595 #ifdef RTMP_USB_SUPPORT
3596                 case RTMP_DEV_INF_USB:
3597                         pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3598                         pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3599                         break;
3600 #endif // RTMP_USB_SUPPORT //
3601                 default:
3602                         break;
3603         }
3604
3605         return status;
3606 }
3607
3608
3609 INT RtmpRaDevCtrlInit(
3610         IN RTMP_ADAPTER *pAd,
3611         IN RTMP_INF_TYPE infType)
3612 {
3613         //VOID  *handle;
3614
3615         // Assign the interface type. We need use it when do register/EEPROM access.
3616         pAd->infType = infType;
3617
3618
3619         pAd->OpMode = OPMODE_STA;
3620         DBGPRINT(RT_DEBUG_TRACE, ("STA Driver version-%s\n", STA_DRIVER_VERSION));
3621
3622 #ifdef RTMP_MAC_USB
3623         init_MUTEX(&(pAd->UsbVendorReq_semaphore));
3624         os_alloc_mem(pAd, (PUCHAR)&pAd->UsbVendorReqBuf, MAX_PARAM_BUFFER_SIZE - 1);
3625         if (pAd->UsbVendorReqBuf == NULL)
3626         {
3627                 DBGPRINT(RT_DEBUG_ERROR, ("Allocate vendor request temp buffer failed!\n"));
3628                 return FALSE;
3629         }
3630 #endif // RTMP_MAC_USB //
3631
3632         RtmpChipOpsRegister(pAd, infType);
3633
3634
3635         return 0;
3636 }
3637
3638
3639 BOOLEAN RtmpRaDevCtrlExit(IN RTMP_ADAPTER *pAd)
3640 {
3641
3642
3643         RTMPFreeAdapter(pAd);
3644
3645         return TRUE;
3646 }
3647
3648
3649 // not yet support MBSS
3650 PNET_DEV get_netdev_from_bssid(
3651         IN      PRTMP_ADAPTER   pAd,
3652         IN      UCHAR                   FromWhichBSSID)
3653 {
3654         PNET_DEV dev_p = NULL;
3655
3656         {
3657                 dev_p = pAd->net_dev;
3658         }
3659
3660         ASSERT(dev_p);
3661         return dev_p; /* return one of MBSS */
3662 }