2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
34 --------- ---------- ----------------------------------------------
40 #include "../rtmp_type.h"
43 #include "../rtmp_iface.h"
44 #include "../rtmp_dot11.h"
48 // Device ID & Vendor ID related definitions,
49 // NOTE: you should not add the new VendorID/DeviceID here unless you not sure it belongs to what chip.
51 #define NIC_PCI_VENDOR_ID 0x1814
52 #define PCIBUS_INTEL_VENDOR 0x8086
54 #if !defined(PCI_CAP_ID_EXP)
55 #define PCI_CAP_ID_EXP 0x10
57 #if !defined(PCI_EXP_LNKCTL)
58 #define PCI_EXP_LNKCTL 0x10
60 #if !defined(PCI_CLASS_BRIDGE_PCI)
61 #define PCI_CLASS_BRIDGE_PCI 0x0604
69 #define RTMP_PKT_TAIL_PADDING 0
70 #define fRTMP_ADAPTER_NEED_STOP_TX 0
72 #define AUX_CTRL 0x10c
75 // TX descriptor format, Tx ring, Mgmt Ring
77 typedef struct PACKED _TXD_STRUC {
91 UINT32 WIV:1; // Wireless Info Valid. 1 if Driver already fill WI, o if DMA needs to copy WI to correctposition
92 UINT32 QSEL:2; // select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA
97 } TXD_STRUC, *PTXD_STRUC;
101 // Rx descriptor format, Rx Ring
103 typedef struct PACKED _RXD_STRUC{
119 UINT32 U2M:1; // 1: this RX frame is unicast to me
120 UINT32 Mcast:1; // 1: this is a multicast frame
121 UINT32 Bcast:1; // 1: this is a broadcast frame
122 UINT32 MyBss:1; // 1: this frame belongs to the same BSSID
123 UINT32 Crc:1; // 1: CRC error
124 UINT32 CipherErr:2; // 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid
125 UINT32 AMSDU:1; // rx with 802.3 header, not 802.11 header.
130 UINT32 Decrypted:1; // this frame is being decrypted.
131 UINT32 PlcpSignal:1; // To be moved
132 UINT32 PlcpRssil:1;// To be moved
134 } RXD_STRUC, *PRXD_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC;
137 /* ----------------- EEPROM Related MACRO ----------------- */
139 // 8051 firmware image for RT2860 - base address = 0x4000
140 #define FIRMWARE_IMAGE_BASE 0x2000
141 #define MAX_FIRMWARE_IMAGE_SIZE 0x2000 // 8kbyte
144 /* ----------------- Frimware Related MACRO ----------------- */
145 #define RTMP_WRITE_FIRMWARE(_pAd, _pFwImage, _FwLen) \
148 RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x10000); \
150 for(_i=0; _i<_FwLen; _i+=4) \
152 _firm = _pFwImage[_i] + \
153 (_pFwImage[_i+3] << 24) + \
154 (_pFwImage[_i+2] << 16) + \
155 (_pFwImage[_i+1] << 8); \
156 RTMP_IO_WRITE32(_pAd, FIRMWARE_IMAGE_BASE + _i, _firm); \
158 RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x00000); \
159 RTMP_IO_WRITE32(_pAd, PBF_SYS_CTRL, 0x00001); \
161 /* initialize BBP R/W access agent */ \
162 RTMP_IO_WRITE32(_pAd, H2M_BBP_AGENT, 0); \
163 RTMP_IO_WRITE32(_pAd, H2M_MAILBOX_CSR, 0); \
167 /* ----------------- TX Related MACRO ----------------- */
168 #define RTMP_START_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0)
169 #define RTMP_STOP_DEQUEUE(pAd, QueIdx, irqFlags) do{}while(0)
172 #define RTMP_HAS_ENOUGH_FREE_DESC(pAd, pTxBlk, freeNum, pPacket) \
173 ((freeNum) >= (ULONG)(pTxBlk->TotalFragNum + RTMP_GET_PACKET_FRAGMENTS(pPacket) + 3)) /* rough estimate we will use 3 more descriptor. */
174 #define RTMP_RELEASE_DESC_RESOURCE(pAd, QueIdx) \
177 #define NEED_QUEUE_BACK_FOR_AGG(pAd, QueIdx, freeNum, _TxFrameType) \
178 (((freeNum != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 0)) || (freeNum<3))
179 //(((freeNum) != (TX_RING_SIZE-1)) && (pAd->TxSwQueue[QueIdx].Number == 1 /*0*/))
182 #define HAL_KickOutMgmtTx(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen) \
183 RtmpPCIMgmtKickOut(_pAd, _QueIdx, _pPacket, _pSrcBufVA, _SrcBufLen)
185 #define HAL_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber) \
186 /* RtmpPCI_WriteSubTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)*/
188 #define HAL_WriteTxResource(pAd, pTxBlk,bIsLast, pFreeNumber) \
189 RtmpPCI_WriteSingleTxResource(pAd, pTxBlk, bIsLast, pFreeNumber)
191 #define HAL_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber) \
192 RtmpPCI_WriteFragTxResource(pAd, pTxBlk, fragNum, pFreeNumber)
194 #define HAL_WriteMultiTxResource(pAd, pTxBlk,frameNum, pFreeNumber) \
195 RtmpPCI_WriteMultiTxResource(pAd, pTxBlk, frameNum, pFreeNumber)
197 #define HAL_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx) \
198 RtmpPCI_FinalWriteTxResource(_pAd, _pTxBlk, _TotalMPDUSize, _FirstTxIdx)
200 #define HAL_LastTxIdx(_pAd, _QueIdx,_LastTxIdx) \
201 /*RtmpPCIDataLastTxIdx(_pAd, _QueIdx,_LastTxIdx)*/
203 #define HAL_KickOutTx(_pAd, _pTxBlk, _QueIdx) \
204 RTMP_IO_WRITE32((_pAd), TX_CTX_IDX0+((_QueIdx)*0x10), (_pAd)->TxRing[(_QueIdx)].TxCpuIdx)
205 /* RtmpPCIDataKickOut(_pAd, _pTxBlk, _QueIdx)*/
207 #define HAL_KickOutNullFrameTx(_pAd, _QueIdx, _pNullFrame, _frameLen) \
208 MiniportMMRequest(_pAd, _QueIdx, _pNullFrame, _frameLen)
210 #define GET_TXRING_FREENO(_pAd, _QueIdx) \
211 (_pAd->TxRing[_QueIdx].TxSwFreeIdx > _pAd->TxRing[_QueIdx].TxCpuIdx) ? \
212 (_pAd->TxRing[_QueIdx].TxSwFreeIdx - _pAd->TxRing[_QueIdx].TxCpuIdx - 1) \
214 (_pAd->TxRing[_QueIdx].TxSwFreeIdx + TX_RING_SIZE - _pAd->TxRing[_QueIdx].TxCpuIdx - 1);
217 #define GET_MGMTRING_FREENO(_pAd) \
218 (_pAd->MgmtRing.TxSwFreeIdx > _pAd->MgmtRing.TxCpuIdx) ? \
219 (_pAd->MgmtRing.TxSwFreeIdx - _pAd->MgmtRing.TxCpuIdx - 1) \
221 (_pAd->MgmtRing.TxSwFreeIdx + MGMT_RING_SIZE - _pAd->MgmtRing.TxCpuIdx - 1);
224 /* ----------------- RX Related MACRO ----------------- */
227 /* ----------------- ASIC Related MACRO ----------------- */
228 // reset MAC of a station entry to 0x000000000000
229 #define RTMP_STA_ENTRY_MAC_RESET(pAd, Wcid) \
230 AsicDelWcidTab(pAd, Wcid);
232 // add this entry into ASIC RX WCID search table
233 #define RTMP_STA_ENTRY_ADD(pAd, pEntry) \
234 AsicUpdateRxWCIDTable(pAd, pEntry->Aid, pEntry->Addr);
236 // add by johnli, fix "in_interrupt" error when call "MacTableDeleteEntry" in Rx tasklet
237 // Set MAC register value according operation mode
238 #define RTMP_UPDATE_PROTECT(pAd) \
239 AsicUpdateProtect(pAd, 0, (ALLN_SETPROTECT), TRUE, 0);
242 // remove Pair-wise key material from ASIC
243 #define RTMP_STA_ENTRY_KEY_DEL(pAd, BssIdx, Wcid) \
244 AsicRemovePairwiseKeyEntry(pAd, BssIdx, (UCHAR)Wcid);
246 // add Client security information into ASIC WCID table and IVEIV table
247 #define RTMP_STA_SECURITY_INFO_ADD(pAd, apidx, KeyID, pEntry) \
248 RTMPAddWcidAttributeEntry(pAd, apidx, KeyID, \
249 pAd->SharedKey[apidx][KeyID].CipherAlg, pEntry);
251 #define RTMP_SECURITY_KEY_ADD(pAd, apidx, KeyID, pEntry) \
252 { /* update pairwise key information to ASIC Shared Key Table */ \
253 AsicAddSharedKeyEntry(pAd, apidx, KeyID, \
254 pAd->SharedKey[apidx][KeyID].CipherAlg, \
255 pAd->SharedKey[apidx][KeyID].Key, \
256 pAd->SharedKey[apidx][KeyID].TxMic, \
257 pAd->SharedKey[apidx][KeyID].RxMic); \
258 /* update ASIC WCID attribute table and IVEIV table */ \
259 RTMPAddWcidAttributeEntry(pAd, apidx, KeyID, \
260 pAd->SharedKey[apidx][KeyID].CipherAlg, \
264 // Insert the BA bitmap to ASIC for the Wcid entry
265 #define RTMP_ADD_BA_SESSION_TO_ASIC(_pAd, _Aid, _TID) \
267 UINT32 _Value = 0, _Offset; \
268 _Offset = MAC_WCID_BASE + (_Aid) * HW_WCID_ENTRY_SIZE + 4; \
269 RTMP_IO_READ32((_pAd), _Offset, &_Value);\
270 _Value |= (0x10000<<(_TID)); \
271 RTMP_IO_WRITE32((_pAd), _Offset, _Value);\
275 // Remove the BA bitmap from ASIC for the Wcid entry
276 // bitmap field starts at 0x10000 in ASIC WCID table
277 #define RTMP_DEL_BA_SESSION_FROM_ASIC(_pAd, _Wcid, _TID) \
279 UINT32 _Value = 0, _Offset; \
280 _Offset = MAC_WCID_BASE + (_Wcid) * HW_WCID_ENTRY_SIZE + 4; \
281 RTMP_IO_READ32((_pAd), _Offset, &_Value); \
282 _Value &= (~(0x10000 << (_TID))); \
283 RTMP_IO_WRITE32((_pAd), _Offset, _Value); \
287 /* ----------------- Interface Related MACRO ----------------- */
290 // Enable & Disable NIC interrupt via writing interrupt mask register
291 // Since it use ADAPTER structure, it have to be put after structure definition.
293 #define RTMP_ASIC_INTERRUPT_DISABLE(_pAd) \
295 RTMP_IO_WRITE32((_pAd), INT_MASK_CSR, 0x0); /* 0: disable */ \
296 RTMP_CLEAR_FLAG((_pAd), fRTMP_ADAPTER_INTERRUPT_ACTIVE); \
299 #define RTMP_ASIC_INTERRUPT_ENABLE(_pAd)\
301 RTMP_IO_WRITE32((_pAd), INT_MASK_CSR, (_pAd)->int_enable_reg /*DELAYINTMASK*/); /* 1:enable */ \
302 RTMP_SET_FLAG((_pAd), fRTMP_ADAPTER_INTERRUPT_ACTIVE); \
306 #define RTMP_IRQ_INIT(pAd) \
307 { pAd->int_enable_reg = ((DELAYINTMASK) | \
308 (RxINT|TxDataInt|TxMgmtInt)) & ~(0x03); \
309 pAd->int_disable_mask = 0; \
310 pAd->int_pending = 0; }
312 #define RTMP_IRQ_ENABLE(pAd) \
313 { /* clear garbage ints */ \
314 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, 0xffffffff);\
315 RTMP_ASIC_INTERRUPT_ENABLE(pAd); }
318 /* ----------------- MLME Related MACRO ----------------- */
319 #define RTMP_MLME_HANDLER(pAd) MlmeHandler(pAd)
321 #define RTMP_MLME_PRE_SANITY_CHECK(pAd)
323 #define RTMP_MLME_STA_QUICK_RSP_WAKE_UP(pAd) \
324 RTMPSetTimer(&pAd->StaCfg.StaQuickResponeForRateUpTimer, 100);
326 #define RTMP_MLME_RESET_STATE_MACHINE(pAd) \
327 MlmeRestartStateMachine(pAd)
329 #define RTMP_HANDLE_COUNTER_MEASURE(_pAd, _pEntry)\
330 HandleCounterMeasure(_pAd, _pEntry)
332 /* ----------------- Power Save Related MACRO ----------------- */
333 #define RTMP_PS_POLL_ENQUEUE(pAd) EnqueuePsPoll(pAd)
336 // For RTMPPCIePowerLinkCtrlRestore () function
337 #define RESTORE_HALT 1
338 #define RESTORE_WAKEUP 2
339 #define RESTORE_CLOSE 3
341 #define PowerSafeCID 1
342 #define PowerRadioOffCID 2
343 #define PowerWakeCID 3
344 #define CID0MASK 0x000000ff
345 #define CID1MASK 0x0000ff00
346 #define CID2MASK 0x00ff0000
347 #define CID3MASK 0xff000000
350 #define RTMP_STA_FORCE_WAKEUP(pAd, bFromTx) \
351 RT28xxPciStaAsicForceWakeup(pAd, bFromTx);
353 #define RTMP_STA_SLEEP_THEN_AUTO_WAKEUP(pAd, TbttNumToNextWakeUp) \
354 RT28xxPciStaAsicSleepThenAutoWakeup(pAd, TbttNumToNextWakeUp);
356 #define RTMP_SET_PSM_BIT(_pAd, _val) \
357 MlmeSetPsmBit(_pAd, _val);
359 #define RTMP_MLME_RADIO_ON(pAd) \
360 RT28xxPciMlmeRadioOn(pAd);
362 #define RTMP_MLME_RADIO_OFF(pAd) \
363 RT28xxPciMlmeRadioOFF(pAd);
365 #endif //__MAC_PCI_H__ //