1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 BayLibre, SAS
4 * Author: Maxime Jourdan <mjourdan@baylibre.com>
8 #include <media/v4l2-mem2mem.h>
9 #include <media/v4l2-event.h>
10 #include <media/videobuf2-dma-contig.h>
12 #include "vdec_helpers.h"
14 #define NUM_CANVAS_NV12 2
15 #define NUM_CANVAS_YUV420 3
17 u32 amvdec_read_dos(struct amvdec_core *core, u32 reg)
19 return readl_relaxed(core->dos_base + reg);
21 EXPORT_SYMBOL_GPL(amvdec_read_dos);
23 void amvdec_write_dos(struct amvdec_core *core, u32 reg, u32 val)
25 writel_relaxed(val, core->dos_base + reg);
27 EXPORT_SYMBOL_GPL(amvdec_write_dos);
29 void amvdec_write_dos_bits(struct amvdec_core *core, u32 reg, u32 val)
31 amvdec_write_dos(core, reg, amvdec_read_dos(core, reg) | val);
33 EXPORT_SYMBOL_GPL(amvdec_write_dos_bits);
35 void amvdec_clear_dos_bits(struct amvdec_core *core, u32 reg, u32 val)
37 amvdec_write_dos(core, reg, amvdec_read_dos(core, reg) & ~val);
39 EXPORT_SYMBOL_GPL(amvdec_clear_dos_bits);
41 u32 amvdec_read_parser(struct amvdec_core *core, u32 reg)
43 return readl_relaxed(core->esparser_base + reg);
45 EXPORT_SYMBOL_GPL(amvdec_read_parser);
47 void amvdec_write_parser(struct amvdec_core *core, u32 reg, u32 val)
49 writel_relaxed(val, core->esparser_base + reg);
51 EXPORT_SYMBOL_GPL(amvdec_write_parser);
53 /* 4 KiB per 64x32 block */
54 u32 amvdec_am21c_body_size(u32 width, u32 height)
56 u32 width_64 = ALIGN(width, 64) / 64;
57 u32 height_32 = ALIGN(height, 32) / 32;
59 return SZ_4K * width_64 * height_32;
61 EXPORT_SYMBOL_GPL(amvdec_am21c_body_size);
63 /* 32 bytes per 128x64 block */
64 u32 amvdec_am21c_head_size(u32 width, u32 height)
66 u32 width_128 = ALIGN(width, 128) / 128;
67 u32 height_64 = ALIGN(height, 64) / 64;
69 return 32 * width_128 * height_64;
71 EXPORT_SYMBOL_GPL(amvdec_am21c_head_size);
73 u32 amvdec_am21c_size(u32 width, u32 height)
75 return ALIGN(amvdec_am21c_body_size(width, height) +
76 amvdec_am21c_head_size(width, height), SZ_64K);
78 EXPORT_SYMBOL_GPL(amvdec_am21c_size);
80 static int canvas_alloc(struct amvdec_session *sess, u8 *canvas_id)
84 if (sess->canvas_num >= MAX_CANVAS) {
85 dev_err(sess->core->dev, "Reached max number of canvas\n");
89 ret = meson_canvas_alloc(sess->core->canvas, canvas_id);
93 sess->canvas_alloc[sess->canvas_num++] = *canvas_id;
97 static int set_canvas_yuv420m(struct amvdec_session *sess,
98 struct vb2_buffer *vb, u32 width,
101 struct amvdec_core *core = sess->core;
102 u8 canvas_id[NUM_CANVAS_YUV420]; /* Y U V */
103 dma_addr_t buf_paddr[NUM_CANVAS_YUV420]; /* Y U V */
106 for (i = 0; i < NUM_CANVAS_YUV420; ++i) {
107 ret = canvas_alloc(sess, &canvas_id[i]);
112 vb2_dma_contig_plane_dma_addr(vb, i);
116 meson_canvas_config(core->canvas, canvas_id[0], buf_paddr[0],
117 width, height, MESON_CANVAS_WRAP_NONE,
118 MESON_CANVAS_BLKMODE_LINEAR,
119 MESON_CANVAS_ENDIAN_SWAP64);
122 meson_canvas_config(core->canvas, canvas_id[1], buf_paddr[1],
123 width / 2, height / 2, MESON_CANVAS_WRAP_NONE,
124 MESON_CANVAS_BLKMODE_LINEAR,
125 MESON_CANVAS_ENDIAN_SWAP64);
128 meson_canvas_config(core->canvas, canvas_id[2], buf_paddr[2],
129 width / 2, height / 2, MESON_CANVAS_WRAP_NONE,
130 MESON_CANVAS_BLKMODE_LINEAR,
131 MESON_CANVAS_ENDIAN_SWAP64);
133 amvdec_write_dos(core, reg,
134 ((canvas_id[2]) << 16) |
135 ((canvas_id[1]) << 8) |
141 static int set_canvas_nv12m(struct amvdec_session *sess,
142 struct vb2_buffer *vb, u32 width,
145 struct amvdec_core *core = sess->core;
146 u8 canvas_id[NUM_CANVAS_NV12]; /* Y U/V */
147 dma_addr_t buf_paddr[NUM_CANVAS_NV12]; /* Y U/V */
150 for (i = 0; i < NUM_CANVAS_NV12; ++i) {
151 ret = canvas_alloc(sess, &canvas_id[i]);
156 vb2_dma_contig_plane_dma_addr(vb, i);
160 meson_canvas_config(core->canvas, canvas_id[0], buf_paddr[0],
161 width, height, MESON_CANVAS_WRAP_NONE,
162 MESON_CANVAS_BLKMODE_LINEAR,
163 MESON_CANVAS_ENDIAN_SWAP64);
166 meson_canvas_config(core->canvas, canvas_id[1], buf_paddr[1],
167 width, height / 2, MESON_CANVAS_WRAP_NONE,
168 MESON_CANVAS_BLKMODE_LINEAR,
169 MESON_CANVAS_ENDIAN_SWAP64);
171 amvdec_write_dos(core, reg,
172 ((canvas_id[1]) << 16) |
173 ((canvas_id[1]) << 8) |
179 int amvdec_set_canvases(struct amvdec_session *sess,
180 u32 reg_base[], u32 reg_num[])
182 struct v4l2_m2m_buffer *buf;
183 u32 pixfmt = sess->pixfmt_cap;
184 u32 width = ALIGN(sess->width, 32);
185 u32 height = ALIGN(sess->height, 32);
188 u32 reg_base_cur = 0;
192 v4l2_m2m_for_each_dst_buf(sess->m2m_ctx, buf) {
193 if (!reg_base[reg_base_cur])
196 reg_cur = reg_base[reg_base_cur] + reg_num_cur * 4;
199 case V4L2_PIX_FMT_NV12M:
200 ret = set_canvas_nv12m(sess, &buf->vb.vb2_buf, width,
205 case V4L2_PIX_FMT_YUV420M:
206 ret = set_canvas_yuv420m(sess, &buf->vb.vb2_buf, width,
212 dev_err(sess->core->dev, "Unsupported pixfmt %08X\n",
218 if (reg_num_cur >= reg_num[reg_base_cur]) {
223 sess->fw_idx_to_vb2_idx[i++] = buf->vb.vb2_buf.index;
228 EXPORT_SYMBOL_GPL(amvdec_set_canvases);
230 void amvdec_add_ts(struct amvdec_session *sess, u64 ts,
231 struct v4l2_timecode tc, u32 offset, u32 vbuf_flags)
233 struct amvdec_timestamp *new_ts;
236 new_ts = kzalloc(sizeof(*new_ts), GFP_KERNEL);
239 new_ts->offset = offset;
240 new_ts->flags = vbuf_flags;
242 spin_lock_irqsave(&sess->ts_spinlock, flags);
243 list_add_tail(&new_ts->list, &sess->timestamps);
244 spin_unlock_irqrestore(&sess->ts_spinlock, flags);
246 EXPORT_SYMBOL_GPL(amvdec_add_ts);
248 void amvdec_remove_ts(struct amvdec_session *sess, u64 ts)
250 struct amvdec_timestamp *tmp;
253 spin_lock_irqsave(&sess->ts_spinlock, flags);
254 list_for_each_entry(tmp, &sess->timestamps, list) {
256 list_del(&tmp->list);
261 dev_warn(sess->core->dev_dec,
262 "Couldn't remove buffer with timestamp %llu from list\n", ts);
265 spin_unlock_irqrestore(&sess->ts_spinlock, flags);
267 EXPORT_SYMBOL_GPL(amvdec_remove_ts);
269 static void dst_buf_done(struct amvdec_session *sess,
270 struct vb2_v4l2_buffer *vbuf,
271 u32 field, u64 timestamp,
272 struct v4l2_timecode timecode, u32 flags)
274 struct device *dev = sess->core->dev_dec;
275 u32 output_size = amvdec_get_output_size(sess);
277 switch (sess->pixfmt_cap) {
278 case V4L2_PIX_FMT_NV12M:
279 vbuf->vb2_buf.planes[0].bytesused = output_size;
280 vbuf->vb2_buf.planes[1].bytesused = output_size / 2;
282 case V4L2_PIX_FMT_YUV420M:
283 vbuf->vb2_buf.planes[0].bytesused = output_size;
284 vbuf->vb2_buf.planes[1].bytesused = output_size / 4;
285 vbuf->vb2_buf.planes[2].bytesused = output_size / 4;
289 vbuf->vb2_buf.timestamp = timestamp;
290 vbuf->sequence = sess->sequence_cap++;
292 vbuf->timecode = timecode;
294 if (sess->should_stop &&
295 atomic_read(&sess->esparser_queued_bufs) <= 1) {
296 const struct v4l2_event ev = { .type = V4L2_EVENT_EOS };
298 dev_dbg(dev, "Signaling EOS, sequence_cap = %u\n",
299 sess->sequence_cap - 1);
300 v4l2_event_queue_fh(&sess->fh, &ev);
301 vbuf->flags |= V4L2_BUF_FLAG_LAST;
302 } else if (sess->status == STATUS_NEEDS_RESUME) {
303 /* Mark LAST for drained show frames during a source change */
304 vbuf->flags |= V4L2_BUF_FLAG_LAST;
305 sess->sequence_cap = 0;
306 } else if (sess->should_stop)
307 dev_dbg(dev, "should_stop, %u bufs remain\n",
308 atomic_read(&sess->esparser_queued_bufs));
310 dev_dbg(dev, "Buffer %u done, ts = %llu, flags = %08X\n",
311 vbuf->vb2_buf.index, timestamp, flags);
313 v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE);
315 /* Buffer done probably means the vififo got freed */
316 schedule_work(&sess->esparser_queue_work);
319 void amvdec_dst_buf_done(struct amvdec_session *sess,
320 struct vb2_v4l2_buffer *vbuf, u32 field)
322 struct device *dev = sess->core->dev_dec;
323 struct amvdec_timestamp *tmp;
324 struct list_head *timestamps = &sess->timestamps;
325 struct v4l2_timecode timecode;
330 spin_lock_irqsave(&sess->ts_spinlock, flags);
331 if (list_empty(timestamps)) {
332 dev_err(dev, "Buffer %u done but list is empty\n",
333 vbuf->vb2_buf.index);
335 v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR);
336 spin_unlock_irqrestore(&sess->ts_spinlock, flags);
340 tmp = list_first_entry(timestamps, struct amvdec_timestamp, list);
343 vbuf_flags = tmp->flags;
344 list_del(&tmp->list);
346 spin_unlock_irqrestore(&sess->ts_spinlock, flags);
348 dst_buf_done(sess, vbuf, field, timestamp, timecode, vbuf_flags);
349 atomic_dec(&sess->esparser_queued_bufs);
351 EXPORT_SYMBOL_GPL(amvdec_dst_buf_done);
353 void amvdec_dst_buf_done_offset(struct amvdec_session *sess,
354 struct vb2_v4l2_buffer *vbuf,
355 u32 offset, u32 field, bool allow_drop)
357 struct device *dev = sess->core->dev_dec;
358 struct amvdec_timestamp *match = NULL;
359 struct amvdec_timestamp *tmp, *n;
360 struct v4l2_timecode timecode = { 0 };
365 spin_lock_irqsave(&sess->ts_spinlock, flags);
367 /* Look for our vififo offset to get the corresponding timestamp. */
368 list_for_each_entry_safe(tmp, n, &sess->timestamps, list) {
369 if (tmp->offset > offset) {
371 * Delete any record that remained unused for 32 match
374 if (tmp->used_count++ >= 32) {
375 list_del(&tmp->list);
385 dev_err(dev, "Buffer %u done but can't match offset (%08X)\n",
386 vbuf->vb2_buf.index, offset);
388 timestamp = match->ts;
389 timecode = match->tc;
390 vbuf_flags = match->flags;
391 list_del(&match->list);
394 spin_unlock_irqrestore(&sess->ts_spinlock, flags);
396 dst_buf_done(sess, vbuf, field, timestamp, timecode, vbuf_flags);
398 atomic_dec(&sess->esparser_queued_bufs);
400 EXPORT_SYMBOL_GPL(amvdec_dst_buf_done_offset);
402 void amvdec_dst_buf_done_idx(struct amvdec_session *sess,
403 u32 buf_idx, u32 offset, u32 field)
405 struct vb2_v4l2_buffer *vbuf;
406 struct device *dev = sess->core->dev_dec;
408 vbuf = v4l2_m2m_dst_buf_remove_by_idx(sess->m2m_ctx,
409 sess->fw_idx_to_vb2_idx[buf_idx]);
413 "Buffer %u done but it doesn't exist in m2m_ctx\n",
419 amvdec_dst_buf_done_offset(sess, vbuf, offset, field, true);
421 amvdec_dst_buf_done(sess, vbuf, field);
423 EXPORT_SYMBOL_GPL(amvdec_dst_buf_done_idx);
425 void amvdec_set_par_from_dar(struct amvdec_session *sess,
426 u32 dar_num, u32 dar_den)
430 sess->pixelaspect.numerator = sess->height * dar_num;
431 sess->pixelaspect.denominator = sess->width * dar_den;
432 div = gcd(sess->pixelaspect.numerator, sess->pixelaspect.denominator);
433 sess->pixelaspect.numerator /= div;
434 sess->pixelaspect.denominator /= div;
436 EXPORT_SYMBOL_GPL(amvdec_set_par_from_dar);
438 void amvdec_src_change(struct amvdec_session *sess, u32 width,
439 u32 height, u32 dpb_size)
441 static const struct v4l2_event ev = {
442 .type = V4L2_EVENT_SOURCE_CHANGE,
443 .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION };
445 v4l2_ctrl_s_ctrl(sess->ctrl_min_buf_capture, dpb_size);
448 * Check if the capture queue is already configured well for our
449 * usecase. If so, keep decoding with it and do not send the event
451 if (sess->streamon_cap &&
452 sess->width == width &&
453 sess->height == height &&
454 dpb_size <= sess->num_dst_bufs) {
455 sess->fmt_out->codec_ops->resume(sess);
459 sess->changed_format = 0;
461 sess->height = height;
462 sess->status = STATUS_NEEDS_RESUME;
464 dev_dbg(sess->core->dev, "Res. changed (%ux%u), DPB size %u\n",
465 width, height, dpb_size);
466 v4l2_event_queue_fh(&sess->fh, &ev);
468 EXPORT_SYMBOL_GPL(amvdec_src_change);
470 void amvdec_abort(struct amvdec_session *sess)
472 dev_info(sess->core->dev, "Aborting decoding session!\n");
473 vb2_queue_error(&sess->m2m_ctx->cap_q_ctx.q);
474 vb2_queue_error(&sess->m2m_ctx->out_q_ctx.q);
476 EXPORT_SYMBOL_GPL(amvdec_abort);