1 // SPDX-License-Identifier: GPL-2.0+
3 * V4L2 Capture IC Preprocess Subdev for Freescale i.MX5/6 SOC
5 * This subdevice handles capture of video frames from the CSI or VDIC,
6 * which are routed directly to the Image Converter preprocess tasks,
7 * for resizing, colorspace conversion, and rotation.
9 * Copyright (c) 2012-2017 Mentor Graphics Inc.
11 #include <linux/delay.h>
12 #include <linux/interrupt.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/slab.h>
16 #include <linux/spinlock.h>
17 #include <linux/timer.h>
18 #include <media/v4l2-ctrls.h>
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-ioctl.h>
21 #include <media/v4l2-mc.h>
22 #include <media/v4l2-subdev.h>
23 #include <media/imx.h>
24 #include "imx-media.h"
28 * Min/Max supported width and heights.
30 * We allow planar output, so we have to align width at the source pad
31 * by 16 pixels to meet IDMAC alignment requirements for possible planar
34 * TODO: move this into pad format negotiation, if capture device
35 * has not requested a planar format, we should allow 8 pixel
36 * alignment at the source pad.
40 #define MAX_W_SINK 4096
41 #define MAX_H_SINK 4096
42 #define W_ALIGN_SINK 3 /* multiple of 8 pixels */
43 #define H_ALIGN_SINK 1 /* multiple of 2 lines */
45 #define MAX_W_SRC 1024
46 #define MAX_H_SRC 1024
47 #define W_ALIGN_SRC 1 /* multiple of 2 pixels */
48 #define H_ALIGN_SRC 1 /* multiple of 2 lines */
50 #define S_ALIGN 1 /* multiple of 2 */
53 struct imx_ic_priv *ic_priv;
54 struct media_pad pad[PRPENCVF_NUM_PADS];
55 /* the video device at output pad */
56 struct imx_media_video_dev *vdev;
58 /* lock to protect all members below */
61 /* IPU units we require */
63 struct ipuv3_channel *out_ch;
64 struct ipuv3_channel *rot_in_ch;
65 struct ipuv3_channel *rot_out_ch;
67 /* active vb2 buffers to send to video dev sink */
68 struct imx_media_buffer *active_vb2_buf[2];
69 struct imx_media_dma_buf underrun_buf;
71 int ipu_buf_num; /* ipu double buffer index: 0-1 */
73 /* the sink for the captured frames */
74 struct media_entity *sink;
75 /* the source subdev */
76 struct v4l2_subdev *src_sd;
78 struct v4l2_mbus_framefmt format_mbus[PRPENCVF_NUM_PADS];
79 const struct imx_media_pixfmt *cc[PRPENCVF_NUM_PADS];
80 struct v4l2_fract frame_interval;
82 struct imx_media_dma_buf rot_buf[2];
85 struct v4l2_ctrl_handler ctrl_hdlr;
86 int rotation; /* degrees */
90 /* derived from rotation, hflip, vflip controls */
91 enum ipu_rotate_mode rot_mode;
93 spinlock_t irqlock; /* protect eof_irq handler */
95 struct timer_list eof_timeout_timer;
100 u32 frame_sequence; /* frame sequence counter */
101 bool last_eof; /* waiting for last EOF at stream off */
102 bool nfb4eof; /* NFB4EOF encountered during streaming */
103 bool interweave_swap; /* swap top/bottom lines when interweaving */
104 struct completion last_eof_comp;
107 static const struct prp_channels {
112 [IC_TASK_ENCODER] = {
113 .out_ch = IPUV3_CHANNEL_IC_PRP_ENC_MEM,
114 .rot_in_ch = IPUV3_CHANNEL_MEM_ROT_ENC,
115 .rot_out_ch = IPUV3_CHANNEL_ROT_ENC_MEM,
117 [IC_TASK_VIEWFINDER] = {
118 .out_ch = IPUV3_CHANNEL_IC_PRP_VF_MEM,
119 .rot_in_ch = IPUV3_CHANNEL_MEM_ROT_VF,
120 .rot_out_ch = IPUV3_CHANNEL_ROT_VF_MEM,
124 static inline struct prp_priv *sd_to_priv(struct v4l2_subdev *sd)
126 struct imx_ic_priv *ic_priv = v4l2_get_subdevdata(sd);
128 return ic_priv->task_priv;
131 static void prp_put_ipu_resources(struct prp_priv *priv)
134 ipu_ic_put(priv->ic);
138 ipu_idmac_put(priv->out_ch);
142 ipu_idmac_put(priv->rot_in_ch);
143 priv->rot_in_ch = NULL;
145 if (priv->rot_out_ch)
146 ipu_idmac_put(priv->rot_out_ch);
147 priv->rot_out_ch = NULL;
150 static int prp_get_ipu_resources(struct prp_priv *priv)
152 struct imx_ic_priv *ic_priv = priv->ic_priv;
154 struct ipuv3_channel *out_ch, *rot_in_ch, *rot_out_ch;
155 int ret, task = ic_priv->task_id;
157 ic = ipu_ic_get(ic_priv->ipu, task);
159 v4l2_err(&ic_priv->sd, "failed to get IC\n");
165 out_ch = ipu_idmac_get(ic_priv->ipu, prp_channel[task].out_ch);
166 if (IS_ERR(out_ch)) {
167 v4l2_err(&ic_priv->sd, "could not get IDMAC channel %u\n",
168 prp_channel[task].out_ch);
169 ret = PTR_ERR(out_ch);
172 priv->out_ch = out_ch;
174 rot_in_ch = ipu_idmac_get(ic_priv->ipu, prp_channel[task].rot_in_ch);
175 if (IS_ERR(rot_in_ch)) {
176 v4l2_err(&ic_priv->sd, "could not get IDMAC channel %u\n",
177 prp_channel[task].rot_in_ch);
178 ret = PTR_ERR(rot_in_ch);
181 priv->rot_in_ch = rot_in_ch;
183 rot_out_ch = ipu_idmac_get(ic_priv->ipu, prp_channel[task].rot_out_ch);
184 if (IS_ERR(rot_out_ch)) {
185 v4l2_err(&ic_priv->sd, "could not get IDMAC channel %u\n",
186 prp_channel[task].rot_out_ch);
187 ret = PTR_ERR(rot_out_ch);
190 priv->rot_out_ch = rot_out_ch;
194 prp_put_ipu_resources(priv);
198 static void prp_vb2_buf_done(struct prp_priv *priv, struct ipuv3_channel *ch)
200 struct imx_media_video_dev *vdev = priv->vdev;
201 struct imx_media_buffer *done, *next;
202 struct vb2_buffer *vb;
205 done = priv->active_vb2_buf[priv->ipu_buf_num];
207 done->vbuf.field = vdev->fmt.field;
208 done->vbuf.sequence = priv->frame_sequence;
209 vb = &done->vbuf.vb2_buf;
210 vb->timestamp = ktime_get_ns();
211 vb2_buffer_done(vb, priv->nfb4eof ?
212 VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
215 priv->frame_sequence++;
216 priv->nfb4eof = false;
218 /* get next queued buffer */
219 next = imx_media_capture_device_next_buf(vdev);
221 phys = vb2_dma_contig_plane_dma_addr(&next->vbuf.vb2_buf, 0);
222 priv->active_vb2_buf[priv->ipu_buf_num] = next;
224 phys = priv->underrun_buf.phys;
225 priv->active_vb2_buf[priv->ipu_buf_num] = NULL;
228 if (ipu_idmac_buffer_is_ready(ch, priv->ipu_buf_num))
229 ipu_idmac_clear_buffer(ch, priv->ipu_buf_num);
231 if (priv->interweave_swap && ch == priv->out_ch)
232 phys += vdev->fmt.bytesperline;
234 ipu_cpmem_set_buffer(ch, priv->ipu_buf_num, phys);
237 static irqreturn_t prp_eof_interrupt(int irq, void *dev_id)
239 struct prp_priv *priv = dev_id;
240 struct ipuv3_channel *channel;
242 spin_lock(&priv->irqlock);
244 if (priv->last_eof) {
245 complete(&priv->last_eof_comp);
246 priv->last_eof = false;
250 channel = (ipu_rot_mode_is_irt(priv->rot_mode)) ?
251 priv->rot_out_ch : priv->out_ch;
253 prp_vb2_buf_done(priv, channel);
255 /* select new IPU buf */
256 ipu_idmac_select_buffer(channel, priv->ipu_buf_num);
257 /* toggle IPU double-buffer index */
258 priv->ipu_buf_num ^= 1;
260 /* bump the EOF timeout timer */
261 mod_timer(&priv->eof_timeout_timer,
262 jiffies + msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT));
265 spin_unlock(&priv->irqlock);
269 static irqreturn_t prp_nfb4eof_interrupt(int irq, void *dev_id)
271 struct prp_priv *priv = dev_id;
272 struct imx_ic_priv *ic_priv = priv->ic_priv;
274 spin_lock(&priv->irqlock);
277 * this is not an unrecoverable error, just mark
278 * the next captured frame with vb2 error flag.
280 priv->nfb4eof = true;
282 v4l2_err(&ic_priv->sd, "NFB4EOF\n");
284 spin_unlock(&priv->irqlock);
290 * EOF timeout timer function.
293 * EOF timeout timer function. This is an unrecoverable condition
294 * without a stream restart.
296 static void prp_eof_timeout(struct timer_list *t)
298 struct prp_priv *priv = from_timer(priv, t, eof_timeout_timer);
299 struct imx_media_video_dev *vdev = priv->vdev;
300 struct imx_ic_priv *ic_priv = priv->ic_priv;
302 v4l2_err(&ic_priv->sd, "EOF timeout\n");
304 /* signal a fatal error to capture device */
305 imx_media_capture_device_error(vdev);
308 static void prp_setup_vb2_buf(struct prp_priv *priv, dma_addr_t *phys)
310 struct imx_media_video_dev *vdev = priv->vdev;
311 struct imx_media_buffer *buf;
314 for (i = 0; i < 2; i++) {
315 buf = imx_media_capture_device_next_buf(vdev);
317 priv->active_vb2_buf[i] = buf;
318 phys[i] = vb2_dma_contig_plane_dma_addr(
319 &buf->vbuf.vb2_buf, 0);
321 priv->active_vb2_buf[i] = NULL;
322 phys[i] = priv->underrun_buf.phys;
327 static void prp_unsetup_vb2_buf(struct prp_priv *priv,
328 enum vb2_buffer_state return_status)
330 struct imx_media_buffer *buf;
333 /* return any remaining active frames with return_status */
334 for (i = 0; i < 2; i++) {
335 buf = priv->active_vb2_buf[i];
337 struct vb2_buffer *vb = &buf->vbuf.vb2_buf;
339 vb->timestamp = ktime_get_ns();
340 vb2_buffer_done(vb, return_status);
345 static int prp_setup_channel(struct prp_priv *priv,
346 struct ipuv3_channel *channel,
347 enum ipu_rotate_mode rot_mode,
348 dma_addr_t addr0, dma_addr_t addr1,
349 bool rot_swap_width_height)
351 struct imx_media_video_dev *vdev = priv->vdev;
352 const struct imx_media_pixfmt *outcc;
353 struct v4l2_mbus_framefmt *outfmt;
354 unsigned int burst_size;
355 struct ipu_image image;
359 outfmt = &priv->format_mbus[PRPENCVF_SRC_PAD];
362 ipu_cpmem_zero(channel);
364 memset(&image, 0, sizeof(image));
365 image.pix = vdev->fmt;
366 image.rect = vdev->compose;
369 * If the field type at capture interface is interlaced, and
370 * the output IDMAC pad is sequential, enable interweave at
371 * the IDMAC output channel.
373 interweave = V4L2_FIELD_IS_INTERLACED(image.pix.field) &&
374 V4L2_FIELD_IS_SEQUENTIAL(outfmt->field);
375 priv->interweave_swap = interweave &&
376 image.pix.field == V4L2_FIELD_INTERLACED_BT;
378 if (rot_swap_width_height) {
379 swap(image.pix.width, image.pix.height);
380 swap(image.rect.width, image.rect.height);
381 /* recalc stride using swapped width */
382 image.pix.bytesperline = outcc->planar ?
384 (image.pix.width * outcc->bpp) >> 3;
387 if (priv->interweave_swap && channel == priv->out_ch) {
388 /* start interweave scan at 1st top line (2nd line) */
396 * Skip writing U and V components to odd rows in the output
397 * channels for planar 4:2:0 (but not when enabling IDMAC
398 * interweaving, they are incompatible).
400 if ((channel == priv->out_ch && !interweave) ||
401 channel == priv->rot_out_ch) {
402 switch (image.pix.pixelformat) {
403 case V4L2_PIX_FMT_YUV420:
404 case V4L2_PIX_FMT_YVU420:
405 case V4L2_PIX_FMT_NV12:
406 ipu_cpmem_skip_odd_chroma_rows(channel);
411 ret = ipu_cpmem_set_image(channel, &image);
415 if (channel == priv->rot_in_ch ||
416 channel == priv->rot_out_ch) {
418 ipu_cpmem_set_block_mode(channel);
420 burst_size = (image.pix.width & 0xf) ? 8 : 16;
423 ipu_cpmem_set_burstsize(channel, burst_size);
426 ipu_cpmem_set_rotation(channel, rot_mode);
428 if (interweave && channel == priv->out_ch)
429 ipu_cpmem_interlaced_scan(channel,
430 priv->interweave_swap ?
431 -image.pix.bytesperline :
432 image.pix.bytesperline,
433 image.pix.pixelformat);
435 ret = ipu_ic_task_idma_init(priv->ic, channel,
436 image.pix.width, image.pix.height,
437 burst_size, rot_mode);
441 ipu_cpmem_set_axi_id(channel, 1);
443 ipu_idmac_set_double_buffer(channel, true);
448 static int prp_setup_rotation(struct prp_priv *priv)
450 struct imx_media_video_dev *vdev = priv->vdev;
451 struct imx_ic_priv *ic_priv = priv->ic_priv;
452 const struct imx_media_pixfmt *outcc, *incc;
453 struct v4l2_mbus_framefmt *infmt;
454 struct v4l2_pix_format *outfmt;
455 struct ipu_ic_csc csc;
459 infmt = &priv->format_mbus[PRPENCVF_SINK_PAD];
461 incc = priv->cc[PRPENCVF_SINK_PAD];
464 ret = ipu_ic_calc_csc(&csc,
465 infmt->ycbcr_enc, infmt->quantization,
467 outfmt->ycbcr_enc, outfmt->quantization,
470 v4l2_err(&ic_priv->sd, "ipu_ic_calc_csc failed, %d\n",
475 ret = imx_media_alloc_dma_buf(ic_priv->ipu_dev, &priv->rot_buf[0],
478 v4l2_err(&ic_priv->sd, "failed to alloc rot_buf[0], %d\n", ret);
481 ret = imx_media_alloc_dma_buf(ic_priv->ipu_dev, &priv->rot_buf[1],
484 v4l2_err(&ic_priv->sd, "failed to alloc rot_buf[1], %d\n", ret);
488 ret = ipu_ic_task_init(priv->ic, &csc,
489 infmt->width, infmt->height,
490 outfmt->height, outfmt->width);
492 v4l2_err(&ic_priv->sd, "ipu_ic_task_init failed, %d\n", ret);
496 /* init the IC-PRP-->MEM IDMAC channel */
497 ret = prp_setup_channel(priv, priv->out_ch, IPU_ROTATE_NONE,
498 priv->rot_buf[0].phys, priv->rot_buf[1].phys,
501 v4l2_err(&ic_priv->sd,
502 "prp_setup_channel(out_ch) failed, %d\n", ret);
506 /* init the MEM-->IC-PRP ROT IDMAC channel */
507 ret = prp_setup_channel(priv, priv->rot_in_ch, priv->rot_mode,
508 priv->rot_buf[0].phys, priv->rot_buf[1].phys,
511 v4l2_err(&ic_priv->sd,
512 "prp_setup_channel(rot_in_ch) failed, %d\n", ret);
516 prp_setup_vb2_buf(priv, phys);
518 /* init the destination IC-PRP ROT-->MEM IDMAC channel */
519 ret = prp_setup_channel(priv, priv->rot_out_ch, IPU_ROTATE_NONE,
523 v4l2_err(&ic_priv->sd,
524 "prp_setup_channel(rot_out_ch) failed, %d\n", ret);
528 /* now link IC-PRP-->MEM to MEM-->IC-PRP ROT */
529 ipu_idmac_link(priv->out_ch, priv->rot_in_ch);
532 ipu_ic_enable(priv->ic);
534 /* set buffers ready */
535 ipu_idmac_select_buffer(priv->out_ch, 0);
536 ipu_idmac_select_buffer(priv->out_ch, 1);
537 ipu_idmac_select_buffer(priv->rot_out_ch, 0);
538 ipu_idmac_select_buffer(priv->rot_out_ch, 1);
540 /* enable the channels */
541 ipu_idmac_enable_channel(priv->out_ch);
542 ipu_idmac_enable_channel(priv->rot_in_ch);
543 ipu_idmac_enable_channel(priv->rot_out_ch);
545 /* and finally enable the IC PRP task */
546 ipu_ic_task_enable(priv->ic);
551 prp_unsetup_vb2_buf(priv, VB2_BUF_STATE_QUEUED);
553 imx_media_free_dma_buf(ic_priv->ipu_dev, &priv->rot_buf[1]);
555 imx_media_free_dma_buf(ic_priv->ipu_dev, &priv->rot_buf[0]);
559 static void prp_unsetup_rotation(struct prp_priv *priv)
561 struct imx_ic_priv *ic_priv = priv->ic_priv;
563 ipu_ic_task_disable(priv->ic);
565 ipu_idmac_disable_channel(priv->out_ch);
566 ipu_idmac_disable_channel(priv->rot_in_ch);
567 ipu_idmac_disable_channel(priv->rot_out_ch);
569 ipu_idmac_unlink(priv->out_ch, priv->rot_in_ch);
571 ipu_ic_disable(priv->ic);
573 imx_media_free_dma_buf(ic_priv->ipu_dev, &priv->rot_buf[0]);
574 imx_media_free_dma_buf(ic_priv->ipu_dev, &priv->rot_buf[1]);
577 static int prp_setup_norotation(struct prp_priv *priv)
579 struct imx_media_video_dev *vdev = priv->vdev;
580 struct imx_ic_priv *ic_priv = priv->ic_priv;
581 const struct imx_media_pixfmt *outcc, *incc;
582 struct v4l2_mbus_framefmt *infmt;
583 struct v4l2_pix_format *outfmt;
584 struct ipu_ic_csc csc;
588 infmt = &priv->format_mbus[PRPENCVF_SINK_PAD];
590 incc = priv->cc[PRPENCVF_SINK_PAD];
593 ret = ipu_ic_calc_csc(&csc,
594 infmt->ycbcr_enc, infmt->quantization,
596 outfmt->ycbcr_enc, outfmt->quantization,
599 v4l2_err(&ic_priv->sd, "ipu_ic_calc_csc failed, %d\n",
604 ret = ipu_ic_task_init(priv->ic, &csc,
605 infmt->width, infmt->height,
606 outfmt->width, outfmt->height);
608 v4l2_err(&ic_priv->sd, "ipu_ic_task_init failed, %d\n", ret);
612 prp_setup_vb2_buf(priv, phys);
614 /* init the IC PRP-->MEM IDMAC channel */
615 ret = prp_setup_channel(priv, priv->out_ch, priv->rot_mode,
616 phys[0], phys[1], false);
618 v4l2_err(&ic_priv->sd,
619 "prp_setup_channel(out_ch) failed, %d\n", ret);
623 ipu_cpmem_dump(priv->out_ch);
624 ipu_ic_dump(priv->ic);
625 ipu_dump(ic_priv->ipu);
627 ipu_ic_enable(priv->ic);
629 /* set buffers ready */
630 ipu_idmac_select_buffer(priv->out_ch, 0);
631 ipu_idmac_select_buffer(priv->out_ch, 1);
633 /* enable the channels */
634 ipu_idmac_enable_channel(priv->out_ch);
636 /* enable the IC task */
637 ipu_ic_task_enable(priv->ic);
642 prp_unsetup_vb2_buf(priv, VB2_BUF_STATE_QUEUED);
646 static void prp_unsetup_norotation(struct prp_priv *priv)
648 ipu_ic_task_disable(priv->ic);
649 ipu_idmac_disable_channel(priv->out_ch);
650 ipu_ic_disable(priv->ic);
653 static void prp_unsetup(struct prp_priv *priv,
654 enum vb2_buffer_state state)
656 if (ipu_rot_mode_is_irt(priv->rot_mode))
657 prp_unsetup_rotation(priv);
659 prp_unsetup_norotation(priv);
661 prp_unsetup_vb2_buf(priv, state);
664 static int prp_start(struct prp_priv *priv)
666 struct imx_ic_priv *ic_priv = priv->ic_priv;
667 struct imx_media_video_dev *vdev = priv->vdev;
670 ret = prp_get_ipu_resources(priv);
674 ret = imx_media_alloc_dma_buf(ic_priv->ipu_dev, &priv->underrun_buf,
675 vdev->fmt.sizeimage);
679 priv->ipu_buf_num = 0;
681 /* init EOF completion waitq */
682 init_completion(&priv->last_eof_comp);
683 priv->frame_sequence = 0;
684 priv->last_eof = false;
685 priv->nfb4eof = false;
687 if (ipu_rot_mode_is_irt(priv->rot_mode))
688 ret = prp_setup_rotation(priv);
690 ret = prp_setup_norotation(priv);
692 goto out_free_underrun;
694 priv->nfb4eof_irq = ipu_idmac_channel_irq(ic_priv->ipu,
697 ret = devm_request_irq(ic_priv->ipu_dev, priv->nfb4eof_irq,
698 prp_nfb4eof_interrupt, 0,
699 "imx-ic-prp-nfb4eof", priv);
701 v4l2_err(&ic_priv->sd,
702 "Error registering NFB4EOF irq: %d\n", ret);
706 if (ipu_rot_mode_is_irt(priv->rot_mode))
707 priv->eof_irq = ipu_idmac_channel_irq(
708 ic_priv->ipu, priv->rot_out_ch, IPU_IRQ_EOF);
710 priv->eof_irq = ipu_idmac_channel_irq(
711 ic_priv->ipu, priv->out_ch, IPU_IRQ_EOF);
713 ret = devm_request_irq(ic_priv->ipu_dev, priv->eof_irq,
714 prp_eof_interrupt, 0,
715 "imx-ic-prp-eof", priv);
717 v4l2_err(&ic_priv->sd,
718 "Error registering eof irq: %d\n", ret);
719 goto out_free_nfb4eof_irq;
723 ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 1);
724 ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0;
726 v4l2_err(&ic_priv->sd,
727 "upstream stream on failed: %d\n", ret);
728 goto out_free_eof_irq;
731 /* start the EOF timeout timer */
732 mod_timer(&priv->eof_timeout_timer,
733 jiffies + msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT));
738 devm_free_irq(ic_priv->ipu_dev, priv->eof_irq, priv);
739 out_free_nfb4eof_irq:
740 devm_free_irq(ic_priv->ipu_dev, priv->nfb4eof_irq, priv);
742 prp_unsetup(priv, VB2_BUF_STATE_QUEUED);
744 imx_media_free_dma_buf(ic_priv->ipu_dev, &priv->underrun_buf);
746 prp_put_ipu_resources(priv);
750 static void prp_stop(struct prp_priv *priv)
752 struct imx_ic_priv *ic_priv = priv->ic_priv;
756 /* mark next EOF interrupt as the last before stream off */
757 spin_lock_irqsave(&priv->irqlock, flags);
758 priv->last_eof = true;
759 spin_unlock_irqrestore(&priv->irqlock, flags);
762 * and then wait for interrupt handler to mark completion.
764 ret = wait_for_completion_timeout(
765 &priv->last_eof_comp,
766 msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT));
768 v4l2_warn(&ic_priv->sd, "wait last EOF timeout\n");
771 ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 0);
772 if (ret && ret != -ENOIOCTLCMD)
773 v4l2_warn(&ic_priv->sd,
774 "upstream stream off failed: %d\n", ret);
776 devm_free_irq(ic_priv->ipu_dev, priv->eof_irq, priv);
777 devm_free_irq(ic_priv->ipu_dev, priv->nfb4eof_irq, priv);
779 prp_unsetup(priv, VB2_BUF_STATE_ERROR);
781 imx_media_free_dma_buf(ic_priv->ipu_dev, &priv->underrun_buf);
783 /* cancel the EOF timeout timer */
784 del_timer_sync(&priv->eof_timeout_timer);
786 prp_put_ipu_resources(priv);
789 static struct v4l2_mbus_framefmt *
790 __prp_get_fmt(struct prp_priv *priv, struct v4l2_subdev_pad_config *cfg,
791 unsigned int pad, enum v4l2_subdev_format_whence which)
793 struct imx_ic_priv *ic_priv = priv->ic_priv;
795 if (which == V4L2_SUBDEV_FORMAT_TRY)
796 return v4l2_subdev_get_try_format(&ic_priv->sd, cfg, pad);
798 return &priv->format_mbus[pad];
802 * Applies IC resizer and IDMAC alignment restrictions to output
803 * rectangle given the input rectangle, and depending on given
806 * The IC resizer cannot downsize more than 4:1. Note also that
807 * for 90 or 270 rotation, _both_ output width and height must
808 * be aligned by W_ALIGN_SRC, because the intermediate rotation
809 * buffer swaps output width/height, and the final output buffer
812 * Returns true if the output rectangle was modified.
814 static bool prp_bound_align_output(struct v4l2_mbus_framefmt *outfmt,
815 struct v4l2_mbus_framefmt *infmt,
816 enum ipu_rotate_mode rot_mode)
818 u32 orig_width = outfmt->width;
819 u32 orig_height = outfmt->height;
821 if (ipu_rot_mode_is_irt(rot_mode))
822 v4l_bound_align_image(&outfmt->width,
823 infmt->height / 4, MAX_H_SRC,
826 infmt->width / 4, MAX_W_SRC,
827 W_ALIGN_SRC, S_ALIGN);
829 v4l_bound_align_image(&outfmt->width,
830 infmt->width / 4, MAX_W_SRC,
833 infmt->height / 4, MAX_H_SRC,
834 H_ALIGN_SRC, S_ALIGN);
836 return outfmt->width != orig_width || outfmt->height != orig_height;
840 * V4L2 subdev operations.
843 static int prp_enum_mbus_code(struct v4l2_subdev *sd,
844 struct v4l2_subdev_pad_config *cfg,
845 struct v4l2_subdev_mbus_code_enum *code)
847 if (code->pad >= PRPENCVF_NUM_PADS)
850 return imx_media_enum_ipu_formats(&code->code, code->index,
854 static int prp_get_fmt(struct v4l2_subdev *sd,
855 struct v4l2_subdev_pad_config *cfg,
856 struct v4l2_subdev_format *sdformat)
858 struct prp_priv *priv = sd_to_priv(sd);
859 struct v4l2_mbus_framefmt *fmt;
862 if (sdformat->pad >= PRPENCVF_NUM_PADS)
865 mutex_lock(&priv->lock);
867 fmt = __prp_get_fmt(priv, cfg, sdformat->pad, sdformat->which);
873 sdformat->format = *fmt;
875 mutex_unlock(&priv->lock);
879 static void prp_try_fmt(struct prp_priv *priv,
880 struct v4l2_subdev_pad_config *cfg,
881 struct v4l2_subdev_format *sdformat,
882 const struct imx_media_pixfmt **cc)
884 struct v4l2_mbus_framefmt *infmt;
886 *cc = imx_media_find_ipu_format(sdformat->format.code,
891 imx_media_enum_ipu_formats(&code, 0, PIXFMT_SEL_YUV_RGB);
892 *cc = imx_media_find_ipu_format(code, PIXFMT_SEL_YUV_RGB);
894 sdformat->format.code = (*cc)->codes[0];
897 infmt = __prp_get_fmt(priv, cfg, PRPENCVF_SINK_PAD, sdformat->which);
899 if (sdformat->pad == PRPENCVF_SRC_PAD) {
900 sdformat->format.field = infmt->field;
902 prp_bound_align_output(&sdformat->format, infmt,
905 /* propagate colorimetry from sink */
906 sdformat->format.colorspace = infmt->colorspace;
907 sdformat->format.xfer_func = infmt->xfer_func;
909 v4l_bound_align_image(&sdformat->format.width,
910 MIN_W_SINK, MAX_W_SINK, W_ALIGN_SINK,
911 &sdformat->format.height,
912 MIN_H_SINK, MAX_H_SINK, H_ALIGN_SINK,
915 if (sdformat->format.field == V4L2_FIELD_ANY)
916 sdformat->format.field = V4L2_FIELD_NONE;
919 imx_media_try_colorimetry(&sdformat->format, true);
922 static int prp_set_fmt(struct v4l2_subdev *sd,
923 struct v4l2_subdev_pad_config *cfg,
924 struct v4l2_subdev_format *sdformat)
926 struct prp_priv *priv = sd_to_priv(sd);
927 const struct imx_media_pixfmt *cc;
928 struct v4l2_mbus_framefmt *fmt;
931 if (sdformat->pad >= PRPENCVF_NUM_PADS)
934 mutex_lock(&priv->lock);
936 if (priv->stream_count > 0) {
941 prp_try_fmt(priv, cfg, sdformat, &cc);
943 fmt = __prp_get_fmt(priv, cfg, sdformat->pad, sdformat->which);
944 *fmt = sdformat->format;
946 /* propagate a default format to source pad */
947 if (sdformat->pad == PRPENCVF_SINK_PAD) {
948 const struct imx_media_pixfmt *outcc;
949 struct v4l2_mbus_framefmt *outfmt;
950 struct v4l2_subdev_format format;
952 format.pad = PRPENCVF_SRC_PAD;
953 format.which = sdformat->which;
954 format.format = sdformat->format;
955 prp_try_fmt(priv, cfg, &format, &outcc);
957 outfmt = __prp_get_fmt(priv, cfg, PRPENCVF_SRC_PAD,
959 *outfmt = format.format;
960 if (sdformat->which == V4L2_SUBDEV_FORMAT_ACTIVE)
961 priv->cc[PRPENCVF_SRC_PAD] = outcc;
964 if (sdformat->which == V4L2_SUBDEV_FORMAT_ACTIVE)
965 priv->cc[sdformat->pad] = cc;
968 mutex_unlock(&priv->lock);
972 static int prp_enum_frame_size(struct v4l2_subdev *sd,
973 struct v4l2_subdev_pad_config *cfg,
974 struct v4l2_subdev_frame_size_enum *fse)
976 struct prp_priv *priv = sd_to_priv(sd);
977 struct v4l2_subdev_format format = {};
978 const struct imx_media_pixfmt *cc;
981 if (fse->pad >= PRPENCVF_NUM_PADS || fse->index != 0)
984 mutex_lock(&priv->lock);
986 format.pad = fse->pad;
987 format.which = fse->which;
988 format.format.code = fse->code;
989 format.format.width = 1;
990 format.format.height = 1;
991 prp_try_fmt(priv, cfg, &format, &cc);
992 fse->min_width = format.format.width;
993 fse->min_height = format.format.height;
995 if (format.format.code != fse->code) {
1000 format.format.code = fse->code;
1001 format.format.width = -1;
1002 format.format.height = -1;
1003 prp_try_fmt(priv, cfg, &format, &cc);
1004 fse->max_width = format.format.width;
1005 fse->max_height = format.format.height;
1007 mutex_unlock(&priv->lock);
1011 static int prp_link_setup(struct media_entity *entity,
1012 const struct media_pad *local,
1013 const struct media_pad *remote, u32 flags)
1015 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1016 struct imx_ic_priv *ic_priv = v4l2_get_subdevdata(sd);
1017 struct prp_priv *priv = ic_priv->task_priv;
1018 struct v4l2_subdev *remote_sd;
1021 dev_dbg(ic_priv->ipu_dev, "%s: link setup %s -> %s",
1022 ic_priv->sd.name, remote->entity->name, local->entity->name);
1024 mutex_lock(&priv->lock);
1026 if (local->flags & MEDIA_PAD_FL_SINK) {
1027 if (!is_media_entity_v4l2_subdev(remote->entity)) {
1032 remote_sd = media_entity_to_v4l2_subdev(remote->entity);
1034 if (flags & MEDIA_LNK_FL_ENABLED) {
1039 priv->src_sd = remote_sd;
1041 priv->src_sd = NULL;
1047 /* this is the source pad */
1049 /* the remote must be the device node */
1050 if (!is_media_entity_v4l2_video_device(remote->entity)) {
1055 if (flags & MEDIA_LNK_FL_ENABLED) {
1065 priv->sink = remote->entity;
1067 mutex_unlock(&priv->lock);
1071 static int prp_s_ctrl(struct v4l2_ctrl *ctrl)
1073 struct prp_priv *priv = container_of(ctrl->handler,
1074 struct prp_priv, ctrl_hdlr);
1075 struct imx_ic_priv *ic_priv = priv->ic_priv;
1076 enum ipu_rotate_mode rot_mode;
1077 int rotation, ret = 0;
1080 mutex_lock(&priv->lock);
1082 rotation = priv->rotation;
1083 hflip = priv->hflip;
1084 vflip = priv->vflip;
1087 case V4L2_CID_HFLIP:
1088 hflip = (ctrl->val == 1);
1090 case V4L2_CID_VFLIP:
1091 vflip = (ctrl->val == 1);
1093 case V4L2_CID_ROTATE:
1094 rotation = ctrl->val;
1097 v4l2_err(&ic_priv->sd, "Invalid control\n");
1102 ret = ipu_degrees_to_rot_mode(&rot_mode, rotation, hflip, vflip);
1106 if (rot_mode != priv->rot_mode) {
1107 struct v4l2_mbus_framefmt outfmt, infmt;
1109 /* can't change rotation mid-streaming */
1110 if (priv->stream_count > 0) {
1115 outfmt = priv->format_mbus[PRPENCVF_SRC_PAD];
1116 infmt = priv->format_mbus[PRPENCVF_SINK_PAD];
1118 if (prp_bound_align_output(&outfmt, &infmt, rot_mode)) {
1123 priv->rot_mode = rot_mode;
1124 priv->rotation = rotation;
1125 priv->hflip = hflip;
1126 priv->vflip = vflip;
1130 mutex_unlock(&priv->lock);
1134 static const struct v4l2_ctrl_ops prp_ctrl_ops = {
1135 .s_ctrl = prp_s_ctrl,
1138 static int prp_init_controls(struct prp_priv *priv)
1140 struct imx_ic_priv *ic_priv = priv->ic_priv;
1141 struct v4l2_ctrl_handler *hdlr = &priv->ctrl_hdlr;
1144 v4l2_ctrl_handler_init(hdlr, 3);
1146 v4l2_ctrl_new_std(hdlr, &prp_ctrl_ops, V4L2_CID_HFLIP,
1148 v4l2_ctrl_new_std(hdlr, &prp_ctrl_ops, V4L2_CID_VFLIP,
1150 v4l2_ctrl_new_std(hdlr, &prp_ctrl_ops, V4L2_CID_ROTATE,
1153 ic_priv->sd.ctrl_handler = hdlr;
1160 v4l2_ctrl_handler_setup(hdlr);
1164 v4l2_ctrl_handler_free(hdlr);
1168 static int prp_s_stream(struct v4l2_subdev *sd, int enable)
1170 struct imx_ic_priv *ic_priv = v4l2_get_subdevdata(sd);
1171 struct prp_priv *priv = ic_priv->task_priv;
1174 mutex_lock(&priv->lock);
1176 if (!priv->src_sd || !priv->sink) {
1182 * enable/disable streaming only if stream_count is
1183 * going from 0 to 1 / 1 to 0.
1185 if (priv->stream_count != !enable)
1188 dev_dbg(ic_priv->ipu_dev, "%s: stream %s\n", sd->name,
1189 enable ? "ON" : "OFF");
1192 ret = prp_start(priv);
1199 priv->stream_count += enable ? 1 : -1;
1200 if (priv->stream_count < 0)
1201 priv->stream_count = 0;
1203 mutex_unlock(&priv->lock);
1207 static int prp_g_frame_interval(struct v4l2_subdev *sd,
1208 struct v4l2_subdev_frame_interval *fi)
1210 struct prp_priv *priv = sd_to_priv(sd);
1212 if (fi->pad >= PRPENCVF_NUM_PADS)
1215 mutex_lock(&priv->lock);
1216 fi->interval = priv->frame_interval;
1217 mutex_unlock(&priv->lock);
1222 static int prp_s_frame_interval(struct v4l2_subdev *sd,
1223 struct v4l2_subdev_frame_interval *fi)
1225 struct prp_priv *priv = sd_to_priv(sd);
1227 if (fi->pad >= PRPENCVF_NUM_PADS)
1230 mutex_lock(&priv->lock);
1232 /* No limits on valid frame intervals */
1233 if (fi->interval.numerator == 0 || fi->interval.denominator == 0)
1234 fi->interval = priv->frame_interval;
1236 priv->frame_interval = fi->interval;
1238 mutex_unlock(&priv->lock);
1243 static int prp_registered(struct v4l2_subdev *sd)
1245 struct prp_priv *priv = sd_to_priv(sd);
1246 struct imx_ic_priv *ic_priv = priv->ic_priv;
1250 /* set a default mbus format */
1251 imx_media_enum_ipu_formats(&code, 0, PIXFMT_SEL_YUV);
1253 for (i = 0; i < PRPENCVF_NUM_PADS; i++) {
1254 ret = imx_media_init_mbus_fmt(&priv->format_mbus[i],
1255 IMX_MEDIA_DEF_PIX_WIDTH,
1256 IMX_MEDIA_DEF_PIX_HEIGHT, code,
1257 V4L2_FIELD_NONE, &priv->cc[i]);
1262 /* init default frame interval */
1263 priv->frame_interval.numerator = 1;
1264 priv->frame_interval.denominator = 30;
1266 priv->vdev = imx_media_capture_device_init(ic_priv->ipu_dev,
1268 PRPENCVF_SRC_PAD, true);
1269 if (IS_ERR(priv->vdev))
1270 return PTR_ERR(priv->vdev);
1272 ret = imx_media_capture_device_register(priv->vdev, 0);
1276 ret = prp_init_controls(priv);
1283 imx_media_capture_device_unregister(priv->vdev);
1285 imx_media_capture_device_remove(priv->vdev);
1289 static void prp_unregistered(struct v4l2_subdev *sd)
1291 struct prp_priv *priv = sd_to_priv(sd);
1293 imx_media_capture_device_unregister(priv->vdev);
1294 imx_media_capture_device_remove(priv->vdev);
1296 v4l2_ctrl_handler_free(&priv->ctrl_hdlr);
1299 static const struct v4l2_subdev_pad_ops prp_pad_ops = {
1300 .init_cfg = imx_media_init_cfg,
1301 .enum_mbus_code = prp_enum_mbus_code,
1302 .enum_frame_size = prp_enum_frame_size,
1303 .get_fmt = prp_get_fmt,
1304 .set_fmt = prp_set_fmt,
1307 static const struct v4l2_subdev_video_ops prp_video_ops = {
1308 .g_frame_interval = prp_g_frame_interval,
1309 .s_frame_interval = prp_s_frame_interval,
1310 .s_stream = prp_s_stream,
1313 static const struct media_entity_operations prp_entity_ops = {
1314 .link_setup = prp_link_setup,
1315 .link_validate = v4l2_subdev_link_validate,
1318 static const struct v4l2_subdev_ops prp_subdev_ops = {
1319 .video = &prp_video_ops,
1320 .pad = &prp_pad_ops,
1323 static const struct v4l2_subdev_internal_ops prp_internal_ops = {
1324 .registered = prp_registered,
1325 .unregistered = prp_unregistered,
1328 static int prp_init(struct imx_ic_priv *ic_priv)
1330 struct prp_priv *priv;
1333 priv = devm_kzalloc(ic_priv->ipu_dev, sizeof(*priv), GFP_KERNEL);
1337 ic_priv->task_priv = priv;
1338 priv->ic_priv = ic_priv;
1340 spin_lock_init(&priv->irqlock);
1341 timer_setup(&priv->eof_timeout_timer, prp_eof_timeout, 0);
1343 mutex_init(&priv->lock);
1345 for (i = 0; i < PRPENCVF_NUM_PADS; i++) {
1346 priv->pad[i].flags = (i == PRPENCVF_SINK_PAD) ?
1347 MEDIA_PAD_FL_SINK : MEDIA_PAD_FL_SOURCE;
1350 ret = media_entity_pads_init(&ic_priv->sd.entity, PRPENCVF_NUM_PADS,
1353 mutex_destroy(&priv->lock);
1358 static void prp_remove(struct imx_ic_priv *ic_priv)
1360 struct prp_priv *priv = ic_priv->task_priv;
1362 mutex_destroy(&priv->lock);
1365 struct imx_ic_ops imx_ic_prpencvf_ops = {
1366 .subdev_ops = &prp_subdev_ops,
1367 .internal_ops = &prp_internal_ops,
1368 .entity_ops = &prp_entity_ops,
1370 .remove = prp_remove,