2 * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
3 * Copyright (C) 2013, Intel Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
13 #include <linux/atomic.h>
14 #include <linux/dmaengine.h>
15 #include <linux/errno.h>
17 #include <linux/interrupt.h>
18 #include <linux/platform_device.h>
19 #include <linux/pxa2xx_ssp.h>
20 #include <linux/scatterlist.h>
21 #include <linux/sizes.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/pxa2xx_spi.h>
26 /* Driver model hookup */
27 struct platform_device *pdev;
30 struct ssp_device *ssp;
32 /* SPI framework hookup */
33 enum pxa_ssp_type ssp_type;
34 struct spi_master *master;
37 struct pxa2xx_spi_master *master_info;
39 /* SSP register addresses */
49 /* Message Transfer pump */
50 struct tasklet_struct pump_transfers;
52 /* DMA engine support */
55 /* Current message transfer state info */
56 struct spi_transfer *cur_transfer;
57 struct chip_data *cur_chip;
64 int (*write)(struct driver_data *drv_data);
65 int (*read)(struct driver_data *drv_data);
66 irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
67 void (*cs_control)(u32 command);
69 void __iomem *lpss_base;
80 u16 lpss_rx_threshold;
81 u16 lpss_tx_threshold;
88 int (*write)(struct driver_data *drv_data);
89 int (*read)(struct driver_data *drv_data);
90 void (*cs_control)(u32 command);
93 static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data,
96 return __raw_readl(drv_data->ioaddr + reg);
99 static inline void pxa2xx_spi_write(const struct driver_data *drv_data,
100 unsigned reg, u32 val)
102 __raw_writel(val, drv_data->ioaddr + reg);
105 #define START_STATE ((void *)0)
106 #define RUNNING_STATE ((void *)1)
107 #define DONE_STATE ((void *)2)
108 #define ERROR_STATE ((void *)-1)
110 #define IS_DMA_ALIGNED(x) IS_ALIGNED((unsigned long)(x), DMA_ALIGNMENT)
111 #define DMA_ALIGNMENT 8
113 static inline int pxa25x_ssp_comp(struct driver_data *drv_data)
115 switch (drv_data->ssp_type) {
118 case QUARK_X1000_SSP:
125 static inline void write_SSSR_CS(struct driver_data *drv_data, u32 val)
127 if (drv_data->ssp_type == CE4100_SSP ||
128 drv_data->ssp_type == QUARK_X1000_SSP)
129 val |= pxa2xx_spi_read(drv_data, SSSR) & SSSR_ALT_FRM_MASK;
131 pxa2xx_spi_write(drv_data, SSSR, val);
134 extern int pxa2xx_spi_flush(struct driver_data *drv_data);
135 extern void *pxa2xx_spi_next_transfer(struct driver_data *drv_data);
137 #define MAX_DMA_LEN SZ_64K
138 #define DEFAULT_DMA_CR1 (SSCR1_TSRE | SSCR1_RSRE | SSCR1_TRAIL)
140 extern irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data);
141 extern int pxa2xx_spi_dma_prepare(struct driver_data *drv_data, u32 dma_burst);
142 extern void pxa2xx_spi_dma_start(struct driver_data *drv_data);
143 extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data);
144 extern void pxa2xx_spi_dma_release(struct driver_data *drv_data);
145 extern int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,
146 struct spi_device *spi,
151 #endif /* SPI_PXA2XX_H */