drivers/regulator/stpmic1_regulator.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 // Copyright (C) STMicroelectronics 2018
   3 // Author: Pascal Paillet <p.paillet@st.com> for STMicroelectronics.
   4
   5 #include <linux/interrupt.h>
   6 #include <linux/mfd/stpmic1.h>
   7 #include <linux/module.h>
   8 #include <linux/of_irq.h>
   9 #include <linux/platform_device.h>
  10 #include <linux/regmap.h>
  11 #include <linux/regulator/driver.h>
  12 #include <linux/regulator/machine.h>
  13 #include <linux/regulator/of_regulator.h>
  14
  15 /**
  16  * stpmic1 regulator description
  17  * @desc: regulator framework description
  18  * @mask_reset_reg: mask reset register address
  19  * @mask_reset_mask: mask rank and mask reset register mask
  20  * @icc_reg: icc register address
  21  * @icc_mask: icc register mask
  22  */
  23 struct stpmic1_regulator_cfg {
  24         struct regulator_desc desc;
  25         u8 mask_reset_reg;
  26         u8 mask_reset_mask;
  27         u8 icc_reg;
  28         u8 icc_mask;
  29 };
  30
  31 /**
  32  * stpmic1 regulator data: this structure is used as driver data
  33  * @regul_id: regulator id
  34  * @reg_node: DT node of regulator (unused on non-DT platforms)
  35  * @cfg: stpmic specific regulator description
  36  * @mask_reset: mask_reset bit value
  37  * @irq_curlim: current limit interrupt number
  38  * @regmap: point to parent regmap structure
  39  */
  40 struct stpmic1_regulator {
  41         unsigned int regul_id;
  42         struct device_node *reg_node;
  43         struct stpmic1_regulator_cfg *cfg;
  44         u8 mask_reset;
  45         int irq_curlim;
  46         struct regmap *regmap;
  47 };
  48
  49 static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode);
  50 static unsigned int stpmic1_get_mode(struct regulator_dev *rdev);
  51 static int stpmic1_set_icc(struct regulator_dev *rdev);
  52 static int stpmic1_regulator_parse_dt(void *driver_data);
  53 static unsigned int stpmic1_map_mode(unsigned int mode);
  54
  55 enum {
  56         STPMIC1_BUCK1 = 0,
  57         STPMIC1_BUCK2 = 1,
  58         STPMIC1_BUCK3 = 2,
  59         STPMIC1_BUCK4 = 3,
  60         STPMIC1_LDO1 = 4,
  61         STPMIC1_LDO2 = 5,
  62         STPMIC1_LDO3 = 6,
  63         STPMIC1_LDO4 = 7,
  64         STPMIC1_LDO5 = 8,
  65         STPMIC1_LDO6 = 9,
  66         STPMIC1_VREF_DDR = 10,
  67         STPMIC1_BOOST = 11,
  68         STPMIC1_VBUS_OTG = 12,
  69         STPMIC1_SW_OUT = 13,
  70 };
  71
  72 /* Enable time worst case is 5000mV/(2250uV/uS) */
  73 #define PMIC_ENABLE_TIME_US 2200
  74
  75 #define STPMIC1_BUCK_MODE_NORMAL 0
  76 #define STPMIC1_BUCK_MODE_LP BUCK_HPLP_ENABLE_MASK
  77
  78 struct regulator_linear_range buck1_ranges[] = {
  79         REGULATOR_LINEAR_RANGE(600000, 0, 30, 25000),
  80         REGULATOR_LINEAR_RANGE(1350000, 31, 63, 0),
  81 };
  82
  83 struct regulator_linear_range buck2_ranges[] = {
  84         REGULATOR_LINEAR_RANGE(1000000, 0, 17, 0),
  85         REGULATOR_LINEAR_RANGE(1050000, 18, 19, 0),
  86         REGULATOR_LINEAR_RANGE(1100000, 20, 21, 0),
  87         REGULATOR_LINEAR_RANGE(1150000, 22, 23, 0),
  88         REGULATOR_LINEAR_RANGE(1200000, 24, 25, 0),
  89         REGULATOR_LINEAR_RANGE(1250000, 26, 27, 0),
  90         REGULATOR_LINEAR_RANGE(1300000, 28, 29, 0),
  91         REGULATOR_LINEAR_RANGE(1350000, 30, 31, 0),
  92         REGULATOR_LINEAR_RANGE(1400000, 32, 33, 0),
  93         REGULATOR_LINEAR_RANGE(1450000, 34, 35, 0),
  94         REGULATOR_LINEAR_RANGE(1500000, 36, 63, 0),
  95 };
  96
  97 struct regulator_linear_range buck3_ranges[] = {
  98         REGULATOR_LINEAR_RANGE(1000000, 0, 19, 0),
  99         REGULATOR_LINEAR_RANGE(1100000, 20, 23, 0),
 100         REGULATOR_LINEAR_RANGE(1200000, 24, 27, 0),
 101         REGULATOR_LINEAR_RANGE(1300000, 28, 31, 0),
 102         REGULATOR_LINEAR_RANGE(1400000, 32, 35, 0),
 103         REGULATOR_LINEAR_RANGE(1500000, 36, 55, 100000),
 104         REGULATOR_LINEAR_RANGE(3400000, 56, 63, 0),
 105
 106 };
 107
 108 struct regulator_linear_range buck4_ranges[] = {
 109         REGULATOR_LINEAR_RANGE(600000, 0, 27, 25000),
 110         REGULATOR_LINEAR_RANGE(1300000, 28, 29, 0),
 111         REGULATOR_LINEAR_RANGE(1350000, 30, 31, 0),
 112         REGULATOR_LINEAR_RANGE(1400000, 32, 33, 0),
 113         REGULATOR_LINEAR_RANGE(1450000, 34, 35, 0),
 114         REGULATOR_LINEAR_RANGE(1500000, 36, 60, 100000),
 115         REGULATOR_LINEAR_RANGE(3900000, 61, 63, 0),
 116
 117 };
 118
 119 struct regulator_linear_range ldo1_ranges[] = {
 120         REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
 121         REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000),
 122         REGULATOR_LINEAR_RANGE(3300000, 25, 31, 0),
 123
 124 };
 125
 126 struct regulator_linear_range ldo2_ranges[] = {
 127         REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
 128         REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000),
 129         REGULATOR_LINEAR_RANGE(3300000, 25, 30, 0),
 130
 131 };
 132
 133 struct regulator_linear_range ldo3_ranges[] = {
 134         REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
 135         REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000),
 136         REGULATOR_LINEAR_RANGE(3300000, 25, 30, 0),
 137         /* with index 31 LDO3 is in DDR mode */
 138         REGULATOR_LINEAR_RANGE(500000, 31, 31, 0),
 139 };
 140
 141 struct regulator_linear_range ldo5_ranges[] = {
 142         REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
 143         REGULATOR_LINEAR_RANGE(1700000, 8, 30, 100000),
 144         REGULATOR_LINEAR_RANGE(3900000, 31, 31, 0),
 145 };
 146
 147 struct regulator_linear_range ldo6_ranges[] = {
 148         REGULATOR_LINEAR_RANGE(900000, 0, 24, 100000),
 149         REGULATOR_LINEAR_RANGE(3300000, 25, 31, 0),
 150 };
 151
 152 static struct regulator_ops stpmic1_ldo_ops = {
 153         .list_voltage = regulator_list_voltage_linear_range,
 154         .map_voltage = regulator_map_voltage_linear_range,
 155         .is_enabled = regulator_is_enabled_regmap,
 156         .enable = regulator_enable_regmap,
 157         .disable = regulator_disable_regmap,
 158         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 159         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 160         .set_pull_down = regulator_set_pull_down_regmap,
 161         .set_over_current_protection = stpmic1_set_icc,
 162 };
 163
 164 static struct regulator_ops stpmic1_ldo3_ops = {
 165         .list_voltage = regulator_list_voltage_linear_range,
 166         .map_voltage = regulator_map_voltage_iterate,
 167         .is_enabled = regulator_is_enabled_regmap,
 168         .enable = regulator_enable_regmap,
 169         .disable = regulator_disable_regmap,
 170         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 171         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 172         .set_pull_down = regulator_set_pull_down_regmap,
 173         .get_bypass = regulator_get_bypass_regmap,
 174         .set_bypass = regulator_set_bypass_regmap,
 175         .set_over_current_protection = stpmic1_set_icc,
 176 };
 177
 178 static struct regulator_ops stpmic1_ldo4_fixed_regul_ops = {
 179         .is_enabled = regulator_is_enabled_regmap,
 180         .enable = regulator_enable_regmap,
 181         .disable = regulator_disable_regmap,
 182         .set_pull_down = regulator_set_pull_down_regmap,
 183         .set_over_current_protection = stpmic1_set_icc,
 184 };
 185
 186 static struct regulator_ops stpmic1_buck_ops = {
 187         .list_voltage = regulator_list_voltage_linear_range,
 188         .map_voltage = regulator_map_voltage_linear_range,
 189         .is_enabled = regulator_is_enabled_regmap,
 190         .enable = regulator_enable_regmap,
 191         .disable = regulator_disable_regmap,
 192         .get_voltage_sel = regulator_get_voltage_sel_regmap,
 193         .set_voltage_sel = regulator_set_voltage_sel_regmap,
 194         .set_pull_down = regulator_set_pull_down_regmap,
 195         .set_mode = stpmic1_set_mode,
 196         .get_mode = stpmic1_get_mode,
 197         .set_over_current_protection = stpmic1_set_icc,
 198 };
 199
 200 static struct regulator_ops stpmic1_vref_ddr_ops = {
 201         .is_enabled = regulator_is_enabled_regmap,
 202         .enable = regulator_enable_regmap,
 203         .disable = regulator_disable_regmap,
 204         .set_pull_down = regulator_set_pull_down_regmap,
 205 };
 206
 207 static struct regulator_ops stpmic1_switch_regul_ops = {
 208         .is_enabled = regulator_is_enabled_regmap,
 209         .enable = regulator_enable_regmap,
 210         .disable = regulator_disable_regmap,
 211         .set_over_current_protection = stpmic1_set_icc,
 212 };
 213
 214 #define REG_LDO(ids, base) { \
 215         .name = #ids, \
 216         .id = STPMIC1_##ids, \
 217         .n_voltages = 32, \
 218         .ops = &stpmic1_ldo_ops, \
 219         .linear_ranges = base ## _ranges, \
 220         .n_linear_ranges = ARRAY_SIZE(base ## _ranges), \
 221         .type = REGULATOR_VOLTAGE, \
 222         .owner = THIS_MODULE, \
 223         .vsel_reg = ids##_ACTIVE_CR, \
 224         .vsel_mask = LDO_VOLTAGE_MASK, \
 225         .enable_reg = ids##_ACTIVE_CR, \
 226         .enable_mask = LDO_ENABLE_MASK, \
 227         .enable_val = 1, \
 228         .disable_val = 0, \
 229         .enable_time = PMIC_ENABLE_TIME_US, \
 230         .pull_down_reg = ids##_PULL_DOWN_REG, \
 231         .pull_down_mask = ids##_PULL_DOWN_MASK, \
 232         .supply_name = #base, \
 233 }
 234
 235 #define REG_LDO3(ids, base) { \
 236         .name = #ids, \
 237         .id = STPMIC1_##ids, \
 238         .n_voltages = 32, \
 239         .ops = &stpmic1_ldo3_ops, \
 240         .linear_ranges = ldo3_ranges, \
 241         .n_linear_ranges = ARRAY_SIZE(ldo3_ranges), \
 242         .type = REGULATOR_VOLTAGE, \
 243         .owner = THIS_MODULE, \
 244         .vsel_reg = LDO3_ACTIVE_CR, \
 245         .vsel_mask = LDO_VOLTAGE_MASK, \
 246         .enable_reg = LDO3_ACTIVE_CR, \
 247         .enable_mask = LDO_ENABLE_MASK, \
 248         .enable_val = 1, \
 249         .disable_val = 0, \
 250         .enable_time = PMIC_ENABLE_TIME_US, \
 251         .bypass_reg = LDO3_ACTIVE_CR, \
 252         .bypass_mask = LDO_BYPASS_MASK, \
 253         .bypass_val_on = LDO_BYPASS_MASK, \
 254         .bypass_val_off = 0, \
 255         .pull_down_reg = ids##_PULL_DOWN_REG, \
 256         .pull_down_mask = ids##_PULL_DOWN_MASK, \
 257         .supply_name = #base, \
 258 }
 259
 260 #define REG_LDO4(ids, base) { \
 261         .name = #ids, \
 262         .id = STPMIC1_##ids, \
 263         .n_voltages = 1, \
 264         .ops = &stpmic1_ldo4_fixed_regul_ops, \
 265         .type = REGULATOR_VOLTAGE, \
 266         .owner = THIS_MODULE, \
 267         .min_uV = 3300000, \
 268         .fixed_uV = 3300000, \
 269         .enable_reg = LDO4_ACTIVE_CR, \
 270         .enable_mask = LDO_ENABLE_MASK, \
 271         .enable_val = 1, \
 272         .disable_val = 0, \
 273         .enable_time = PMIC_ENABLE_TIME_US, \
 274         .pull_down_reg = ids##_PULL_DOWN_REG, \
 275         .pull_down_mask = ids##_PULL_DOWN_MASK, \
 276         .supply_name = #base, \
 277 }
 278
 279 #define REG_BUCK(ids, base) { \
 280         .name = #ids, \
 281         .id = STPMIC1_##ids, \
 282         .ops = &stpmic1_buck_ops, \
 283         .n_voltages = 64, \
 284         .linear_ranges = base ## _ranges, \
 285         .n_linear_ranges = ARRAY_SIZE(base ## _ranges), \
 286         .type = REGULATOR_VOLTAGE, \
 287         .owner = THIS_MODULE, \
 288         .vsel_reg = ids##_ACTIVE_CR, \
 289         .vsel_mask = BUCK_VOLTAGE_MASK, \
 290         .enable_reg = ids##_ACTIVE_CR, \
 291         .enable_mask = BUCK_ENABLE_MASK, \
 292         .enable_val = 1, \
 293         .disable_val = 0, \
 294         .enable_time = PMIC_ENABLE_TIME_US, \
 295         .of_map_mode = stpmic1_map_mode, \
 296         .pull_down_reg = ids##_PULL_DOWN_REG, \
 297         .pull_down_mask = ids##_PULL_DOWN_MASK, \
 298         .supply_name = #base, \
 299 }
 300
 301 #define REG_VREF_DDR(ids, base) { \
 302         .name = #ids, \
 303         .id = STPMIC1_##ids, \
 304         .n_voltages = 1, \
 305         .ops = &stpmic1_vref_ddr_ops, \
 306         .type = REGULATOR_VOLTAGE, \
 307         .owner = THIS_MODULE, \
 308         .min_uV = 500000, \
 309         .fixed_uV = 500000, \
 310         .enable_reg = VREF_DDR_ACTIVE_CR, \
 311         .enable_mask = BUCK_ENABLE_MASK, \
 312         .enable_val = 1, \
 313         .disable_val = 0, \
 314         .enable_time = PMIC_ENABLE_TIME_US, \
 315         .pull_down_reg = ids##_PULL_DOWN_REG, \
 316         .pull_down_mask = ids##_PULL_DOWN_MASK, \
 317         .supply_name = #base, \
 318 }
 319
 320 #define REG_SWITCH(ids, base, reg, mask, val) { \
 321         .name = #ids, \
 322         .id = STPMIC1_##ids, \
 323         .n_voltages = 1, \
 324         .ops = &stpmic1_switch_regul_ops, \
 325         .type = REGULATOR_VOLTAGE, \
 326         .owner = THIS_MODULE, \
 327         .min_uV = 0, \
 328         .fixed_uV = 5000000, \
 329         .enable_reg = (reg), \
 330         .enable_mask = (mask), \
 331         .enable_val = (val), \
 332         .disable_val = 0, \
 333         .enable_time = PMIC_ENABLE_TIME_US, \
 334         .supply_name = #base, \
 335 }
 336
 337 struct stpmic1_regulator_cfg stpmic1_regulator_cfgs[] = {
 338         [STPMIC1_BUCK1] = {
 339                 .desc = REG_BUCK(BUCK1, buck1),
 340                 .icc_reg = BUCKS_ICCTO_CR,
 341                 .icc_mask = BIT(0),
 342                 .mask_reset_reg = BUCKS_MASK_RESET_CR,
 343                 .mask_reset_mask = BIT(0),
 344         },
 345         [STPMIC1_BUCK2] = {
 346                 .desc = REG_BUCK(BUCK2, buck2),
 347                 .icc_reg = BUCKS_ICCTO_CR,
 348                 .icc_mask = BIT(1),
 349                 .mask_reset_reg = BUCKS_MASK_RESET_CR,
 350                 .mask_reset_mask = BIT(1),
 351         },
 352         [STPMIC1_BUCK3] = {
 353                 .desc = REG_BUCK(BUCK3, buck3),
 354                 .icc_reg = BUCKS_ICCTO_CR,
 355                 .icc_mask = BIT(2),
 356                 .mask_reset_reg = BUCKS_MASK_RESET_CR,
 357                 .mask_reset_mask = BIT(2),
 358         },
 359         [STPMIC1_BUCK4] = {
 360                 .desc = REG_BUCK(BUCK4, buck4),
 361                 .icc_reg = BUCKS_ICCTO_CR,
 362                 .icc_mask = BIT(3),
 363                 .mask_reset_reg = BUCKS_MASK_RESET_CR,
 364                 .mask_reset_mask = BIT(3),
 365         },
 366         [STPMIC1_LDO1] = {
 367                 .desc = REG_LDO(LDO1, ldo1),
 368                 .icc_reg = LDOS_ICCTO_CR,
 369                 .icc_mask = BIT(0),
 370                 .mask_reset_reg = LDOS_MASK_RESET_CR,
 371                 .mask_reset_mask = BIT(0),
 372         },
 373         [STPMIC1_LDO2] = {
 374                 .desc = REG_LDO(LDO2, ldo2),
 375                 .icc_reg = LDOS_ICCTO_CR,
 376                 .icc_mask = BIT(1),
 377                 .mask_reset_reg = LDOS_MASK_RESET_CR,
 378                 .mask_reset_mask = BIT(1),
 379         },
 380         [STPMIC1_LDO3] = {
 381                 .desc = REG_LDO3(LDO3, ldo3),
 382                 .icc_reg = LDOS_ICCTO_CR,
 383                 .icc_mask = BIT(2),
 384                 .mask_reset_reg = LDOS_MASK_RESET_CR,
 385                 .mask_reset_mask = BIT(2),
 386         },
 387         [STPMIC1_LDO4] = {
 388                 .desc = REG_LDO4(LDO4, ldo4),
 389                 .icc_reg = LDOS_ICCTO_CR,
 390                 .icc_mask = BIT(3),
 391                 .mask_reset_reg = LDOS_MASK_RESET_CR,
 392                 .mask_reset_mask = BIT(3),
 393         },
 394         [STPMIC1_LDO5] = {
 395                 .desc = REG_LDO(LDO5, ldo5),
 396                 .icc_reg = LDOS_ICCTO_CR,
 397                 .icc_mask = BIT(4),
 398                 .mask_reset_reg = LDOS_MASK_RESET_CR,
 399                 .mask_reset_mask = BIT(4),
 400         },
 401         [STPMIC1_LDO6] = {
 402                 .desc = REG_LDO(LDO6, ldo6),
 403                 .icc_reg = LDOS_ICCTO_CR,
 404                 .icc_mask = BIT(5),
 405                 .mask_reset_reg = LDOS_MASK_RESET_CR,
 406                 .mask_reset_mask = BIT(5),
 407         },
 408         [STPMIC1_VREF_DDR] = {
 409                 .desc = REG_VREF_DDR(VREF_DDR, vref_ddr),
 410                 .mask_reset_reg = LDOS_MASK_RESET_CR,
 411                 .mask_reset_mask = BIT(6),
 412         },
 413         [STPMIC1_BOOST] = {
 414                 .desc = REG_SWITCH(BOOST, boost, BST_SW_CR,
 415                                    BOOST_ENABLED,
 416                                    BOOST_ENABLED),
 417                 .icc_reg = BUCKS_ICCTO_CR,
 418                 .icc_mask = BIT(6),
 419         },
 420         [STPMIC1_VBUS_OTG] = {
 421                 .desc = REG_SWITCH(VBUS_OTG, pwr_sw1, BST_SW_CR,
 422                                    USBSW_OTG_SWITCH_ENABLED,
 423                                    USBSW_OTG_SWITCH_ENABLED),
 424                 .icc_reg = BUCKS_ICCTO_CR,
 425                 .icc_mask = BIT(4),
 426         },
 427         [STPMIC1_SW_OUT] = {
 428                 .desc = REG_SWITCH(SW_OUT, pwr_sw2, BST_SW_CR,
 429                                    SWIN_SWOUT_ENABLED,
 430                                    SWIN_SWOUT_ENABLED),
 431                 .icc_reg = BUCKS_ICCTO_CR,
 432                 .icc_mask = BIT(5),
 433         },
 434 };
 435
 436 static unsigned int stpmic1_map_mode(unsigned int mode)
 437 {
 438         switch (mode) {
 439         case STPMIC1_BUCK_MODE_NORMAL:
 440                 return REGULATOR_MODE_NORMAL;
 441         case STPMIC1_BUCK_MODE_LP:
 442                 return REGULATOR_MODE_STANDBY;
 443         default:
 444                 return REGULATOR_MODE_INVALID;
 445         }
 446 }
 447
 448 static unsigned int stpmic1_get_mode(struct regulator_dev *rdev)
 449 {
 450         int value;
 451
 452         regmap_read(rdev->regmap, rdev->desc->enable_reg, &value);
 453
 454         if (value & STPMIC1_BUCK_MODE_LP)
 455                 return REGULATOR_MODE_STANDBY;
 456
 457         return REGULATOR_MODE_NORMAL;
 458 }
 459
 460 static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode)
 461 {
 462         int value;
 463
 464         switch (mode) {
 465         case REGULATOR_MODE_NORMAL:
 466                 value = STPMIC1_BUCK_MODE_NORMAL;
 467                 break;
 468         case REGULATOR_MODE_STANDBY:
 469                 value = STPMIC1_BUCK_MODE_LP;
 470                 break;
 471         default:
 472                 return -EINVAL;
 473         }
 474
 475         return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
 476                                   STPMIC1_BUCK_MODE_LP, value);
 477 }
 478
 479 static int stpmic1_set_icc(struct regulator_dev *rdev)
 480 {
 481         struct stpmic1_regulator *regul = rdev_get_drvdata(rdev);
 482
 483         /* enable switch off in case of over current */
 484         return regmap_update_bits(regul->regmap, regul->cfg->icc_reg,
 485                                   regul->cfg->icc_mask, regul->cfg->icc_mask);
 486 }
 487
 488 static irqreturn_t stpmic1_curlim_irq_handler(int irq, void *data)
 489 {
 490         struct regulator_dev *rdev = (struct regulator_dev *)data;
 491
 492         mutex_lock(&rdev->mutex);
 493
 494         /* Send an overcurrent notification */
 495         regulator_notifier_call_chain(rdev,
 496                                       REGULATOR_EVENT_OVER_CURRENT,
 497                                       NULL);
 498
 499         mutex_unlock(&rdev->mutex);
 500
 501         return IRQ_HANDLED;
 502 }
 503
 504 static int stpmic1_regulator_init(struct platform_device *pdev,
 505                                   struct regulator_dev *rdev)
 506 {
 507         struct stpmic1_regulator *regul = rdev_get_drvdata(rdev);
 508         int ret = 0;
 509
 510         /* set mask reset */
 511         if (regul->mask_reset && regul->cfg->mask_reset_reg != 0) {
 512                 ret = regmap_update_bits(regul->regmap,
 513                                          regul->cfg->mask_reset_reg,
 514                                          regul->cfg->mask_reset_mask,
 515                                          regul->cfg->mask_reset_mask);
 516                 if (ret) {
 517                         dev_err(&pdev->dev, "set mask reset failed\n");
 518                         return ret;
 519                 }
 520         }
 521
 522         /* setup an irq handler for over-current detection */
 523         if (regul->irq_curlim > 0) {
 524                 ret = devm_request_threaded_irq(&pdev->dev,
 525                                                 regul->irq_curlim, NULL,
 526                                                 stpmic1_curlim_irq_handler,
 527                                                 IRQF_ONESHOT | IRQF_SHARED,
 528                                                 pdev->name, rdev);
 529                 if (ret) {
 530                         dev_err(&pdev->dev, "Request IRQ failed\n");
 531                         return ret;
 532                 }
 533         }
 534         return 0;
 535 }
 536
 537 #define MATCH(_name, _id) \
 538         [STPMIC1_##_id] = { \
 539                 .name = #_name, \
 540                 .desc = &stpmic1_regulator_cfgs[STPMIC1_##_id].desc, \
 541         }
 542
 543 static struct of_regulator_match stpmic1_regulators_matches[] = {
 544         MATCH(buck1, BUCK1),
 545         MATCH(buck2, BUCK2),
 546         MATCH(buck3, BUCK3),
 547         MATCH(buck4, BUCK4),
 548         MATCH(ldo1, LDO1),
 549         MATCH(ldo2, LDO2),
 550         MATCH(ldo3, LDO3),
 551         MATCH(ldo4, LDO4),
 552         MATCH(ldo5, LDO5),
 553         MATCH(ldo6, LDO6),
 554         MATCH(vref_ddr, VREF_DDR),
 555         MATCH(boost, BOOST),
 556         MATCH(pwr_sw1, VBUS_OTG),
 557         MATCH(pwr_sw2, SW_OUT),
 558 };
 559
 560 static int stpmic1_regulator_parse_dt(void *driver_data)
 561 {
 562         struct stpmic1_regulator *regul =
 563                 (struct stpmic1_regulator *)driver_data;
 564
 565         if (!regul)
 566                 return -EINVAL;
 567
 568         if (of_get_property(regul->reg_node, "st,mask-reset", NULL))
 569                 regul->mask_reset = 1;
 570
 571         regul->irq_curlim = of_irq_get(regul->reg_node, 0);
 572
 573         return 0;
 574 }
 575
 576 static struct
 577 regulator_dev *stpmic1_regulator_register(struct platform_device *pdev, int id,
 578                                           struct regulator_init_data *init_data,
 579                                           struct stpmic1_regulator *regul)
 580 {
 581         struct stpmic1 *pmic_dev = dev_get_drvdata(pdev->dev.parent);
 582         struct regulator_dev *rdev;
 583         struct regulator_config config = {};
 584
 585         config.dev = &pdev->dev;
 586         config.init_data = init_data;
 587         config.of_node = stpmic1_regulators_matches[id].of_node;
 588         config.regmap = pmic_dev->regmap;
 589         config.driver_data = regul;
 590
 591         regul->regul_id = id;
 592         regul->reg_node = config.of_node;
 593         regul->cfg = &stpmic1_regulator_cfgs[id];
 594         regul->regmap = pmic_dev->regmap;
 595
 596         rdev = devm_regulator_register(&pdev->dev, &regul->cfg->desc, &config);
 597         if (IS_ERR(rdev)) {
 598                 dev_err(&pdev->dev, "failed to register %s regulator\n",
 599                         regul->cfg->desc.name);
 600         }
 601
 602         return rdev;
 603 }
 604
 605 static int stpmic1_regulator_probe(struct platform_device *pdev)
 606 {
 607         struct regulator_dev *rdev;
 608         struct stpmic1_regulator *regul;
 609         struct regulator_init_data *init_data;
 610         struct device_node *np;
 611         int i, ret;
 612
 613         np = pdev->dev.of_node;
 614
 615         ret = of_regulator_match(&pdev->dev, np,
 616                                  stpmic1_regulators_matches,
 617                                  ARRAY_SIZE(stpmic1_regulators_matches));
 618         if (ret < 0) {
 619                 dev_err(&pdev->dev,
 620                         "Error in PMIC regulator device tree node");
 621                 return ret;
 622         }
 623
 624         regul = devm_kzalloc(&pdev->dev, ARRAY_SIZE(stpmic1_regulator_cfgs) *
 625                              sizeof(struct stpmic1_regulator),
 626                              GFP_KERNEL);
 627         if (!regul)
 628                 return -ENOMEM;
 629
 630         for (i = 0; i < ARRAY_SIZE(stpmic1_regulator_cfgs); i++) {
 631                 /* Parse DT & find regulators to register */
 632                 init_data = stpmic1_regulators_matches[i].init_data;
 633                 if (init_data)
 634                         init_data->regulator_init = &stpmic1_regulator_parse_dt;
 635
 636                 rdev = stpmic1_regulator_register(pdev, i, init_data, regul);
 637                 if (IS_ERR(rdev))
 638                         return PTR_ERR(rdev);
 639
 640                 ret = stpmic1_regulator_init(pdev, rdev);
 641                 if (ret) {
 642                         dev_err(&pdev->dev,
 643                                 "failed to initialize regulator %d\n", ret);
 644                         return ret;
 645                 }
 646
 647                 regul++;
 648         }
 649
 650         dev_dbg(&pdev->dev, "stpmic1_regulator driver probed\n");
 651
 652         return 0;
 653 }
 654
 655 static const struct of_device_id of_pmic_regulator_match[] = {
 656         { .compatible = "st,stpmic1-regulators" },
 657         { },
 658 };
 659
 660 MODULE_DEVICE_TABLE(of, of_pmic_regulator_match);
 661
 662 static struct platform_driver stpmic1_regulator_driver = {
 663         .driver = {
 664                 .name = "stpmic1-regulator",
 665                 .of_match_table = of_match_ptr(of_pmic_regulator_match),
 666         },
 667         .probe = stpmic1_regulator_probe,
 668 };
 669
 670 module_platform_driver(stpmic1_regulator_driver);
 671
 672 MODULE_DESCRIPTION("STPMIC1 PMIC voltage regulator driver");
 673 MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>");
 674 MODULE_LICENSE("GPL v2");