drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54         u32 txpow;
  55
  56         if (sc->curtxpow != sc->config.txpowlimit) {
  57                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  58                 /* read back in case value is clamped */
  59                 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
  60                 sc->curtxpow = txpow;
  61         }
  62 }
  63
  64 static u8 parse_mpdudensity(u8 mpdudensity)
  65 {
  66         /*
  67          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  68          *   0 for no restriction
  69          *   1 for 1/4 us
  70          *   2 for 1/2 us
  71          *   3 for 1 us
  72          *   4 for 2 us
  73          *   5 for 4 us
  74          *   6 for 8 us
  75          *   7 for 16 us
  76          */
  77         switch (mpdudensity) {
  78         case 0:
  79                 return 0;
  80         case 1:
  81         case 2:
  82         case 3:
  83                 /* Our lower layer calculations limit our precision to
  84                    1 microsecond */
  85                 return 1;
  86         case 4:
  87                 return 2;
  88         case 5:
  89                 return 4;
  90         case 6:
  91                 return 8;
  92         case 7:
  93                 return 16;
  94         default:
  95                 return 0;
  96         }
  97 }
  98
  99 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
 100                                                 struct ieee80211_hw *hw)
 101 {
 102         struct ieee80211_channel *curchan = hw->conf.channel;
 103         struct ath9k_channel *channel;
 104         u8 chan_idx;
 105
 106         chan_idx = curchan->hw_value;
 107         channel = &sc->sc_ah->channels[chan_idx];
 108         ath9k_update_ichannel(sc, hw, channel);
 109         return channel;
 110 }
 111
 112 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 113 {
 114         unsigned long flags;
 115         bool ret;
 116
 117         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 118         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 119         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 120
 121         return ret;
 122 }
 123
 124 void ath9k_ps_wakeup(struct ath_softc *sc)
 125 {
 126         unsigned long flags;
 127
 128         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 129         if (++sc->ps_usecount != 1)
 130                 goto unlock;
 131
 132         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 133
 134  unlock:
 135         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 136 }
 137
 138 void ath9k_ps_restore(struct ath_softc *sc)
 139 {
 140         unsigned long flags;
 141
 142         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 143         if (--sc->ps_usecount != 0)
 144                 goto unlock;
 145
 146         if (sc->ps_idle)
 147                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 148         else if (sc->ps_enabled &&
 149                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 150                               PS_WAIT_FOR_CAB |
 151                               PS_WAIT_FOR_PSPOLL_DATA |
 152                               PS_WAIT_FOR_TX_ACK)))
 153                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 154
 155  unlock:
 156         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 157 }
 158
 159 /*
 160  * Set/change channels.  If the channel is really being changed, it's done
 161  * by reseting the chip.  To accomplish this we must first cleanup any pending
 162  * DMA, then restart stuff.
 163 */
 164 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 165                     struct ath9k_channel *hchan)
 166 {
 167         struct ath_hw *ah = sc->sc_ah;
 168         struct ath_common *common = ath9k_hw_common(ah);
 169         struct ieee80211_conf *conf = &common->hw->conf;
 170         bool fastcc = true, stopped;
 171         struct ieee80211_channel *channel = hw->conf.channel;
 172         int r;
 173
 174         if (sc->sc_flags & SC_OP_INVALID)
 175                 return -EIO;
 176
 177         ath9k_ps_wakeup(sc);
 178
 179         /*
 180          * This is only performed if the channel settings have
 181          * actually changed.
 182          *
 183          * To switch channels clear any pending DMA operations;
 184          * wait long enough for the RX fifo to drain, reset the
 185          * hardware at the new frequency, and then re-enable
 186          * the relevant bits of the h/w.
 187          */
 188         ath9k_hw_set_interrupts(ah, 0);
 189         ath_drain_all_txq(sc, false);
 190         stopped = ath_stoprecv(sc);
 191
 192         /* XXX: do not flush receive queue here. We don't want
 193          * to flush data frames already in queue because of
 194          * changing channel. */
 195
 196         if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
 197                 fastcc = false;
 198
 199         ath_print(common, ATH_DBG_CONFIG,
 200                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 201                   sc->sc_ah->curchan->channel,
 202                   channel->center_freq, conf_is_ht40(conf));
 203
 204         spin_lock_bh(&sc->sc_resetlock);
 205
 206         r = ath9k_hw_reset(ah, hchan, fastcc);
 207         if (r) {
 208                 ath_print(common, ATH_DBG_FATAL,
 209                           "Unable to reset channel (%u MHz), "
 210                           "reset status %d\n",
 211                           channel->center_freq, r);
 212                 spin_unlock_bh(&sc->sc_resetlock);
 213                 goto ps_restore;
 214         }
 215         spin_unlock_bh(&sc->sc_resetlock);
 216
 217         sc->sc_flags &= ~SC_OP_FULL_RESET;
 218
 219         if (ath_startrecv(sc) != 0) {
 220                 ath_print(common, ATH_DBG_FATAL,
 221                           "Unable to restart recv logic\n");
 222                 r = -EIO;
 223                 goto ps_restore;
 224         }
 225
 226         ath_cache_conf_rate(sc, &hw->conf);
 227         ath_update_txpow(sc);
 228         ath9k_hw_set_interrupts(ah, ah->imask);
 229
 230  ps_restore:
 231         ath9k_ps_restore(sc);
 232         return r;
 233 }
 234
 235 /*
 236  *  This routine performs the periodic noise floor calibration function
 237  *  that is used to adjust and optimize the chip performance.  This
 238  *  takes environmental changes (location, temperature) into account.
 239  *  When the task is complete, it reschedules itself depending on the
 240  *  appropriate interval that was calculated.
 241  */
 242 void ath_ani_calibrate(unsigned long data)
 243 {
 244         struct ath_softc *sc = (struct ath_softc *)data;
 245         struct ath_hw *ah = sc->sc_ah;
 246         struct ath_common *common = ath9k_hw_common(ah);
 247         bool longcal = false;
 248         bool shortcal = false;
 249         bool aniflag = false;
 250         unsigned int timestamp = jiffies_to_msecs(jiffies);
 251         u32 cal_interval, short_cal_interval;
 252
 253         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 254                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 255
 256         /* Only calibrate if awake */
 257         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 258                 goto set_timer;
 259
 260         ath9k_ps_wakeup(sc);
 261
 262         /* Long calibration runs independently of short calibration. */
 263         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 264                 longcal = true;
 265                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 266                 common->ani.longcal_timer = timestamp;
 267         }
 268
 269         /* Short calibration applies only while caldone is false */
 270         if (!common->ani.caldone) {
 271                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 272                         shortcal = true;
 273                         ath_print(common, ATH_DBG_ANI,
 274                                   "shortcal @%lu\n", jiffies);
 275                         common->ani.shortcal_timer = timestamp;
 276                         common->ani.resetcal_timer = timestamp;
 277                 }
 278         } else {
 279                 if ((timestamp - common->ani.resetcal_timer) >=
 280                     ATH_RESTART_CALINTERVAL) {
 281                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 282                         if (common->ani.caldone)
 283                                 common->ani.resetcal_timer = timestamp;
 284                 }
 285         }
 286
 287         /* Verify whether we must check ANI */
 288         if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
 289                 aniflag = true;
 290                 common->ani.checkani_timer = timestamp;
 291         }
 292
 293         /* Skip all processing if there's nothing to do. */
 294         if (longcal || shortcal || aniflag) {
 295                 /* Call ANI routine if necessary */
 296                 if (aniflag)
 297                         ath9k_hw_ani_monitor(ah, ah->curchan);
 298
 299                 /* Perform calibration if necessary */
 300                 if (longcal || shortcal) {
 301                         common->ani.caldone =
 302                                 ath9k_hw_calibrate(ah,
 303                                                    ah->curchan,
 304                                                    common->rx_chainmask,
 305                                                    longcal);
 306
 307                         if (longcal)
 308                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 309                                                                      ah->curchan);
 310
 311                         ath_print(common, ATH_DBG_ANI,
 312                                   " calibrate chan %u/%x nf: %d\n",
 313                                   ah->curchan->channel,
 314                                   ah->curchan->channelFlags,
 315                                   common->ani.noise_floor);
 316                 }
 317         }
 318
 319         ath9k_ps_restore(sc);
 320
 321 set_timer:
 322         /*
 323         * Set timer interval based on previous results.
 324         * The interval must be the shortest necessary to satisfy ANI,
 325         * short calibration and long calibration.
 326         */
 327         cal_interval = ATH_LONG_CALINTERVAL;
 328         if (sc->sc_ah->config.enable_ani)
 329                 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
 330         if (!common->ani.caldone)
 331                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 332
 333         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 334 }
 335
 336 static void ath_start_ani(struct ath_common *common)
 337 {
 338         unsigned long timestamp = jiffies_to_msecs(jiffies);
 339
 340         common->ani.longcal_timer = timestamp;
 341         common->ani.shortcal_timer = timestamp;
 342         common->ani.checkani_timer = timestamp;
 343
 344         mod_timer(&common->ani.timer,
 345                   jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
 346 }
 347
 348 /*
 349  * Update tx/rx chainmask. For legacy association,
 350  * hard code chainmask to 1x1, for 11n association, use
 351  * the chainmask configuration, for bt coexistence, use
 352  * the chainmask configuration even in legacy mode.
 353  */
 354 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 355 {
 356         struct ath_hw *ah = sc->sc_ah;
 357         struct ath_common *common = ath9k_hw_common(ah);
 358
 359         if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
 360             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 361                 common->tx_chainmask = ah->caps.tx_chainmask;
 362                 common->rx_chainmask = ah->caps.rx_chainmask;
 363         } else {
 364                 common->tx_chainmask = 1;
 365                 common->rx_chainmask = 1;
 366         }
 367
 368         ath_print(common, ATH_DBG_CONFIG,
 369                   "tx chmask: %d, rx chmask: %d\n",
 370                   common->tx_chainmask,
 371                   common->rx_chainmask);
 372 }
 373
 374 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 375 {
 376         struct ath_node *an;
 377
 378         an = (struct ath_node *)sta->drv_priv;
 379
 380         if (sc->sc_flags & SC_OP_TXAGGR) {
 381                 ath_tx_node_init(sc, an);
 382                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 383                                      sta->ht_cap.ampdu_factor);
 384                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 385                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 386         }
 387 }
 388
 389 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 390 {
 391         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 392
 393         if (sc->sc_flags & SC_OP_TXAGGR)
 394                 ath_tx_node_cleanup(sc, an);
 395 }
 396
 397 void ath9k_tasklet(unsigned long data)
 398 {
 399         struct ath_softc *sc = (struct ath_softc *)data;
 400         struct ath_hw *ah = sc->sc_ah;
 401         struct ath_common *common = ath9k_hw_common(ah);
 402
 403         u32 status = sc->intrstatus;
 404         u32 rxmask;
 405
 406         ath9k_ps_wakeup(sc);
 407
 408         if ((status & ATH9K_INT_FATAL) ||
 409             !ath9k_hw_check_alive(ah)) {
 410                 ath_reset(sc, false);
 411                 ath9k_ps_restore(sc);
 412                 return;
 413         }
 414
 415         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 416                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 417                           ATH9K_INT_RXORN);
 418         else
 419                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 420
 421         if (status & rxmask) {
 422                 spin_lock_bh(&sc->rx.rxflushlock);
 423
 424                 /* Check for high priority Rx first */
 425                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 426                     (status & ATH9K_INT_RXHP))
 427                         ath_rx_tasklet(sc, 0, true);
 428
 429                 ath_rx_tasklet(sc, 0, false);
 430                 spin_unlock_bh(&sc->rx.rxflushlock);
 431         }
 432
 433         if (status & ATH9K_INT_TX) {
 434                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 435                         ath_tx_edma_tasklet(sc);
 436                 else
 437                         ath_tx_tasklet(sc);
 438         }
 439
 440         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 441                 /*
 442                  * TSF sync does not look correct; remain awake to sync with
 443                  * the next Beacon.
 444                  */
 445                 ath_print(common, ATH_DBG_PS,
 446                           "TSFOOR - Sync with next Beacon\n");
 447                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 448         }
 449
 450         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 451                 if (status & ATH9K_INT_GENTIMER)
 452                         ath_gen_timer_isr(sc->sc_ah);
 453
 454         /* re-enable hardware interrupt */
 455         ath9k_hw_set_interrupts(ah, ah->imask);
 456         ath9k_ps_restore(sc);
 457 }
 458
 459 irqreturn_t ath_isr(int irq, void *dev)
 460 {
 461 #define SCHED_INTR (                            \
 462                 ATH9K_INT_FATAL |               \
 463                 ATH9K_INT_RXORN |               \
 464                 ATH9K_INT_RXEOL |               \
 465                 ATH9K_INT_RX |                  \
 466                 ATH9K_INT_RXLP |                \
 467                 ATH9K_INT_RXHP |                \
 468                 ATH9K_INT_TX |                  \
 469                 ATH9K_INT_BMISS |               \
 470                 ATH9K_INT_CST |                 \
 471                 ATH9K_INT_TSFOOR |              \
 472                 ATH9K_INT_GENTIMER)
 473
 474         struct ath_softc *sc = dev;
 475         struct ath_hw *ah = sc->sc_ah;
 476         enum ath9k_int status;
 477         bool sched = false;
 478
 479         /*
 480          * The hardware is not ready/present, don't
 481          * touch anything. Note this can happen early
 482          * on if the IRQ is shared.
 483          */
 484         if (sc->sc_flags & SC_OP_INVALID)
 485                 return IRQ_NONE;
 486
 487
 488         /* shared irq, not for us */
 489
 490         if (!ath9k_hw_intrpend(ah))
 491                 return IRQ_NONE;
 492
 493         /*
 494          * Figure out the reason(s) for the interrupt.  Note
 495          * that the hal returns a pseudo-ISR that may include
 496          * bits we haven't explicitly enabled so we mask the
 497          * value to insure we only process bits we requested.
 498          */
 499         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 500         status &= ah->imask;    /* discard unasked-for bits */
 501
 502         /*
 503          * If there are no status bits set, then this interrupt was not
 504          * for me (should have been caught above).
 505          */
 506         if (!status)
 507                 return IRQ_NONE;
 508
 509         /* Cache the status */
 510         sc->intrstatus = status;
 511
 512         if (status & SCHED_INTR)
 513                 sched = true;
 514
 515         /*
 516          * If a FATAL or RXORN interrupt is received, we have to reset the
 517          * chip immediately.
 518          */
 519         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 520             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 521                 goto chip_reset;
 522
 523         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 524             (status & ATH9K_INT_BB_WATCHDOG)) {
 525                 ar9003_hw_bb_watchdog_dbg_info(ah);
 526                 goto chip_reset;
 527         }
 528
 529         if (status & ATH9K_INT_SWBA)
 530                 tasklet_schedule(&sc->bcon_tasklet);
 531
 532         if (status & ATH9K_INT_TXURN)
 533                 ath9k_hw_updatetxtriglevel(ah, true);
 534
 535         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 536                 if (status & ATH9K_INT_RXEOL) {
 537                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 538                         ath9k_hw_set_interrupts(ah, ah->imask);
 539                 }
 540         }
 541
 542         if (status & ATH9K_INT_MIB) {
 543                 /*
 544                  * Disable interrupts until we service the MIB
 545                  * interrupt; otherwise it will continue to
 546                  * fire.
 547                  */
 548                 ath9k_hw_set_interrupts(ah, 0);
 549                 /*
 550                  * Let the hal handle the event. We assume
 551                  * it will clear whatever condition caused
 552                  * the interrupt.
 553                  */
 554                 ath9k_hw_procmibevent(ah);
 555                 ath9k_hw_set_interrupts(ah, ah->imask);
 556         }
 557
 558         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 559                 if (status & ATH9K_INT_TIM_TIMER) {
 560                         /* Clear RxAbort bit so that we can
 561                          * receive frames */
 562                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 563                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 564                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 565                 }
 566
 567 chip_reset:
 568
 569         ath_debug_stat_interrupt(sc, status);
 570
 571         if (sched) {
 572                 /* turn off every interrupt except SWBA */
 573                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 574                 tasklet_schedule(&sc->intr_tq);
 575         }
 576
 577         return IRQ_HANDLED;
 578
 579 #undef SCHED_INTR
 580 }
 581
 582 static u32 ath_get_extchanmode(struct ath_softc *sc,
 583                                struct ieee80211_channel *chan,
 584                                enum nl80211_channel_type channel_type)
 585 {
 586         u32 chanmode = 0;
 587
 588         switch (chan->band) {
 589         case IEEE80211_BAND_2GHZ:
 590                 switch(channel_type) {
 591                 case NL80211_CHAN_NO_HT:
 592                 case NL80211_CHAN_HT20:
 593                         chanmode = CHANNEL_G_HT20;
 594                         break;
 595                 case NL80211_CHAN_HT40PLUS:
 596                         chanmode = CHANNEL_G_HT40PLUS;
 597                         break;
 598                 case NL80211_CHAN_HT40MINUS:
 599                         chanmode = CHANNEL_G_HT40MINUS;
 600                         break;
 601                 }
 602                 break;
 603         case IEEE80211_BAND_5GHZ:
 604                 switch(channel_type) {
 605                 case NL80211_CHAN_NO_HT:
 606                 case NL80211_CHAN_HT20:
 607                         chanmode = CHANNEL_A_HT20;
 608                         break;
 609                 case NL80211_CHAN_HT40PLUS:
 610                         chanmode = CHANNEL_A_HT40PLUS;
 611                         break;
 612                 case NL80211_CHAN_HT40MINUS:
 613                         chanmode = CHANNEL_A_HT40MINUS;
 614                         break;
 615                 }
 616                 break;
 617         default:
 618                 break;
 619         }
 620
 621         return chanmode;
 622 }
 623
 624 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 625                                  struct ieee80211_vif *vif,
 626                                  struct ieee80211_bss_conf *bss_conf)
 627 {
 628         struct ath_hw *ah = sc->sc_ah;
 629         struct ath_common *common = ath9k_hw_common(ah);
 630
 631         if (bss_conf->assoc) {
 632                 ath_print(common, ATH_DBG_CONFIG,
 633                           "Bss Info ASSOC %d, bssid: %pM\n",
 634                            bss_conf->aid, common->curbssid);
 635
 636                 /* New association, store aid */
 637                 common->curaid = bss_conf->aid;
 638                 ath9k_hw_write_associd(ah);
 639
 640                 /*
 641                  * Request a re-configuration of Beacon related timers
 642                  * on the receipt of the first Beacon frame (i.e.,
 643                  * after time sync with the AP).
 644                  */
 645                 sc->ps_flags |= PS_BEACON_SYNC;
 646
 647                 /* Configure the beacon */
 648                 ath_beacon_config(sc, vif);
 649
 650                 /* Reset rssi stats */
 651                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 652
 653                 ath_start_ani(common);
 654         } else {
 655                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 656                 common->curaid = 0;
 657                 /* Stop ANI */
 658                 del_timer_sync(&common->ani.timer);
 659         }
 660 }
 661
 662 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 663 {
 664         struct ath_hw *ah = sc->sc_ah;
 665         struct ath_common *common = ath9k_hw_common(ah);
 666         struct ieee80211_channel *channel = hw->conf.channel;
 667         int r;
 668
 669         ath9k_ps_wakeup(sc);
 670         ath9k_hw_configpcipowersave(ah, 0, 0);
 671
 672         if (!ah->curchan)
 673                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 674
 675         spin_lock_bh(&sc->sc_resetlock);
 676         r = ath9k_hw_reset(ah, ah->curchan, false);
 677         if (r) {
 678                 ath_print(common, ATH_DBG_FATAL,
 679                           "Unable to reset channel (%u MHz), "
 680                           "reset status %d\n",
 681                           channel->center_freq, r);
 682         }
 683         spin_unlock_bh(&sc->sc_resetlock);
 684
 685         ath_update_txpow(sc);
 686         if (ath_startrecv(sc) != 0) {
 687                 ath_print(common, ATH_DBG_FATAL,
 688                           "Unable to restart recv logic\n");
 689                 return;
 690         }
 691
 692         if (sc->sc_flags & SC_OP_BEACONS)
 693                 ath_beacon_config(sc, NULL);    /* restart beacons */
 694
 695         /* Re-Enable  interrupts */
 696         ath9k_hw_set_interrupts(ah, ah->imask);
 697
 698         /* Enable LED */
 699         ath9k_hw_cfg_output(ah, ah->led_pin,
 700                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 701         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 702
 703         ieee80211_wake_queues(hw);
 704         ath9k_ps_restore(sc);
 705 }
 706
 707 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 708 {
 709         struct ath_hw *ah = sc->sc_ah;
 710         struct ieee80211_channel *channel = hw->conf.channel;
 711         int r;
 712
 713         ath9k_ps_wakeup(sc);
 714         ieee80211_stop_queues(hw);
 715
 716         /* Disable LED */
 717         ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 718         ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 719
 720         /* Disable interrupts */
 721         ath9k_hw_set_interrupts(ah, 0);
 722
 723         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 724         ath_stoprecv(sc);               /* turn off frame recv */
 725         ath_flushrecv(sc);              /* flush recv queue */
 726
 727         if (!ah->curchan)
 728                 ah->curchan = ath_get_curchannel(sc, hw);
 729
 730         spin_lock_bh(&sc->sc_resetlock);
 731         r = ath9k_hw_reset(ah, ah->curchan, false);
 732         if (r) {
 733                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 734                           "Unable to reset channel (%u MHz), "
 735                           "reset status %d\n",
 736                           channel->center_freq, r);
 737         }
 738         spin_unlock_bh(&sc->sc_resetlock);
 739
 740         ath9k_hw_phy_disable(ah);
 741         ath9k_hw_configpcipowersave(ah, 1, 1);
 742         ath9k_ps_restore(sc);
 743         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 744 }
 745
 746 int ath_reset(struct ath_softc *sc, bool retry_tx)
 747 {
 748         struct ath_hw *ah = sc->sc_ah;
 749         struct ath_common *common = ath9k_hw_common(ah);
 750         struct ieee80211_hw *hw = sc->hw;
 751         int r;
 752
 753         /* Stop ANI */
 754         del_timer_sync(&common->ani.timer);
 755
 756         ieee80211_stop_queues(hw);
 757
 758         ath9k_hw_set_interrupts(ah, 0);
 759         ath_drain_all_txq(sc, retry_tx);
 760         ath_stoprecv(sc);
 761         ath_flushrecv(sc);
 762
 763         spin_lock_bh(&sc->sc_resetlock);
 764         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
 765         if (r)
 766                 ath_print(common, ATH_DBG_FATAL,
 767                           "Unable to reset hardware; reset status %d\n", r);
 768         spin_unlock_bh(&sc->sc_resetlock);
 769
 770         if (ath_startrecv(sc) != 0)
 771                 ath_print(common, ATH_DBG_FATAL,
 772                           "Unable to start recv logic\n");
 773
 774         /*
 775          * We may be doing a reset in response to a request
 776          * that changes the channel so update any state that
 777          * might change as a result.
 778          */
 779         ath_cache_conf_rate(sc, &hw->conf);
 780
 781         ath_update_txpow(sc);
 782
 783         if (sc->sc_flags & SC_OP_BEACONS)
 784                 ath_beacon_config(sc, NULL);    /* restart beacons */
 785
 786         ath9k_hw_set_interrupts(ah, ah->imask);
 787
 788         if (retry_tx) {
 789                 int i;
 790                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 791                         if (ATH_TXQ_SETUP(sc, i)) {
 792                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 793                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 794                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 795                         }
 796                 }
 797         }
 798
 799         ieee80211_wake_queues(hw);
 800
 801         /* Start ANI */
 802         ath_start_ani(common);
 803
 804         return r;
 805 }
 806
 807 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
 808 {
 809         int qnum;
 810
 811         switch (queue) {
 812         case 0:
 813                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
 814                 break;
 815         case 1:
 816                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
 817                 break;
 818         case 2:
 819                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
 820                 break;
 821         case 3:
 822                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
 823                 break;
 824         default:
 825                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
 826                 break;
 827         }
 828
 829         return qnum;
 830 }
 831
 832 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
 833 {
 834         int qnum;
 835
 836         switch (queue) {
 837         case ATH9K_WME_AC_VO:
 838                 qnum = 0;
 839                 break;
 840         case ATH9K_WME_AC_VI:
 841                 qnum = 1;
 842                 break;
 843         case ATH9K_WME_AC_BE:
 844                 qnum = 2;
 845                 break;
 846         case ATH9K_WME_AC_BK:
 847                 qnum = 3;
 848                 break;
 849         default:
 850                 qnum = -1;
 851                 break;
 852         }
 853
 854         return qnum;
 855 }
 856
 857 /* XXX: Remove me once we don't depend on ath9k_channel for all
 858  * this redundant data */
 859 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
 860                            struct ath9k_channel *ichan)
 861 {
 862         struct ieee80211_channel *chan = hw->conf.channel;
 863         struct ieee80211_conf *conf = &hw->conf;
 864
 865         ichan->channel = chan->center_freq;
 866         ichan->chan = chan;
 867
 868         if (chan->band == IEEE80211_BAND_2GHZ) {
 869                 ichan->chanmode = CHANNEL_G;
 870                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
 871         } else {
 872                 ichan->chanmode = CHANNEL_A;
 873                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
 874         }
 875
 876         if (conf_is_ht(conf))
 877                 ichan->chanmode = ath_get_extchanmode(sc, chan,
 878                                             conf->channel_type);
 879 }
 880
 881 /**********************/
 882 /* mac80211 callbacks */
 883 /**********************/
 884
 885 static int ath9k_start(struct ieee80211_hw *hw)
 886 {
 887         struct ath_wiphy *aphy = hw->priv;
 888         struct ath_softc *sc = aphy->sc;
 889         struct ath_hw *ah = sc->sc_ah;
 890         struct ath_common *common = ath9k_hw_common(ah);
 891         struct ieee80211_channel *curchan = hw->conf.channel;
 892         struct ath9k_channel *init_channel;
 893         int r;
 894
 895         ath_print(common, ATH_DBG_CONFIG,
 896                   "Starting driver with initial channel: %d MHz\n",
 897                   curchan->center_freq);
 898
 899         mutex_lock(&sc->mutex);
 900
 901         if (ath9k_wiphy_started(sc)) {
 902                 if (sc->chan_idx == curchan->hw_value) {
 903                         /*
 904                          * Already on the operational channel, the new wiphy
 905                          * can be marked active.
 906                          */
 907                         aphy->state = ATH_WIPHY_ACTIVE;
 908                         ieee80211_wake_queues(hw);
 909                 } else {
 910                         /*
 911                          * Another wiphy is on another channel, start the new
 912                          * wiphy in paused state.
 913                          */
 914                         aphy->state = ATH_WIPHY_PAUSED;
 915                         ieee80211_stop_queues(hw);
 916                 }
 917                 mutex_unlock(&sc->mutex);
 918                 return 0;
 919         }
 920         aphy->state = ATH_WIPHY_ACTIVE;
 921
 922         /* setup initial channel */
 923
 924         sc->chan_idx = curchan->hw_value;
 925
 926         init_channel = ath_get_curchannel(sc, hw);
 927
 928         /* Reset SERDES registers */
 929         ath9k_hw_configpcipowersave(ah, 0, 0);
 930
 931         /*
 932          * The basic interface to setting the hardware in a good
 933          * state is ``reset''.  On return the hardware is known to
 934          * be powered up and with interrupts disabled.  This must
 935          * be followed by initialization of the appropriate bits
 936          * and then setup of the interrupt mask.
 937          */
 938         spin_lock_bh(&sc->sc_resetlock);
 939         r = ath9k_hw_reset(ah, init_channel, false);
 940         if (r) {
 941                 ath_print(common, ATH_DBG_FATAL,
 942                           "Unable to reset hardware; reset status %d "
 943                           "(freq %u MHz)\n", r,
 944                           curchan->center_freq);
 945                 spin_unlock_bh(&sc->sc_resetlock);
 946                 goto mutex_unlock;
 947         }
 948         spin_unlock_bh(&sc->sc_resetlock);
 949
 950         /*
 951          * This is needed only to setup initial state
 952          * but it's best done after a reset.
 953          */
 954         ath_update_txpow(sc);
 955
 956         /*
 957          * Setup the hardware after reset:
 958          * The receive engine is set going.
 959          * Frame transmit is handled entirely
 960          * in the frame output path; there's nothing to do
 961          * here except setup the interrupt mask.
 962          */
 963         if (ath_startrecv(sc) != 0) {
 964                 ath_print(common, ATH_DBG_FATAL,
 965                           "Unable to start recv logic\n");
 966                 r = -EIO;
 967                 goto mutex_unlock;
 968         }
 969
 970         /* Setup our intr mask. */
 971         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 972                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 973                     ATH9K_INT_GLOBAL;
 974
 975         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 976                 ah->imask |= ATH9K_INT_RXHP |
 977                              ATH9K_INT_RXLP |
 978                              ATH9K_INT_BB_WATCHDOG;
 979         else
 980                 ah->imask |= ATH9K_INT_RX;
 981
 982         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
 983                 ah->imask |= ATH9K_INT_GTT;
 984
 985         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 986                 ah->imask |= ATH9K_INT_CST;
 987
 988         ath_cache_conf_rate(sc, &hw->conf);
 989
 990         sc->sc_flags &= ~SC_OP_INVALID;
 991
 992         /* Disable BMISS interrupt when we're not associated */
 993         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
 994         ath9k_hw_set_interrupts(ah, ah->imask);
 995
 996         ieee80211_wake_queues(hw);
 997
 998         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 999
1000         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1001             !ah->btcoex_hw.enabled) {
1002                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1003                                            AR_STOMP_LOW_WLAN_WGHT);
1004                 ath9k_hw_btcoex_enable(ah);
1005
1006                 if (common->bus_ops->bt_coex_prep)
1007                         common->bus_ops->bt_coex_prep(common);
1008                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1009                         ath9k_btcoex_timer_resume(sc);
1010         }
1011
1012 mutex_unlock:
1013         mutex_unlock(&sc->mutex);
1014
1015         return r;
1016 }
1017
1018 static int ath9k_tx(struct ieee80211_hw *hw,
1019                     struct sk_buff *skb)
1020 {
1021         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1022         struct ath_wiphy *aphy = hw->priv;
1023         struct ath_softc *sc = aphy->sc;
1024         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1025         struct ath_tx_control txctl;
1026         int padpos, padsize;
1027         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1028         int qnum;
1029
1030         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1031                 ath_print(common, ATH_DBG_XMIT,
1032                           "ath9k: %s: TX in unexpected wiphy state "
1033                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1034                 goto exit;
1035         }
1036
1037         if (sc->ps_enabled) {
1038                 /*
1039                  * mac80211 does not set PM field for normal data frames, so we
1040                  * need to update that based on the current PS mode.
1041                  */
1042                 if (ieee80211_is_data(hdr->frame_control) &&
1043                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1044                     !ieee80211_has_pm(hdr->frame_control)) {
1045                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1046                                   "while in PS mode\n");
1047                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1048                 }
1049         }
1050
1051         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1052                 /*
1053                  * We are using PS-Poll and mac80211 can request TX while in
1054                  * power save mode. Need to wake up hardware for the TX to be
1055                  * completed and if needed, also for RX of buffered frames.
1056                  */
1057                 ath9k_ps_wakeup(sc);
1058                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1059                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1060                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1061                         ath_print(common, ATH_DBG_PS,
1062                                   "Sending PS-Poll to pick a buffered frame\n");
1063                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1064                 } else {
1065                         ath_print(common, ATH_DBG_PS,
1066                                   "Wake up to complete TX\n");
1067                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1068                 }
1069                 /*
1070                  * The actual restore operation will happen only after
1071                  * the sc_flags bit is cleared. We are just dropping
1072                  * the ps_usecount here.
1073                  */
1074                 ath9k_ps_restore(sc);
1075         }
1076
1077         memset(&txctl, 0, sizeof(struct ath_tx_control));
1078
1079         /*
1080          * As a temporary workaround, assign seq# here; this will likely need
1081          * to be cleaned up to work better with Beacon transmission and virtual
1082          * BSSes.
1083          */
1084         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1085                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1086                         sc->tx.seq_no += 0x10;
1087                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1088                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1089         }
1090
1091         /* Add the padding after the header if this is not already done */
1092         padpos = ath9k_cmn_padpos(hdr->frame_control);
1093         padsize = padpos & 3;
1094         if (padsize && skb->len>padpos) {
1095                 if (skb_headroom(skb) < padsize)
1096                         return -1;
1097                 skb_push(skb, padsize);
1098                 memmove(skb->data, skb->data + padsize, padpos);
1099         }
1100
1101         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1102         txctl.txq = &sc->tx.txq[qnum];
1103
1104         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1105
1106         if (ath_tx_start(hw, skb, &txctl) != 0) {
1107                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1108                 goto exit;
1109         }
1110
1111         return 0;
1112 exit:
1113         dev_kfree_skb_any(skb);
1114         return 0;
1115 }
1116
1117 static void ath9k_stop(struct ieee80211_hw *hw)
1118 {
1119         struct ath_wiphy *aphy = hw->priv;
1120         struct ath_softc *sc = aphy->sc;
1121         struct ath_hw *ah = sc->sc_ah;
1122         struct ath_common *common = ath9k_hw_common(ah);
1123
1124         mutex_lock(&sc->mutex);
1125
1126         aphy->state = ATH_WIPHY_INACTIVE;
1127
1128         cancel_delayed_work_sync(&sc->ath_led_blink_work);
1129         cancel_delayed_work_sync(&sc->tx_complete_work);
1130
1131         if (!sc->num_sec_wiphy) {
1132                 cancel_delayed_work_sync(&sc->wiphy_work);
1133                 cancel_work_sync(&sc->chan_work);
1134         }
1135
1136         if (sc->sc_flags & SC_OP_INVALID) {
1137                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1138                 mutex_unlock(&sc->mutex);
1139                 return;
1140         }
1141
1142         if (ath9k_wiphy_started(sc)) {
1143                 mutex_unlock(&sc->mutex);
1144                 return; /* another wiphy still in use */
1145         }
1146
1147         /* Ensure HW is awake when we try to shut it down. */
1148         ath9k_ps_wakeup(sc);
1149
1150         if (ah->btcoex_hw.enabled) {
1151                 ath9k_hw_btcoex_disable(ah);
1152                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1153                         ath9k_btcoex_timer_pause(sc);
1154         }
1155
1156         /* make sure h/w will not generate any interrupt
1157          * before setting the invalid flag. */
1158         ath9k_hw_set_interrupts(ah, 0);
1159
1160         if (!(sc->sc_flags & SC_OP_INVALID)) {
1161                 ath_drain_all_txq(sc, false);
1162                 ath_stoprecv(sc);
1163                 ath9k_hw_phy_disable(ah);
1164         } else
1165                 sc->rx.rxlink = NULL;
1166
1167         /* disable HAL and put h/w to sleep */
1168         ath9k_hw_disable(ah);
1169         ath9k_hw_configpcipowersave(ah, 1, 1);
1170         ath9k_ps_restore(sc);
1171
1172         /* Finally, put the chip in FULL SLEEP mode */
1173         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1174
1175         sc->sc_flags |= SC_OP_INVALID;
1176
1177         mutex_unlock(&sc->mutex);
1178
1179         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1180 }
1181
1182 static int ath9k_add_interface(struct ieee80211_hw *hw,
1183                                struct ieee80211_vif *vif)
1184 {
1185         struct ath_wiphy *aphy = hw->priv;
1186         struct ath_softc *sc = aphy->sc;
1187         struct ath_hw *ah = sc->sc_ah;
1188         struct ath_common *common = ath9k_hw_common(ah);
1189         struct ath_vif *avp = (void *)vif->drv_priv;
1190         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1191         int ret = 0;
1192
1193         mutex_lock(&sc->mutex);
1194
1195         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1196             sc->nvifs > 0) {
1197                 ret = -ENOBUFS;
1198                 goto out;
1199         }
1200
1201         switch (vif->type) {
1202         case NL80211_IFTYPE_STATION:
1203                 ic_opmode = NL80211_IFTYPE_STATION;
1204                 break;
1205         case NL80211_IFTYPE_ADHOC:
1206         case NL80211_IFTYPE_AP:
1207         case NL80211_IFTYPE_MESH_POINT:
1208                 if (sc->nbcnvifs >= ATH_BCBUF) {
1209                         ret = -ENOBUFS;
1210                         goto out;
1211                 }
1212                 ic_opmode = vif->type;
1213                 break;
1214         default:
1215                 ath_print(common, ATH_DBG_FATAL,
1216                         "Interface type %d not yet supported\n", vif->type);
1217                 ret = -EOPNOTSUPP;
1218                 goto out;
1219         }
1220
1221         ath_print(common, ATH_DBG_CONFIG,
1222                   "Attach a VIF of type: %d\n", ic_opmode);
1223
1224         /* Set the VIF opmode */
1225         avp->av_opmode = ic_opmode;
1226         avp->av_bslot = -1;
1227
1228         sc->nvifs++;
1229
1230         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1231                 ath9k_set_bssid_mask(hw);
1232
1233         if (sc->nvifs > 1)
1234                 goto out; /* skip global settings for secondary vif */
1235
1236         if (ic_opmode == NL80211_IFTYPE_AP) {
1237                 ath9k_hw_set_tsfadjust(ah, 1);
1238                 sc->sc_flags |= SC_OP_TSF_RESET;
1239         }
1240
1241         /* Set the device opmode */
1242         ah->opmode = ic_opmode;
1243
1244         /*
1245          * Enable MIB interrupts when there are hardware phy counters.
1246          * Note we only do this (at the moment) for station mode.
1247          */
1248         if ((vif->type == NL80211_IFTYPE_STATION) ||
1249             (vif->type == NL80211_IFTYPE_ADHOC) ||
1250             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1251                 if (ah->config.enable_ani)
1252                         ah->imask |= ATH9K_INT_MIB;
1253                 ah->imask |= ATH9K_INT_TSFOOR;
1254         }
1255
1256         ath9k_hw_set_interrupts(ah, ah->imask);
1257
1258         if (vif->type == NL80211_IFTYPE_AP    ||
1259             vif->type == NL80211_IFTYPE_ADHOC ||
1260             vif->type == NL80211_IFTYPE_MONITOR)
1261                 ath_start_ani(common);
1262
1263 out:
1264         mutex_unlock(&sc->mutex);
1265         return ret;
1266 }
1267
1268 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1269                                    struct ieee80211_vif *vif)
1270 {
1271         struct ath_wiphy *aphy = hw->priv;
1272         struct ath_softc *sc = aphy->sc;
1273         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1274         struct ath_vif *avp = (void *)vif->drv_priv;
1275         int i;
1276
1277         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1278
1279         mutex_lock(&sc->mutex);
1280
1281         /* Stop ANI */
1282         del_timer_sync(&common->ani.timer);
1283
1284         /* Reclaim beacon resources */
1285         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1286             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1287             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1288                 ath9k_ps_wakeup(sc);
1289                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1290                 ath9k_ps_restore(sc);
1291         }
1292
1293         ath_beacon_return(sc, avp);
1294         sc->sc_flags &= ~SC_OP_BEACONS;
1295
1296         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1297                 if (sc->beacon.bslot[i] == vif) {
1298                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1299                                "slot\n", __func__);
1300                         sc->beacon.bslot[i] = NULL;
1301                         sc->beacon.bslot_aphy[i] = NULL;
1302                 }
1303         }
1304
1305         sc->nvifs--;
1306
1307         mutex_unlock(&sc->mutex);
1308 }
1309
1310 void ath9k_enable_ps(struct ath_softc *sc)
1311 {
1312         struct ath_hw *ah = sc->sc_ah;
1313
1314         sc->ps_enabled = true;
1315         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1316                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1317                         ah->imask |= ATH9K_INT_TIM_TIMER;
1318                         ath9k_hw_set_interrupts(ah, ah->imask);
1319                 }
1320                 ath9k_hw_setrxabort(ah, 1);
1321         }
1322 }
1323
1324 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1325 {
1326         struct ath_wiphy *aphy = hw->priv;
1327         struct ath_softc *sc = aphy->sc;
1328         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1329         struct ieee80211_conf *conf = &hw->conf;
1330         struct ath_hw *ah = sc->sc_ah;
1331         bool disable_radio;
1332
1333         mutex_lock(&sc->mutex);
1334
1335         /*
1336          * Leave this as the first check because we need to turn on the
1337          * radio if it was disabled before prior to processing the rest
1338          * of the changes. Likewise we must only disable the radio towards
1339          * the end.
1340          */
1341         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1342                 bool enable_radio;
1343                 bool all_wiphys_idle;
1344                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1345
1346                 spin_lock_bh(&sc->wiphy_lock);
1347                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1348                 ath9k_set_wiphy_idle(aphy, idle);
1349
1350                 enable_radio = (!idle && all_wiphys_idle);
1351
1352                 /*
1353                  * After we unlock here its possible another wiphy
1354                  * can be re-renabled so to account for that we will
1355                  * only disable the radio toward the end of this routine
1356                  * if by then all wiphys are still idle.
1357                  */
1358                 spin_unlock_bh(&sc->wiphy_lock);
1359
1360                 if (enable_radio) {
1361                         sc->ps_idle = false;
1362                         ath_radio_enable(sc, hw);
1363                         ath_print(common, ATH_DBG_CONFIG,
1364                                   "not-idle: enabling radio\n");
1365                 }
1366         }
1367
1368         /*
1369          * We just prepare to enable PS. We have to wait until our AP has
1370          * ACK'd our null data frame to disable RX otherwise we'll ignore
1371          * those ACKs and end up retransmitting the same null data frames.
1372          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1373          */
1374         if (changed & IEEE80211_CONF_CHANGE_PS) {
1375                 if (conf->flags & IEEE80211_CONF_PS) {
1376                         sc->ps_flags |= PS_ENABLED;
1377                         /*
1378                          * At this point we know hardware has received an ACK
1379                          * of a previously sent null data frame.
1380                          */
1381                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1382                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1383                                 ath9k_enable_ps(sc);
1384                         }
1385                 } else {
1386                         sc->ps_enabled = false;
1387                         sc->ps_flags &= ~(PS_ENABLED |
1388                                           PS_NULLFUNC_COMPLETED);
1389                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1390                         if (!(ah->caps.hw_caps &
1391                               ATH9K_HW_CAP_AUTOSLEEP)) {
1392                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1393                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1394                                                   PS_WAIT_FOR_CAB |
1395                                                   PS_WAIT_FOR_PSPOLL_DATA |
1396                                                   PS_WAIT_FOR_TX_ACK);
1397                                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1398                                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1399                                         ath9k_hw_set_interrupts(sc->sc_ah,
1400                                                         ah->imask);
1401                                 }
1402                         }
1403                 }
1404         }
1405
1406         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1407                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1408                         ath_print(common, ATH_DBG_CONFIG,
1409                                   "HW opmode set to Monitor mode\n");
1410                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1411                 }
1412         }
1413
1414         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1415                 struct ieee80211_channel *curchan = hw->conf.channel;
1416                 int pos = curchan->hw_value;
1417
1418                 aphy->chan_idx = pos;
1419                 aphy->chan_is_ht = conf_is_ht(conf);
1420
1421                 if (aphy->state == ATH_WIPHY_SCAN ||
1422                     aphy->state == ATH_WIPHY_ACTIVE)
1423                         ath9k_wiphy_pause_all_forced(sc, aphy);
1424                 else {
1425                         /*
1426                          * Do not change operational channel based on a paused
1427                          * wiphy changes.
1428                          */
1429                         goto skip_chan_change;
1430                 }
1431
1432                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1433                           curchan->center_freq);
1434
1435                 /* XXX: remove me eventualy */
1436                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1437
1438                 ath_update_chainmask(sc, conf_is_ht(conf));
1439
1440                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1441                         ath_print(common, ATH_DBG_FATAL,
1442                                   "Unable to set channel\n");
1443                         mutex_unlock(&sc->mutex);
1444                         return -EINVAL;
1445                 }
1446         }
1447
1448 skip_chan_change:
1449         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1450                 sc->config.txpowlimit = 2 * conf->power_level;
1451                 ath_update_txpow(sc);
1452         }
1453
1454         spin_lock_bh(&sc->wiphy_lock);
1455         disable_radio = ath9k_all_wiphys_idle(sc);
1456         spin_unlock_bh(&sc->wiphy_lock);
1457
1458         if (disable_radio) {
1459                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1460                 sc->ps_idle = true;
1461                 ath_radio_disable(sc, hw);
1462         }
1463
1464         mutex_unlock(&sc->mutex);
1465
1466         return 0;
1467 }
1468
1469 #define SUPPORTED_FILTERS                       \
1470         (FIF_PROMISC_IN_BSS |                   \
1471         FIF_ALLMULTI |                          \
1472         FIF_CONTROL |                           \
1473         FIF_PSPOLL |                            \
1474         FIF_OTHER_BSS |                         \
1475         FIF_BCN_PRBRESP_PROMISC |               \
1476         FIF_FCSFAIL)
1477
1478 /* FIXME: sc->sc_full_reset ? */
1479 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1480                                    unsigned int changed_flags,
1481                                    unsigned int *total_flags,
1482                                    u64 multicast)
1483 {
1484         struct ath_wiphy *aphy = hw->priv;
1485         struct ath_softc *sc = aphy->sc;
1486         u32 rfilt;
1487
1488         changed_flags &= SUPPORTED_FILTERS;
1489         *total_flags &= SUPPORTED_FILTERS;
1490
1491         sc->rx.rxfilter = *total_flags;
1492         ath9k_ps_wakeup(sc);
1493         rfilt = ath_calcrxfilter(sc);
1494         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1495         ath9k_ps_restore(sc);
1496
1497         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1498                   "Set HW RX filter: 0x%x\n", rfilt);
1499 }
1500
1501 static int ath9k_sta_add(struct ieee80211_hw *hw,
1502                          struct ieee80211_vif *vif,
1503                          struct ieee80211_sta *sta)
1504 {
1505         struct ath_wiphy *aphy = hw->priv;
1506         struct ath_softc *sc = aphy->sc;
1507
1508         ath_node_attach(sc, sta);
1509
1510         return 0;
1511 }
1512
1513 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1514                             struct ieee80211_vif *vif,
1515                             struct ieee80211_sta *sta)
1516 {
1517         struct ath_wiphy *aphy = hw->priv;
1518         struct ath_softc *sc = aphy->sc;
1519
1520         ath_node_detach(sc, sta);
1521
1522         return 0;
1523 }
1524
1525 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1526                          const struct ieee80211_tx_queue_params *params)
1527 {
1528         struct ath_wiphy *aphy = hw->priv;
1529         struct ath_softc *sc = aphy->sc;
1530         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1531         struct ath9k_tx_queue_info qi;
1532         int ret = 0, qnum;
1533
1534         if (queue >= WME_NUM_AC)
1535                 return 0;
1536
1537         mutex_lock(&sc->mutex);
1538
1539         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1540
1541         qi.tqi_aifs = params->aifs;
1542         qi.tqi_cwmin = params->cw_min;
1543         qi.tqi_cwmax = params->cw_max;
1544         qi.tqi_burstTime = params->txop;
1545         qnum = ath_get_hal_qnum(queue, sc);
1546
1547         ath_print(common, ATH_DBG_CONFIG,
1548                   "Configure tx [queue/halq] [%d/%d],  "
1549                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1550                   queue, qnum, params->aifs, params->cw_min,
1551                   params->cw_max, params->txop);
1552
1553         ret = ath_txq_update(sc, qnum, &qi);
1554         if (ret)
1555                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1556
1557         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1558                 if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
1559                         ath_beaconq_config(sc);
1560
1561         mutex_unlock(&sc->mutex);
1562
1563         return ret;
1564 }
1565
1566 static int ath9k_set_key(struct ieee80211_hw *hw,
1567                          enum set_key_cmd cmd,
1568                          struct ieee80211_vif *vif,
1569                          struct ieee80211_sta *sta,
1570                          struct ieee80211_key_conf *key)
1571 {
1572         struct ath_wiphy *aphy = hw->priv;
1573         struct ath_softc *sc = aphy->sc;
1574         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1575         int ret = 0;
1576
1577         if (modparam_nohwcrypt)
1578                 return -ENOSPC;
1579
1580         mutex_lock(&sc->mutex);
1581         ath9k_ps_wakeup(sc);
1582         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1583
1584         switch (cmd) {
1585         case SET_KEY:
1586                 ret = ath9k_cmn_key_config(common, vif, sta, key);
1587                 if (ret >= 0) {
1588                         key->hw_key_idx = ret;
1589                         /* push IV and Michael MIC generation to stack */
1590                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1591                         if (key->alg == ALG_TKIP)
1592                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1593                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1594                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1595                         ret = 0;
1596                 }
1597                 break;
1598         case DISABLE_KEY:
1599                 ath9k_cmn_key_delete(common, key);
1600                 break;
1601         default:
1602                 ret = -EINVAL;
1603         }
1604
1605         ath9k_ps_restore(sc);
1606         mutex_unlock(&sc->mutex);
1607
1608         return ret;
1609 }
1610
1611 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1612                                    struct ieee80211_vif *vif,
1613                                    struct ieee80211_bss_conf *bss_conf,
1614                                    u32 changed)
1615 {
1616         struct ath_wiphy *aphy = hw->priv;
1617         struct ath_softc *sc = aphy->sc;
1618         struct ath_hw *ah = sc->sc_ah;
1619         struct ath_common *common = ath9k_hw_common(ah);
1620         struct ath_vif *avp = (void *)vif->drv_priv;
1621         int slottime;
1622         int error;
1623
1624         mutex_lock(&sc->mutex);
1625
1626         if (changed & BSS_CHANGED_BSSID) {
1627                 /* Set BSSID */
1628                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1629                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1630                 common->curaid = 0;
1631                 ath9k_hw_write_associd(ah);
1632
1633                 /* Set aggregation protection mode parameters */
1634                 sc->config.ath_aggr_prot = 0;
1635
1636                 /* Only legacy IBSS for now */
1637                 if (vif->type == NL80211_IFTYPE_ADHOC)
1638                         ath_update_chainmask(sc, 0);
1639
1640                 ath_print(common, ATH_DBG_CONFIG,
1641                           "BSSID: %pM aid: 0x%x\n",
1642                           common->curbssid, common->curaid);
1643
1644                 /* need to reconfigure the beacon */
1645                 sc->sc_flags &= ~SC_OP_BEACONS ;
1646         }
1647
1648         /* Enable transmission of beacons (AP, IBSS, MESH) */
1649         if ((changed & BSS_CHANGED_BEACON) ||
1650             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1651                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1652                 error = ath_beacon_alloc(aphy, vif);
1653                 if (!error)
1654                         ath_beacon_config(sc, vif);
1655         }
1656
1657         if (changed & BSS_CHANGED_ERP_SLOT) {
1658                 if (bss_conf->use_short_slot)
1659                         slottime = 9;
1660                 else
1661                         slottime = 20;
1662                 if (vif->type == NL80211_IFTYPE_AP) {
1663                         /*
1664                          * Defer update, so that connected stations can adjust
1665                          * their settings at the same time.
1666                          * See beacon.c for more details
1667                          */
1668                         sc->beacon.slottime = slottime;
1669                         sc->beacon.updateslot = UPDATE;
1670                 } else {
1671                         ah->slottime = slottime;
1672                         ath9k_hw_init_global_settings(ah);
1673                 }
1674         }
1675
1676         /* Disable transmission of beacons */
1677         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1678                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1679
1680         if (changed & BSS_CHANGED_BEACON_INT) {
1681                 sc->beacon_interval = bss_conf->beacon_int;
1682                 /*
1683                  * In case of AP mode, the HW TSF has to be reset
1684                  * when the beacon interval changes.
1685                  */
1686                 if (vif->type == NL80211_IFTYPE_AP) {
1687                         sc->sc_flags |= SC_OP_TSF_RESET;
1688                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1689                         error = ath_beacon_alloc(aphy, vif);
1690                         if (!error)
1691                                 ath_beacon_config(sc, vif);
1692                 } else {
1693                         ath_beacon_config(sc, vif);
1694                 }
1695         }
1696
1697         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1698                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1699                           bss_conf->use_short_preamble);
1700                 if (bss_conf->use_short_preamble)
1701                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1702                 else
1703                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1704         }
1705
1706         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1707                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1708                           bss_conf->use_cts_prot);
1709                 if (bss_conf->use_cts_prot &&
1710                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1711                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1712                 else
1713                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1714         }
1715
1716         if (changed & BSS_CHANGED_ASSOC) {
1717                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1718                         bss_conf->assoc);
1719                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1720         }
1721
1722         mutex_unlock(&sc->mutex);
1723 }
1724
1725 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1726 {
1727         u64 tsf;
1728         struct ath_wiphy *aphy = hw->priv;
1729         struct ath_softc *sc = aphy->sc;
1730
1731         mutex_lock(&sc->mutex);
1732         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1733         mutex_unlock(&sc->mutex);
1734
1735         return tsf;
1736 }
1737
1738 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1739 {
1740         struct ath_wiphy *aphy = hw->priv;
1741         struct ath_softc *sc = aphy->sc;
1742
1743         mutex_lock(&sc->mutex);
1744         ath9k_hw_settsf64(sc->sc_ah, tsf);
1745         mutex_unlock(&sc->mutex);
1746 }
1747
1748 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1749 {
1750         struct ath_wiphy *aphy = hw->priv;
1751         struct ath_softc *sc = aphy->sc;
1752
1753         mutex_lock(&sc->mutex);
1754
1755         ath9k_ps_wakeup(sc);
1756         ath9k_hw_reset_tsf(sc->sc_ah);
1757         ath9k_ps_restore(sc);
1758
1759         mutex_unlock(&sc->mutex);
1760 }
1761
1762 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1763                               struct ieee80211_vif *vif,
1764                               enum ieee80211_ampdu_mlme_action action,
1765                               struct ieee80211_sta *sta,
1766                               u16 tid, u16 *ssn)
1767 {
1768         struct ath_wiphy *aphy = hw->priv;
1769         struct ath_softc *sc = aphy->sc;
1770         int ret = 0;
1771
1772         switch (action) {
1773         case IEEE80211_AMPDU_RX_START:
1774                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1775                         ret = -ENOTSUPP;
1776                 break;
1777         case IEEE80211_AMPDU_RX_STOP:
1778                 break;
1779         case IEEE80211_AMPDU_TX_START:
1780                 ath9k_ps_wakeup(sc);
1781                 ath_tx_aggr_start(sc, sta, tid, ssn);
1782                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1783                 ath9k_ps_restore(sc);
1784                 break;
1785         case IEEE80211_AMPDU_TX_STOP:
1786                 ath9k_ps_wakeup(sc);
1787                 ath_tx_aggr_stop(sc, sta, tid);
1788                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1789                 ath9k_ps_restore(sc);
1790                 break;
1791         case IEEE80211_AMPDU_TX_OPERATIONAL:
1792                 ath9k_ps_wakeup(sc);
1793                 ath_tx_aggr_resume(sc, sta, tid);
1794                 ath9k_ps_restore(sc);
1795                 break;
1796         default:
1797                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1798                           "Unknown AMPDU action\n");
1799         }
1800
1801         return ret;
1802 }
1803
1804 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1805                              struct survey_info *survey)
1806 {
1807         struct ath_wiphy *aphy = hw->priv;
1808         struct ath_softc *sc = aphy->sc;
1809         struct ath_hw *ah = sc->sc_ah;
1810         struct ath_common *common = ath9k_hw_common(ah);
1811         struct ieee80211_conf *conf = &hw->conf;
1812
1813          if (idx != 0)
1814                 return -ENOENT;
1815
1816         survey->channel = conf->channel;
1817         survey->filled = SURVEY_INFO_NOISE_DBM;
1818         survey->noise = common->ani.noise_floor;
1819
1820         return 0;
1821 }
1822
1823 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1824 {
1825         struct ath_wiphy *aphy = hw->priv;
1826         struct ath_softc *sc = aphy->sc;
1827         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1828
1829         mutex_lock(&sc->mutex);
1830         if (ath9k_wiphy_scanning(sc)) {
1831                 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
1832                        "same time\n");
1833                 /*
1834                  * Do not allow the concurrent scanning state for now. This
1835                  * could be improved with scanning control moved into ath9k.
1836                  */
1837                 mutex_unlock(&sc->mutex);
1838                 return;
1839         }
1840
1841         aphy->state = ATH_WIPHY_SCAN;
1842         ath9k_wiphy_pause_all_forced(sc, aphy);
1843         sc->sc_flags |= SC_OP_SCANNING;
1844         del_timer_sync(&common->ani.timer);
1845         cancel_delayed_work_sync(&sc->tx_complete_work);
1846         mutex_unlock(&sc->mutex);
1847 }
1848
1849 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
1850 {
1851         struct ath_wiphy *aphy = hw->priv;
1852         struct ath_softc *sc = aphy->sc;
1853         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1854
1855         mutex_lock(&sc->mutex);
1856         aphy->state = ATH_WIPHY_ACTIVE;
1857         sc->sc_flags &= ~SC_OP_SCANNING;
1858         sc->sc_flags |= SC_OP_FULL_RESET;
1859         ath_start_ani(common);
1860         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1861         ath_beacon_config(sc, NULL);
1862         mutex_unlock(&sc->mutex);
1863 }
1864
1865 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1866 {
1867         struct ath_wiphy *aphy = hw->priv;
1868         struct ath_softc *sc = aphy->sc;
1869         struct ath_hw *ah = sc->sc_ah;
1870
1871         mutex_lock(&sc->mutex);
1872         ah->coverage_class = coverage_class;
1873         ath9k_hw_init_global_settings(ah);
1874         mutex_unlock(&sc->mutex);
1875 }
1876
1877 struct ieee80211_ops ath9k_ops = {
1878         .tx                 = ath9k_tx,
1879         .start              = ath9k_start,
1880         .stop               = ath9k_stop,
1881         .add_interface      = ath9k_add_interface,
1882         .remove_interface   = ath9k_remove_interface,
1883         .config             = ath9k_config,
1884         .configure_filter   = ath9k_configure_filter,
1885         .sta_add            = ath9k_sta_add,
1886         .sta_remove         = ath9k_sta_remove,
1887         .conf_tx            = ath9k_conf_tx,
1888         .bss_info_changed   = ath9k_bss_info_changed,
1889         .set_key            = ath9k_set_key,
1890         .get_tsf            = ath9k_get_tsf,
1891         .set_tsf            = ath9k_set_tsf,
1892         .reset_tsf          = ath9k_reset_tsf,
1893         .ampdu_action       = ath9k_ampdu_action,
1894         .get_survey         = ath9k_get_survey,
1895         .sw_scan_start      = ath9k_sw_scan_start,
1896         .sw_scan_complete   = ath9k_sw_scan_complete,
1897         .rfkill_poll        = ath9k_rfkill_poll_state,
1898         .set_coverage_class = ath9k_set_coverage_class,
1899 };