1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2015-2016 Qualcomm Atheros, Inc.
9 #define ATH10K_SWAP_CODE_SEG_BIN_LEN_MAX (512 * 1024)
10 #define ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ 12
11 #define ATH10K_SWAP_CODE_SEG_NUM_MAX 16
12 /* Currently only one swap segment is supported */
13 #define ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED 1
15 struct ath10k_fw_file;
17 struct ath10k_swap_code_seg_tlv {
23 struct ath10k_swap_code_seg_tail {
24 u8 magic_signature[ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ];
25 __le32 bmi_write_addr;
28 union ath10k_swap_code_seg_item {
29 struct ath10k_swap_code_seg_tlv tlv;
30 struct ath10k_swap_code_seg_tail tail;
33 struct ath10k_swap_code_seg_hw_info {
34 /* Swap binary image size */
41 __le32 bus_addr[ATH10K_SWAP_CODE_SEG_NUM_MAX];
42 __le64 reserved[ATH10K_SWAP_CODE_SEG_NUM_MAX];
45 struct ath10k_swap_code_seg_info {
46 struct ath10k_swap_code_seg_hw_info seg_hw_info;
47 void *virt_address[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
49 dma_addr_t paddr[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
52 int ath10k_swap_code_seg_configure(struct ath10k *ar,
53 const struct ath10k_fw_file *fw_file);
54 void ath10k_swap_code_seg_release(struct ath10k *ar,
55 struct ath10k_fw_file *fw_file);
56 int ath10k_swap_code_seg_init(struct ath10k *ar,
57 struct ath10k_fw_file *fw_file);