drivers/net/wireless/ath/ath10k/core.c

   1 // SPDX-License-Identifier: ISC
   2 /*
   3  * Copyright (c) 2005-2011 Atheros Communications Inc.
   4  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
   5  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/firmware.h>
  10 #include <linux/of.h>
  11 #include <linux/property.h>
  12 #include <linux/dmi.h>
  13 #include <linux/ctype.h>
  14 #include <linux/pm_qos.h>
  15 #include <asm/byteorder.h>
  16
  17 #include "core.h"
  18 #include "mac.h"
  19 #include "htc.h"
  20 #include "hif.h"
  21 #include "wmi.h"
  22 #include "bmi.h"
  23 #include "debug.h"
  24 #include "htt.h"
  25 #include "testmode.h"
  26 #include "wmi-ops.h"
  27 #include "coredump.h"
  28
  29 unsigned int ath10k_debug_mask;
  30 EXPORT_SYMBOL(ath10k_debug_mask);
  31
  32 static unsigned int ath10k_cryptmode_param;
  33 static bool uart_print;
  34 static bool skip_otp;
  35 static bool rawmode;
  36 static bool fw_diag_log;
  37
  38 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
  39                                      BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
  40
  41 /* FIXME: most of these should be readonly */
  42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  44 module_param(uart_print, bool, 0644);
  45 module_param(skip_otp, bool, 0644);
  46 module_param(rawmode, bool, 0644);
  47 module_param(fw_diag_log, bool, 0644);
  48 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
  49
  50 MODULE_PARM_DESC(debug_mask, "Debugging mask");
  51 MODULE_PARM_DESC(uart_print, "Uart target debugging");
  52 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  53 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  54 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
  55 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
  56 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging");
  57
  58 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  59         {
  60                 .id = QCA988X_HW_2_0_VERSION,
  61                 .dev_id = QCA988X_2_0_DEVICE_ID,
  62                 .bus = ATH10K_BUS_PCI,
  63                 .name = "qca988x hw2.0",
  64                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  65                 .uart_pin = 7,
  66                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  67                 .otp_exe_param = 0,
  68                 .channel_counters_freq_hz = 88000,
  69                 .max_probe_resp_desc_thres = 0,
  70                 .cal_data_len = 2116,
  71                 .fw = {
  72                         .dir = QCA988X_HW_2_0_FW_DIR,
  73                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  74                         .board_size = QCA988X_BOARD_DATA_SZ,
  75                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  76                 },
  77                 .hw_ops = &qca988x_ops,
  78                 .decap_align_bytes = 4,
  79                 .spectral_bin_discard = 0,
  80                 .spectral_bin_offset = 0,
  81                 .vht160_mcs_rx_highest = 0,
  82                 .vht160_mcs_tx_highest = 0,
  83                 .n_cipher_suites = 8,
  84                 .ast_skid_limit = 0x10,
  85                 .num_wds_entries = 0x20,
  86                 .target_64bit = false,
  87                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
  88                 .shadow_reg_support = false,
  89                 .rri_on_ddr = false,
  90                 .hw_filter_reset_required = true,
  91                 .fw_diag_ce_download = false,
  92                 .tx_stats_over_pktlog = true,
  93                 .dynamic_sar_support = false,
  94         },
  95         {
  96                 .id = QCA988X_HW_2_0_VERSION,
  97                 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
  98                 .name = "qca988x hw2.0 ubiquiti",
  99                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
 100                 .uart_pin = 7,
 101                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 102                 .otp_exe_param = 0,
 103                 .channel_counters_freq_hz = 88000,
 104                 .max_probe_resp_desc_thres = 0,
 105                 .cal_data_len = 2116,
 106                 .fw = {
 107                         .dir = QCA988X_HW_2_0_FW_DIR,
 108                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
 109                         .board_size = QCA988X_BOARD_DATA_SZ,
 110                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
 111                 },
 112                 .hw_ops = &qca988x_ops,
 113                 .decap_align_bytes = 4,
 114                 .spectral_bin_discard = 0,
 115                 .spectral_bin_offset = 0,
 116                 .vht160_mcs_rx_highest = 0,
 117                 .vht160_mcs_tx_highest = 0,
 118                 .n_cipher_suites = 8,
 119                 .ast_skid_limit = 0x10,
 120                 .num_wds_entries = 0x20,
 121                 .target_64bit = false,
 122                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 123                 .shadow_reg_support = false,
 124                 .rri_on_ddr = false,
 125                 .hw_filter_reset_required = true,
 126                 .fw_diag_ce_download = false,
 127                 .tx_stats_over_pktlog = true,
 128                 .dynamic_sar_support = false,
 129         },
 130         {
 131                 .id = QCA9887_HW_1_0_VERSION,
 132                 .dev_id = QCA9887_1_0_DEVICE_ID,
 133                 .bus = ATH10K_BUS_PCI,
 134                 .name = "qca9887 hw1.0",
 135                 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
 136                 .uart_pin = 7,
 137                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 138                 .otp_exe_param = 0,
 139                 .channel_counters_freq_hz = 88000,
 140                 .max_probe_resp_desc_thres = 0,
 141                 .cal_data_len = 2116,
 142                 .fw = {
 143                         .dir = QCA9887_HW_1_0_FW_DIR,
 144                         .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
 145                         .board_size = QCA9887_BOARD_DATA_SZ,
 146                         .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
 147                 },
 148                 .hw_ops = &qca988x_ops,
 149                 .decap_align_bytes = 4,
 150                 .spectral_bin_discard = 0,
 151                 .spectral_bin_offset = 0,
 152                 .vht160_mcs_rx_highest = 0,
 153                 .vht160_mcs_tx_highest = 0,
 154                 .n_cipher_suites = 8,
 155                 .ast_skid_limit = 0x10,
 156                 .num_wds_entries = 0x20,
 157                 .target_64bit = false,
 158                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 159                 .shadow_reg_support = false,
 160                 .rri_on_ddr = false,
 161                 .hw_filter_reset_required = true,
 162                 .fw_diag_ce_download = false,
 163                 .tx_stats_over_pktlog = false,
 164                 .dynamic_sar_support = false,
 165         },
 166         {
 167                 .id = QCA6174_HW_3_2_VERSION,
 168                 .dev_id = QCA6174_3_2_DEVICE_ID,
 169                 .bus = ATH10K_BUS_SDIO,
 170                 .name = "qca6174 hw3.2 sdio",
 171                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 172                 .uart_pin = 19,
 173                 .otp_exe_param = 0,
 174                 .channel_counters_freq_hz = 88000,
 175                 .max_probe_resp_desc_thres = 0,
 176                 .cal_data_len = 0,
 177                 .fw = {
 178                         .dir = QCA6174_HW_3_0_FW_DIR,
 179                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 180                         .board_size = QCA6174_BOARD_DATA_SZ,
 181                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 182                 },
 183                 .hw_ops = &qca6174_sdio_ops,
 184                 .hw_clk = qca6174_clk,
 185                 .target_cpu_freq = 176000000,
 186                 .decap_align_bytes = 4,
 187                 .n_cipher_suites = 8,
 188                 .num_peers = 10,
 189                 .ast_skid_limit = 0x10,
 190                 .num_wds_entries = 0x20,
 191                 .uart_pin_workaround = true,
 192                 .tx_stats_over_pktlog = false,
 193                 .bmi_large_size_download = true,
 194                 .supports_peer_stats_info = true,
 195                 .dynamic_sar_support = true,
 196         },
 197         {
 198                 .id = QCA6174_HW_2_1_VERSION,
 199                 .dev_id = QCA6164_2_1_DEVICE_ID,
 200                 .bus = ATH10K_BUS_PCI,
 201                 .name = "qca6164 hw2.1",
 202                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 203                 .uart_pin = 6,
 204                 .otp_exe_param = 0,
 205                 .channel_counters_freq_hz = 88000,
 206                 .max_probe_resp_desc_thres = 0,
 207                 .cal_data_len = 8124,
 208                 .fw = {
 209                         .dir = QCA6174_HW_2_1_FW_DIR,
 210                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 211                         .board_size = QCA6174_BOARD_DATA_SZ,
 212                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 213                 },
 214                 .hw_ops = &qca988x_ops,
 215                 .decap_align_bytes = 4,
 216                 .spectral_bin_discard = 0,
 217                 .spectral_bin_offset = 0,
 218                 .vht160_mcs_rx_highest = 0,
 219                 .vht160_mcs_tx_highest = 0,
 220                 .n_cipher_suites = 8,
 221                 .ast_skid_limit = 0x10,
 222                 .num_wds_entries = 0x20,
 223                 .target_64bit = false,
 224                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 225                 .shadow_reg_support = false,
 226                 .rri_on_ddr = false,
 227                 .hw_filter_reset_required = true,
 228                 .fw_diag_ce_download = false,
 229                 .tx_stats_over_pktlog = false,
 230                 .dynamic_sar_support = false,
 231         },
 232         {
 233                 .id = QCA6174_HW_2_1_VERSION,
 234                 .dev_id = QCA6174_2_1_DEVICE_ID,
 235                 .bus = ATH10K_BUS_PCI,
 236                 .name = "qca6174 hw2.1",
 237                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 238                 .uart_pin = 6,
 239                 .otp_exe_param = 0,
 240                 .channel_counters_freq_hz = 88000,
 241                 .max_probe_resp_desc_thres = 0,
 242                 .cal_data_len = 8124,
 243                 .fw = {
 244                         .dir = QCA6174_HW_2_1_FW_DIR,
 245                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 246                         .board_size = QCA6174_BOARD_DATA_SZ,
 247                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 248                 },
 249                 .hw_ops = &qca988x_ops,
 250                 .decap_align_bytes = 4,
 251                 .spectral_bin_discard = 0,
 252                 .spectral_bin_offset = 0,
 253                 .vht160_mcs_rx_highest = 0,
 254                 .vht160_mcs_tx_highest = 0,
 255                 .n_cipher_suites = 8,
 256                 .ast_skid_limit = 0x10,
 257                 .num_wds_entries = 0x20,
 258                 .target_64bit = false,
 259                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 260                 .shadow_reg_support = false,
 261                 .rri_on_ddr = false,
 262                 .hw_filter_reset_required = true,
 263                 .fw_diag_ce_download = false,
 264                 .tx_stats_over_pktlog = false,
 265                 .dynamic_sar_support = false,
 266         },
 267         {
 268                 .id = QCA6174_HW_3_0_VERSION,
 269                 .dev_id = QCA6174_2_1_DEVICE_ID,
 270                 .bus = ATH10K_BUS_PCI,
 271                 .name = "qca6174 hw3.0",
 272                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 273                 .uart_pin = 6,
 274                 .otp_exe_param = 0,
 275                 .channel_counters_freq_hz = 88000,
 276                 .max_probe_resp_desc_thres = 0,
 277                 .cal_data_len = 8124,
 278                 .fw = {
 279                         .dir = QCA6174_HW_3_0_FW_DIR,
 280                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 281                         .board_size = QCA6174_BOARD_DATA_SZ,
 282                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 283                 },
 284                 .hw_ops = &qca988x_ops,
 285                 .decap_align_bytes = 4,
 286                 .spectral_bin_discard = 0,
 287                 .spectral_bin_offset = 0,
 288                 .vht160_mcs_rx_highest = 0,
 289                 .vht160_mcs_tx_highest = 0,
 290                 .n_cipher_suites = 8,
 291                 .ast_skid_limit = 0x10,
 292                 .num_wds_entries = 0x20,
 293                 .target_64bit = false,
 294                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 295                 .shadow_reg_support = false,
 296                 .rri_on_ddr = false,
 297                 .hw_filter_reset_required = true,
 298                 .fw_diag_ce_download = false,
 299                 .tx_stats_over_pktlog = false,
 300                 .dynamic_sar_support = false,
 301         },
 302         {
 303                 .id = QCA6174_HW_3_2_VERSION,
 304                 .dev_id = QCA6174_2_1_DEVICE_ID,
 305                 .bus = ATH10K_BUS_PCI,
 306                 .name = "qca6174 hw3.2",
 307                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 308                 .uart_pin = 6,
 309                 .otp_exe_param = 0,
 310                 .channel_counters_freq_hz = 88000,
 311                 .max_probe_resp_desc_thres = 0,
 312                 .cal_data_len = 8124,
 313                 .fw = {
 314                         /* uses same binaries as hw3.0 */
 315                         .dir = QCA6174_HW_3_0_FW_DIR,
 316                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 317                         .board_size = QCA6174_BOARD_DATA_SZ,
 318                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 319                 },
 320                 .hw_ops = &qca6174_ops,
 321                 .hw_clk = qca6174_clk,
 322                 .target_cpu_freq = 176000000,
 323                 .decap_align_bytes = 4,
 324                 .spectral_bin_discard = 0,
 325                 .spectral_bin_offset = 0,
 326                 .vht160_mcs_rx_highest = 0,
 327                 .vht160_mcs_tx_highest = 0,
 328                 .n_cipher_suites = 8,
 329                 .ast_skid_limit = 0x10,
 330                 .num_wds_entries = 0x20,
 331                 .target_64bit = false,
 332                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 333                 .shadow_reg_support = false,
 334                 .rri_on_ddr = false,
 335                 .hw_filter_reset_required = true,
 336                 .fw_diag_ce_download = true,
 337                 .tx_stats_over_pktlog = false,
 338                 .supports_peer_stats_info = true,
 339                 .dynamic_sar_support = true,
 340         },
 341         {
 342                 .id = QCA99X0_HW_2_0_DEV_VERSION,
 343                 .dev_id = QCA99X0_2_0_DEVICE_ID,
 344                 .bus = ATH10K_BUS_PCI,
 345                 .name = "qca99x0 hw2.0",
 346                 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
 347                 .uart_pin = 7,
 348                 .otp_exe_param = 0x00000700,
 349                 .continuous_frag_desc = true,
 350                 .cck_rate_map_rev2 = true,
 351                 .channel_counters_freq_hz = 150000,
 352                 .max_probe_resp_desc_thres = 24,
 353                 .tx_chain_mask = 0xf,
 354                 .rx_chain_mask = 0xf,
 355                 .max_spatial_stream = 4,
 356                 .cal_data_len = 12064,
 357                 .fw = {
 358                         .dir = QCA99X0_HW_2_0_FW_DIR,
 359                         .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
 360                         .board_size = QCA99X0_BOARD_DATA_SZ,
 361                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 362                 },
 363                 .sw_decrypt_mcast_mgmt = true,
 364                 .hw_ops = &qca99x0_ops,
 365                 .decap_align_bytes = 1,
 366                 .spectral_bin_discard = 4,
 367                 .spectral_bin_offset = 0,
 368                 .vht160_mcs_rx_highest = 0,
 369                 .vht160_mcs_tx_highest = 0,
 370                 .n_cipher_suites = 11,
 371                 .ast_skid_limit = 0x10,
 372                 .num_wds_entries = 0x20,
 373                 .target_64bit = false,
 374                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 375                 .shadow_reg_support = false,
 376                 .rri_on_ddr = false,
 377                 .hw_filter_reset_required = true,
 378                 .fw_diag_ce_download = false,
 379                 .tx_stats_over_pktlog = false,
 380                 .dynamic_sar_support = false,
 381         },
 382         {
 383                 .id = QCA9984_HW_1_0_DEV_VERSION,
 384                 .dev_id = QCA9984_1_0_DEVICE_ID,
 385                 .bus = ATH10K_BUS_PCI,
 386                 .name = "qca9984/qca9994 hw1.0",
 387                 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
 388                 .uart_pin = 7,
 389                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 390                 .otp_exe_param = 0x00000700,
 391                 .continuous_frag_desc = true,
 392                 .cck_rate_map_rev2 = true,
 393                 .channel_counters_freq_hz = 150000,
 394                 .max_probe_resp_desc_thres = 24,
 395                 .tx_chain_mask = 0xf,
 396                 .rx_chain_mask = 0xf,
 397                 .max_spatial_stream = 4,
 398                 .cal_data_len = 12064,
 399                 .fw = {
 400                         .dir = QCA9984_HW_1_0_FW_DIR,
 401                         .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
 402                         .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE,
 403                         .board_size = QCA99X0_BOARD_DATA_SZ,
 404                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 405                         .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
 406                 },
 407                 .sw_decrypt_mcast_mgmt = true,
 408                 .hw_ops = &qca99x0_ops,
 409                 .decap_align_bytes = 1,
 410                 .spectral_bin_discard = 12,
 411                 .spectral_bin_offset = 8,
 412
 413                 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
 414                  * or 2x2 160Mhz, long-guard-interval.
 415                  */
 416                 .vht160_mcs_rx_highest = 1560,
 417                 .vht160_mcs_tx_highest = 1560,
 418                 .n_cipher_suites = 11,
 419                 .ast_skid_limit = 0x10,
 420                 .num_wds_entries = 0x20,
 421                 .target_64bit = false,
 422                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 423                 .shadow_reg_support = false,
 424                 .rri_on_ddr = false,
 425                 .hw_filter_reset_required = true,
 426                 .fw_diag_ce_download = false,
 427                 .tx_stats_over_pktlog = false,
 428                 .dynamic_sar_support = false,
 429         },
 430         {
 431                 .id = QCA9888_HW_2_0_DEV_VERSION,
 432                 .dev_id = QCA9888_2_0_DEVICE_ID,
 433                 .bus = ATH10K_BUS_PCI,
 434                 .name = "qca9888 hw2.0",
 435                 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
 436                 .uart_pin = 7,
 437                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 438                 .otp_exe_param = 0x00000700,
 439                 .continuous_frag_desc = true,
 440                 .channel_counters_freq_hz = 150000,
 441                 .max_probe_resp_desc_thres = 24,
 442                 .tx_chain_mask = 3,
 443                 .rx_chain_mask = 3,
 444                 .max_spatial_stream = 2,
 445                 .cal_data_len = 12064,
 446                 .fw = {
 447                         .dir = QCA9888_HW_2_0_FW_DIR,
 448                         .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
 449                         .board_size = QCA99X0_BOARD_DATA_SZ,
 450                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 451                 },
 452                 .sw_decrypt_mcast_mgmt = true,
 453                 .hw_ops = &qca99x0_ops,
 454                 .decap_align_bytes = 1,
 455                 .spectral_bin_discard = 12,
 456                 .spectral_bin_offset = 8,
 457
 458                 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
 459                  * 1x1 160Mhz, long-guard-interval.
 460                  */
 461                 .vht160_mcs_rx_highest = 780,
 462                 .vht160_mcs_tx_highest = 780,
 463                 .n_cipher_suites = 11,
 464                 .ast_skid_limit = 0x10,
 465                 .num_wds_entries = 0x20,
 466                 .target_64bit = false,
 467                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 468                 .shadow_reg_support = false,
 469                 .rri_on_ddr = false,
 470                 .hw_filter_reset_required = true,
 471                 .fw_diag_ce_download = false,
 472                 .tx_stats_over_pktlog = false,
 473                 .dynamic_sar_support = false,
 474         },
 475         {
 476                 .id = QCA9377_HW_1_0_DEV_VERSION,
 477                 .dev_id = QCA9377_1_0_DEVICE_ID,
 478                 .bus = ATH10K_BUS_PCI,
 479                 .name = "qca9377 hw1.0",
 480                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 481                 .uart_pin = 6,
 482                 .otp_exe_param = 0,
 483                 .channel_counters_freq_hz = 88000,
 484                 .max_probe_resp_desc_thres = 0,
 485                 .cal_data_len = 8124,
 486                 .fw = {
 487                         .dir = QCA9377_HW_1_0_FW_DIR,
 488                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 489                         .board_size = QCA9377_BOARD_DATA_SZ,
 490                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 491                 },
 492                 .hw_ops = &qca988x_ops,
 493                 .decap_align_bytes = 4,
 494                 .spectral_bin_discard = 0,
 495                 .spectral_bin_offset = 0,
 496                 .vht160_mcs_rx_highest = 0,
 497                 .vht160_mcs_tx_highest = 0,
 498                 .n_cipher_suites = 8,
 499                 .ast_skid_limit = 0x10,
 500                 .num_wds_entries = 0x20,
 501                 .target_64bit = false,
 502                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 503                 .shadow_reg_support = false,
 504                 .rri_on_ddr = false,
 505                 .hw_filter_reset_required = true,
 506                 .fw_diag_ce_download = false,
 507                 .tx_stats_over_pktlog = false,
 508                 .dynamic_sar_support = false,
 509         },
 510         {
 511                 .id = QCA9377_HW_1_1_DEV_VERSION,
 512                 .dev_id = QCA9377_1_0_DEVICE_ID,
 513                 .bus = ATH10K_BUS_PCI,
 514                 .name = "qca9377 hw1.1",
 515                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 516                 .uart_pin = 6,
 517                 .otp_exe_param = 0,
 518                 .channel_counters_freq_hz = 88000,
 519                 .max_probe_resp_desc_thres = 0,
 520                 .cal_data_len = 8124,
 521                 .fw = {
 522                         .dir = QCA9377_HW_1_0_FW_DIR,
 523                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 524                         .board_size = QCA9377_BOARD_DATA_SZ,
 525                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 526                 },
 527                 .hw_ops = &qca6174_ops,
 528                 .hw_clk = qca6174_clk,
 529                 .target_cpu_freq = 176000000,
 530                 .decap_align_bytes = 4,
 531                 .spectral_bin_discard = 0,
 532                 .spectral_bin_offset = 0,
 533                 .vht160_mcs_rx_highest = 0,
 534                 .vht160_mcs_tx_highest = 0,
 535                 .n_cipher_suites = 8,
 536                 .ast_skid_limit = 0x10,
 537                 .num_wds_entries = 0x20,
 538                 .target_64bit = false,
 539                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 540                 .shadow_reg_support = false,
 541                 .rri_on_ddr = false,
 542                 .hw_filter_reset_required = true,
 543                 .fw_diag_ce_download = true,
 544                 .tx_stats_over_pktlog = false,
 545                 .dynamic_sar_support = false,
 546         },
 547         {
 548                 .id = QCA9377_HW_1_1_DEV_VERSION,
 549                 .dev_id = QCA9377_1_0_DEVICE_ID,
 550                 .bus = ATH10K_BUS_SDIO,
 551                 .name = "qca9377 hw1.1 sdio",
 552                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 553                 .uart_pin = 19,
 554                 .otp_exe_param = 0,
 555                 .channel_counters_freq_hz = 88000,
 556                 .max_probe_resp_desc_thres = 0,
 557                 .cal_data_len = 8124,
 558                 .fw = {
 559                         .dir = QCA9377_HW_1_0_FW_DIR,
 560                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 561                         .board_size = QCA9377_BOARD_DATA_SZ,
 562                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 563                 },
 564                 .hw_ops = &qca6174_ops,
 565                 .hw_clk = qca6174_clk,
 566                 .target_cpu_freq = 176000000,
 567                 .decap_align_bytes = 4,
 568                 .n_cipher_suites = 8,
 569                 .num_peers = TARGET_QCA9377_HL_NUM_PEERS,
 570                 .ast_skid_limit = 0x10,
 571                 .num_wds_entries = 0x20,
 572                 .uart_pin_workaround = true,
 573                 .dynamic_sar_support = false,
 574         },
 575         {
 576                 .id = QCA4019_HW_1_0_DEV_VERSION,
 577                 .dev_id = 0,
 578                 .bus = ATH10K_BUS_AHB,
 579                 .name = "qca4019 hw1.0",
 580                 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
 581                 .uart_pin = 7,
 582                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 583                 .otp_exe_param = 0x0010000,
 584                 .continuous_frag_desc = true,
 585                 .cck_rate_map_rev2 = true,
 586                 .channel_counters_freq_hz = 125000,
 587                 .max_probe_resp_desc_thres = 24,
 588                 .tx_chain_mask = 0x3,
 589                 .rx_chain_mask = 0x3,
 590                 .max_spatial_stream = 2,
 591                 .cal_data_len = 12064,
 592                 .fw = {
 593                         .dir = QCA4019_HW_1_0_FW_DIR,
 594                         .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
 595                         .board_size = QCA4019_BOARD_DATA_SZ,
 596                         .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
 597                 },
 598                 .sw_decrypt_mcast_mgmt = true,
 599                 .hw_ops = &qca99x0_ops,
 600                 .decap_align_bytes = 1,
 601                 .spectral_bin_discard = 4,
 602                 .spectral_bin_offset = 0,
 603                 .vht160_mcs_rx_highest = 0,
 604                 .vht160_mcs_tx_highest = 0,
 605                 .n_cipher_suites = 11,
 606                 .ast_skid_limit = 0x10,
 607                 .num_wds_entries = 0x20,
 608                 .target_64bit = false,
 609                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 610                 .shadow_reg_support = false,
 611                 .rri_on_ddr = false,
 612                 .hw_filter_reset_required = true,
 613                 .fw_diag_ce_download = false,
 614                 .tx_stats_over_pktlog = false,
 615                 .dynamic_sar_support = false,
 616         },
 617         {
 618                 .id = WCN3990_HW_1_0_DEV_VERSION,
 619                 .dev_id = 0,
 620                 .bus = ATH10K_BUS_SNOC,
 621                 .name = "wcn3990 hw1.0",
 622                 .continuous_frag_desc = true,
 623                 .tx_chain_mask = 0x7,
 624                 .rx_chain_mask = 0x7,
 625                 .max_spatial_stream = 4,
 626                 .fw = {
 627                         .dir = WCN3990_HW_1_0_FW_DIR,
 628                 },
 629                 .sw_decrypt_mcast_mgmt = true,
 630                 .hw_ops = &wcn3990_ops,
 631                 .decap_align_bytes = 1,
 632                 .num_peers = TARGET_HL_TLV_NUM_PEERS,
 633                 .n_cipher_suites = 11,
 634                 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
 635                 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
 636                 .target_64bit = true,
 637                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
 638                 .shadow_reg_support = true,
 639                 .rri_on_ddr = true,
 640                 .hw_filter_reset_required = false,
 641                 .fw_diag_ce_download = false,
 642                 .tx_stats_over_pktlog = false,
 643                 .dynamic_sar_support = true,
 644         },
 645 };
 646
 647 static const char *const ath10k_core_fw_feature_str[] = {
 648         [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
 649         [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
 650         [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
 651         [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
 652         [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
 653         [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
 654         [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
 655         [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
 656         [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
 657         [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
 658         [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
 659         [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
 660         [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
 661         [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
 662         [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
 663         [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
 664         [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
 665         [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
 666         [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
 667         [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
 668         [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
 669         [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate",
 670         [ATH10K_FW_FEATURE_IRAM_RECOVERY] = "iram-recovery",
 671 };
 672
 673 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
 674                                                    size_t buf_len,
 675                                                    enum ath10k_fw_features feat)
 676 {
 677         /* make sure that ath10k_core_fw_feature_str[] gets updated */
 678         BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
 679                      ATH10K_FW_FEATURE_COUNT);
 680
 681         if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
 682             WARN_ON(!ath10k_core_fw_feature_str[feat])) {
 683                 return scnprintf(buf, buf_len, "bit%d", feat);
 684         }
 685
 686         return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
 687 }
 688
 689 void ath10k_core_get_fw_features_str(struct ath10k *ar,
 690                                      char *buf,
 691                                      size_t buf_len)
 692 {
 693         size_t len = 0;
 694         int i;
 695
 696         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
 697                 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
 698                         if (len > 0)
 699                                 len += scnprintf(buf + len, buf_len - len, ",");
 700
 701                         len += ath10k_core_get_fw_feature_str(buf + len,
 702                                                               buf_len - len,
 703                                                               i);
 704                 }
 705         }
 706 }
 707
 708 static void ath10k_send_suspend_complete(struct ath10k *ar)
 709 {
 710         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
 711
 712         complete(&ar->target_suspend);
 713 }
 714
 715 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
 716 {
 717         int ret;
 718         u32 param = 0;
 719
 720         ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
 721         if (ret)
 722                 return ret;
 723
 724         ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
 725         if (ret)
 726                 return ret;
 727
 728         ret = ath10k_bmi_read32(ar, hi_acs_flags, &param);
 729         if (ret)
 730                 return ret;
 731
 732         param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
 733
 734         if (mode == ATH10K_FIRMWARE_MODE_NORMAL)
 735                 param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
 736         else
 737                 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
 738
 739         if (mode == ATH10K_FIRMWARE_MODE_UTF)
 740                 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
 741         else
 742                 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
 743
 744         ret = ath10k_bmi_write32(ar, hi_acs_flags, param);
 745         if (ret)
 746                 return ret;
 747
 748         ret = ath10k_bmi_read32(ar, hi_option_flag2, &param);
 749         if (ret)
 750                 return ret;
 751
 752         param |= HI_OPTION_SDIO_CRASH_DUMP_ENHANCEMENT_HOST;
 753
 754         ret = ath10k_bmi_write32(ar, hi_option_flag2, param);
 755         if (ret)
 756                 return ret;
 757
 758         return 0;
 759 }
 760
 761 static int ath10k_init_configure_target(struct ath10k *ar)
 762 {
 763         u32 param_host;
 764         int ret;
 765
 766         /* tell target which HTC version it is used*/
 767         ret = ath10k_bmi_write32(ar, hi_app_host_interest,
 768                                  HTC_PROTOCOL_VERSION);
 769         if (ret) {
 770                 ath10k_err(ar, "settings HTC version failed\n");
 771                 return ret;
 772         }
 773
 774         /* set the firmware mode to STA/IBSS/AP */
 775         ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
 776         if (ret) {
 777                 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
 778                 return ret;
 779         }
 780
 781         /* TODO following parameters need to be re-visited. */
 782         /* num_device */
 783         param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
 784         /* Firmware mode */
 785         /* FIXME: Why FW_MODE_AP ??.*/
 786         param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
 787         /* mac_addr_method */
 788         param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 789         /* firmware_bridge */
 790         param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 791         /* fwsubmode */
 792         param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
 793
 794         ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
 795         if (ret) {
 796                 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
 797                 return ret;
 798         }
 799
 800         /* We do all byte-swapping on the host */
 801         ret = ath10k_bmi_write32(ar, hi_be, 0);
 802         if (ret) {
 803                 ath10k_err(ar, "setting host CPU BE mode failed\n");
 804                 return ret;
 805         }
 806
 807         /* FW descriptor/Data swap flags */
 808         ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
 809
 810         if (ret) {
 811                 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
 812                 return ret;
 813         }
 814
 815         /* Some devices have a special sanity check that verifies the PCI
 816          * Device ID is written to this host interest var. It is known to be
 817          * required to boot QCA6164.
 818          */
 819         ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
 820                                  ar->dev_id);
 821         if (ret) {
 822                 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
 823                 return ret;
 824         }
 825
 826         return 0;
 827 }
 828
 829 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
 830                                                    const char *dir,
 831                                                    const char *file)
 832 {
 833         char filename[100];
 834         const struct firmware *fw;
 835         int ret;
 836
 837         if (file == NULL)
 838                 return ERR_PTR(-ENOENT);
 839
 840         if (dir == NULL)
 841                 dir = ".";
 842
 843         snprintf(filename, sizeof(filename), "%s/%s", dir, file);
 844         ret = firmware_request_nowarn(&fw, filename, ar->dev);
 845         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
 846                    filename, ret);
 847
 848         if (ret)
 849                 return ERR_PTR(ret);
 850
 851         return fw;
 852 }
 853
 854 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
 855                                       size_t data_len)
 856 {
 857         u32 board_data_size = ar->hw_params.fw.board_size;
 858         u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
 859         u32 board_ext_data_addr;
 860         int ret;
 861
 862         ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
 863         if (ret) {
 864                 ath10k_err(ar, "could not read board ext data addr (%d)\n",
 865                            ret);
 866                 return ret;
 867         }
 868
 869         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 870                    "boot push board extended data addr 0x%x\n",
 871                    board_ext_data_addr);
 872
 873         if (board_ext_data_addr == 0)
 874                 return 0;
 875
 876         if (data_len != (board_data_size + board_ext_data_size)) {
 877                 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
 878                            data_len, board_data_size, board_ext_data_size);
 879                 return -EINVAL;
 880         }
 881
 882         ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
 883                                       data + board_data_size,
 884                                       board_ext_data_size);
 885         if (ret) {
 886                 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
 887                 return ret;
 888         }
 889
 890         ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
 891                                  (board_ext_data_size << 16) | 1);
 892         if (ret) {
 893                 ath10k_err(ar, "could not write board ext data bit (%d)\n",
 894                            ret);
 895                 return ret;
 896         }
 897
 898         return 0;
 899 }
 900
 901 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
 902 {
 903         u32 result, address;
 904         u8 board_id, chip_id;
 905         bool ext_bid_support;
 906         int ret, bmi_board_id_param;
 907
 908         address = ar->hw_params.patch_load_addr;
 909
 910         if (!ar->normal_mode_fw.fw_file.otp_data ||
 911             !ar->normal_mode_fw.fw_file.otp_len) {
 912                 ath10k_warn(ar,
 913                             "failed to retrieve board id because of invalid otp\n");
 914                 return -ENODATA;
 915         }
 916
 917         if (ar->id.bmi_ids_valid) {
 918                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 919                            "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n",
 920                            ar->id.bmi_board_id, ar->id.bmi_chip_id);
 921                 goto skip_otp_download;
 922         }
 923
 924         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 925                    "boot upload otp to 0x%x len %zd for board id\n",
 926                    address, ar->normal_mode_fw.fw_file.otp_len);
 927
 928         ret = ath10k_bmi_fast_download(ar, address,
 929                                        ar->normal_mode_fw.fw_file.otp_data,
 930                                        ar->normal_mode_fw.fw_file.otp_len);
 931         if (ret) {
 932                 ath10k_err(ar, "could not write otp for board id check: %d\n",
 933                            ret);
 934                 return ret;
 935         }
 936
 937         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
 938             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
 939                 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
 940         else
 941                 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
 942
 943         ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
 944         if (ret) {
 945                 ath10k_err(ar, "could not execute otp for board id check: %d\n",
 946                            ret);
 947                 return ret;
 948         }
 949
 950         board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
 951         chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
 952         ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
 953
 954         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 955                    "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
 956                    result, board_id, chip_id, ext_bid_support);
 957
 958         ar->id.ext_bid_supported = ext_bid_support;
 959
 960         if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
 961             (board_id == 0)) {
 962                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 963                            "board id does not exist in otp, ignore it\n");
 964                 return -EOPNOTSUPP;
 965         }
 966
 967         ar->id.bmi_ids_valid = true;
 968         ar->id.bmi_board_id = board_id;
 969         ar->id.bmi_chip_id = chip_id;
 970
 971 skip_otp_download:
 972
 973         return 0;
 974 }
 975
 976 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
 977 {
 978         struct ath10k *ar = data;
 979         const char *bdf_ext;
 980         const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
 981         u8 bdf_enabled;
 982         int i;
 983
 984         if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
 985                 return;
 986
 987         if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
 988                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 989                            "wrong smbios bdf ext type length (%d).\n",
 990                            hdr->length);
 991                 return;
 992         }
 993
 994         bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
 995         if (!bdf_enabled) {
 996                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
 997                 return;
 998         }
 999
1000         /* Only one string exists (per spec) */
1001         bdf_ext = (char *)hdr + hdr->length;
1002
1003         if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
1004                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1005                            "bdf variant magic does not match.\n");
1006                 return;
1007         }
1008
1009         for (i = 0; i < strlen(bdf_ext); i++) {
1010                 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
1011                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1012                                    "bdf variant name contains non ascii chars.\n");
1013                         return;
1014                 }
1015         }
1016
1017         /* Copy extension name without magic suffix */
1018         if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
1019                     sizeof(ar->id.bdf_ext)) < 0) {
1020                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1021                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1022                             bdf_ext);
1023                 return;
1024         }
1025
1026         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1027                    "found and validated bdf variant smbios_type 0x%x bdf %s\n",
1028                    ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
1029 }
1030
1031 static int ath10k_core_check_smbios(struct ath10k *ar)
1032 {
1033         ar->id.bdf_ext[0] = '\0';
1034         dmi_walk(ath10k_core_check_bdfext, ar);
1035
1036         if (ar->id.bdf_ext[0] == '\0')
1037                 return -ENODATA;
1038
1039         return 0;
1040 }
1041
1042 int ath10k_core_check_dt(struct ath10k *ar)
1043 {
1044         struct device_node *node;
1045         const char *variant = NULL;
1046
1047         node = ar->dev->of_node;
1048         if (!node)
1049                 return -ENOENT;
1050
1051         of_property_read_string(node, "qcom,ath10k-calibration-variant",
1052                                 &variant);
1053         if (!variant)
1054                 return -ENODATA;
1055
1056         if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1057                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1058                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1059                             variant);
1060
1061         return 0;
1062 }
1063 EXPORT_SYMBOL(ath10k_core_check_dt);
1064
1065 static int ath10k_download_fw(struct ath10k *ar)
1066 {
1067         u32 address, data_len;
1068         const void *data;
1069         int ret;
1070         struct pm_qos_request latency_qos;
1071
1072         address = ar->hw_params.patch_load_addr;
1073
1074         data = ar->running_fw->fw_file.firmware_data;
1075         data_len = ar->running_fw->fw_file.firmware_len;
1076
1077         ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1078         if (ret) {
1079                 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1080                            ret);
1081                 return ret;
1082         }
1083
1084         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1085                    "boot uploading firmware image %pK len %d\n",
1086                    data, data_len);
1087
1088         /* Check if device supports to download firmware via
1089          * diag copy engine. Downloading firmware via diag CE
1090          * greatly reduces the time to download firmware.
1091          */
1092         if (ar->hw_params.fw_diag_ce_download) {
1093                 ret = ath10k_hw_diag_fast_download(ar, address,
1094                                                    data, data_len);
1095                 if (ret == 0)
1096                         /* firmware upload via diag ce was successful */
1097                         return 0;
1098
1099                 ath10k_warn(ar,
1100                             "failed to upload firmware via diag ce, trying BMI: %d",
1101                             ret);
1102         }
1103
1104         memset(&latency_qos, 0, sizeof(latency_qos));
1105         cpu_latency_qos_add_request(&latency_qos, 0);
1106
1107         ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1108
1109         cpu_latency_qos_remove_request(&latency_qos);
1110
1111         return ret;
1112 }
1113
1114 void ath10k_core_free_board_files(struct ath10k *ar)
1115 {
1116         if (!IS_ERR(ar->normal_mode_fw.board))
1117                 release_firmware(ar->normal_mode_fw.board);
1118
1119         if (!IS_ERR(ar->normal_mode_fw.ext_board))
1120                 release_firmware(ar->normal_mode_fw.ext_board);
1121
1122         ar->normal_mode_fw.board = NULL;
1123         ar->normal_mode_fw.board_data = NULL;
1124         ar->normal_mode_fw.board_len = 0;
1125         ar->normal_mode_fw.ext_board = NULL;
1126         ar->normal_mode_fw.ext_board_data = NULL;
1127         ar->normal_mode_fw.ext_board_len = 0;
1128 }
1129 EXPORT_SYMBOL(ath10k_core_free_board_files);
1130
1131 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1132 {
1133         if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1134                 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1135
1136         if (!IS_ERR(ar->cal_file))
1137                 release_firmware(ar->cal_file);
1138
1139         if (!IS_ERR(ar->pre_cal_file))
1140                 release_firmware(ar->pre_cal_file);
1141
1142         ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1143
1144         ar->normal_mode_fw.fw_file.otp_data = NULL;
1145         ar->normal_mode_fw.fw_file.otp_len = 0;
1146
1147         ar->normal_mode_fw.fw_file.firmware = NULL;
1148         ar->normal_mode_fw.fw_file.firmware_data = NULL;
1149         ar->normal_mode_fw.fw_file.firmware_len = 0;
1150
1151         ar->cal_file = NULL;
1152         ar->pre_cal_file = NULL;
1153 }
1154
1155 static int ath10k_fetch_cal_file(struct ath10k *ar)
1156 {
1157         char filename[100];
1158
1159         /* pre-cal-<bus>-<id>.bin */
1160         scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1161                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1162
1163         ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1164         if (!IS_ERR(ar->pre_cal_file))
1165                 goto success;
1166
1167         /* cal-<bus>-<id>.bin */
1168         scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1169                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1170
1171         ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1172         if (IS_ERR(ar->cal_file))
1173                 /* calibration file is optional, don't print any warnings */
1174                 return PTR_ERR(ar->cal_file);
1175 success:
1176         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1177                    ATH10K_FW_DIR, filename);
1178
1179         return 0;
1180 }
1181
1182 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1183 {
1184         const struct firmware *fw;
1185
1186         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1187                 if (!ar->hw_params.fw.board) {
1188                         ath10k_err(ar, "failed to find board file fw entry\n");
1189                         return -EINVAL;
1190                 }
1191
1192                 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1193                                                                 ar->hw_params.fw.dir,
1194                                                                 ar->hw_params.fw.board);
1195                 if (IS_ERR(ar->normal_mode_fw.board))
1196                         return PTR_ERR(ar->normal_mode_fw.board);
1197
1198                 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1199                 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1200         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1201                 if (!ar->hw_params.fw.eboard) {
1202                         ath10k_err(ar, "failed to find eboard file fw entry\n");
1203                         return -EINVAL;
1204                 }
1205
1206                 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1207                                           ar->hw_params.fw.eboard);
1208                 ar->normal_mode_fw.ext_board = fw;
1209                 if (IS_ERR(ar->normal_mode_fw.ext_board))
1210                         return PTR_ERR(ar->normal_mode_fw.ext_board);
1211
1212                 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1213                 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1214         }
1215
1216         return 0;
1217 }
1218
1219 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1220                                          const void *buf, size_t buf_len,
1221                                          const char *boardname,
1222                                          int bd_ie_type)
1223 {
1224         const struct ath10k_fw_ie *hdr;
1225         bool name_match_found;
1226         int ret, board_ie_id;
1227         size_t board_ie_len;
1228         const void *board_ie_data;
1229
1230         name_match_found = false;
1231
1232         /* go through ATH10K_BD_IE_BOARD_ elements */
1233         while (buf_len > sizeof(struct ath10k_fw_ie)) {
1234                 hdr = buf;
1235                 board_ie_id = le32_to_cpu(hdr->id);
1236                 board_ie_len = le32_to_cpu(hdr->len);
1237                 board_ie_data = hdr->data;
1238
1239                 buf_len -= sizeof(*hdr);
1240                 buf += sizeof(*hdr);
1241
1242                 if (buf_len < ALIGN(board_ie_len, 4)) {
1243                         ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1244                                    buf_len, ALIGN(board_ie_len, 4));
1245                         ret = -EINVAL;
1246                         goto out;
1247                 }
1248
1249                 switch (board_ie_id) {
1250                 case ATH10K_BD_IE_BOARD_NAME:
1251                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1252                                         board_ie_data, board_ie_len);
1253
1254                         if (board_ie_len != strlen(boardname))
1255                                 break;
1256
1257                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
1258                         if (ret)
1259                                 break;
1260
1261                         name_match_found = true;
1262                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1263                                    "boot found match for name '%s'",
1264                                    boardname);
1265                         break;
1266                 case ATH10K_BD_IE_BOARD_DATA:
1267                         if (!name_match_found)
1268                                 /* no match found */
1269                                 break;
1270
1271                         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1272                                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1273                                            "boot found board data for '%s'",
1274                                                 boardname);
1275
1276                                 ar->normal_mode_fw.board_data = board_ie_data;
1277                                 ar->normal_mode_fw.board_len = board_ie_len;
1278                         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1279                                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1280                                            "boot found eboard data for '%s'",
1281                                                 boardname);
1282
1283                                 ar->normal_mode_fw.ext_board_data = board_ie_data;
1284                                 ar->normal_mode_fw.ext_board_len = board_ie_len;
1285                         }
1286
1287                         ret = 0;
1288                         goto out;
1289                 default:
1290                         ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1291                                     board_ie_id);
1292                         break;
1293                 }
1294
1295                 /* jump over the padding */
1296                 board_ie_len = ALIGN(board_ie_len, 4);
1297
1298                 buf_len -= board_ie_len;
1299                 buf += board_ie_len;
1300         }
1301
1302         /* no match found */
1303         ret = -ENOENT;
1304
1305 out:
1306         return ret;
1307 }
1308
1309 static int ath10k_core_search_bd(struct ath10k *ar,
1310                                  const char *boardname,
1311                                  const u8 *data,
1312                                  size_t len)
1313 {
1314         size_t ie_len;
1315         struct ath10k_fw_ie *hdr;
1316         int ret = -ENOENT, ie_id;
1317
1318         while (len > sizeof(struct ath10k_fw_ie)) {
1319                 hdr = (struct ath10k_fw_ie *)data;
1320                 ie_id = le32_to_cpu(hdr->id);
1321                 ie_len = le32_to_cpu(hdr->len);
1322
1323                 len -= sizeof(*hdr);
1324                 data = hdr->data;
1325
1326                 if (len < ALIGN(ie_len, 4)) {
1327                         ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1328                                    ie_id, ie_len, len);
1329                         return -EINVAL;
1330                 }
1331
1332                 switch (ie_id) {
1333                 case ATH10K_BD_IE_BOARD:
1334                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1335                                                             boardname,
1336                                                             ATH10K_BD_IE_BOARD);
1337                         if (ret == -ENOENT)
1338                                 /* no match found, continue */
1339                                 break;
1340
1341                         /* either found or error, so stop searching */
1342                         goto out;
1343                 case ATH10K_BD_IE_BOARD_EXT:
1344                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1345                                                             boardname,
1346                                                             ATH10K_BD_IE_BOARD_EXT);
1347                         if (ret == -ENOENT)
1348                                 /* no match found, continue */
1349                                 break;
1350
1351                         /* either found or error, so stop searching */
1352                         goto out;
1353                 }
1354
1355                 /* jump over the padding */
1356                 ie_len = ALIGN(ie_len, 4);
1357
1358                 len -= ie_len;
1359                 data += ie_len;
1360         }
1361
1362 out:
1363         /* return result of parse_bd_ie_board() or -ENOENT */
1364         return ret;
1365 }
1366
1367 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1368                                               const char *boardname,
1369                                               const char *fallback_boardname1,
1370                                               const char *fallback_boardname2,
1371                                               const char *filename)
1372 {
1373         size_t len, magic_len;
1374         const u8 *data;
1375         int ret;
1376
1377         /* Skip if already fetched during board data download */
1378         if (!ar->normal_mode_fw.board)
1379                 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1380                                                                 ar->hw_params.fw.dir,
1381                                                                 filename);
1382         if (IS_ERR(ar->normal_mode_fw.board))
1383                 return PTR_ERR(ar->normal_mode_fw.board);
1384
1385         data = ar->normal_mode_fw.board->data;
1386         len = ar->normal_mode_fw.board->size;
1387
1388         /* magic has extra null byte padded */
1389         magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1390         if (len < magic_len) {
1391                 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1392                            ar->hw_params.fw.dir, filename, len);
1393                 ret = -EINVAL;
1394                 goto err;
1395         }
1396
1397         if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1398                 ath10k_err(ar, "found invalid board magic\n");
1399                 ret = -EINVAL;
1400                 goto err;
1401         }
1402
1403         /* magic is padded to 4 bytes */
1404         magic_len = ALIGN(magic_len, 4);
1405         if (len < magic_len) {
1406                 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1407                            ar->hw_params.fw.dir, filename, len);
1408                 ret = -EINVAL;
1409                 goto err;
1410         }
1411
1412         data += magic_len;
1413         len -= magic_len;
1414
1415         /* attempt to find boardname in the IE list */
1416         ret = ath10k_core_search_bd(ar, boardname, data, len);
1417
1418         /* if we didn't find it and have a fallback name, try that */
1419         if (ret == -ENOENT && fallback_boardname1)
1420                 ret = ath10k_core_search_bd(ar, fallback_boardname1, data, len);
1421
1422         if (ret == -ENOENT && fallback_boardname2)
1423                 ret = ath10k_core_search_bd(ar, fallback_boardname2, data, len);
1424
1425         if (ret == -ENOENT) {
1426                 ath10k_err(ar,
1427                            "failed to fetch board data for %s from %s/%s\n",
1428                            boardname, ar->hw_params.fw.dir, filename);
1429                 ret = -ENODATA;
1430         }
1431
1432         if (ret)
1433                 goto err;
1434
1435         return 0;
1436
1437 err:
1438         ath10k_core_free_board_files(ar);
1439         return ret;
1440 }
1441
1442 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1443                                          size_t name_len, bool with_variant,
1444                                          bool with_chip_id)
1445 {
1446         /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1447         char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1448
1449         if (with_variant && ar->id.bdf_ext[0] != '\0')
1450                 scnprintf(variant, sizeof(variant), ",variant=%s",
1451                           ar->id.bdf_ext);
1452
1453         if (ar->id.bmi_ids_valid) {
1454                 scnprintf(name, name_len,
1455                           "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1456                           ath10k_bus_str(ar->hif.bus),
1457                           ar->id.bmi_chip_id,
1458                           ar->id.bmi_board_id, variant);
1459                 goto out;
1460         }
1461
1462         if (ar->id.qmi_ids_valid) {
1463                 if (with_chip_id)
1464                         scnprintf(name, name_len,
1465                                   "bus=%s,qmi-board-id=%x,qmi-chip-id=%x%s",
1466                                   ath10k_bus_str(ar->hif.bus),
1467                                   ar->id.qmi_board_id, ar->id.qmi_chip_id,
1468                                   variant);
1469                 else
1470                         scnprintf(name, name_len,
1471                                   "bus=%s,qmi-board-id=%x",
1472                                   ath10k_bus_str(ar->hif.bus),
1473                                   ar->id.qmi_board_id);
1474                 goto out;
1475         }
1476
1477         scnprintf(name, name_len,
1478                   "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1479                   ath10k_bus_str(ar->hif.bus),
1480                   ar->id.vendor, ar->id.device,
1481                   ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1482 out:
1483         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1484
1485         return 0;
1486 }
1487
1488 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1489                                           size_t name_len)
1490 {
1491         if (ar->id.bmi_ids_valid) {
1492                 scnprintf(name, name_len,
1493                           "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1494                           ath10k_bus_str(ar->hif.bus),
1495                           ar->id.bmi_chip_id,
1496                           ar->id.bmi_eboard_id);
1497
1498                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1499                 return 0;
1500         }
1501         /* Fallback if returned board id is zero */
1502         return -1;
1503 }
1504
1505 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1506 {
1507         char boardname[100], fallback_boardname1[100], fallback_boardname2[100];
1508         int ret;
1509
1510         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1511                 /* With variant and chip id */
1512                 ret = ath10k_core_create_board_name(ar, boardname,
1513                                                     sizeof(boardname), true,
1514                                                     true);
1515                 if (ret) {
1516                         ath10k_err(ar, "failed to create board name: %d", ret);
1517                         return ret;
1518                 }
1519
1520                 /* Without variant and only chip-id */
1521                 ret = ath10k_core_create_board_name(ar, fallback_boardname1,
1522                                                     sizeof(boardname), false,
1523                                                     true);
1524                 if (ret) {
1525                         ath10k_err(ar, "failed to create 1st fallback board name: %d",
1526                                    ret);
1527                         return ret;
1528                 }
1529
1530                 /* Without variant and without chip-id */
1531                 ret = ath10k_core_create_board_name(ar, fallback_boardname2,
1532                                                     sizeof(boardname), false,
1533                                                     false);
1534                 if (ret) {
1535                         ath10k_err(ar, "failed to create 2nd fallback board name: %d",
1536                                    ret);
1537                         return ret;
1538                 }
1539         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1540                 ret = ath10k_core_create_eboard_name(ar, boardname,
1541                                                      sizeof(boardname));
1542                 if (ret) {
1543                         ath10k_err(ar, "fallback to eboard.bin since board id 0");
1544                         goto fallback;
1545                 }
1546         }
1547
1548         ar->bd_api = 2;
1549         ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1550                                                  fallback_boardname1,
1551                                                  fallback_boardname2,
1552                                                  ATH10K_BOARD_API2_FILE);
1553         if (!ret)
1554                 goto success;
1555
1556 fallback:
1557         ar->bd_api = 1;
1558         ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1559         if (ret) {
1560                 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1561                            ar->hw_params.fw.dir);
1562                 return ret;
1563         }
1564
1565 success:
1566         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1567         return 0;
1568 }
1569 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1570
1571 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1572 {
1573         u32 result, address;
1574         u8 ext_board_id;
1575         int ret;
1576
1577         address = ar->hw_params.patch_load_addr;
1578
1579         if (!ar->normal_mode_fw.fw_file.otp_data ||
1580             !ar->normal_mode_fw.fw_file.otp_len) {
1581                 ath10k_warn(ar,
1582                             "failed to retrieve extended board id due to otp binary missing\n");
1583                 return -ENODATA;
1584         }
1585
1586         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1587                    "boot upload otp to 0x%x len %zd for ext board id\n",
1588                    address, ar->normal_mode_fw.fw_file.otp_len);
1589
1590         ret = ath10k_bmi_fast_download(ar, address,
1591                                        ar->normal_mode_fw.fw_file.otp_data,
1592                                        ar->normal_mode_fw.fw_file.otp_len);
1593         if (ret) {
1594                 ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1595                            ret);
1596                 return ret;
1597         }
1598
1599         ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1600         if (ret) {
1601                 ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1602                            ret);
1603                 return ret;
1604         }
1605
1606         if (!result) {
1607                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1608                            "ext board id does not exist in otp, ignore it\n");
1609                 return -EOPNOTSUPP;
1610         }
1611
1612         ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1613
1614         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1615                    "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1616                    result, ext_board_id);
1617
1618         ar->id.bmi_eboard_id = ext_board_id;
1619
1620         return 0;
1621 }
1622
1623 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1624                                       size_t data_len)
1625 {
1626         u32 board_data_size = ar->hw_params.fw.board_size;
1627         u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1628         u32 board_address;
1629         u32 ext_board_address;
1630         int ret;
1631
1632         ret = ath10k_push_board_ext_data(ar, data, data_len);
1633         if (ret) {
1634                 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1635                 goto exit;
1636         }
1637
1638         ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1639         if (ret) {
1640                 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1641                 goto exit;
1642         }
1643
1644         ret = ath10k_bmi_write_memory(ar, board_address, data,
1645                                       min_t(u32, board_data_size,
1646                                             data_len));
1647         if (ret) {
1648                 ath10k_err(ar, "could not write board data (%d)\n", ret);
1649                 goto exit;
1650         }
1651
1652         ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1653         if (ret) {
1654                 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1655                 goto exit;
1656         }
1657
1658         if (!ar->id.ext_bid_supported)
1659                 goto exit;
1660
1661         /* Extended board data download */
1662         ret = ath10k_core_get_ext_board_id_from_otp(ar);
1663         if (ret == -EOPNOTSUPP) {
1664                 /* Not fetching ext_board_data if ext board id is 0 */
1665                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1666                 return 0;
1667         } else if (ret) {
1668                 ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1669                 goto exit;
1670         }
1671
1672         ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1673         if (ret)
1674                 goto exit;
1675
1676         if (ar->normal_mode_fw.ext_board_data) {
1677                 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1678                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1679                            "boot writing ext board data to addr 0x%x",
1680                            ext_board_address);
1681                 ret = ath10k_bmi_write_memory(ar, ext_board_address,
1682                                               ar->normal_mode_fw.ext_board_data,
1683                                               min_t(u32, eboard_data_size, data_len));
1684                 if (ret)
1685                         ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1686         }
1687
1688 exit:
1689         return ret;
1690 }
1691
1692 static int ath10k_download_and_run_otp(struct ath10k *ar)
1693 {
1694         u32 result, address = ar->hw_params.patch_load_addr;
1695         u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1696         int ret;
1697
1698         ret = ath10k_download_board_data(ar,
1699                                          ar->running_fw->board_data,
1700                                          ar->running_fw->board_len);
1701         if (ret) {
1702                 ath10k_err(ar, "failed to download board data: %d\n", ret);
1703                 return ret;
1704         }
1705
1706         /* OTP is optional */
1707
1708         if (!ar->running_fw->fw_file.otp_data ||
1709             !ar->running_fw->fw_file.otp_len) {
1710                 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1711                             ar->running_fw->fw_file.otp_data,
1712                             ar->running_fw->fw_file.otp_len);
1713                 return 0;
1714         }
1715
1716         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1717                    address, ar->running_fw->fw_file.otp_len);
1718
1719         ret = ath10k_bmi_fast_download(ar, address,
1720                                        ar->running_fw->fw_file.otp_data,
1721                                        ar->running_fw->fw_file.otp_len);
1722         if (ret) {
1723                 ath10k_err(ar, "could not write otp (%d)\n", ret);
1724                 return ret;
1725         }
1726
1727         /* As of now pre-cal is valid for 10_4 variants */
1728         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1729             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
1730                 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1731
1732         ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1733         if (ret) {
1734                 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1735                 return ret;
1736         }
1737
1738         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1739
1740         if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1741                                    ar->running_fw->fw_file.fw_features)) &&
1742             result != 0) {
1743                 ath10k_err(ar, "otp calibration failed: %d", result);
1744                 return -EINVAL;
1745         }
1746
1747         return 0;
1748 }
1749
1750 static int ath10k_download_cal_file(struct ath10k *ar,
1751                                     const struct firmware *file)
1752 {
1753         int ret;
1754
1755         if (!file)
1756                 return -ENOENT;
1757
1758         if (IS_ERR(file))
1759                 return PTR_ERR(file);
1760
1761         ret = ath10k_download_board_data(ar, file->data, file->size);
1762         if (ret) {
1763                 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1764                 return ret;
1765         }
1766
1767         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1768
1769         return 0;
1770 }
1771
1772 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1773 {
1774         struct device_node *node;
1775         int data_len;
1776         void *data;
1777         int ret;
1778
1779         node = ar->dev->of_node;
1780         if (!node)
1781                 /* Device Tree is optional, don't print any warnings if
1782                  * there's no node for ath10k.
1783                  */
1784                 return -ENOENT;
1785
1786         if (!of_get_property(node, dt_name, &data_len)) {
1787                 /* The calibration data node is optional */
1788                 return -ENOENT;
1789         }
1790
1791         if (data_len != ar->hw_params.cal_data_len) {
1792                 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1793                             data_len);
1794                 ret = -EMSGSIZE;
1795                 goto out;
1796         }
1797
1798         data = kmalloc(data_len, GFP_KERNEL);
1799         if (!data) {
1800                 ret = -ENOMEM;
1801                 goto out;
1802         }
1803
1804         ret = of_property_read_u8_array(node, dt_name, data, data_len);
1805         if (ret) {
1806                 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1807                             ret);
1808                 goto out_free;
1809         }
1810
1811         ret = ath10k_download_board_data(ar, data, data_len);
1812         if (ret) {
1813                 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1814                             ret);
1815                 goto out_free;
1816         }
1817
1818         ret = 0;
1819
1820 out_free:
1821         kfree(data);
1822
1823 out:
1824         return ret;
1825 }
1826
1827 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1828 {
1829         size_t data_len;
1830         void *data = NULL;
1831         int ret;
1832
1833         ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1834         if (ret) {
1835                 if (ret != -EOPNOTSUPP)
1836                         ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
1837                                     ret);
1838                 goto out_free;
1839         }
1840
1841         ret = ath10k_download_board_data(ar, data, data_len);
1842         if (ret) {
1843                 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
1844                             ret);
1845                 goto out_free;
1846         }
1847
1848         ret = 0;
1849
1850 out_free:
1851         kfree(data);
1852
1853         return ret;
1854 }
1855
1856 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1857                                      struct ath10k_fw_file *fw_file)
1858 {
1859         size_t magic_len, len, ie_len;
1860         int ie_id, i, index, bit, ret;
1861         struct ath10k_fw_ie *hdr;
1862         const u8 *data;
1863         __le32 *timestamp, *version;
1864
1865         /* first fetch the firmware file (firmware-*.bin) */
1866         fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1867                                                  name);
1868         if (IS_ERR(fw_file->firmware))
1869                 return PTR_ERR(fw_file->firmware);
1870
1871         data = fw_file->firmware->data;
1872         len = fw_file->firmware->size;
1873
1874         /* magic also includes the null byte, check that as well */
1875         magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1876
1877         if (len < magic_len) {
1878                 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1879                            ar->hw_params.fw.dir, name, len);
1880                 ret = -EINVAL;
1881                 goto err;
1882         }
1883
1884         if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1885                 ath10k_err(ar, "invalid firmware magic\n");
1886                 ret = -EINVAL;
1887                 goto err;
1888         }
1889
1890         /* jump over the padding */
1891         magic_len = ALIGN(magic_len, 4);
1892
1893         len -= magic_len;
1894         data += magic_len;
1895
1896         /* loop elements */
1897         while (len > sizeof(struct ath10k_fw_ie)) {
1898                 hdr = (struct ath10k_fw_ie *)data;
1899
1900                 ie_id = le32_to_cpu(hdr->id);
1901                 ie_len = le32_to_cpu(hdr->len);
1902
1903                 len -= sizeof(*hdr);
1904                 data += sizeof(*hdr);
1905
1906                 if (len < ie_len) {
1907                         ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1908                                    ie_id, len, ie_len);
1909                         ret = -EINVAL;
1910                         goto err;
1911                 }
1912
1913                 switch (ie_id) {
1914                 case ATH10K_FW_IE_FW_VERSION:
1915                         if (ie_len > sizeof(fw_file->fw_version) - 1)
1916                                 break;
1917
1918                         memcpy(fw_file->fw_version, data, ie_len);
1919                         fw_file->fw_version[ie_len] = '\0';
1920
1921                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1922                                    "found fw version %s\n",
1923                                     fw_file->fw_version);
1924                         break;
1925                 case ATH10K_FW_IE_TIMESTAMP:
1926                         if (ie_len != sizeof(u32))
1927                                 break;
1928
1929                         timestamp = (__le32 *)data;
1930
1931                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1932                                    le32_to_cpup(timestamp));
1933                         break;
1934                 case ATH10K_FW_IE_FEATURES:
1935                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1936                                    "found firmware features ie (%zd B)\n",
1937                                    ie_len);
1938
1939                         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1940                                 index = i / 8;
1941                                 bit = i % 8;
1942
1943                                 if (index == ie_len)
1944                                         break;
1945
1946                                 if (data[index] & (1 << bit)) {
1947                                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1948                                                    "Enabling feature bit: %i\n",
1949                                                    i);
1950                                         __set_bit(i, fw_file->fw_features);
1951                                 }
1952                         }
1953
1954                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1955                                         fw_file->fw_features,
1956                                         sizeof(fw_file->fw_features));
1957                         break;
1958                 case ATH10K_FW_IE_FW_IMAGE:
1959                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1960                                    "found fw image ie (%zd B)\n",
1961                                    ie_len);
1962
1963                         fw_file->firmware_data = data;
1964                         fw_file->firmware_len = ie_len;
1965
1966                         break;
1967                 case ATH10K_FW_IE_OTP_IMAGE:
1968                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1969                                    "found otp image ie (%zd B)\n",
1970                                    ie_len);
1971
1972                         fw_file->otp_data = data;
1973                         fw_file->otp_len = ie_len;
1974
1975                         break;
1976                 case ATH10K_FW_IE_WMI_OP_VERSION:
1977                         if (ie_len != sizeof(u32))
1978                                 break;
1979
1980                         version = (__le32 *)data;
1981
1982                         fw_file->wmi_op_version = le32_to_cpup(version);
1983
1984                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1985                                    fw_file->wmi_op_version);
1986                         break;
1987                 case ATH10K_FW_IE_HTT_OP_VERSION:
1988                         if (ie_len != sizeof(u32))
1989                                 break;
1990
1991                         version = (__le32 *)data;
1992
1993                         fw_file->htt_op_version = le32_to_cpup(version);
1994
1995                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1996                                    fw_file->htt_op_version);
1997                         break;
1998                 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1999                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2000                                    "found fw code swap image ie (%zd B)\n",
2001                                    ie_len);
2002                         fw_file->codeswap_data = data;
2003                         fw_file->codeswap_len = ie_len;
2004                         break;
2005                 default:
2006                         ath10k_warn(ar, "Unknown FW IE: %u\n",
2007                                     le32_to_cpu(hdr->id));
2008                         break;
2009                 }
2010
2011                 /* jump over the padding */
2012                 ie_len = ALIGN(ie_len, 4);
2013
2014                 len -= ie_len;
2015                 data += ie_len;
2016         }
2017
2018         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
2019             (!fw_file->firmware_data || !fw_file->firmware_len)) {
2020                 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
2021                             ar->hw_params.fw.dir, name);
2022                 ret = -ENOMEDIUM;
2023                 goto err;
2024         }
2025
2026         return 0;
2027
2028 err:
2029         ath10k_core_free_firmware_files(ar);
2030         return ret;
2031 }
2032
2033 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
2034                                     size_t fw_name_len, int fw_api)
2035 {
2036         switch (ar->hif.bus) {
2037         case ATH10K_BUS_SDIO:
2038         case ATH10K_BUS_USB:
2039                 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
2040                           ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
2041                           fw_api);
2042                 break;
2043         case ATH10K_BUS_PCI:
2044         case ATH10K_BUS_AHB:
2045         case ATH10K_BUS_SNOC:
2046                 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
2047                           ATH10K_FW_FILE_BASE, fw_api);
2048                 break;
2049         }
2050 }
2051
2052 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
2053 {
2054         int ret, i;
2055         char fw_name[100];
2056
2057         /* calibration file is optional, don't check for any errors */
2058         ath10k_fetch_cal_file(ar);
2059
2060         for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
2061                 ar->fw_api = i;
2062                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
2063                            ar->fw_api);
2064
2065                 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
2066                 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
2067                                                        &ar->normal_mode_fw.fw_file);
2068                 if (!ret)
2069                         goto success;
2070         }
2071
2072         /* we end up here if we couldn't fetch any firmware */
2073
2074         ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
2075                    ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
2076                    ret);
2077
2078         return ret;
2079
2080 success:
2081         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
2082
2083         return 0;
2084 }
2085
2086 static int ath10k_core_pre_cal_download(struct ath10k *ar)
2087 {
2088         int ret;
2089
2090         ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
2091         if (ret == 0) {
2092                 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
2093                 goto success;
2094         }
2095
2096         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2097                    "boot did not find a pre calibration file, try DT next: %d\n",
2098                    ret);
2099
2100         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
2101         if (ret) {
2102                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2103                            "unable to load pre cal data from DT: %d\n", ret);
2104                 return ret;
2105         }
2106         ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
2107
2108 success:
2109         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2110                    ath10k_cal_mode_str(ar->cal_mode));
2111
2112         return 0;
2113 }
2114
2115 static int ath10k_core_pre_cal_config(struct ath10k *ar)
2116 {
2117         int ret;
2118
2119         ret = ath10k_core_pre_cal_download(ar);
2120         if (ret) {
2121                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2122                            "failed to load pre cal data: %d\n", ret);
2123                 return ret;
2124         }
2125
2126         ret = ath10k_core_get_board_id_from_otp(ar);
2127         if (ret) {
2128                 ath10k_err(ar, "failed to get board id: %d\n", ret);
2129                 return ret;
2130         }
2131
2132         ret = ath10k_download_and_run_otp(ar);
2133         if (ret) {
2134                 ath10k_err(ar, "failed to run otp: %d\n", ret);
2135                 return ret;
2136         }
2137
2138         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2139                    "pre cal configuration done successfully\n");
2140
2141         return 0;
2142 }
2143
2144 static int ath10k_download_cal_data(struct ath10k *ar)
2145 {
2146         int ret;
2147
2148         ret = ath10k_core_pre_cal_config(ar);
2149         if (ret == 0)
2150                 return 0;
2151
2152         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2153                    "pre cal download procedure failed, try cal file: %d\n",
2154                    ret);
2155
2156         ret = ath10k_download_cal_file(ar, ar->cal_file);
2157         if (ret == 0) {
2158                 ar->cal_mode = ATH10K_CAL_MODE_FILE;
2159                 goto done;
2160         }
2161
2162         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2163                    "boot did not find a calibration file, try DT next: %d\n",
2164                    ret);
2165
2166         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2167         if (ret == 0) {
2168                 ar->cal_mode = ATH10K_CAL_MODE_DT;
2169                 goto done;
2170         }
2171
2172         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2173                    "boot did not find DT entry, try target EEPROM next: %d\n",
2174                    ret);
2175
2176         ret = ath10k_download_cal_eeprom(ar);
2177         if (ret == 0) {
2178                 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2179                 goto done;
2180         }
2181
2182         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2183                    "boot did not find target EEPROM entry, try OTP next: %d\n",
2184                    ret);
2185
2186         ret = ath10k_download_and_run_otp(ar);
2187         if (ret) {
2188                 ath10k_err(ar, "failed to run otp: %d\n", ret);
2189                 return ret;
2190         }
2191
2192         ar->cal_mode = ATH10K_CAL_MODE_OTP;
2193
2194 done:
2195         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2196                    ath10k_cal_mode_str(ar->cal_mode));
2197         return 0;
2198 }
2199
2200 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
2201 {
2202         struct device_node *node;
2203         u8 coex_support = 0;
2204         int ret;
2205
2206         node = ar->dev->of_node;
2207         if (!node)
2208                 goto out;
2209
2210         ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
2211         if (ret) {
2212                 ar->coex_support = true;
2213                 goto out;
2214         }
2215
2216         if (coex_support) {
2217                 ar->coex_support = true;
2218         } else {
2219                 ar->coex_support = false;
2220                 ar->coex_gpio_pin = -1;
2221                 goto out;
2222         }
2223
2224         ret = of_property_read_u32(node, "qcom,coexist-gpio-pin",
2225                                    &ar->coex_gpio_pin);
2226         if (ret)
2227                 ar->coex_gpio_pin = -1;
2228
2229 out:
2230         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n",
2231                    ar->coex_support, ar->coex_gpio_pin);
2232 }
2233
2234 static int ath10k_init_uart(struct ath10k *ar)
2235 {
2236         int ret;
2237
2238         /*
2239          * Explicitly setting UART prints to zero as target turns it on
2240          * based on scratch registers.
2241          */
2242         ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2243         if (ret) {
2244                 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2245                 return ret;
2246         }
2247
2248         if (!uart_print) {
2249                 if (ar->hw_params.uart_pin_workaround) {
2250                         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2251                                                  ar->hw_params.uart_pin);
2252                         if (ret) {
2253                                 ath10k_warn(ar, "failed to set UART TX pin: %d",
2254                                             ret);
2255                                 return ret;
2256                         }
2257                 }
2258
2259                 return 0;
2260         }
2261
2262         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2263         if (ret) {
2264                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2265                 return ret;
2266         }
2267
2268         ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2269         if (ret) {
2270                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2271                 return ret;
2272         }
2273
2274         /* Set the UART baud rate to 19200. */
2275         ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2276         if (ret) {
2277                 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2278                 return ret;
2279         }
2280
2281         ath10k_info(ar, "UART prints enabled\n");
2282         return 0;
2283 }
2284
2285 static int ath10k_init_hw_params(struct ath10k *ar)
2286 {
2287         const struct ath10k_hw_params *hw_params;
2288         int i;
2289
2290         for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2291                 hw_params = &ath10k_hw_params_list[i];
2292
2293                 if (hw_params->bus == ar->hif.bus &&
2294                     hw_params->id == ar->target_version &&
2295                     hw_params->dev_id == ar->dev_id)
2296                         break;
2297         }
2298
2299         if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2300                 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2301                            ar->target_version);
2302                 return -EINVAL;
2303         }
2304
2305         ar->hw_params = *hw_params;
2306
2307         ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2308                    ar->hw_params.name, ar->target_version);
2309
2310         return 0;
2311 }
2312
2313 void ath10k_core_start_recovery(struct ath10k *ar)
2314 {
2315         if (test_and_set_bit(ATH10K_FLAG_RESTARTING, &ar->dev_flags)) {
2316                 ath10k_warn(ar, "already restarting\n");
2317                 return;
2318         }
2319
2320         queue_work(ar->workqueue, &ar->restart_work);
2321 }
2322 EXPORT_SYMBOL(ath10k_core_start_recovery);
2323
2324 void ath10k_core_napi_enable(struct ath10k *ar)
2325 {
2326         lockdep_assert_held(&ar->conf_mutex);
2327
2328         if (test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2329                 return;
2330
2331         napi_enable(&ar->napi);
2332         set_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2333 }
2334 EXPORT_SYMBOL(ath10k_core_napi_enable);
2335
2336 void ath10k_core_napi_sync_disable(struct ath10k *ar)
2337 {
2338         lockdep_assert_held(&ar->conf_mutex);
2339
2340         if (!test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2341                 return;
2342
2343         napi_synchronize(&ar->napi);
2344         napi_disable(&ar->napi);
2345         clear_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2346 }
2347 EXPORT_SYMBOL(ath10k_core_napi_sync_disable);
2348
2349 static void ath10k_core_restart(struct work_struct *work)
2350 {
2351         struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2352         int ret;
2353
2354         set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2355
2356         /* Place a barrier to make sure the compiler doesn't reorder
2357          * CRASH_FLUSH and calling other functions.
2358          */
2359         barrier();
2360
2361         ieee80211_stop_queues(ar->hw);
2362         ath10k_drain_tx(ar);
2363         complete(&ar->scan.started);
2364         complete(&ar->scan.completed);
2365         complete(&ar->scan.on_channel);
2366         complete(&ar->offchan_tx_completed);
2367         complete(&ar->install_key_done);
2368         complete(&ar->vdev_setup_done);
2369         complete(&ar->vdev_delete_done);
2370         complete(&ar->thermal.wmi_sync);
2371         complete(&ar->bss_survey_done);
2372         wake_up(&ar->htt.empty_tx_wq);
2373         wake_up(&ar->wmi.tx_credits_wq);
2374         wake_up(&ar->peer_mapping_wq);
2375
2376         /* TODO: We can have one instance of cancelling coverage_class_work by
2377          * moving it to ath10k_halt(), so that both stop() and restart() would
2378          * call that but it takes conf_mutex() and if we call cancel_work_sync()
2379          * with conf_mutex it will deadlock.
2380          */
2381         cancel_work_sync(&ar->set_coverage_class_work);
2382
2383         mutex_lock(&ar->conf_mutex);
2384
2385         switch (ar->state) {
2386         case ATH10K_STATE_ON:
2387                 ar->state = ATH10K_STATE_RESTARTING;
2388                 ath10k_halt(ar);
2389                 ath10k_scan_finish(ar);
2390                 ieee80211_restart_hw(ar->hw);
2391                 break;
2392         case ATH10K_STATE_OFF:
2393                 /* this can happen if driver is being unloaded
2394                  * or if the crash happens during FW probing
2395                  */
2396                 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2397                 break;
2398         case ATH10K_STATE_RESTARTING:
2399                 /* hw restart might be requested from multiple places */
2400                 break;
2401         case ATH10K_STATE_RESTARTED:
2402                 ar->state = ATH10K_STATE_WEDGED;
2403                 fallthrough;
2404         case ATH10K_STATE_WEDGED:
2405                 ath10k_warn(ar, "device is wedged, will not restart\n");
2406                 break;
2407         case ATH10K_STATE_UTF:
2408                 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2409                 break;
2410         }
2411
2412         mutex_unlock(&ar->conf_mutex);
2413
2414         ret = ath10k_coredump_submit(ar);
2415         if (ret)
2416                 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2417                             ret);
2418
2419         complete(&ar->driver_recovery);
2420 }
2421
2422 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2423 {
2424         struct ath10k *ar = container_of(work, struct ath10k,
2425                                          set_coverage_class_work);
2426
2427         if (ar->hw_params.hw_ops->set_coverage_class)
2428                 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
2429 }
2430
2431 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2432 {
2433         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2434         int max_num_peers;
2435
2436         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2437             !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2438                 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2439                 return -EINVAL;
2440         }
2441
2442         if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2443                 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2444                            ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2445                 return -EINVAL;
2446         }
2447
2448         ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2449         switch (ath10k_cryptmode_param) {
2450         case ATH10K_CRYPT_MODE_HW:
2451                 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2452                 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2453                 break;
2454         case ATH10K_CRYPT_MODE_SW:
2455                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2456                               fw_file->fw_features)) {
2457                         ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2458                         return -EINVAL;
2459                 }
2460
2461                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2462                 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2463                 break;
2464         default:
2465                 ath10k_info(ar, "invalid cryptmode: %d\n",
2466                             ath10k_cryptmode_param);
2467                 return -EINVAL;
2468         }
2469
2470         ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2471         ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2472
2473         if (rawmode) {
2474                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2475                               fw_file->fw_features)) {
2476                         ath10k_err(ar, "rawmode = 1 requires support from firmware");
2477                         return -EINVAL;
2478                 }
2479                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2480         }
2481
2482         if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2483                 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2484
2485                 /* Workaround:
2486                  *
2487                  * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2488                  * and causes enormous performance issues (malformed frames,
2489                  * etc).
2490                  *
2491                  * Disabling A-MSDU makes RAW mode stable with heavy traffic
2492                  * albeit a bit slower compared to regular operation.
2493                  */
2494                 ar->htt.max_num_amsdu = 1;
2495         }
2496
2497         /* Backwards compatibility for firmwares without
2498          * ATH10K_FW_IE_WMI_OP_VERSION.
2499          */
2500         if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2501                 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2502                         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2503                                      fw_file->fw_features))
2504                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2505                         else
2506                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2507                 } else {
2508                         fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2509                 }
2510         }
2511
2512         switch (fw_file->wmi_op_version) {
2513         case ATH10K_FW_WMI_OP_VERSION_MAIN:
2514                 max_num_peers = TARGET_NUM_PEERS;
2515                 ar->max_num_stations = TARGET_NUM_STATIONS;
2516                 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2517                 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2518                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2519                         WMI_STAT_PEER;
2520                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2521                 break;
2522         case ATH10K_FW_WMI_OP_VERSION_10_1:
2523         case ATH10K_FW_WMI_OP_VERSION_10_2:
2524         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2525                 if (ath10k_peer_stats_enabled(ar)) {
2526                         max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2527                         ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2528                 } else {
2529                         max_num_peers = TARGET_10X_NUM_PEERS;
2530                         ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2531                 }
2532                 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2533                 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2534                 ar->fw_stats_req_mask = WMI_STAT_PEER;
2535                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2536                 break;
2537         case ATH10K_FW_WMI_OP_VERSION_TLV:
2538                 max_num_peers = TARGET_TLV_NUM_PEERS;
2539                 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2540                 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2541                 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2542                 if (ar->hif.bus == ATH10K_BUS_SDIO)
2543                         ar->htt.max_num_pending_tx =
2544                                 TARGET_TLV_NUM_MSDU_DESC_HL;
2545                 else
2546                         ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2547                 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2548                 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2549                         WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2550                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2551                 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2552                 break;
2553         case ATH10K_FW_WMI_OP_VERSION_10_4:
2554                 max_num_peers = TARGET_10_4_NUM_PEERS;
2555                 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2556                 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2557                 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2558                 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2559                 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2560                                         WMI_10_4_STAT_PEER_EXTD |
2561                                         WMI_10_4_STAT_VDEV_EXTD;
2562                 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2563                 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2564
2565                 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2566                              fw_file->fw_features))
2567                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2568                 else
2569                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2570                 break;
2571         case ATH10K_FW_WMI_OP_VERSION_UNSET:
2572         case ATH10K_FW_WMI_OP_VERSION_MAX:
2573         default:
2574                 WARN_ON(1);
2575                 return -EINVAL;
2576         }
2577
2578         if (ar->hw_params.num_peers)
2579                 ar->max_num_peers = ar->hw_params.num_peers;
2580         else
2581                 ar->max_num_peers = max_num_peers;
2582
2583         /* Backwards compatibility for firmwares without
2584          * ATH10K_FW_IE_HTT_OP_VERSION.
2585          */
2586         if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2587                 switch (fw_file->wmi_op_version) {
2588                 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2589                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2590                         break;
2591                 case ATH10K_FW_WMI_OP_VERSION_10_1:
2592                 case ATH10K_FW_WMI_OP_VERSION_10_2:
2593                 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2594                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2595                         break;
2596                 case ATH10K_FW_WMI_OP_VERSION_TLV:
2597                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2598                         break;
2599                 case ATH10K_FW_WMI_OP_VERSION_10_4:
2600                 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2601                 case ATH10K_FW_WMI_OP_VERSION_MAX:
2602                         ath10k_err(ar, "htt op version not found from fw meta data");
2603                         return -EINVAL;
2604                 }
2605         }
2606
2607         return 0;
2608 }
2609
2610 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2611 {
2612         int ret;
2613         int vdev_id;
2614         int vdev_type;
2615         int vdev_subtype;
2616         const u8 *vdev_addr;
2617
2618         vdev_id = 0;
2619         vdev_type = WMI_VDEV_TYPE_STA;
2620         vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2621         vdev_addr = ar->mac_addr;
2622
2623         ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2624                                      vdev_addr);
2625         if (ret) {
2626                 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2627                 return ret;
2628         }
2629
2630         ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2631         if (ret) {
2632                 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2633                 return ret;
2634         }
2635
2636         /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2637          * serialized properly implicitly.
2638          *
2639          * Moreover (most) WMI commands have no explicit acknowledges. It is
2640          * possible to infer it implicitly by poking firmware with echo
2641          * command - getting a reply means all preceding comments have been
2642          * (mostly) processed.
2643          *
2644          * In case of vdev create/delete this is sufficient.
2645          *
2646          * Without this it's possible to end up with a race when HTT Rx ring is
2647          * started before vdev create/delete hack is complete allowing a short
2648          * window of opportunity to receive (and Tx ACK) a bunch of frames.
2649          */
2650         ret = ath10k_wmi_barrier(ar);
2651         if (ret) {
2652                 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2653                 return ret;
2654         }
2655
2656         return 0;
2657 }
2658
2659 static int ath10k_core_compat_services(struct ath10k *ar)
2660 {
2661         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2662
2663         /* all 10.x firmware versions support thermal throttling but don't
2664          * advertise the support via service flags so we have to hardcode
2665          * it here
2666          */
2667         switch (fw_file->wmi_op_version) {
2668         case ATH10K_FW_WMI_OP_VERSION_10_1:
2669         case ATH10K_FW_WMI_OP_VERSION_10_2:
2670         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2671         case ATH10K_FW_WMI_OP_VERSION_10_4:
2672                 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2673                 break;
2674         default:
2675                 break;
2676         }
2677
2678         return 0;
2679 }
2680
2681 #define TGT_IRAM_READ_PER_ITR (8 * 1024)
2682
2683 static int ath10k_core_copy_target_iram(struct ath10k *ar)
2684 {
2685         const struct ath10k_hw_mem_layout *hw_mem;
2686         const struct ath10k_mem_region *tmp, *mem_region = NULL;
2687         dma_addr_t paddr;
2688         void *vaddr = NULL;
2689         u8 num_read_itr;
2690         int i, ret;
2691         u32 len, remaining_len;
2692
2693         hw_mem = ath10k_coredump_get_mem_layout(ar);
2694         if (!hw_mem)
2695                 return -ENOMEM;
2696
2697         for (i = 0; i < hw_mem->region_table.size; i++) {
2698                 tmp = &hw_mem->region_table.regions[i];
2699                 if (tmp->type == ATH10K_MEM_REGION_TYPE_REG) {
2700                         mem_region = tmp;
2701                         break;
2702                 }
2703         }
2704
2705         if (!mem_region)
2706                 return -ENOMEM;
2707
2708         for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2709                 if (ar->wmi.mem_chunks[i].req_id ==
2710                     WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID) {
2711                         vaddr = ar->wmi.mem_chunks[i].vaddr;
2712                         len = ar->wmi.mem_chunks[i].len;
2713                         break;
2714                 }
2715         }
2716
2717         if (!vaddr || !len) {
2718                 ath10k_warn(ar, "No allocated memory for IRAM back up");
2719                 return -ENOMEM;
2720         }
2721
2722         len = (len < mem_region->len) ? len : mem_region->len;
2723         paddr = mem_region->start;
2724         num_read_itr = len / TGT_IRAM_READ_PER_ITR;
2725         remaining_len = len % TGT_IRAM_READ_PER_ITR;
2726         for (i = 0; i < num_read_itr; i++) {
2727                 ret = ath10k_hif_diag_read(ar, paddr, vaddr,
2728                                            TGT_IRAM_READ_PER_ITR);
2729                 if (ret) {
2730                         ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
2731                                     ret);
2732                         return ret;
2733                 }
2734
2735                 paddr += TGT_IRAM_READ_PER_ITR;
2736                 vaddr += TGT_IRAM_READ_PER_ITR;
2737         }
2738
2739         if (remaining_len) {
2740                 ret = ath10k_hif_diag_read(ar, paddr, vaddr, remaining_len);
2741                 if (ret) {
2742                         ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
2743                                     ret);
2744                         return ret;
2745                 }
2746         }
2747
2748         ath10k_dbg(ar, ATH10K_DBG_BOOT, "target IRAM back up completed\n");
2749
2750         return 0;
2751 }
2752
2753 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2754                       const struct ath10k_fw_components *fw)
2755 {
2756         int status;
2757         u32 val;
2758
2759         lockdep_assert_held(&ar->conf_mutex);
2760
2761         clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2762
2763         ar->running_fw = fw;
2764
2765         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2766                       ar->running_fw->fw_file.fw_features)) {
2767                 ath10k_bmi_start(ar);
2768
2769                 /* Enable hardware clock to speed up firmware download */
2770                 if (ar->hw_params.hw_ops->enable_pll_clk) {
2771                         status = ar->hw_params.hw_ops->enable_pll_clk(ar);
2772                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot enable pll ret %d\n",
2773                                    status);
2774                 }
2775
2776                 if (ath10k_init_configure_target(ar)) {
2777                         status = -EINVAL;
2778                         goto err;
2779                 }
2780
2781                 status = ath10k_download_cal_data(ar);
2782                 if (status)
2783                         goto err;
2784
2785                 /* Some of qca988x solutions are having global reset issue
2786                  * during target initialization. Bypassing PLL setting before
2787                  * downloading firmware and letting the SoC run on REF_CLK is
2788                  * fixing the problem. Corresponding firmware change is also
2789                  * needed to set the clock source once the target is
2790                  * initialized.
2791                  */
2792                 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2793                              ar->running_fw->fw_file.fw_features)) {
2794                         status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2795                         if (status) {
2796                                 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2797                                            status);
2798                                 goto err;
2799                         }
2800                 }
2801
2802                 status = ath10k_download_fw(ar);
2803                 if (status)
2804                         goto err;
2805
2806                 status = ath10k_init_uart(ar);
2807                 if (status)
2808                         goto err;
2809
2810                 if (ar->hif.bus == ATH10K_BUS_SDIO) {
2811                         status = ath10k_init_sdio(ar, mode);
2812                         if (status) {
2813                                 ath10k_err(ar, "failed to init SDIO: %d\n", status);
2814                                 goto err;
2815                         }
2816                 }
2817         }
2818
2819         ar->htc.htc_ops.target_send_suspend_complete =
2820                 ath10k_send_suspend_complete;
2821
2822         status = ath10k_htc_init(ar);
2823         if (status) {
2824                 ath10k_err(ar, "could not init HTC (%d)\n", status);
2825                 goto err;
2826         }
2827
2828         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2829                       ar->running_fw->fw_file.fw_features)) {
2830                 status = ath10k_bmi_done(ar);
2831                 if (status)
2832                         goto err;
2833         }
2834
2835         status = ath10k_wmi_attach(ar);
2836         if (status) {
2837                 ath10k_err(ar, "WMI attach failed: %d\n", status);
2838                 goto err;
2839         }
2840
2841         status = ath10k_htt_init(ar);
2842         if (status) {
2843                 ath10k_err(ar, "failed to init htt: %d\n", status);
2844                 goto err_wmi_detach;
2845         }
2846
2847         status = ath10k_htt_tx_start(&ar->htt);
2848         if (status) {
2849                 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
2850                 goto err_wmi_detach;
2851         }
2852
2853         /* If firmware indicates Full Rx Reorder support it must be used in a
2854          * slightly different manner. Let HTT code know.
2855          */
2856         ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2857                                                 ar->wmi.svc_map));
2858
2859         status = ath10k_htt_rx_alloc(&ar->htt);
2860         if (status) {
2861                 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
2862                 goto err_htt_tx_detach;
2863         }
2864
2865         status = ath10k_hif_start(ar);
2866         if (status) {
2867                 ath10k_err(ar, "could not start HIF: %d\n", status);
2868                 goto err_htt_rx_detach;
2869         }
2870
2871         status = ath10k_htc_wait_target(&ar->htc);
2872         if (status) {
2873                 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
2874                 goto err_hif_stop;
2875         }
2876
2877         status = ath10k_hif_start_post(ar);
2878         if (status) {
2879                 ath10k_err(ar, "failed to swap mailbox: %d\n", status);
2880                 goto err_hif_stop;
2881         }
2882
2883         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2884                 status = ath10k_htt_connect(&ar->htt);
2885                 if (status) {
2886                         ath10k_err(ar, "failed to connect htt (%d)\n", status);
2887                         goto err_hif_stop;
2888                 }
2889         }
2890
2891         status = ath10k_wmi_connect(ar);
2892         if (status) {
2893                 ath10k_err(ar, "could not connect wmi: %d\n", status);
2894                 goto err_hif_stop;
2895         }
2896
2897         status = ath10k_htc_start(&ar->htc);
2898         if (status) {
2899                 ath10k_err(ar, "failed to start htc: %d\n", status);
2900                 goto err_hif_stop;
2901         }
2902
2903         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2904                 status = ath10k_wmi_wait_for_service_ready(ar);
2905                 if (status) {
2906                         ath10k_warn(ar, "wmi service ready event not received");
2907                         goto err_hif_stop;
2908                 }
2909         }
2910
2911         ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
2912                    ar->hw->wiphy->fw_version);
2913
2914         if (test_bit(ATH10K_FW_FEATURE_IRAM_RECOVERY,
2915                      ar->running_fw->fw_file.fw_features)) {
2916                 status = ath10k_core_copy_target_iram(ar);
2917                 if (status) {
2918                         ath10k_warn(ar, "failed to copy target iram contents: %d",
2919                                     status);
2920                         goto err_hif_stop;
2921                 }
2922         }
2923
2924         if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
2925             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2926                 val = 0;
2927                 if (ath10k_peer_stats_enabled(ar))
2928                         val = WMI_10_4_PEER_STATS;
2929
2930                 /* Enable vdev stats by default */
2931                 val |= WMI_10_4_VDEV_STATS;
2932
2933                 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
2934                         val |= WMI_10_4_BSS_CHANNEL_INFO_64;
2935
2936                 ath10k_core_fetch_btcoex_dt(ar);
2937
2938                 /* 10.4 firmware supports BT-Coex without reloading firmware
2939                  * via pdev param. To support Bluetooth coexistence pdev param,
2940                  * WMI_COEX_GPIO_SUPPORT of extended resource config should be
2941                  * enabled always.
2942                  *
2943                  * We can still enable BTCOEX if firmware has the support
2944                  * eventhough btceox_support value is
2945                  * ATH10K_DT_BTCOEX_NOT_FOUND
2946                  */
2947
2948                 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
2949                     test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
2950                              ar->running_fw->fw_file.fw_features) &&
2951                     ar->coex_support)
2952                         val |= WMI_10_4_COEX_GPIO_SUPPORT;
2953
2954                 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
2955                              ar->wmi.svc_map))
2956                         val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
2957
2958                 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
2959                              ar->wmi.svc_map))
2960                         val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
2961
2962                 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
2963                              ar->wmi.svc_map))
2964                         val |= WMI_10_4_TX_DATA_ACK_RSSI;
2965
2966                 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
2967                         val |= WMI_10_4_REPORT_AIRTIME;
2968
2969                 if (test_bit(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
2970                              ar->wmi.svc_map))
2971                         val |= WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT;
2972
2973                 status = ath10k_mac_ext_resource_config(ar, val);
2974                 if (status) {
2975                         ath10k_err(ar,
2976                                    "failed to send ext resource cfg command : %d\n",
2977                                    status);
2978                         goto err_hif_stop;
2979                 }
2980         }
2981
2982         status = ath10k_wmi_cmd_init(ar);
2983         if (status) {
2984                 ath10k_err(ar, "could not send WMI init command (%d)\n",
2985                            status);
2986                 goto err_hif_stop;
2987         }
2988
2989         status = ath10k_wmi_wait_for_unified_ready(ar);
2990         if (status) {
2991                 ath10k_err(ar, "wmi unified ready event not received\n");
2992                 goto err_hif_stop;
2993         }
2994
2995         status = ath10k_core_compat_services(ar);
2996         if (status) {
2997                 ath10k_err(ar, "compat services failed: %d\n", status);
2998                 goto err_hif_stop;
2999         }
3000
3001         status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
3002         if (status && status != -EOPNOTSUPP) {
3003                 ath10k_err(ar,
3004                            "failed to set base mac address: %d\n", status);
3005                 goto err_hif_stop;
3006         }
3007
3008         /* Some firmware revisions do not properly set up hardware rx filter
3009          * registers.
3010          *
3011          * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
3012          * is filled with 0s instead of 1s allowing HW to respond with ACKs to
3013          * any frames that matches MAC_PCU_RX_FILTER which is also
3014          * misconfigured to accept anything.
3015          *
3016          * The ADDR1 is programmed using internal firmware structure field and
3017          * can't be (easily/sanely) reached from the driver explicitly. It is
3018          * possible to implicitly make it correct by creating a dummy vdev and
3019          * then deleting it.
3020          */
3021         if (ar->hw_params.hw_filter_reset_required &&
3022             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3023                 status = ath10k_core_reset_rx_filter(ar);
3024                 if (status) {
3025                         ath10k_err(ar,
3026                                    "failed to reset rx filter: %d\n", status);
3027                         goto err_hif_stop;
3028                 }
3029         }
3030
3031         status = ath10k_htt_rx_ring_refill(ar);
3032         if (status) {
3033                 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
3034                 goto err_hif_stop;
3035         }
3036
3037         if (ar->max_num_vdevs >= 64)
3038                 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
3039         else
3040                 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
3041
3042         INIT_LIST_HEAD(&ar->arvifs);
3043
3044         /* we don't care about HTT in UTF mode */
3045         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3046                 status = ath10k_htt_setup(&ar->htt);
3047                 if (status) {
3048                         ath10k_err(ar, "failed to setup htt: %d\n", status);
3049                         goto err_hif_stop;
3050                 }
3051         }
3052
3053         status = ath10k_debug_start(ar);
3054         if (status)
3055                 goto err_hif_stop;
3056
3057         status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
3058         if (status && status != -EOPNOTSUPP) {
3059                 ath10k_warn(ar, "set target log mode failed: %d\n", status);
3060                 goto err_hif_stop;
3061         }
3062
3063         return 0;
3064
3065 err_hif_stop:
3066         ath10k_hif_stop(ar);
3067 err_htt_rx_detach:
3068         ath10k_htt_rx_free(&ar->htt);
3069 err_htt_tx_detach:
3070         ath10k_htt_tx_free(&ar->htt);
3071 err_wmi_detach:
3072         ath10k_wmi_detach(ar);
3073 err:
3074         return status;
3075 }
3076 EXPORT_SYMBOL(ath10k_core_start);
3077
3078 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
3079 {
3080         int ret;
3081         unsigned long time_left;
3082
3083         reinit_completion(&ar->target_suspend);
3084
3085         ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
3086         if (ret) {
3087                 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
3088                 return ret;
3089         }
3090
3091         time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
3092
3093         if (!time_left) {
3094                 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
3095                 return -ETIMEDOUT;
3096         }
3097
3098         return 0;
3099 }
3100
3101 void ath10k_core_stop(struct ath10k *ar)
3102 {
3103         lockdep_assert_held(&ar->conf_mutex);
3104         ath10k_debug_stop(ar);
3105
3106         /* try to suspend target */
3107         if (ar->state != ATH10K_STATE_RESTARTING &&
3108             ar->state != ATH10K_STATE_UTF)
3109                 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
3110
3111         ath10k_hif_stop(ar);
3112         ath10k_htt_tx_stop(&ar->htt);
3113         ath10k_htt_rx_free(&ar->htt);
3114         ath10k_wmi_detach(ar);
3115
3116         ar->id.bmi_ids_valid = false;
3117 }
3118 EXPORT_SYMBOL(ath10k_core_stop);
3119
3120 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
3121  * order to know what hw capabilities should be advertised to mac80211 it is
3122  * necessary to load the firmware (and tear it down immediately since start
3123  * hook will try to init it again) before registering
3124  */
3125 static int ath10k_core_probe_fw(struct ath10k *ar)
3126 {
3127         struct bmi_target_info target_info;
3128         int ret = 0;
3129
3130         ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
3131         if (ret) {
3132                 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
3133                 return ret;
3134         }
3135
3136         switch (ar->hif.bus) {
3137         case ATH10K_BUS_SDIO:
3138                 memset(&target_info, 0, sizeof(target_info));
3139                 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
3140                 if (ret) {
3141                         ath10k_err(ar, "could not get target info (%d)\n", ret);
3142                         goto err_power_down;
3143                 }
3144                 ar->target_version = target_info.version;
3145                 ar->hw->wiphy->hw_version = target_info.version;
3146                 break;
3147         case ATH10K_BUS_PCI:
3148         case ATH10K_BUS_AHB:
3149         case ATH10K_BUS_USB:
3150                 memset(&target_info, 0, sizeof(target_info));
3151                 ret = ath10k_bmi_get_target_info(ar, &target_info);
3152                 if (ret) {
3153                         ath10k_err(ar, "could not get target info (%d)\n", ret);
3154                         goto err_power_down;
3155                 }
3156                 ar->target_version = target_info.version;
3157                 ar->hw->wiphy->hw_version = target_info.version;
3158                 break;
3159         case ATH10K_BUS_SNOC:
3160                 memset(&target_info, 0, sizeof(target_info));
3161                 ret = ath10k_hif_get_target_info(ar, &target_info);
3162                 if (ret) {
3163                         ath10k_err(ar, "could not get target info (%d)\n", ret);
3164                         goto err_power_down;
3165                 }
3166                 ar->target_version = target_info.version;
3167                 ar->hw->wiphy->hw_version = target_info.version;
3168                 break;
3169         default:
3170                 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
3171         }
3172
3173         ret = ath10k_init_hw_params(ar);
3174         if (ret) {
3175                 ath10k_err(ar, "could not get hw params (%d)\n", ret);
3176                 goto err_power_down;
3177         }
3178
3179         ret = ath10k_core_fetch_firmware_files(ar);
3180         if (ret) {
3181                 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
3182                 goto err_power_down;
3183         }
3184
3185         BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
3186                      sizeof(ar->normal_mode_fw.fw_file.fw_version));
3187         memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
3188                sizeof(ar->hw->wiphy->fw_version));
3189
3190         ath10k_debug_print_hwfw_info(ar);
3191
3192         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3193                       ar->normal_mode_fw.fw_file.fw_features)) {
3194                 ret = ath10k_core_pre_cal_download(ar);
3195                 if (ret) {
3196                         /* pre calibration data download is not necessary
3197                          * for all the chipsets. Ignore failures and continue.
3198                          */
3199                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
3200                                    "could not load pre cal data: %d\n", ret);
3201                 }
3202
3203                 ret = ath10k_core_get_board_id_from_otp(ar);
3204                 if (ret && ret != -EOPNOTSUPP) {
3205                         ath10k_err(ar, "failed to get board id from otp: %d\n",
3206                                    ret);
3207                         goto err_free_firmware_files;
3208                 }
3209
3210                 ret = ath10k_core_check_smbios(ar);
3211                 if (ret)
3212                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
3213
3214                 ret = ath10k_core_check_dt(ar);
3215                 if (ret)
3216                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
3217
3218                 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
3219                 if (ret) {
3220                         ath10k_err(ar, "failed to fetch board file: %d\n", ret);
3221                         goto err_free_firmware_files;
3222                 }
3223
3224                 ath10k_debug_print_board_info(ar);
3225         }
3226
3227         device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr));
3228
3229         ret = ath10k_core_init_firmware_features(ar);
3230         if (ret) {
3231                 ath10k_err(ar, "fatal problem with firmware features: %d\n",
3232                            ret);
3233                 goto err_free_firmware_files;
3234         }
3235
3236         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3237                       ar->normal_mode_fw.fw_file.fw_features)) {
3238                 ret = ath10k_swap_code_seg_init(ar,
3239                                                 &ar->normal_mode_fw.fw_file);
3240                 if (ret) {
3241                         ath10k_err(ar, "failed to initialize code swap segment: %d\n",
3242                                    ret);
3243                         goto err_free_firmware_files;
3244                 }
3245         }
3246
3247         mutex_lock(&ar->conf_mutex);
3248
3249         ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
3250                                 &ar->normal_mode_fw);
3251         if (ret) {
3252                 ath10k_err(ar, "could not init core (%d)\n", ret);
3253                 goto err_unlock;
3254         }
3255
3256         ath10k_debug_print_boot_info(ar);
3257         ath10k_core_stop(ar);
3258
3259         mutex_unlock(&ar->conf_mutex);
3260
3261         ath10k_hif_power_down(ar);
3262         return 0;
3263
3264 err_unlock:
3265         mutex_unlock(&ar->conf_mutex);
3266
3267 err_free_firmware_files:
3268         ath10k_core_free_firmware_files(ar);
3269
3270 err_power_down:
3271         ath10k_hif_power_down(ar);
3272
3273         return ret;
3274 }
3275
3276 static void ath10k_core_register_work(struct work_struct *work)
3277 {
3278         struct ath10k *ar = container_of(work, struct ath10k, register_work);
3279         int status;
3280
3281         /* peer stats are enabled by default */
3282         set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
3283
3284         status = ath10k_core_probe_fw(ar);
3285         if (status) {
3286                 ath10k_err(ar, "could not probe fw (%d)\n", status);
3287                 goto err;
3288         }
3289
3290         status = ath10k_mac_register(ar);
3291         if (status) {
3292                 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
3293                 goto err_release_fw;
3294         }
3295
3296         status = ath10k_coredump_register(ar);
3297         if (status) {
3298                 ath10k_err(ar, "unable to register coredump\n");
3299                 goto err_unregister_mac;
3300         }
3301
3302         status = ath10k_debug_register(ar);
3303         if (status) {
3304                 ath10k_err(ar, "unable to initialize debugfs\n");
3305                 goto err_unregister_coredump;
3306         }
3307
3308         status = ath10k_spectral_create(ar);
3309         if (status) {
3310                 ath10k_err(ar, "failed to initialize spectral\n");
3311                 goto err_debug_destroy;
3312         }
3313
3314         status = ath10k_thermal_register(ar);
3315         if (status) {
3316                 ath10k_err(ar, "could not register thermal device: %d\n",
3317                            status);
3318                 goto err_spectral_destroy;
3319         }
3320
3321         set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3322         return;
3323
3324 err_spectral_destroy:
3325         ath10k_spectral_destroy(ar);
3326 err_debug_destroy:
3327         ath10k_debug_destroy(ar);
3328 err_unregister_coredump:
3329         ath10k_coredump_unregister(ar);
3330 err_unregister_mac:
3331         ath10k_mac_unregister(ar);
3332 err_release_fw:
3333         ath10k_core_free_firmware_files(ar);
3334 err:
3335         /* TODO: It's probably a good idea to release device from the driver
3336          * but calling device_release_driver() here will cause a deadlock.
3337          */
3338         return;
3339 }
3340
3341 int ath10k_core_register(struct ath10k *ar,
3342                          const struct ath10k_bus_params *bus_params)
3343 {
3344         ar->bus_param = *bus_params;
3345
3346         queue_work(ar->workqueue, &ar->register_work);
3347
3348         return 0;
3349 }
3350 EXPORT_SYMBOL(ath10k_core_register);
3351
3352 void ath10k_core_unregister(struct ath10k *ar)
3353 {
3354         cancel_work_sync(&ar->register_work);
3355
3356         if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3357                 return;
3358
3359         ath10k_thermal_unregister(ar);
3360         /* Stop spectral before unregistering from mac80211 to remove the
3361          * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3362          * would be already be free'd recursively, leading to a double free.
3363          */
3364         ath10k_spectral_destroy(ar);
3365
3366         /* We must unregister from mac80211 before we stop HTC and HIF.
3367          * Otherwise we will fail to submit commands to FW and mac80211 will be
3368          * unhappy about callback failures.
3369          */
3370         ath10k_mac_unregister(ar);
3371
3372         ath10k_testmode_destroy(ar);
3373
3374         ath10k_core_free_firmware_files(ar);
3375         ath10k_core_free_board_files(ar);
3376
3377         ath10k_debug_unregister(ar);
3378 }
3379 EXPORT_SYMBOL(ath10k_core_unregister);
3380
3381 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3382                                   enum ath10k_bus bus,
3383                                   enum ath10k_hw_rev hw_rev,
3384                                   const struct ath10k_hif_ops *hif_ops)
3385 {
3386         struct ath10k *ar;
3387         int ret;
3388
3389         ar = ath10k_mac_create(priv_size);
3390         if (!ar)
3391                 return NULL;
3392
3393         ar->ath_common.priv = ar;
3394         ar->ath_common.hw = ar->hw;
3395         ar->dev = dev;
3396         ar->hw_rev = hw_rev;
3397         ar->hif.ops = hif_ops;
3398         ar->hif.bus = bus;
3399
3400         switch (hw_rev) {
3401         case ATH10K_HW_QCA988X:
3402         case ATH10K_HW_QCA9887:
3403                 ar->regs = &qca988x_regs;
3404                 ar->hw_ce_regs = &qcax_ce_regs;
3405                 ar->hw_values = &qca988x_values;
3406                 break;
3407         case ATH10K_HW_QCA6174:
3408         case ATH10K_HW_QCA9377:
3409                 ar->regs = &qca6174_regs;
3410                 ar->hw_ce_regs = &qcax_ce_regs;
3411                 ar->hw_values = &qca6174_values;
3412                 break;
3413         case ATH10K_HW_QCA99X0:
3414         case ATH10K_HW_QCA9984:
3415                 ar->regs = &qca99x0_regs;
3416                 ar->hw_ce_regs = &qcax_ce_regs;
3417                 ar->hw_values = &qca99x0_values;
3418                 break;
3419         case ATH10K_HW_QCA9888:
3420                 ar->regs = &qca99x0_regs;
3421                 ar->hw_ce_regs = &qcax_ce_regs;
3422                 ar->hw_values = &qca9888_values;
3423                 break;
3424         case ATH10K_HW_QCA4019:
3425                 ar->regs = &qca4019_regs;
3426                 ar->hw_ce_regs = &qcax_ce_regs;
3427                 ar->hw_values = &qca4019_values;
3428                 break;
3429         case ATH10K_HW_WCN3990:
3430                 ar->regs = &wcn3990_regs;
3431                 ar->hw_ce_regs = &wcn3990_ce_regs;
3432                 ar->hw_values = &wcn3990_values;
3433                 break;
3434         default:
3435                 ath10k_err(ar, "unsupported core hardware revision %d\n",
3436                            hw_rev);
3437                 ret = -ENOTSUPP;
3438                 goto err_free_mac;
3439         }
3440
3441         init_completion(&ar->scan.started);
3442         init_completion(&ar->scan.completed);
3443         init_completion(&ar->scan.on_channel);
3444         init_completion(&ar->target_suspend);
3445         init_completion(&ar->driver_recovery);
3446         init_completion(&ar->wow.wakeup_completed);
3447
3448         init_completion(&ar->install_key_done);
3449         init_completion(&ar->vdev_setup_done);
3450         init_completion(&ar->vdev_delete_done);
3451         init_completion(&ar->thermal.wmi_sync);
3452         init_completion(&ar->bss_survey_done);
3453         init_completion(&ar->peer_delete_done);
3454         init_completion(&ar->peer_stats_info_complete);
3455
3456         INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3457
3458         ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3459         if (!ar->workqueue)
3460                 goto err_free_mac;
3461
3462         ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3463         if (!ar->workqueue_aux)
3464                 goto err_free_wq;
3465
3466         ar->workqueue_tx_complete =
3467                 create_singlethread_workqueue("ath10k_tx_complete_wq");
3468         if (!ar->workqueue_tx_complete)
3469                 goto err_free_aux_wq;
3470
3471         mutex_init(&ar->conf_mutex);
3472         mutex_init(&ar->dump_mutex);
3473         spin_lock_init(&ar->data_lock);
3474
3475         INIT_LIST_HEAD(&ar->peers);
3476         init_waitqueue_head(&ar->peer_mapping_wq);
3477         init_waitqueue_head(&ar->htt.empty_tx_wq);
3478         init_waitqueue_head(&ar->wmi.tx_credits_wq);
3479
3480         skb_queue_head_init(&ar->htt.rx_indication_head);
3481
3482         init_completion(&ar->offchan_tx_completed);
3483         INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3484         skb_queue_head_init(&ar->offchan_tx_queue);
3485
3486         INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3487         skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3488
3489         INIT_WORK(&ar->register_work, ath10k_core_register_work);
3490         INIT_WORK(&ar->restart_work, ath10k_core_restart);
3491         INIT_WORK(&ar->set_coverage_class_work,
3492                   ath10k_core_set_coverage_class_work);
3493
3494         init_dummy_netdev(&ar->napi_dev);
3495
3496         ret = ath10k_coredump_create(ar);
3497         if (ret)
3498                 goto err_free_tx_complete;
3499
3500         ret = ath10k_debug_create(ar);
3501         if (ret)
3502                 goto err_free_coredump;
3503
3504         return ar;
3505
3506 err_free_coredump:
3507         ath10k_coredump_destroy(ar);
3508 err_free_tx_complete:
3509         destroy_workqueue(ar->workqueue_tx_complete);
3510 err_free_aux_wq:
3511         destroy_workqueue(ar->workqueue_aux);
3512 err_free_wq:
3513         destroy_workqueue(ar->workqueue);
3514 err_free_mac:
3515         ath10k_mac_destroy(ar);
3516
3517         return NULL;
3518 }
3519 EXPORT_SYMBOL(ath10k_core_create);
3520
3521 void ath10k_core_destroy(struct ath10k *ar)
3522 {
3523         flush_workqueue(ar->workqueue);
3524         destroy_workqueue(ar->workqueue);
3525
3526         flush_workqueue(ar->workqueue_aux);
3527         destroy_workqueue(ar->workqueue_aux);
3528
3529         flush_workqueue(ar->workqueue_tx_complete);
3530         destroy_workqueue(ar->workqueue_tx_complete);
3531
3532         ath10k_debug_destroy(ar);
3533         ath10k_coredump_destroy(ar);
3534         ath10k_htt_tx_destroy(&ar->htt);
3535         ath10k_wmi_free_host_mem(ar);
3536         ath10k_mac_destroy(ar);
3537 }
3538 EXPORT_SYMBOL(ath10k_core_destroy);
3539
3540 MODULE_AUTHOR("Qualcomm Atheros");
3541 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3542 MODULE_LICENSE("Dual BSD/GPL");