drivers/net/phy/marvell.c

   1 /*
   2  * drivers/net/phy/marvell.c
   3  *
   4  * Driver for Marvell PHYs
   5  *
   6  * Author: Andy Fleming
   7  *
   8  * Copyright (c) 2004 Freescale Semiconductor, Inc.
   9  *
  10  * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
  11  *
  12  * This program is free software; you can redistribute  it and/or modify it
  13  * under  the terms of  the GNU General  Public License as published by the
  14  * Free Software Foundation;  either version 2 of the  License, or (at your
  15  * option) any later version.
  16  *
  17  */
  18 #include <linux/kernel.h>
  19 #include <linux/string.h>
  20 #include <linux/errno.h>
  21 #include <linux/unistd.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/init.h>
  24 #include <linux/delay.h>
  25 #include <linux/netdevice.h>
  26 #include <linux/etherdevice.h>
  27 #include <linux/skbuff.h>
  28 #include <linux/spinlock.h>
  29 #include <linux/mm.h>
  30 #include <linux/module.h>
  31 #include <linux/mii.h>
  32 #include <linux/ethtool.h>
  33 #include <linux/phy.h>
  34 #include <linux/marvell_phy.h>
  35 #include <linux/of.h>
  36
  37 #include <linux/io.h>
  38 #include <asm/irq.h>
  39 #include <linux/uaccess.h>
  40
  41 #define MII_MARVELL_PHY_PAGE            22
  42
  43 #define MII_M1011_IEVENT                0x13
  44 #define MII_M1011_IEVENT_CLEAR          0x0000
  45
  46 #define MII_M1011_IMASK                 0x12
  47 #define MII_M1011_IMASK_INIT            0x6400
  48 #define MII_M1011_IMASK_CLEAR           0x0000
  49
  50 #define MII_M1011_PHY_SCR               0x10
  51 #define MII_M1011_PHY_SCR_MDI           0x0000
  52 #define MII_M1011_PHY_SCR_MDI_X         0x0020
  53 #define MII_M1011_PHY_SCR_AUTO_CROSS    0x0060
  54
  55 #define MII_M1145_PHY_EXT_ADDR_PAGE     0x16
  56 #define MII_M1145_PHY_EXT_SR            0x1b
  57 #define MII_M1145_PHY_EXT_CR            0x14
  58 #define MII_M1145_RGMII_RX_DELAY        0x0080
  59 #define MII_M1145_RGMII_TX_DELAY        0x0002
  60 #define MII_M1145_HWCFG_MODE_SGMII_NO_CLK       0x4
  61 #define MII_M1145_HWCFG_MODE_MASK               0xf
  62 #define MII_M1145_HWCFG_FIBER_COPPER_AUTO       0x8000
  63
  64 #define MII_M1145_HWCFG_MODE_SGMII_NO_CLK       0x4
  65 #define MII_M1145_HWCFG_MODE_MASK               0xf
  66 #define MII_M1145_HWCFG_FIBER_COPPER_AUTO       0x8000
  67
  68 #define MII_M1111_PHY_LED_CONTROL       0x18
  69 #define MII_M1111_PHY_LED_DIRECT        0x4100
  70 #define MII_M1111_PHY_LED_COMBINE       0x411c
  71 #define MII_M1111_PHY_EXT_CR            0x14
  72 #define MII_M1111_RX_DELAY              0x80
  73 #define MII_M1111_TX_DELAY              0x2
  74 #define MII_M1111_PHY_EXT_SR            0x1b
  75
  76 #define MII_M1111_HWCFG_MODE_MASK               0xf
  77 #define MII_M1111_HWCFG_MODE_COPPER_RGMII       0xb
  78 #define MII_M1111_HWCFG_MODE_FIBER_RGMII        0x3
  79 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK       0x4
  80 #define MII_M1111_HWCFG_MODE_COPPER_RTBI        0x9
  81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO       0x8000
  82 #define MII_M1111_HWCFG_FIBER_COPPER_RES        0x2000
  83
  84 #define MII_M1111_COPPER                0
  85 #define MII_M1111_FIBER                 1
  86
  87 #define MII_88E1121_PHY_MSCR_PAGE       2
  88 #define MII_88E1121_PHY_MSCR_REG        21
  89 #define MII_88E1121_PHY_MSCR_RX_DELAY   BIT(5)
  90 #define MII_88E1121_PHY_MSCR_TX_DELAY   BIT(4)
  91 #define MII_88E1121_PHY_MSCR_DELAY_MASK (~(0x3 << 4))
  92
  93 #define MII_88E1318S_PHY_MSCR1_REG      16
  94 #define MII_88E1318S_PHY_MSCR1_PAD_ODD  BIT(6)
  95
  96 /* Copper Specific Interrupt Enable Register */
  97 #define MII_88E1318S_PHY_CSIER                              0x12
  98 /* WOL Event Interrupt Enable */
  99 #define MII_88E1318S_PHY_CSIER_WOL_EIE                      BIT(7)
 100
 101 /* LED Timer Control Register */
 102 #define MII_88E1318S_PHY_LED_PAGE                           0x03
 103 #define MII_88E1318S_PHY_LED_TCR                            0x12
 104 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT                  BIT(15)
 105 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE                BIT(7)
 106 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW             BIT(11)
 107
 108 /* Magic Packet MAC address registers */
 109 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2                 0x17
 110 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1                 0x18
 111 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0                 0x19
 112
 113 #define MII_88E1318S_PHY_WOL_PAGE                           0x11
 114 #define MII_88E1318S_PHY_WOL_CTRL                           0x10
 115 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS          BIT(12)
 116 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
 117
 118 #define MII_88E1121_PHY_LED_CTRL        16
 119 #define MII_88E1121_PHY_LED_PAGE        3
 120 #define MII_88E1121_PHY_LED_DEF         0x0030
 121
 122 #define MII_M1011_PHY_STATUS            0x11
 123 #define MII_M1011_PHY_STATUS_1000       0x8000
 124 #define MII_M1011_PHY_STATUS_100        0x4000
 125 #define MII_M1011_PHY_STATUS_SPD_MASK   0xc000
 126 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
 127 #define MII_M1011_PHY_STATUS_RESOLVED   0x0800
 128 #define MII_M1011_PHY_STATUS_LINK       0x0400
 129
 130 #define MII_M1116R_CONTROL_REG_MAC      21
 131
 132 #define MII_88E3016_PHY_SPEC_CTRL       0x10
 133 #define MII_88E3016_DISABLE_SCRAMBLER   0x0200
 134 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
 135
 136 #define MII_88E1510_GEN_CTRL_REG_1              0x14
 137 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK    0x7
 138 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII   0x1     /* SGMII to copper */
 139 #define MII_88E1510_GEN_CTRL_REG_1_RESET        0x8000  /* Soft reset */
 140
 141 #define LPA_FIBER_1000HALF      0x40
 142 #define LPA_FIBER_1000FULL      0x20
 143
 144 #define LPA_PAUSE_FIBER 0x180
 145 #define LPA_PAUSE_ASYM_FIBER    0x100
 146
 147 #define ADVERTISE_FIBER_1000HALF        0x40
 148 #define ADVERTISE_FIBER_1000FULL        0x20
 149
 150 #define ADVERTISE_PAUSE_FIBER           0x180
 151 #define ADVERTISE_PAUSE_ASYM_FIBER      0x100
 152
 153 #define REGISTER_LINK_STATUS    0x400
 154 #define NB_FIBER_STATS  1
 155
 156 MODULE_DESCRIPTION("Marvell PHY driver");
 157 MODULE_AUTHOR("Andy Fleming");
 158 MODULE_LICENSE("GPL");
 159
 160 struct marvell_hw_stat {
 161         const char *string;
 162         u8 page;
 163         u8 reg;
 164         u8 bits;
 165 };
 166
 167 static struct marvell_hw_stat marvell_hw_stats[] = {
 168         { "phy_receive_errors_copper", 0, 21, 16},
 169         { "phy_idle_errors", 0, 10, 8 },
 170         { "phy_receive_errors_fiber", 1, 21, 16},
 171 };
 172
 173 struct marvell_priv {
 174         u64 stats[ARRAY_SIZE(marvell_hw_stats)];
 175 };
 176
 177 static int marvell_ack_interrupt(struct phy_device *phydev)
 178 {
 179         int err;
 180
 181         /* Clear the interrupts by reading the reg */
 182         err = phy_read(phydev, MII_M1011_IEVENT);
 183
 184         if (err < 0)
 185                 return err;
 186
 187         return 0;
 188 }
 189
 190 static int marvell_config_intr(struct phy_device *phydev)
 191 {
 192         int err;
 193
 194         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
 195                 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
 196         else
 197                 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
 198
 199         return err;
 200 }
 201
 202 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
 203 {
 204         int reg;
 205         int err;
 206         int val;
 207
 208         /* get the current settings */
 209         reg = phy_read(phydev, MII_M1011_PHY_SCR);
 210         if (reg < 0)
 211                 return reg;
 212
 213         val = reg;
 214         val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
 215         switch (polarity) {
 216         case ETH_TP_MDI:
 217                 val |= MII_M1011_PHY_SCR_MDI;
 218                 break;
 219         case ETH_TP_MDI_X:
 220                 val |= MII_M1011_PHY_SCR_MDI_X;
 221                 break;
 222         case ETH_TP_MDI_AUTO:
 223         case ETH_TP_MDI_INVALID:
 224         default:
 225                 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
 226                 break;
 227         }
 228
 229         if (val != reg) {
 230                 /* Set the new polarity value in the register */
 231                 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
 232                 if (err)
 233                         return err;
 234         }
 235
 236         return 0;
 237 }
 238
 239 static int marvell_config_aneg(struct phy_device *phydev)
 240 {
 241         int err;
 242
 243         /* The Marvell PHY has an errata which requires
 244          * that certain registers get written in order
 245          * to restart autonegotiation */
 246         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 247
 248         if (err < 0)
 249                 return err;
 250
 251         err = phy_write(phydev, 0x1d, 0x1f);
 252         if (err < 0)
 253                 return err;
 254
 255         err = phy_write(phydev, 0x1e, 0x200c);
 256         if (err < 0)
 257                 return err;
 258
 259         err = phy_write(phydev, 0x1d, 0x5);
 260         if (err < 0)
 261                 return err;
 262
 263         err = phy_write(phydev, 0x1e, 0);
 264         if (err < 0)
 265                 return err;
 266
 267         err = phy_write(phydev, 0x1e, 0x100);
 268         if (err < 0)
 269                 return err;
 270
 271         err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
 272         if (err < 0)
 273                 return err;
 274
 275         err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
 276                         MII_M1111_PHY_LED_DIRECT);
 277         if (err < 0)
 278                 return err;
 279
 280         err = genphy_config_aneg(phydev);
 281         if (err < 0)
 282                 return err;
 283
 284         if (phydev->autoneg != AUTONEG_ENABLE) {
 285                 int bmcr;
 286
 287                 /*
 288                  * A write to speed/duplex bits (that is performed by
 289                  * genphy_config_aneg() call above) must be followed by
 290                  * a software reset. Otherwise, the write has no effect.
 291                  */
 292                 bmcr = phy_read(phydev, MII_BMCR);
 293                 if (bmcr < 0)
 294                         return bmcr;
 295
 296                 err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET);
 297                 if (err < 0)
 298                         return err;
 299         }
 300
 301         return 0;
 302 }
 303
 304 static int m88e1111_config_aneg(struct phy_device *phydev)
 305 {
 306         int err;
 307
 308         /* The Marvell PHY has an errata which requires
 309          * that certain registers get written in order
 310          * to restart autonegotiation
 311          */
 312         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 313
 314         err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
 315         if (err < 0)
 316                 return err;
 317
 318         err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
 319                         MII_M1111_PHY_LED_DIRECT);
 320         if (err < 0)
 321                 return err;
 322
 323         err = genphy_config_aneg(phydev);
 324         if (err < 0)
 325                 return err;
 326
 327         if (phydev->autoneg != AUTONEG_ENABLE) {
 328                 int bmcr;
 329
 330                 /* A write to speed/duplex bits (that is performed by
 331                  * genphy_config_aneg() call above) must be followed by
 332                  * a software reset. Otherwise, the write has no effect.
 333                  */
 334                 bmcr = phy_read(phydev, MII_BMCR);
 335                 if (bmcr < 0)
 336                         return bmcr;
 337
 338                 err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET);
 339                 if (err < 0)
 340                         return err;
 341         }
 342
 343         return 0;
 344 }
 345
 346 #ifdef CONFIG_OF_MDIO
 347 /*
 348  * Set and/or override some configuration registers based on the
 349  * marvell,reg-init property stored in the of_node for the phydev.
 350  *
 351  * marvell,reg-init = <reg-page reg mask value>,...;
 352  *
 353  * There may be one or more sets of <reg-page reg mask value>:
 354  *
 355  * reg-page: which register bank to use.
 356  * reg: the register.
 357  * mask: if non-zero, ANDed with existing register value.
 358  * value: ORed with the masked value and written to the regiser.
 359  *
 360  */
 361 static int marvell_of_reg_init(struct phy_device *phydev)
 362 {
 363         const __be32 *paddr;
 364         int len, i, saved_page, current_page, ret;
 365
 366         if (!phydev->mdio.dev.of_node)
 367                 return 0;
 368
 369         paddr = of_get_property(phydev->mdio.dev.of_node,
 370                                 "marvell,reg-init", &len);
 371         if (!paddr || len < (4 * sizeof(*paddr)))
 372                 return 0;
 373
 374         saved_page = phy_read(phydev, MII_MARVELL_PHY_PAGE);
 375         if (saved_page < 0)
 376                 return saved_page;
 377         current_page = saved_page;
 378
 379         ret = 0;
 380         len /= sizeof(*paddr);
 381         for (i = 0; i < len - 3; i += 4) {
 382                 u16 reg_page = be32_to_cpup(paddr + i);
 383                 u16 reg = be32_to_cpup(paddr + i + 1);
 384                 u16 mask = be32_to_cpup(paddr + i + 2);
 385                 u16 val_bits = be32_to_cpup(paddr + i + 3);
 386                 int val;
 387
 388                 if (reg_page != current_page) {
 389                         current_page = reg_page;
 390                         ret = phy_write(phydev, MII_MARVELL_PHY_PAGE, reg_page);
 391                         if (ret < 0)
 392                                 goto err;
 393                 }
 394
 395                 val = 0;
 396                 if (mask) {
 397                         val = phy_read(phydev, reg);
 398                         if (val < 0) {
 399                                 ret = val;
 400                                 goto err;
 401                         }
 402                         val &= mask;
 403                 }
 404                 val |= val_bits;
 405
 406                 ret = phy_write(phydev, reg, val);
 407                 if (ret < 0)
 408                         goto err;
 409
 410         }
 411 err:
 412         if (current_page != saved_page) {
 413                 i = phy_write(phydev, MII_MARVELL_PHY_PAGE, saved_page);
 414                 if (ret == 0)
 415                         ret = i;
 416         }
 417         return ret;
 418 }
 419 #else
 420 static int marvell_of_reg_init(struct phy_device *phydev)
 421 {
 422         return 0;
 423 }
 424 #endif /* CONFIG_OF_MDIO */
 425
 426 static int m88e1121_config_aneg(struct phy_device *phydev)
 427 {
 428         int err, oldpage, mscr;
 429
 430         oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
 431
 432         err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
 433                         MII_88E1121_PHY_MSCR_PAGE);
 434         if (err < 0)
 435                 return err;
 436
 437         if (phy_interface_is_rgmii(phydev)) {
 438
 439                 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
 440                         MII_88E1121_PHY_MSCR_DELAY_MASK;
 441
 442                 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
 443                         mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
 444                                  MII_88E1121_PHY_MSCR_TX_DELAY);
 445                 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
 446                         mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
 447                 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
 448                         mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
 449
 450                 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
 451                 if (err < 0)
 452                         return err;
 453         }
 454
 455         phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
 456
 457         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 458         if (err < 0)
 459                 return err;
 460
 461         err = phy_write(phydev, MII_M1011_PHY_SCR,
 462                         MII_M1011_PHY_SCR_AUTO_CROSS);
 463         if (err < 0)
 464                 return err;
 465
 466         return genphy_config_aneg(phydev);
 467 }
 468
 469 static int m88e1318_config_aneg(struct phy_device *phydev)
 470 {
 471         int err, oldpage, mscr;
 472
 473         oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
 474
 475         err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
 476                         MII_88E1121_PHY_MSCR_PAGE);
 477         if (err < 0)
 478                 return err;
 479
 480         mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
 481         mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
 482
 483         err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
 484         if (err < 0)
 485                 return err;
 486
 487         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
 488         if (err < 0)
 489                 return err;
 490
 491         return m88e1121_config_aneg(phydev);
 492 }
 493
 494 /**
 495  * ethtool_adv_to_fiber_adv_t
 496  * @ethadv: the ethtool advertisement settings
 497  *
 498  * A small helper function that translates ethtool advertisement
 499  * settings to phy autonegotiation advertisements for the
 500  * MII_ADV register for fiber link.
 501  */
 502 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
 503 {
 504         u32 result = 0;
 505
 506         if (ethadv & ADVERTISED_1000baseT_Half)
 507                 result |= ADVERTISE_FIBER_1000HALF;
 508         if (ethadv & ADVERTISED_1000baseT_Full)
 509                 result |= ADVERTISE_FIBER_1000FULL;
 510
 511         if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
 512                 result |= LPA_PAUSE_ASYM_FIBER;
 513         else if (ethadv & ADVERTISE_PAUSE_CAP)
 514                 result |= (ADVERTISE_PAUSE_FIBER
 515                            & (~ADVERTISE_PAUSE_ASYM_FIBER));
 516
 517         return result;
 518 }
 519
 520 /**
 521  * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
 522  * @phydev: target phy_device struct
 523  *
 524  * Description: If auto-negotiation is enabled, we configure the
 525  *   advertising, and then restart auto-negotiation.  If it is not
 526  *   enabled, then we write the BMCR. Adapted for fiber link in
 527  *   some Marvell's devices.
 528  */
 529 static int marvell_config_aneg_fiber(struct phy_device *phydev)
 530 {
 531         int changed = 0;
 532         int err;
 533         int adv, oldadv;
 534         u32 advertise;
 535
 536         if (phydev->autoneg != AUTONEG_ENABLE)
 537                 return genphy_setup_forced(phydev);
 538
 539         /* Only allow advertising what this PHY supports */
 540         phydev->advertising &= phydev->supported;
 541         advertise = phydev->advertising;
 542
 543         /* Setup fiber advertisement */
 544         adv = phy_read(phydev, MII_ADVERTISE);
 545         if (adv < 0)
 546                 return adv;
 547
 548         oldadv = adv;
 549         adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
 550                 | LPA_PAUSE_FIBER);
 551         adv |= ethtool_adv_to_fiber_adv_t(advertise);
 552
 553         if (adv != oldadv) {
 554                 err = phy_write(phydev, MII_ADVERTISE, adv);
 555                 if (err < 0)
 556                         return err;
 557
 558                 changed = 1;
 559         }
 560
 561         if (changed == 0) {
 562                 /* Advertisement hasn't changed, but maybe aneg was never on to
 563                  * begin with?  Or maybe phy was isolated?
 564                  */
 565                 int ctl = phy_read(phydev, MII_BMCR);
 566
 567                 if (ctl < 0)
 568                         return ctl;
 569
 570                 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
 571                         changed = 1; /* do restart aneg */
 572         }
 573
 574         /* Only restart aneg if we are advertising something different
 575          * than we were before.
 576          */
 577         if (changed > 0)
 578                 changed = genphy_restart_aneg(phydev);
 579
 580         return changed;
 581 }
 582
 583 static int m88e1510_config_aneg(struct phy_device *phydev)
 584 {
 585         int err;
 586
 587         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
 588         if (err < 0)
 589                 goto error;
 590
 591         /* Configure the copper link first */
 592         err = m88e1318_config_aneg(phydev);
 593         if (err < 0)
 594                 goto error;
 595
 596         /* Then the fiber link */
 597         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_FIBER);
 598         if (err < 0)
 599                 goto error;
 600
 601         err = marvell_config_aneg_fiber(phydev);
 602         if (err < 0)
 603                 goto error;
 604
 605         return phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
 606
 607 error:
 608         phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
 609         return err;
 610 }
 611
 612 static int marvell_config_init(struct phy_device *phydev)
 613 {
 614         /* Set registers from marvell,reg-init DT property */
 615         return marvell_of_reg_init(phydev);
 616 }
 617
 618 static int m88e1116r_config_init(struct phy_device *phydev)
 619 {
 620         int temp;
 621         int err;
 622
 623         temp = phy_read(phydev, MII_BMCR);
 624         temp |= BMCR_RESET;
 625         err = phy_write(phydev, MII_BMCR, temp);
 626         if (err < 0)
 627                 return err;
 628
 629         mdelay(500);
 630
 631         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0);
 632         if (err < 0)
 633                 return err;
 634
 635         temp = phy_read(phydev, MII_M1011_PHY_SCR);
 636         temp |= (7 << 12);      /* max number of gigabit attempts */
 637         temp |= (1 << 11);      /* enable downshift */
 638         temp |= MII_M1011_PHY_SCR_AUTO_CROSS;
 639         err = phy_write(phydev, MII_M1011_PHY_SCR, temp);
 640         if (err < 0)
 641                 return err;
 642
 643         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 2);
 644         if (err < 0)
 645                 return err;
 646         temp = phy_read(phydev, MII_M1116R_CONTROL_REG_MAC);
 647         temp |= (1 << 5);
 648         temp |= (1 << 4);
 649         err = phy_write(phydev, MII_M1116R_CONTROL_REG_MAC, temp);
 650         if (err < 0)
 651                 return err;
 652         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0);
 653         if (err < 0)
 654                 return err;
 655
 656         temp = phy_read(phydev, MII_BMCR);
 657         temp |= BMCR_RESET;
 658         err = phy_write(phydev, MII_BMCR, temp);
 659         if (err < 0)
 660                 return err;
 661
 662         mdelay(500);
 663
 664         return marvell_config_init(phydev);
 665 }
 666
 667 static int m88e3016_config_init(struct phy_device *phydev)
 668 {
 669         int reg;
 670
 671         /* Enable Scrambler and Auto-Crossover */
 672         reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
 673         if (reg < 0)
 674                 return reg;
 675
 676         reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
 677         reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;
 678
 679         reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
 680         if (reg < 0)
 681                 return reg;
 682
 683         return marvell_config_init(phydev);
 684 }
 685
 686 static int m88e1111_config_init(struct phy_device *phydev)
 687 {
 688         int err;
 689         int temp;
 690
 691         if (phy_interface_is_rgmii(phydev)) {
 692
 693                 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
 694                 if (temp < 0)
 695                         return temp;
 696
 697                 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
 698                         temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
 699                 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
 700                         temp &= ~MII_M1111_TX_DELAY;
 701                         temp |= MII_M1111_RX_DELAY;
 702                 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
 703                         temp &= ~MII_M1111_RX_DELAY;
 704                         temp |= MII_M1111_TX_DELAY;
 705                 }
 706
 707                 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
 708                 if (err < 0)
 709                         return err;
 710
 711                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 712                 if (temp < 0)
 713                         return temp;
 714
 715                 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
 716
 717                 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
 718                         temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
 719                 else
 720                         temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
 721
 722                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 723                 if (err < 0)
 724                         return err;
 725         }
 726
 727         if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
 728                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 729                 if (temp < 0)
 730                         return temp;
 731
 732                 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
 733                 temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
 734                 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 735
 736                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 737                 if (err < 0)
 738                         return err;
 739
 740                 /* make sure copper is selected */
 741                 err = phy_read(phydev, MII_M1145_PHY_EXT_ADDR_PAGE);
 742                 if (err < 0)
 743                         return err;
 744
 745                 err = phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE,
 746                                 err & (~0xff));
 747                 if (err < 0)
 748                         return err;
 749         }
 750
 751         if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
 752                 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
 753                 if (temp < 0)
 754                         return temp;
 755                 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
 756                 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
 757                 if (err < 0)
 758                         return err;
 759
 760                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 761                 if (temp < 0)
 762                         return temp;
 763                 temp &= ~(MII_M1111_HWCFG_MODE_MASK | MII_M1111_HWCFG_FIBER_COPPER_RES);
 764                 temp |= 0x7 | MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 765                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 766                 if (err < 0)
 767                         return err;
 768
 769                 /* soft reset */
 770                 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 771                 if (err < 0)
 772                         return err;
 773                 do
 774                         temp = phy_read(phydev, MII_BMCR);
 775                 while (temp & BMCR_RESET);
 776
 777                 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
 778                 if (temp < 0)
 779                         return temp;
 780                 temp &= ~(MII_M1111_HWCFG_MODE_MASK | MII_M1111_HWCFG_FIBER_COPPER_RES);
 781                 temp |= MII_M1111_HWCFG_MODE_COPPER_RTBI | MII_M1111_HWCFG_FIBER_COPPER_AUTO;
 782                 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
 783                 if (err < 0)
 784                         return err;
 785         }
 786
 787         err = marvell_of_reg_init(phydev);
 788         if (err < 0)
 789                 return err;
 790
 791         return phy_write(phydev, MII_BMCR, BMCR_RESET);
 792 }
 793
 794 static int m88e1121_config_init(struct phy_device *phydev)
 795 {
 796         int err, oldpage;
 797
 798         oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
 799
 800         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_88E1121_PHY_LED_PAGE);
 801         if (err < 0)
 802                 return err;
 803
 804         /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
 805         err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
 806                         MII_88E1121_PHY_LED_DEF);
 807         if (err < 0)
 808                 return err;
 809
 810         phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
 811
 812         /* Set marvell,reg-init configuration from device tree */
 813         return marvell_config_init(phydev);
 814 }
 815
 816 static int m88e1510_config_init(struct phy_device *phydev)
 817 {
 818         int err;
 819         int temp;
 820
 821         /* SGMII-to-Copper mode initialization */
 822         if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
 823                 /* Select page 18 */
 824                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 18);
 825                 if (err < 0)
 826                         return err;
 827
 828                 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
 829                 temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
 830                 temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
 831                 temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
 832                 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
 833                 if (err < 0)
 834                         return err;
 835
 836                 /* PHY reset is necessary after changing MODE[2:0] */
 837                 temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
 838                 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
 839                 if (err < 0)
 840                         return err;
 841
 842                 /* Reset page selection */
 843                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0);
 844                 if (err < 0)
 845                         return err;
 846         }
 847
 848         return m88e1121_config_init(phydev);
 849 }
 850
 851 static int m88e1118_config_aneg(struct phy_device *phydev)
 852 {
 853         int err;
 854
 855         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
 856         if (err < 0)
 857                 return err;
 858
 859         err = phy_write(phydev, MII_M1011_PHY_SCR,
 860                         MII_M1011_PHY_SCR_AUTO_CROSS);
 861         if (err < 0)
 862                 return err;
 863
 864         err = genphy_config_aneg(phydev);
 865         return 0;
 866 }
 867
 868 static int m88e1118_config_init(struct phy_device *phydev)
 869 {
 870         int err;
 871
 872         /* Change address */
 873         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0002);
 874         if (err < 0)
 875                 return err;
 876
 877         /* Enable 1000 Mbit */
 878         err = phy_write(phydev, 0x15, 0x1070);
 879         if (err < 0)
 880                 return err;
 881
 882         /* Change address */
 883         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0003);
 884         if (err < 0)
 885                 return err;
 886
 887         /* Adjust LED Control */
 888         if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
 889                 err = phy_write(phydev, 0x10, 0x1100);
 890         else
 891                 err = phy_write(phydev, 0x10, 0x021e);
 892         if (err < 0)
 893                 return err;
 894
 895         err = marvell_of_reg_init(phydev);
 896         if (err < 0)
 897                 return err;
 898
 899         /* Reset address */
 900         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0);
 901         if (err < 0)
 902                 return err;
 903
 904         return phy_write(phydev, MII_BMCR, BMCR_RESET);
 905 }
 906
 907 static int m88e1149_config_init(struct phy_device *phydev)
 908 {
 909         int err;
 910
 911         /* Change address */
 912         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0002);
 913         if (err < 0)
 914                 return err;
 915
 916         /* Enable 1000 Mbit */
 917         err = phy_write(phydev, 0x15, 0x1048);
 918         if (err < 0)
 919                 return err;
 920
 921         err = marvell_of_reg_init(phydev);
 922         if (err < 0)
 923                 return err;
 924
 925         /* Reset address */
 926         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0);
 927         if (err < 0)
 928                 return err;
 929
 930         return phy_write(phydev, MII_BMCR, BMCR_RESET);
 931 }
 932
 933 static int m88e1145_config_init(struct phy_device *phydev)
 934 {
 935         int err;
 936         int temp;
 937
 938         /* Take care of errata E0 & E1 */
 939         err = phy_write(phydev, 0x1d, 0x001b);
 940         if (err < 0)
 941                 return err;
 942
 943         err = phy_write(phydev, 0x1e, 0x418f);
 944         if (err < 0)
 945                 return err;
 946
 947         err = phy_write(phydev, 0x1d, 0x0016);
 948         if (err < 0)
 949                 return err;
 950
 951         err = phy_write(phydev, 0x1e, 0xa2da);
 952         if (err < 0)
 953                 return err;
 954
 955         if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
 956                 int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
 957                 if (temp < 0)
 958                         return temp;
 959
 960                 temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
 961
 962                 err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
 963                 if (err < 0)
 964                         return err;
 965
 966                 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
 967                         err = phy_write(phydev, 0x1d, 0x0012);
 968                         if (err < 0)
 969                                 return err;
 970
 971                         temp = phy_read(phydev, 0x1e);
 972                         if (temp < 0)
 973                                 return temp;
 974
 975                         temp &= 0xf03f;
 976                         temp |= 2 << 9; /* 36 ohm */
 977                         temp |= 2 << 6; /* 39 ohm */
 978
 979                         err = phy_write(phydev, 0x1e, temp);
 980                         if (err < 0)
 981                                 return err;
 982
 983                         err = phy_write(phydev, 0x1d, 0x3);
 984                         if (err < 0)
 985                                 return err;
 986
 987                         err = phy_write(phydev, 0x1e, 0x8000);
 988                         if (err < 0)
 989                                 return err;
 990                 }
 991         }
 992
 993         if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
 994                 temp = phy_read(phydev, MII_M1145_PHY_EXT_SR);
 995                 if (temp < 0)
 996                         return temp;
 997
 998                 temp &= ~MII_M1145_HWCFG_MODE_MASK;
 999                 temp |= MII_M1145_HWCFG_MODE_SGMII_NO_CLK;
1000                 temp |= MII_M1145_HWCFG_FIBER_COPPER_AUTO;
1001
1002                 err = phy_write(phydev, MII_M1145_PHY_EXT_SR, temp);
1003                 if (err < 0)
1004                         return err;
1005         }
1006
1007         err = marvell_of_reg_init(phydev);
1008         if (err < 0)
1009                 return err;
1010
1011         return 0;
1012 }
1013
1014 /**
1015  * fiber_lpa_to_ethtool_lpa_t
1016  * @lpa: value of the MII_LPA register for fiber link
1017  *
1018  * A small helper function that translates MII_LPA
1019  * bits to ethtool LP advertisement settings.
1020  */
1021 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1022 {
1023         u32 result = 0;
1024
1025         if (lpa & LPA_FIBER_1000HALF)
1026                 result |= ADVERTISED_1000baseT_Half;
1027         if (lpa & LPA_FIBER_1000FULL)
1028                 result |= ADVERTISED_1000baseT_Full;
1029
1030         return result;
1031 }
1032
1033 /**
1034  * marvell_update_link - update link status in real time in @phydev
1035  * @phydev: target phy_device struct
1036  *
1037  * Description: Update the value in phydev->link to reflect the
1038  *   current link value.
1039  */
1040 static int marvell_update_link(struct phy_device *phydev, int fiber)
1041 {
1042         int status;
1043
1044         /* Use the generic register for copper link, or specific
1045          * register for fiber case */
1046         if (fiber) {
1047                 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1048                 if (status < 0)
1049                         return status;
1050
1051                 if ((status & REGISTER_LINK_STATUS) == 0)
1052                         phydev->link = 0;
1053                 else
1054                         phydev->link = 1;
1055         } else {
1056                 return genphy_update_link(phydev);
1057         }
1058
1059         return 0;
1060 }
1061
1062 /* marvell_read_status_page
1063  *
1064  * Description:
1065  *   Check the link, then figure out the current state
1066  *   by comparing what we advertise with what the link partner
1067  *   advertises.  Start by checking the gigabit possibilities,
1068  *   then move on to 10/100.
1069  */
1070 static int marvell_read_status_page(struct phy_device *phydev, int page)
1071 {
1072         int adv;
1073         int err;
1074         int lpa;
1075         int lpagb;
1076         int status = 0;
1077         int fiber;
1078
1079         /* Detect and update the link, but return if there
1080          * was an error */
1081         if (page == MII_M1111_FIBER)
1082                 fiber = 1;
1083         else
1084                 fiber = 0;
1085
1086         err = marvell_update_link(phydev, fiber);
1087         if (err)
1088                 return err;
1089
1090         if (AUTONEG_ENABLE == phydev->autoneg) {
1091                 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1092                 if (status < 0)
1093                         return status;
1094
1095                 lpa = phy_read(phydev, MII_LPA);
1096                 if (lpa < 0)
1097                         return lpa;
1098
1099                 lpagb = phy_read(phydev, MII_STAT1000);
1100                 if (lpagb < 0)
1101                         return lpagb;
1102
1103                 adv = phy_read(phydev, MII_ADVERTISE);
1104                 if (adv < 0)
1105                         return adv;
1106
1107                 lpa &= adv;
1108
1109                 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1110                         phydev->duplex = DUPLEX_FULL;
1111                 else
1112                         phydev->duplex = DUPLEX_HALF;
1113
1114                 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1115                 phydev->pause = phydev->asym_pause = 0;
1116
1117                 switch (status) {
1118                 case MII_M1011_PHY_STATUS_1000:
1119                         phydev->speed = SPEED_1000;
1120                         break;
1121
1122                 case MII_M1011_PHY_STATUS_100:
1123                         phydev->speed = SPEED_100;
1124                         break;
1125
1126                 default:
1127                         phydev->speed = SPEED_10;
1128                         break;
1129                 }
1130
1131                 if (!fiber) {
1132                         phydev->lp_advertising = mii_stat1000_to_ethtool_lpa_t(lpagb) |
1133                                          mii_lpa_to_ethtool_lpa_t(lpa);
1134
1135                         if (phydev->duplex == DUPLEX_FULL) {
1136                                 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1137                                 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1138                         }
1139                 } else {
1140                         /* The fiber link is only 1000M capable */
1141                         phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1142
1143                         if (phydev->duplex == DUPLEX_FULL) {
1144                                 if (!(lpa & LPA_PAUSE_FIBER)) {
1145                                         phydev->pause = 0;
1146                                         phydev->asym_pause = 0;
1147                                 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1148                                         phydev->pause = 1;
1149                                         phydev->asym_pause = 1;
1150                                 } else {
1151                                         phydev->pause = 1;
1152                                         phydev->asym_pause = 0;
1153                                 }
1154                         }
1155                 }
1156         } else {
1157                 int bmcr = phy_read(phydev, MII_BMCR);
1158
1159                 if (bmcr < 0)
1160                         return bmcr;
1161
1162                 if (bmcr & BMCR_FULLDPLX)
1163                         phydev->duplex = DUPLEX_FULL;
1164                 else
1165                         phydev->duplex = DUPLEX_HALF;
1166
1167                 if (bmcr & BMCR_SPEED1000)
1168                         phydev->speed = SPEED_1000;
1169                 else if (bmcr & BMCR_SPEED100)
1170                         phydev->speed = SPEED_100;
1171                 else
1172                         phydev->speed = SPEED_10;
1173
1174                 phydev->pause = phydev->asym_pause = 0;
1175                 phydev->lp_advertising = 0;
1176         }
1177
1178         return 0;
1179 }
1180
1181 /* marvell_read_status
1182  *
1183  * Some Marvell's phys have two modes: fiber and copper.
1184  * Both need status checked.
1185  * Description:
1186  *   First, check the fiber link and status.
1187  *   If the fiber link is down, check the copper link and status which
1188  *   will be the default value if both link are down.
1189  */
1190 static int marvell_read_status(struct phy_device *phydev)
1191 {
1192         int err;
1193
1194         /* Check the fiber mode first */
1195         if (phydev->supported & SUPPORTED_FIBRE) {
1196                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_FIBER);
1197                 if (err < 0)
1198                         goto error;
1199
1200                 err = marvell_read_status_page(phydev, MII_M1111_FIBER);
1201                 if (err < 0)
1202                         goto error;
1203
1204                 /* If the fiber link is up, it is the selected and used link.
1205                  * In this case, we need to stay in the fiber page.
1206                  * Please to be careful about that, avoid to restore Copper page
1207                  * in other functions which could break the behaviour
1208                  * for some fiber phy like 88E1512.
1209                  * */
1210                 if (phydev->link)
1211                         return 0;
1212
1213                 /* If fiber link is down, check and save copper mode state */
1214                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
1215                 if (err < 0)
1216                         goto error;
1217         }
1218
1219         return marvell_read_status_page(phydev, MII_M1111_COPPER);
1220
1221 error:
1222         phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
1223         return err;
1224 }
1225
1226 /* marvell_suspend
1227  *
1228  * Some Marvell's phys have two modes: fiber and copper.
1229  * Both need to be suspended
1230  */
1231 static int marvell_suspend(struct phy_device *phydev)
1232 {
1233         int err;
1234
1235         /* Suspend the fiber mode first */
1236         if (!(phydev->supported & SUPPORTED_FIBRE)) {
1237                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_FIBER);
1238                 if (err < 0)
1239                         goto error;
1240
1241                 /* With the page set, use the generic suspend */
1242                 err = genphy_suspend(phydev);
1243                 if (err < 0)
1244                         goto error;
1245
1246                 /* Then, the copper link */
1247                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
1248                 if (err < 0)
1249                         goto error;
1250         }
1251
1252         /* With the page set, use the generic suspend */
1253         return genphy_suspend(phydev);
1254
1255 error:
1256         phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
1257         return err;
1258 }
1259
1260 /* marvell_resume
1261  *
1262  * Some Marvell's phys have two modes: fiber and copper.
1263  * Both need to be resumed
1264  */
1265 static int marvell_resume(struct phy_device *phydev)
1266 {
1267         int err;
1268
1269         /* Resume the fiber mode first */
1270         if (!(phydev->supported & SUPPORTED_FIBRE)) {
1271                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_FIBER);
1272                 if (err < 0)
1273                         goto error;
1274
1275                 /* With the page set, use the generic resume */
1276                 err = genphy_resume(phydev);
1277                 if (err < 0)
1278                         goto error;
1279
1280                 /* Then, the copper link */
1281                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
1282                 if (err < 0)
1283                         goto error;
1284         }
1285
1286         /* With the page set, use the generic resume */
1287         return genphy_resume(phydev);
1288
1289 error:
1290         phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
1291         return err;
1292 }
1293
1294 static int marvell_aneg_done(struct phy_device *phydev)
1295 {
1296         int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1297         return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1298 }
1299
1300 static int m88e1121_did_interrupt(struct phy_device *phydev)
1301 {
1302         int imask;
1303
1304         imask = phy_read(phydev, MII_M1011_IEVENT);
1305
1306         if (imask & MII_M1011_IMASK_INIT)
1307                 return 1;
1308
1309         return 0;
1310 }
1311
1312 static void m88e1318_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1313 {
1314         wol->supported = WAKE_MAGIC;
1315         wol->wolopts = 0;
1316
1317         if (phy_write(phydev, MII_MARVELL_PHY_PAGE,
1318                       MII_88E1318S_PHY_WOL_PAGE) < 0)
1319                 return;
1320
1321         if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
1322             MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1323                 wol->wolopts |= WAKE_MAGIC;
1324
1325         if (phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x00) < 0)
1326                 return;
1327 }
1328
1329 static int m88e1318_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1330 {
1331         int err, oldpage, temp;
1332
1333         oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
1334
1335         if (wol->wolopts & WAKE_MAGIC) {
1336                 /* Explicitly switch to page 0x00, just to be sure */
1337                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x00);
1338                 if (err < 0)
1339                         return err;
1340
1341                 /* Enable the WOL interrupt */
1342                 temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
1343                 temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
1344                 err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
1345                 if (err < 0)
1346                         return err;
1347
1348                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
1349                                 MII_88E1318S_PHY_LED_PAGE);
1350                 if (err < 0)
1351                         return err;
1352
1353                 /* Setup LED[2] as interrupt pin (active low) */
1354                 temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
1355                 temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
1356                 temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
1357                 temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
1358                 err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
1359                 if (err < 0)
1360                         return err;
1361
1362                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
1363                                 MII_88E1318S_PHY_WOL_PAGE);
1364                 if (err < 0)
1365                         return err;
1366
1367                 /* Store the device address for the magic packet */
1368                 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1369                                 ((phydev->attached_dev->dev_addr[5] << 8) |
1370                                  phydev->attached_dev->dev_addr[4]));
1371                 if (err < 0)
1372                         return err;
1373                 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1374                                 ((phydev->attached_dev->dev_addr[3] << 8) |
1375                                  phydev->attached_dev->dev_addr[2]));
1376                 if (err < 0)
1377                         return err;
1378                 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1379                                 ((phydev->attached_dev->dev_addr[1] << 8) |
1380                                  phydev->attached_dev->dev_addr[0]));
1381                 if (err < 0)
1382                         return err;
1383
1384                 /* Clear WOL status and enable magic packet matching */
1385                 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1386                 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1387                 temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1388                 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1389                 if (err < 0)
1390                         return err;
1391         } else {
1392                 err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
1393                                 MII_88E1318S_PHY_WOL_PAGE);
1394                 if (err < 0)
1395                         return err;
1396
1397                 /* Clear WOL status and disable magic packet matching */
1398                 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1399                 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1400                 temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1401                 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1402                 if (err < 0)
1403                         return err;
1404         }
1405
1406         err = phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
1407         if (err < 0)
1408                 return err;
1409
1410         return 0;
1411 }
1412
1413 static int marvell_get_sset_count(struct phy_device *phydev)
1414 {
1415         if (phydev->supported & SUPPORTED_FIBRE)
1416                 return ARRAY_SIZE(marvell_hw_stats);
1417         else
1418                 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1419 }
1420
1421 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1422 {
1423         int i;
1424
1425         for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1426                 memcpy(data + i * ETH_GSTRING_LEN,
1427                        marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1428         }
1429 }
1430
1431 #ifndef UINT64_MAX
1432 #define UINT64_MAX              (u64)(~((u64)0))
1433 #endif
1434 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1435 {
1436         struct marvell_hw_stat stat = marvell_hw_stats[i];
1437         struct marvell_priv *priv = phydev->priv;
1438         int err, oldpage, val;
1439         u64 ret;
1440
1441         oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
1442         err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
1443                         stat.page);
1444         if (err < 0)
1445                 return UINT64_MAX;
1446
1447         val = phy_read(phydev, stat.reg);
1448         if (val < 0) {
1449                 ret = UINT64_MAX;
1450         } else {
1451                 val = val & ((1 << stat.bits) - 1);
1452                 priv->stats[i] += val;
1453                 ret = priv->stats[i];
1454         }
1455
1456         phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
1457
1458         return ret;
1459 }
1460
1461 static void marvell_get_stats(struct phy_device *phydev,
1462                               struct ethtool_stats *stats, u64 *data)
1463 {
1464         int i;
1465
1466         for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1467                 data[i] = marvell_get_stat(phydev, i);
1468 }
1469
1470 static int marvell_probe(struct phy_device *phydev)
1471 {
1472         struct marvell_priv *priv;
1473
1474         priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1475         if (!priv)
1476                 return -ENOMEM;
1477
1478         phydev->priv = priv;
1479
1480         return 0;
1481 }
1482
1483 static struct phy_driver marvell_drivers[] = {
1484         {
1485                 .phy_id = MARVELL_PHY_ID_88E1101,
1486                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1487                 .name = "Marvell 88E1101",
1488                 .features = PHY_GBIT_FEATURES,
1489                 .probe = marvell_probe,
1490                 .flags = PHY_HAS_INTERRUPT,
1491                 .config_init = &marvell_config_init,
1492                 .config_aneg = &marvell_config_aneg,
1493                 .read_status = &genphy_read_status,
1494                 .ack_interrupt = &marvell_ack_interrupt,
1495                 .config_intr = &marvell_config_intr,
1496                 .resume = &genphy_resume,
1497                 .suspend = &genphy_suspend,
1498                 .get_sset_count = marvell_get_sset_count,
1499                 .get_strings = marvell_get_strings,
1500                 .get_stats = marvell_get_stats,
1501         },
1502         {
1503                 .phy_id = MARVELL_PHY_ID_88E1112,
1504                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1505                 .name = "Marvell 88E1112",
1506                 .features = PHY_GBIT_FEATURES,
1507                 .flags = PHY_HAS_INTERRUPT,
1508                 .probe = marvell_probe,
1509                 .config_init = &m88e1111_config_init,
1510                 .config_aneg = &marvell_config_aneg,
1511                 .read_status = &genphy_read_status,
1512                 .ack_interrupt = &marvell_ack_interrupt,
1513                 .config_intr = &marvell_config_intr,
1514                 .resume = &genphy_resume,
1515                 .suspend = &genphy_suspend,
1516                 .get_sset_count = marvell_get_sset_count,
1517                 .get_strings = marvell_get_strings,
1518                 .get_stats = marvell_get_stats,
1519         },
1520         {
1521                 .phy_id = MARVELL_PHY_ID_88E1111,
1522                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1523                 .name = "Marvell 88E1111",
1524                 .features = PHY_GBIT_FEATURES,
1525                 .flags = PHY_HAS_INTERRUPT,
1526                 .probe = marvell_probe,
1527                 .config_init = &m88e1111_config_init,
1528                 .config_aneg = &m88e1111_config_aneg,
1529                 .read_status = &marvell_read_status,
1530                 .ack_interrupt = &marvell_ack_interrupt,
1531                 .config_intr = &marvell_config_intr,
1532                 .resume = &genphy_resume,
1533                 .suspend = &genphy_suspend,
1534                 .get_sset_count = marvell_get_sset_count,
1535                 .get_strings = marvell_get_strings,
1536                 .get_stats = marvell_get_stats,
1537         },
1538         {
1539                 .phy_id = MARVELL_PHY_ID_88E1118,
1540                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1541                 .name = "Marvell 88E1118",
1542                 .features = PHY_GBIT_FEATURES,
1543                 .flags = PHY_HAS_INTERRUPT,
1544                 .probe = marvell_probe,
1545                 .config_init = &m88e1118_config_init,
1546                 .config_aneg = &m88e1118_config_aneg,
1547                 .read_status = &genphy_read_status,
1548                 .ack_interrupt = &marvell_ack_interrupt,
1549                 .config_intr = &marvell_config_intr,
1550                 .resume = &genphy_resume,
1551                 .suspend = &genphy_suspend,
1552                 .get_sset_count = marvell_get_sset_count,
1553                 .get_strings = marvell_get_strings,
1554                 .get_stats = marvell_get_stats,
1555         },
1556         {
1557                 .phy_id = MARVELL_PHY_ID_88E1121R,
1558                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1559                 .name = "Marvell 88E1121R",
1560                 .features = PHY_GBIT_FEATURES,
1561                 .flags = PHY_HAS_INTERRUPT,
1562                 .probe = marvell_probe,
1563                 .config_init = &m88e1121_config_init,
1564                 .config_aneg = &m88e1121_config_aneg,
1565                 .read_status = &marvell_read_status,
1566                 .ack_interrupt = &marvell_ack_interrupt,
1567                 .config_intr = &marvell_config_intr,
1568                 .did_interrupt = &m88e1121_did_interrupt,
1569                 .resume = &genphy_resume,
1570                 .suspend = &genphy_suspend,
1571                 .get_sset_count = marvell_get_sset_count,
1572                 .get_strings = marvell_get_strings,
1573                 .get_stats = marvell_get_stats,
1574         },
1575         {
1576                 .phy_id = MARVELL_PHY_ID_88E1318S,
1577                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1578                 .name = "Marvell 88E1318S",
1579                 .features = PHY_GBIT_FEATURES,
1580                 .flags = PHY_HAS_INTERRUPT,
1581                 .probe = marvell_probe,
1582                 .config_init = &m88e1121_config_init,
1583                 .config_aneg = &m88e1318_config_aneg,
1584                 .read_status = &marvell_read_status,
1585                 .ack_interrupt = &marvell_ack_interrupt,
1586                 .config_intr = &marvell_config_intr,
1587                 .did_interrupt = &m88e1121_did_interrupt,
1588                 .get_wol = &m88e1318_get_wol,
1589                 .set_wol = &m88e1318_set_wol,
1590                 .resume = &genphy_resume,
1591                 .suspend = &genphy_suspend,
1592                 .get_sset_count = marvell_get_sset_count,
1593                 .get_strings = marvell_get_strings,
1594                 .get_stats = marvell_get_stats,
1595         },
1596         {
1597                 .phy_id = MARVELL_PHY_ID_88E1145,
1598                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1599                 .name = "Marvell 88E1145",
1600                 .features = PHY_GBIT_FEATURES,
1601                 .flags = PHY_HAS_INTERRUPT,
1602                 .probe = marvell_probe,
1603                 .config_init = &m88e1145_config_init,
1604                 .config_aneg = &marvell_config_aneg,
1605                 .read_status = &genphy_read_status,
1606                 .ack_interrupt = &marvell_ack_interrupt,
1607                 .config_intr = &marvell_config_intr,
1608                 .resume = &genphy_resume,
1609                 .suspend = &genphy_suspend,
1610                 .get_sset_count = marvell_get_sset_count,
1611                 .get_strings = marvell_get_strings,
1612                 .get_stats = marvell_get_stats,
1613         },
1614         {
1615                 .phy_id = MARVELL_PHY_ID_88E1149R,
1616                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1617                 .name = "Marvell 88E1149R",
1618                 .features = PHY_GBIT_FEATURES,
1619                 .flags = PHY_HAS_INTERRUPT,
1620                 .probe = marvell_probe,
1621                 .config_init = &m88e1149_config_init,
1622                 .config_aneg = &m88e1118_config_aneg,
1623                 .read_status = &genphy_read_status,
1624                 .ack_interrupt = &marvell_ack_interrupt,
1625                 .config_intr = &marvell_config_intr,
1626                 .resume = &genphy_resume,
1627                 .suspend = &genphy_suspend,
1628                 .get_sset_count = marvell_get_sset_count,
1629                 .get_strings = marvell_get_strings,
1630                 .get_stats = marvell_get_stats,
1631         },
1632         {
1633                 .phy_id = MARVELL_PHY_ID_88E1240,
1634                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1635                 .name = "Marvell 88E1240",
1636                 .features = PHY_GBIT_FEATURES,
1637                 .flags = PHY_HAS_INTERRUPT,
1638                 .probe = marvell_probe,
1639                 .config_init = &m88e1111_config_init,
1640                 .config_aneg = &marvell_config_aneg,
1641                 .read_status = &genphy_read_status,
1642                 .ack_interrupt = &marvell_ack_interrupt,
1643                 .config_intr = &marvell_config_intr,
1644                 .resume = &genphy_resume,
1645                 .suspend = &genphy_suspend,
1646                 .get_sset_count = marvell_get_sset_count,
1647                 .get_strings = marvell_get_strings,
1648                 .get_stats = marvell_get_stats,
1649         },
1650         {
1651                 .phy_id = MARVELL_PHY_ID_88E1116R,
1652                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1653                 .name = "Marvell 88E1116R",
1654                 .features = PHY_GBIT_FEATURES,
1655                 .flags = PHY_HAS_INTERRUPT,
1656                 .probe = marvell_probe,
1657                 .config_init = &m88e1116r_config_init,
1658                 .config_aneg = &genphy_config_aneg,
1659                 .read_status = &genphy_read_status,
1660                 .ack_interrupt = &marvell_ack_interrupt,
1661                 .config_intr = &marvell_config_intr,
1662                 .resume = &genphy_resume,
1663                 .suspend = &genphy_suspend,
1664                 .get_sset_count = marvell_get_sset_count,
1665                 .get_strings = marvell_get_strings,
1666                 .get_stats = marvell_get_stats,
1667         },
1668         {
1669                 .phy_id = MARVELL_PHY_ID_88E1510,
1670                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1671                 .name = "Marvell 88E1510",
1672                 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
1673                 .flags = PHY_HAS_INTERRUPT,
1674                 .probe = marvell_probe,
1675                 .config_init = &m88e1510_config_init,
1676                 .config_aneg = &m88e1510_config_aneg,
1677                 .read_status = &marvell_read_status,
1678                 .ack_interrupt = &marvell_ack_interrupt,
1679                 .config_intr = &marvell_config_intr,
1680                 .did_interrupt = &m88e1121_did_interrupt,
1681                 .resume = &marvell_resume,
1682                 .suspend = &marvell_suspend,
1683                 .get_sset_count = marvell_get_sset_count,
1684                 .get_strings = marvell_get_strings,
1685                 .get_stats = marvell_get_stats,
1686         },
1687         {
1688                 .phy_id = MARVELL_PHY_ID_88E1540,
1689                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1690                 .name = "Marvell 88E1540",
1691                 .features = PHY_GBIT_FEATURES,
1692                 .flags = PHY_HAS_INTERRUPT,
1693                 .probe = marvell_probe,
1694                 .config_init = &marvell_config_init,
1695                 .config_aneg = &m88e1510_config_aneg,
1696                 .read_status = &marvell_read_status,
1697                 .ack_interrupt = &marvell_ack_interrupt,
1698                 .config_intr = &marvell_config_intr,
1699                 .did_interrupt = &m88e1121_did_interrupt,
1700                 .resume = &genphy_resume,
1701                 .suspend = &genphy_suspend,
1702                 .get_sset_count = marvell_get_sset_count,
1703                 .get_strings = marvell_get_strings,
1704                 .get_stats = marvell_get_stats,
1705         },
1706         {
1707                 .phy_id = MARVELL_PHY_ID_88E3016,
1708                 .phy_id_mask = MARVELL_PHY_ID_MASK,
1709                 .name = "Marvell 88E3016",
1710                 .features = PHY_BASIC_FEATURES,
1711                 .flags = PHY_HAS_INTERRUPT,
1712                 .probe = marvell_probe,
1713                 .config_aneg = &genphy_config_aneg,
1714                 .config_init = &m88e3016_config_init,
1715                 .aneg_done = &marvell_aneg_done,
1716                 .read_status = &marvell_read_status,
1717                 .ack_interrupt = &marvell_ack_interrupt,
1718                 .config_intr = &marvell_config_intr,
1719                 .did_interrupt = &m88e1121_did_interrupt,
1720                 .resume = &genphy_resume,
1721                 .suspend = &genphy_suspend,
1722                 .get_sset_count = marvell_get_sset_count,
1723                 .get_strings = marvell_get_strings,
1724                 .get_stats = marvell_get_stats,
1725         },
1726 };
1727
1728 module_phy_driver(marvell_drivers);
1729
1730 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
1731         { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
1732         { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
1733         { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
1734         { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
1735         { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
1736         { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
1737         { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
1738         { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
1739         { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
1740         { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
1741         { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
1742         { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
1743         { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
1744         { }
1745 };
1746
1747 MODULE_DEVICE_TABLE(mdio, marvell_tbl);