drivers/net/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/ipv6.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/mii.h>
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/pci.h>
  41 #include <linux/pci-aspm.h>
  42 #include <linux/delay.h>
  43 #include <linux/interrupt.h>
  44 #include <linux/if_ether.h>
  45 #include <linux/aer.h>
  46 #ifdef CONFIG_IGB_DCA
  47 #include <linux/dca.h>
  48 #endif
  49 #include "igb.h"
  50
  51 #define DRV_VERSION "1.2.45-k2"
  52 char igb_driver_name[] = "igb";
  53 char igb_driver_version[] = DRV_VERSION;
  54 static const char igb_driver_string[] =
  55                                 "Intel(R) Gigabit Ethernet Network Driver";
  56 static const char igb_copyright[] = "Copyright (c) 2008 Intel Corporation.";
  57
  58 static const struct e1000_info *igb_info_tbl[] = {
  59         [board_82575] = &e1000_82575_info,
  60 };
  61
  62 static struct pci_device_id igb_pci_tbl[] = {
  63         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  68         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  69         /* required last entry */
  70         {0, }
  71 };
  72
  73 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
  74
  75 void igb_reset(struct igb_adapter *);
  76 static int igb_setup_all_tx_resources(struct igb_adapter *);
  77 static int igb_setup_all_rx_resources(struct igb_adapter *);
  78 static void igb_free_all_tx_resources(struct igb_adapter *);
  79 static void igb_free_all_rx_resources(struct igb_adapter *);
  80 void igb_update_stats(struct igb_adapter *);
  81 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
  82 static void __devexit igb_remove(struct pci_dev *pdev);
  83 static int igb_sw_init(struct igb_adapter *);
  84 static int igb_open(struct net_device *);
  85 static int igb_close(struct net_device *);
  86 static void igb_configure_tx(struct igb_adapter *);
  87 static void igb_configure_rx(struct igb_adapter *);
  88 static void igb_setup_rctl(struct igb_adapter *);
  89 static void igb_clean_all_tx_rings(struct igb_adapter *);
  90 static void igb_clean_all_rx_rings(struct igb_adapter *);
  91 static void igb_clean_tx_ring(struct igb_ring *);
  92 static void igb_clean_rx_ring(struct igb_ring *);
  93 static void igb_set_multi(struct net_device *);
  94 static void igb_update_phy_info(unsigned long);
  95 static void igb_watchdog(unsigned long);
  96 static void igb_watchdog_task(struct work_struct *);
  97 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
  98                                   struct igb_ring *);
  99 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
 100 static struct net_device_stats *igb_get_stats(struct net_device *);
 101 static int igb_change_mtu(struct net_device *, int);
 102 static int igb_set_mac(struct net_device *, void *);
 103 static irqreturn_t igb_intr(int irq, void *);
 104 static irqreturn_t igb_intr_msi(int irq, void *);
 105 static irqreturn_t igb_msix_other(int irq, void *);
 106 static irqreturn_t igb_msix_rx(int irq, void *);
 107 static irqreturn_t igb_msix_tx(int irq, void *);
 108 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
 109 #ifdef CONFIG_IGB_DCA
 110 static void igb_update_rx_dca(struct igb_ring *);
 111 static void igb_update_tx_dca(struct igb_ring *);
 112 static void igb_setup_dca(struct igb_adapter *);
 113 #endif /* CONFIG_IGB_DCA */
 114 static bool igb_clean_tx_irq(struct igb_ring *);
 115 static int igb_poll(struct napi_struct *, int);
 116 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
 117 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
 118 #ifdef CONFIG_IGB_LRO
 119 static int igb_get_skb_hdr(struct sk_buff *skb, void **, void **, u64 *, void *);
 120 #endif
 121 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 122 static void igb_tx_timeout(struct net_device *);
 123 static void igb_reset_task(struct work_struct *);
 124 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
 125 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 126 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 127 static void igb_restore_vlan(struct igb_adapter *);
 128
 129 static int igb_suspend(struct pci_dev *, pm_message_t);
 130 #ifdef CONFIG_PM
 131 static int igb_resume(struct pci_dev *);
 132 #endif
 133 static void igb_shutdown(struct pci_dev *);
 134 #ifdef CONFIG_IGB_DCA
 135 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 136 static struct notifier_block dca_notifier = {
 137         .notifier_call  = igb_notify_dca,
 138         .next           = NULL,
 139         .priority       = 0
 140 };
 141 #endif
 142
 143 #ifdef CONFIG_NET_POLL_CONTROLLER
 144 /* for netdump / net console */
 145 static void igb_netpoll(struct net_device *);
 146 #endif
 147
 148 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 149                      pci_channel_state_t);
 150 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 151 static void igb_io_resume(struct pci_dev *);
 152
 153 static struct pci_error_handlers igb_err_handler = {
 154         .error_detected = igb_io_error_detected,
 155         .slot_reset = igb_io_slot_reset,
 156         .resume = igb_io_resume,
 157 };
 158
 159
 160 static struct pci_driver igb_driver = {
 161         .name     = igb_driver_name,
 162         .id_table = igb_pci_tbl,
 163         .probe    = igb_probe,
 164         .remove   = __devexit_p(igb_remove),
 165 #ifdef CONFIG_PM
 166         /* Power Managment Hooks */
 167         .suspend  = igb_suspend,
 168         .resume   = igb_resume,
 169 #endif
 170         .shutdown = igb_shutdown,
 171         .err_handler = &igb_err_handler
 172 };
 173
 174 static int global_quad_port_a; /* global quad port a indication */
 175
 176 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 177 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 178 MODULE_LICENSE("GPL");
 179 MODULE_VERSION(DRV_VERSION);
 180
 181 #ifdef DEBUG
 182 /**
 183  * igb_get_hw_dev_name - return device name string
 184  * used by hardware layer to print debugging information
 185  **/
 186 char *igb_get_hw_dev_name(struct e1000_hw *hw)
 187 {
 188         struct igb_adapter *adapter = hw->back;
 189         return adapter->netdev->name;
 190 }
 191 #endif
 192
 193 /**
 194  * igb_init_module - Driver Registration Routine
 195  *
 196  * igb_init_module is the first routine called when the driver is
 197  * loaded. All it does is register with the PCI subsystem.
 198  **/
 199 static int __init igb_init_module(void)
 200 {
 201         int ret;
 202         printk(KERN_INFO "%s - version %s\n",
 203                igb_driver_string, igb_driver_version);
 204
 205         printk(KERN_INFO "%s\n", igb_copyright);
 206
 207         global_quad_port_a = 0;
 208
 209         ret = pci_register_driver(&igb_driver);
 210 #ifdef CONFIG_IGB_DCA
 211         dca_register_notify(&dca_notifier);
 212 #endif
 213         return ret;
 214 }
 215
 216 module_init(igb_init_module);
 217
 218 /**
 219  * igb_exit_module - Driver Exit Cleanup Routine
 220  *
 221  * igb_exit_module is called just before the driver is removed
 222  * from memory.
 223  **/
 224 static void __exit igb_exit_module(void)
 225 {
 226 #ifdef CONFIG_IGB_DCA
 227         dca_unregister_notify(&dca_notifier);
 228 #endif
 229         pci_unregister_driver(&igb_driver);
 230 }
 231
 232 module_exit(igb_exit_module);
 233
 234 /**
 235  * igb_alloc_queues - Allocate memory for all rings
 236  * @adapter: board private structure to initialize
 237  *
 238  * We allocate one ring per queue at run-time since we don't know the
 239  * number of queues at compile-time.
 240  **/
 241 static int igb_alloc_queues(struct igb_adapter *adapter)
 242 {
 243         int i;
 244
 245         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
 246                                    sizeof(struct igb_ring), GFP_KERNEL);
 247         if (!adapter->tx_ring)
 248                 return -ENOMEM;
 249
 250         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
 251                                    sizeof(struct igb_ring), GFP_KERNEL);
 252         if (!adapter->rx_ring) {
 253                 kfree(adapter->tx_ring);
 254                 return -ENOMEM;
 255         }
 256
 257         adapter->rx_ring->buddy = adapter->tx_ring;
 258
 259         for (i = 0; i < adapter->num_tx_queues; i++) {
 260                 struct igb_ring *ring = &(adapter->tx_ring[i]);
 261                 ring->count = adapter->tx_ring_count;
 262                 ring->adapter = adapter;
 263                 ring->queue_index = i;
 264         }
 265         for (i = 0; i < adapter->num_rx_queues; i++) {
 266                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 267                 ring->count = adapter->rx_ring_count;
 268                 ring->adapter = adapter;
 269                 ring->queue_index = i;
 270                 ring->itr_register = E1000_ITR;
 271
 272                 /* set a default napi handler for each rx_ring */
 273                 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
 274         }
 275         return 0;
 276 }
 277
 278 static void igb_free_queues(struct igb_adapter *adapter)
 279 {
 280         int i;
 281
 282         for (i = 0; i < adapter->num_rx_queues; i++)
 283                 netif_napi_del(&adapter->rx_ring[i].napi);
 284
 285         kfree(adapter->tx_ring);
 286         kfree(adapter->rx_ring);
 287 }
 288
 289 #define IGB_N0_QUEUE -1
 290 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
 291                               int tx_queue, int msix_vector)
 292 {
 293         u32 msixbm = 0;
 294         struct e1000_hw *hw = &adapter->hw;
 295         u32 ivar, index;
 296
 297         switch (hw->mac.type) {
 298         case e1000_82575:
 299                 /* The 82575 assigns vectors using a bitmask, which matches the
 300                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 301                    or more queues to a vector, we write the appropriate bits
 302                    into the MSIXBM register for that vector. */
 303                 if (rx_queue > IGB_N0_QUEUE) {
 304                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 305                         adapter->rx_ring[rx_queue].eims_value = msixbm;
 306                 }
 307                 if (tx_queue > IGB_N0_QUEUE) {
 308                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 309                         adapter->tx_ring[tx_queue].eims_value =
 310                                   E1000_EICR_TX_QUEUE0 << tx_queue;
 311                 }
 312                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 313                 break;
 314         case e1000_82576:
 315                 /* The 82576 uses a table-based method for assigning vectors.
 316                    Each queue has a single entry in the table to which we write
 317                    a vector number along with a "valid" bit.  Sadly, the layout
 318                    of the table is somewhat counterintuitive. */
 319                 if (rx_queue > IGB_N0_QUEUE) {
 320                         index = (rx_queue & 0x7);
 321                         ivar = array_rd32(E1000_IVAR0, index);
 322                         if (rx_queue < 8) {
 323                                 /* vector goes into low byte of register */
 324                                 ivar = ivar & 0xFFFFFF00;
 325                                 ivar |= msix_vector | E1000_IVAR_VALID;
 326                         } else {
 327                                 /* vector goes into third byte of register */
 328                                 ivar = ivar & 0xFF00FFFF;
 329                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
 330                         }
 331                         adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
 332                         array_wr32(E1000_IVAR0, index, ivar);
 333                 }
 334                 if (tx_queue > IGB_N0_QUEUE) {
 335                         index = (tx_queue & 0x7);
 336                         ivar = array_rd32(E1000_IVAR0, index);
 337                         if (tx_queue < 8) {
 338                                 /* vector goes into second byte of register */
 339                                 ivar = ivar & 0xFFFF00FF;
 340                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
 341                         } else {
 342                                 /* vector goes into high byte of register */
 343                                 ivar = ivar & 0x00FFFFFF;
 344                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
 345                         }
 346                         adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
 347                         array_wr32(E1000_IVAR0, index, ivar);
 348                 }
 349                 break;
 350         default:
 351                 BUG();
 352                 break;
 353         }
 354 }
 355
 356 /**
 357  * igb_configure_msix - Configure MSI-X hardware
 358  *
 359  * igb_configure_msix sets up the hardware to properly
 360  * generate MSI-X interrupts.
 361  **/
 362 static void igb_configure_msix(struct igb_adapter *adapter)
 363 {
 364         u32 tmp;
 365         int i, vector = 0;
 366         struct e1000_hw *hw = &adapter->hw;
 367
 368         adapter->eims_enable_mask = 0;
 369         if (hw->mac.type == e1000_82576)
 370                 /* Turn on MSI-X capability first, or our settings
 371                  * won't stick.  And it will take days to debug. */
 372                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 373                                    E1000_GPIE_PBA | E1000_GPIE_EIAME |
 374                                    E1000_GPIE_NSICR);
 375
 376         for (i = 0; i < adapter->num_tx_queues; i++) {
 377                 struct igb_ring *tx_ring = &adapter->tx_ring[i];
 378                 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
 379                 adapter->eims_enable_mask |= tx_ring->eims_value;
 380                 if (tx_ring->itr_val)
 381                         writel(tx_ring->itr_val,
 382                                hw->hw_addr + tx_ring->itr_register);
 383                 else
 384                         writel(1, hw->hw_addr + tx_ring->itr_register);
 385         }
 386
 387         for (i = 0; i < adapter->num_rx_queues; i++) {
 388                 struct igb_ring *rx_ring = &adapter->rx_ring[i];
 389                 rx_ring->buddy = NULL;
 390                 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
 391                 adapter->eims_enable_mask |= rx_ring->eims_value;
 392                 if (rx_ring->itr_val)
 393                         writel(rx_ring->itr_val,
 394                                hw->hw_addr + rx_ring->itr_register);
 395                 else
 396                         writel(1, hw->hw_addr + rx_ring->itr_register);
 397         }
 398
 399
 400         /* set vector for other causes, i.e. link changes */
 401         switch (hw->mac.type) {
 402         case e1000_82575:
 403                 array_wr32(E1000_MSIXBM(0), vector++,
 404                                       E1000_EIMS_OTHER);
 405
 406                 tmp = rd32(E1000_CTRL_EXT);
 407                 /* enable MSI-X PBA support*/
 408                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 409
 410                 /* Auto-Mask interrupts upon ICR read. */
 411                 tmp |= E1000_CTRL_EXT_EIAME;
 412                 tmp |= E1000_CTRL_EXT_IRCA;
 413
 414                 wr32(E1000_CTRL_EXT, tmp);
 415                 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
 416                 adapter->eims_other = E1000_EIMS_OTHER;
 417
 418                 break;
 419
 420         case e1000_82576:
 421                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 422                 wr32(E1000_IVAR_MISC, tmp);
 423
 424                 adapter->eims_enable_mask = (1 << (vector)) - 1;
 425                 adapter->eims_other = 1 << (vector - 1);
 426                 break;
 427         default:
 428                 /* do nothing, since nothing else supports MSI-X */
 429                 break;
 430         } /* switch (hw->mac.type) */
 431         wrfl();
 432 }
 433
 434 /**
 435  * igb_request_msix - Initialize MSI-X interrupts
 436  *
 437  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 438  * kernel.
 439  **/
 440 static int igb_request_msix(struct igb_adapter *adapter)
 441 {
 442         struct net_device *netdev = adapter->netdev;
 443         int i, err = 0, vector = 0;
 444
 445         vector = 0;
 446
 447         for (i = 0; i < adapter->num_tx_queues; i++) {
 448                 struct igb_ring *ring = &(adapter->tx_ring[i]);
 449                 sprintf(ring->name, "%s-tx-%d", netdev->name, i);
 450                 err = request_irq(adapter->msix_entries[vector].vector,
 451                                   &igb_msix_tx, 0, ring->name,
 452                                   &(adapter->tx_ring[i]));
 453                 if (err)
 454                         goto out;
 455                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 456                 ring->itr_val = 976; /* ~4000 ints/sec */
 457                 vector++;
 458         }
 459         for (i = 0; i < adapter->num_rx_queues; i++) {
 460                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 461                 if (strlen(netdev->name) < (IFNAMSIZ - 5))
 462                         sprintf(ring->name, "%s-rx-%d", netdev->name, i);
 463                 else
 464                         memcpy(ring->name, netdev->name, IFNAMSIZ);
 465                 err = request_irq(adapter->msix_entries[vector].vector,
 466                                   &igb_msix_rx, 0, ring->name,
 467                                   &(adapter->rx_ring[i]));
 468                 if (err)
 469                         goto out;
 470                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 471                 ring->itr_val = adapter->itr;
 472                 /* overwrite the poll routine for MSIX, we've already done
 473                  * netif_napi_add */
 474                 ring->napi.poll = &igb_clean_rx_ring_msix;
 475                 vector++;
 476         }
 477
 478         err = request_irq(adapter->msix_entries[vector].vector,
 479                           &igb_msix_other, 0, netdev->name, netdev);
 480         if (err)
 481                 goto out;
 482
 483         igb_configure_msix(adapter);
 484         return 0;
 485 out:
 486         return err;
 487 }
 488
 489 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 490 {
 491         if (adapter->msix_entries) {
 492                 pci_disable_msix(adapter->pdev);
 493                 kfree(adapter->msix_entries);
 494                 adapter->msix_entries = NULL;
 495         } else if (adapter->flags & IGB_FLAG_HAS_MSI)
 496                 pci_disable_msi(adapter->pdev);
 497         return;
 498 }
 499
 500
 501 /**
 502  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 503  *
 504  * Attempt to configure interrupts using the best available
 505  * capabilities of the hardware and kernel.
 506  **/
 507 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
 508 {
 509         int err;
 510         int numvecs, i;
 511
 512         numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
 513         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
 514                                         GFP_KERNEL);
 515         if (!adapter->msix_entries)
 516                 goto msi_only;
 517
 518         for (i = 0; i < numvecs; i++)
 519                 adapter->msix_entries[i].entry = i;
 520
 521         err = pci_enable_msix(adapter->pdev,
 522                               adapter->msix_entries,
 523                               numvecs);
 524         if (err == 0)
 525                 goto out;
 526
 527         igb_reset_interrupt_capability(adapter);
 528
 529         /* If we can't do MSI-X, try MSI */
 530 msi_only:
 531         adapter->num_rx_queues = 1;
 532         adapter->num_tx_queues = 1;
 533         if (!pci_enable_msi(adapter->pdev))
 534                 adapter->flags |= IGB_FLAG_HAS_MSI;
 535 out:
 536         /* Notify the stack of the (possibly) reduced Tx Queue count. */
 537         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
 538         return;
 539 }
 540
 541 /**
 542  * igb_request_irq - initialize interrupts
 543  *
 544  * Attempts to configure interrupts using the best available
 545  * capabilities of the hardware and kernel.
 546  **/
 547 static int igb_request_irq(struct igb_adapter *adapter)
 548 {
 549         struct net_device *netdev = adapter->netdev;
 550         struct e1000_hw *hw = &adapter->hw;
 551         int err = 0;
 552
 553         if (adapter->msix_entries) {
 554                 err = igb_request_msix(adapter);
 555                 if (!err)
 556                         goto request_done;
 557                 /* fall back to MSI */
 558                 igb_reset_interrupt_capability(adapter);
 559                 if (!pci_enable_msi(adapter->pdev))
 560                         adapter->flags |= IGB_FLAG_HAS_MSI;
 561                 igb_free_all_tx_resources(adapter);
 562                 igb_free_all_rx_resources(adapter);
 563                 adapter->num_rx_queues = 1;
 564                 igb_alloc_queues(adapter);
 565         } else {
 566                 switch (hw->mac.type) {
 567                 case e1000_82575:
 568                         wr32(E1000_MSIXBM(0),
 569                              (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
 570                         break;
 571                 case e1000_82576:
 572                         wr32(E1000_IVAR0, E1000_IVAR_VALID);
 573                         break;
 574                 default:
 575                         break;
 576                 }
 577         }
 578
 579         if (adapter->flags & IGB_FLAG_HAS_MSI) {
 580                 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
 581                                   netdev->name, netdev);
 582                 if (!err)
 583                         goto request_done;
 584                 /* fall back to legacy interrupts */
 585                 igb_reset_interrupt_capability(adapter);
 586                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
 587         }
 588
 589         err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
 590                           netdev->name, netdev);
 591
 592         if (err)
 593                 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
 594                         err);
 595
 596 request_done:
 597         return err;
 598 }
 599
 600 static void igb_free_irq(struct igb_adapter *adapter)
 601 {
 602         struct net_device *netdev = adapter->netdev;
 603
 604         if (adapter->msix_entries) {
 605                 int vector = 0, i;
 606
 607                 for (i = 0; i < adapter->num_tx_queues; i++)
 608                         free_irq(adapter->msix_entries[vector++].vector,
 609                                 &(adapter->tx_ring[i]));
 610                 for (i = 0; i < adapter->num_rx_queues; i++)
 611                         free_irq(adapter->msix_entries[vector++].vector,
 612                                 &(adapter->rx_ring[i]));
 613
 614                 free_irq(adapter->msix_entries[vector++].vector, netdev);
 615                 return;
 616         }
 617
 618         free_irq(adapter->pdev->irq, netdev);
 619 }
 620
 621 /**
 622  * igb_irq_disable - Mask off interrupt generation on the NIC
 623  * @adapter: board private structure
 624  **/
 625 static void igb_irq_disable(struct igb_adapter *adapter)
 626 {
 627         struct e1000_hw *hw = &adapter->hw;
 628
 629         if (adapter->msix_entries) {
 630                 wr32(E1000_EIAM, 0);
 631                 wr32(E1000_EIMC, ~0);
 632                 wr32(E1000_EIAC, 0);
 633         }
 634
 635         wr32(E1000_IAM, 0);
 636         wr32(E1000_IMC, ~0);
 637         wrfl();
 638         synchronize_irq(adapter->pdev->irq);
 639 }
 640
 641 /**
 642  * igb_irq_enable - Enable default interrupt generation settings
 643  * @adapter: board private structure
 644  **/
 645 static void igb_irq_enable(struct igb_adapter *adapter)
 646 {
 647         struct e1000_hw *hw = &adapter->hw;
 648
 649         if (adapter->msix_entries) {
 650                 wr32(E1000_EIAC, adapter->eims_enable_mask);
 651                 wr32(E1000_EIAM, adapter->eims_enable_mask);
 652                 wr32(E1000_EIMS, adapter->eims_enable_mask);
 653                 wr32(E1000_IMS, E1000_IMS_LSC);
 654         } else {
 655                 wr32(E1000_IMS, IMS_ENABLE_MASK);
 656                 wr32(E1000_IAM, IMS_ENABLE_MASK);
 657         }
 658 }
 659
 660 static void igb_update_mng_vlan(struct igb_adapter *adapter)
 661 {
 662         struct net_device *netdev = adapter->netdev;
 663         u16 vid = adapter->hw.mng_cookie.vlan_id;
 664         u16 old_vid = adapter->mng_vlan_id;
 665         if (adapter->vlgrp) {
 666                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
 667                         if (adapter->hw.mng_cookie.status &
 668                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
 669                                 igb_vlan_rx_add_vid(netdev, vid);
 670                                 adapter->mng_vlan_id = vid;
 671                         } else
 672                                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
 673
 674                         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
 675                                         (vid != old_vid) &&
 676                             !vlan_group_get_device(adapter->vlgrp, old_vid))
 677                                 igb_vlan_rx_kill_vid(netdev, old_vid);
 678                 } else
 679                         adapter->mng_vlan_id = vid;
 680         }
 681 }
 682
 683 /**
 684  * igb_release_hw_control - release control of the h/w to f/w
 685  * @adapter: address of board private structure
 686  *
 687  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
 688  * For ASF and Pass Through versions of f/w this means that the
 689  * driver is no longer loaded.
 690  *
 691  **/
 692 static void igb_release_hw_control(struct igb_adapter *adapter)
 693 {
 694         struct e1000_hw *hw = &adapter->hw;
 695         u32 ctrl_ext;
 696
 697         /* Let firmware take over control of h/w */
 698         ctrl_ext = rd32(E1000_CTRL_EXT);
 699         wr32(E1000_CTRL_EXT,
 700                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
 701 }
 702
 703
 704 /**
 705  * igb_get_hw_control - get control of the h/w from f/w
 706  * @adapter: address of board private structure
 707  *
 708  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
 709  * For ASF and Pass Through versions of f/w this means that
 710  * the driver is loaded.
 711  *
 712  **/
 713 static void igb_get_hw_control(struct igb_adapter *adapter)
 714 {
 715         struct e1000_hw *hw = &adapter->hw;
 716         u32 ctrl_ext;
 717
 718         /* Let firmware know the driver has taken over */
 719         ctrl_ext = rd32(E1000_CTRL_EXT);
 720         wr32(E1000_CTRL_EXT,
 721                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
 722 }
 723
 724 /**
 725  * igb_configure - configure the hardware for RX and TX
 726  * @adapter: private board structure
 727  **/
 728 static void igb_configure(struct igb_adapter *adapter)
 729 {
 730         struct net_device *netdev = adapter->netdev;
 731         int i;
 732
 733         igb_get_hw_control(adapter);
 734         igb_set_multi(netdev);
 735
 736         igb_restore_vlan(adapter);
 737
 738         igb_configure_tx(adapter);
 739         igb_setup_rctl(adapter);
 740         igb_configure_rx(adapter);
 741
 742         igb_rx_fifo_flush_82575(&adapter->hw);
 743
 744         /* call IGB_DESC_UNUSED which always leaves
 745          * at least 1 descriptor unused to make sure
 746          * next_to_use != next_to_clean */
 747         for (i = 0; i < adapter->num_rx_queues; i++) {
 748                 struct igb_ring *ring = &adapter->rx_ring[i];
 749                 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
 750         }
 751
 752
 753         adapter->tx_queue_len = netdev->tx_queue_len;
 754 }
 755
 756
 757 /**
 758  * igb_up - Open the interface and prepare it to handle traffic
 759  * @adapter: board private structure
 760  **/
 761
 762 int igb_up(struct igb_adapter *adapter)
 763 {
 764         struct e1000_hw *hw = &adapter->hw;
 765         int i;
 766
 767         /* hardware has been reset, we need to reload some things */
 768         igb_configure(adapter);
 769
 770         clear_bit(__IGB_DOWN, &adapter->state);
 771
 772         for (i = 0; i < adapter->num_rx_queues; i++)
 773                 napi_enable(&adapter->rx_ring[i].napi);
 774         if (adapter->msix_entries)
 775                 igb_configure_msix(adapter);
 776
 777         /* Clear any pending interrupts. */
 778         rd32(E1000_ICR);
 779         igb_irq_enable(adapter);
 780
 781         /* Fire a link change interrupt to start the watchdog. */
 782         wr32(E1000_ICS, E1000_ICS_LSC);
 783         return 0;
 784 }
 785
 786 void igb_down(struct igb_adapter *adapter)
 787 {
 788         struct e1000_hw *hw = &adapter->hw;
 789         struct net_device *netdev = adapter->netdev;
 790         u32 tctl, rctl;
 791         int i;
 792
 793         /* signal that we're down so the interrupt handler does not
 794          * reschedule our watchdog timer */
 795         set_bit(__IGB_DOWN, &adapter->state);
 796
 797         /* disable receives in the hardware */
 798         rctl = rd32(E1000_RCTL);
 799         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
 800         /* flush and sleep below */
 801
 802         netif_tx_stop_all_queues(netdev);
 803
 804         /* disable transmits in the hardware */
 805         tctl = rd32(E1000_TCTL);
 806         tctl &= ~E1000_TCTL_EN;
 807         wr32(E1000_TCTL, tctl);
 808         /* flush both disables and wait for them to finish */
 809         wrfl();
 810         msleep(10);
 811
 812         for (i = 0; i < adapter->num_rx_queues; i++)
 813                 napi_disable(&adapter->rx_ring[i].napi);
 814
 815         igb_irq_disable(adapter);
 816
 817         del_timer_sync(&adapter->watchdog_timer);
 818         del_timer_sync(&adapter->phy_info_timer);
 819
 820         netdev->tx_queue_len = adapter->tx_queue_len;
 821         netif_carrier_off(netdev);
 822         adapter->link_speed = 0;
 823         adapter->link_duplex = 0;
 824
 825         if (!pci_channel_offline(adapter->pdev))
 826                 igb_reset(adapter);
 827         igb_clean_all_tx_rings(adapter);
 828         igb_clean_all_rx_rings(adapter);
 829 }
 830
 831 void igb_reinit_locked(struct igb_adapter *adapter)
 832 {
 833         WARN_ON(in_interrupt());
 834         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 835                 msleep(1);
 836         igb_down(adapter);
 837         igb_up(adapter);
 838         clear_bit(__IGB_RESETTING, &adapter->state);
 839 }
 840
 841 void igb_reset(struct igb_adapter *adapter)
 842 {
 843         struct e1000_hw *hw = &adapter->hw;
 844         struct e1000_mac_info *mac = &hw->mac;
 845         struct e1000_fc_info *fc = &hw->fc;
 846         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
 847         u16 hwm;
 848
 849         /* Repartition Pba for greater than 9k mtu
 850          * To take effect CTRL.RST is required.
 851          */
 852         if (mac->type != e1000_82576) {
 853         pba = E1000_PBA_34K;
 854         }
 855         else {
 856                 pba = E1000_PBA_64K;
 857         }
 858
 859         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
 860             (mac->type < e1000_82576)) {
 861                 /* adjust PBA for jumbo frames */
 862                 wr32(E1000_PBA, pba);
 863
 864                 /* To maintain wire speed transmits, the Tx FIFO should be
 865                  * large enough to accommodate two full transmit packets,
 866                  * rounded up to the next 1KB and expressed in KB.  Likewise,
 867                  * the Rx FIFO should be large enough to accommodate at least
 868                  * one full receive packet and is similarly rounded up and
 869                  * expressed in KB. */
 870                 pba = rd32(E1000_PBA);
 871                 /* upper 16 bits has Tx packet buffer allocation size in KB */
 872                 tx_space = pba >> 16;
 873                 /* lower 16 bits has Rx packet buffer allocation size in KB */
 874                 pba &= 0xffff;
 875                 /* the tx fifo also stores 16 bytes of information about the tx
 876                  * but don't include ethernet FCS because hardware appends it */
 877                 min_tx_space = (adapter->max_frame_size +
 878                                 sizeof(struct e1000_tx_desc) -
 879                                 ETH_FCS_LEN) * 2;
 880                 min_tx_space = ALIGN(min_tx_space, 1024);
 881                 min_tx_space >>= 10;
 882                 /* software strips receive CRC, so leave room for it */
 883                 min_rx_space = adapter->max_frame_size;
 884                 min_rx_space = ALIGN(min_rx_space, 1024);
 885                 min_rx_space >>= 10;
 886
 887                 /* If current Tx allocation is less than the min Tx FIFO size,
 888                  * and the min Tx FIFO size is less than the current Rx FIFO
 889                  * allocation, take space away from current Rx allocation */
 890                 if (tx_space < min_tx_space &&
 891                     ((min_tx_space - tx_space) < pba)) {
 892                         pba = pba - (min_tx_space - tx_space);
 893
 894                         /* if short on rx space, rx wins and must trump tx
 895                          * adjustment */
 896                         if (pba < min_rx_space)
 897                                 pba = min_rx_space;
 898                 }
 899                 wr32(E1000_PBA, pba);
 900         }
 901
 902         /* flow control settings */
 903         /* The high water mark must be low enough to fit one full frame
 904          * (or the size used for early receive) above it in the Rx FIFO.
 905          * Set it to the lower of:
 906          * - 90% of the Rx FIFO size, or
 907          * - the full Rx FIFO size minus one full frame */
 908         hwm = min(((pba << 10) * 9 / 10),
 909                         ((pba << 10) - 2 * adapter->max_frame_size));
 910
 911         if (mac->type < e1000_82576) {
 912                 fc->high_water = hwm & 0xFFF8;  /* 8-byte granularity */
 913                 fc->low_water = fc->high_water - 8;
 914         } else {
 915                 fc->high_water = hwm & 0xFFF0;  /* 16-byte granularity */
 916                 fc->low_water = fc->high_water - 16;
 917         }
 918         fc->pause_time = 0xFFFF;
 919         fc->send_xon = 1;
 920         fc->type = fc->original_type;
 921
 922         /* Allow time for pending master requests to run */
 923         adapter->hw.mac.ops.reset_hw(&adapter->hw);
 924         wr32(E1000_WUC, 0);
 925
 926         if (adapter->hw.mac.ops.init_hw(&adapter->hw))
 927                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
 928
 929         igb_update_mng_vlan(adapter);
 930
 931         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
 932         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
 933
 934         igb_reset_adaptive(&adapter->hw);
 935         igb_get_phy_info(&adapter->hw);
 936 }
 937
 938 /**
 939  * igb_is_need_ioport - determine if an adapter needs ioport resources or not
 940  * @pdev: PCI device information struct
 941  *
 942  * Returns true if an adapter needs ioport resources
 943  **/
 944 static int igb_is_need_ioport(struct pci_dev *pdev)
 945 {
 946         switch (pdev->device) {
 947         /* Currently there are no adapters that need ioport resources */
 948         default:
 949                 return false;
 950         }
 951 }
 952
 953 static const struct net_device_ops igb_netdev_ops = {
 954         .ndo_open               = igb_open,
 955         .ndo_stop               = igb_close,
 956         .ndo_start_xmit         = igb_xmit_frame_adv,
 957         .ndo_get_stats          = igb_get_stats,
 958         .ndo_set_multicast_list = igb_set_multi,
 959         .ndo_set_mac_address    = igb_set_mac,
 960         .ndo_change_mtu         = igb_change_mtu,
 961         .ndo_do_ioctl           = igb_ioctl,
 962         .ndo_tx_timeout         = igb_tx_timeout,
 963         .ndo_validate_addr      = eth_validate_addr,
 964         .ndo_vlan_rx_register   = igb_vlan_rx_register,
 965         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
 966         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
 967 #ifdef CONFIG_NET_POLL_CONTROLLER
 968         .ndo_poll_controller    = igb_netpoll,
 969 #endif
 970 };
 971
 972 /**
 973  * igb_probe - Device Initialization Routine
 974  * @pdev: PCI device information struct
 975  * @ent: entry in igb_pci_tbl
 976  *
 977  * Returns 0 on success, negative on failure
 978  *
 979  * igb_probe initializes an adapter identified by a pci_dev structure.
 980  * The OS initialization, configuring of the adapter private structure,
 981  * and a hardware reset occur.
 982  **/
 983 static int __devinit igb_probe(struct pci_dev *pdev,
 984                                const struct pci_device_id *ent)
 985 {
 986         struct net_device *netdev;
 987         struct igb_adapter *adapter;
 988         struct e1000_hw *hw;
 989         struct pci_dev *us_dev;
 990         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
 991         unsigned long mmio_start, mmio_len;
 992         int i, err, pci_using_dac, pos;
 993         u16 eeprom_data = 0, state = 0;
 994         u16 eeprom_apme_mask = IGB_EEPROM_APME;
 995         u32 part_num;
 996         int bars, need_ioport;
 997
 998         /* do not allocate ioport bars when not needed */
 999         need_ioport = igb_is_need_ioport(pdev);
1000         if (need_ioport) {
1001                 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
1002                 err = pci_enable_device(pdev);
1003         } else {
1004                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1005                 err = pci_enable_device_mem(pdev);
1006         }
1007         if (err)
1008                 return err;
1009
1010         pci_using_dac = 0;
1011         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1012         if (!err) {
1013                 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1014                 if (!err)
1015                         pci_using_dac = 1;
1016         } else {
1017                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1018                 if (err) {
1019                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1020                         if (err) {
1021                                 dev_err(&pdev->dev, "No usable DMA "
1022                                         "configuration, aborting\n");
1023                                 goto err_dma;
1024                         }
1025                 }
1026         }
1027
1028         /* 82575 requires that the pci-e link partner disable the L0s state */
1029         switch (pdev->device) {
1030         case E1000_DEV_ID_82575EB_COPPER:
1031         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1032         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1033                 us_dev = pdev->bus->self;
1034                 pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
1035                 if (pos) {
1036                         pci_read_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1037                                              &state);
1038                         state &= ~PCIE_LINK_STATE_L0S;
1039                         pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1040                                               state);
1041                         dev_info(&pdev->dev,
1042                                  "Disabling ASPM L0s upstream switch port %s\n",
1043                                  pci_name(us_dev));
1044                 }
1045         default:
1046                 break;
1047         }
1048
1049         err = pci_request_selected_regions(pdev, bars, igb_driver_name);
1050         if (err)
1051                 goto err_pci_reg;
1052
1053         err = pci_enable_pcie_error_reporting(pdev);
1054         if (err) {
1055                 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
1056                         "0x%x\n", err);
1057                 /* non-fatal, continue */
1058         }
1059
1060         pci_set_master(pdev);
1061         pci_save_state(pdev);
1062
1063         err = -ENOMEM;
1064         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
1065         if (!netdev)
1066                 goto err_alloc_etherdev;
1067
1068         SET_NETDEV_DEV(netdev, &pdev->dev);
1069
1070         pci_set_drvdata(pdev, netdev);
1071         adapter = netdev_priv(netdev);
1072         adapter->netdev = netdev;
1073         adapter->pdev = pdev;
1074         hw = &adapter->hw;
1075         hw->back = adapter;
1076         adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1077         adapter->bars = bars;
1078         adapter->need_ioport = need_ioport;
1079
1080         mmio_start = pci_resource_start(pdev, 0);
1081         mmio_len = pci_resource_len(pdev, 0);
1082
1083         err = -EIO;
1084         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1085         if (!adapter->hw.hw_addr)
1086                 goto err_ioremap;
1087
1088         netdev->netdev_ops = &igb_netdev_ops;
1089         igb_set_ethtool_ops(netdev);
1090         netdev->watchdog_timeo = 5 * HZ;
1091
1092         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1093
1094         netdev->mem_start = mmio_start;
1095         netdev->mem_end = mmio_start + mmio_len;
1096
1097         /* PCI config space info */
1098         hw->vendor_id = pdev->vendor;
1099         hw->device_id = pdev->device;
1100         hw->revision_id = pdev->revision;
1101         hw->subsystem_vendor_id = pdev->subsystem_vendor;
1102         hw->subsystem_device_id = pdev->subsystem_device;
1103
1104         /* setup the private structure */
1105         hw->back = adapter;
1106         /* Copy the default MAC, PHY and NVM function pointers */
1107         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1108         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1109         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1110         /* Initialize skew-specific constants */
1111         err = ei->get_invariants(hw);
1112         if (err)
1113                 goto err_hw_init;
1114
1115         err = igb_sw_init(adapter);
1116         if (err)
1117                 goto err_sw_init;
1118
1119         igb_get_bus_info_pcie(hw);
1120
1121         /* set flags */
1122         switch (hw->mac.type) {
1123         case e1000_82576:
1124         case e1000_82575:
1125                 adapter->flags |= IGB_FLAG_HAS_DCA;
1126                 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
1127                 break;
1128         default:
1129                 break;
1130         }
1131
1132         hw->phy.autoneg_wait_to_complete = false;
1133         hw->mac.adaptive_ifs = true;
1134
1135         /* Copper options */
1136         if (hw->phy.media_type == e1000_media_type_copper) {
1137                 hw->phy.mdix = AUTO_ALL_MODES;
1138                 hw->phy.disable_polarity_correction = false;
1139                 hw->phy.ms_type = e1000_ms_hw_default;
1140         }
1141
1142         if (igb_check_reset_block(hw))
1143                 dev_info(&pdev->dev,
1144                         "PHY reset is blocked due to SOL/IDER session.\n");
1145
1146         netdev->features = NETIF_F_SG |
1147                            NETIF_F_HW_CSUM |
1148                            NETIF_F_HW_VLAN_TX |
1149                            NETIF_F_HW_VLAN_RX |
1150                            NETIF_F_HW_VLAN_FILTER;
1151
1152         netdev->features |= NETIF_F_TSO;
1153         netdev->features |= NETIF_F_TSO6;
1154
1155 #ifdef CONFIG_IGB_LRO
1156         netdev->features |= NETIF_F_LRO;
1157 #endif
1158
1159         netdev->vlan_features |= NETIF_F_TSO;
1160         netdev->vlan_features |= NETIF_F_TSO6;
1161         netdev->vlan_features |= NETIF_F_HW_CSUM;
1162         netdev->vlan_features |= NETIF_F_SG;
1163
1164         if (pci_using_dac)
1165                 netdev->features |= NETIF_F_HIGHDMA;
1166
1167         netdev->features |= NETIF_F_LLTX;
1168         adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1169
1170         /* before reading the NVM, reset the controller to put the device in a
1171          * known good starting state */
1172         hw->mac.ops.reset_hw(hw);
1173
1174         /* make sure the NVM is good */
1175         if (igb_validate_nvm_checksum(hw) < 0) {
1176                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1177                 err = -EIO;
1178                 goto err_eeprom;
1179         }
1180
1181         /* copy the MAC address out of the NVM */
1182         if (hw->mac.ops.read_mac_addr(hw))
1183                 dev_err(&pdev->dev, "NVM Read Error\n");
1184
1185         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1186         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1187
1188         if (!is_valid_ether_addr(netdev->perm_addr)) {
1189                 dev_err(&pdev->dev, "Invalid MAC Address\n");
1190                 err = -EIO;
1191                 goto err_eeprom;
1192         }
1193
1194         init_timer(&adapter->watchdog_timer);
1195         adapter->watchdog_timer.function = &igb_watchdog;
1196         adapter->watchdog_timer.data = (unsigned long) adapter;
1197
1198         init_timer(&adapter->phy_info_timer);
1199         adapter->phy_info_timer.function = &igb_update_phy_info;
1200         adapter->phy_info_timer.data = (unsigned long) adapter;
1201
1202         INIT_WORK(&adapter->reset_task, igb_reset_task);
1203         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1204
1205         /* Initialize link & ring properties that are user-changeable */
1206         adapter->tx_ring->count = 256;
1207         for (i = 0; i < adapter->num_tx_queues; i++)
1208                 adapter->tx_ring[i].count = adapter->tx_ring->count;
1209         adapter->rx_ring->count = 256;
1210         for (i = 0; i < adapter->num_rx_queues; i++)
1211                 adapter->rx_ring[i].count = adapter->rx_ring->count;
1212
1213         adapter->fc_autoneg = true;
1214         hw->mac.autoneg = true;
1215         hw->phy.autoneg_advertised = 0x2f;
1216
1217         hw->fc.original_type = e1000_fc_default;
1218         hw->fc.type = e1000_fc_default;
1219
1220         adapter->itr_setting = 3;
1221         adapter->itr = IGB_START_ITR;
1222
1223         igb_validate_mdi_setting(hw);
1224
1225         adapter->rx_csum = 1;
1226
1227         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1228          * enable the ACPI Magic Packet filter
1229          */
1230
1231         if (hw->bus.func == 0 ||
1232             hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1233                 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1234                                      &eeprom_data);
1235
1236         if (eeprom_data & eeprom_apme_mask)
1237                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1238
1239         /* now that we have the eeprom settings, apply the special cases where
1240          * the eeprom may be wrong or the board simply won't support wake on
1241          * lan on a particular port */
1242         switch (pdev->device) {
1243         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1244                 adapter->eeprom_wol = 0;
1245                 break;
1246         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1247         case E1000_DEV_ID_82576_FIBER:
1248         case E1000_DEV_ID_82576_SERDES:
1249                 /* Wake events only supported on port A for dual fiber
1250                  * regardless of eeprom setting */
1251                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1252                         adapter->eeprom_wol = 0;
1253                 break;
1254         }
1255
1256         /* initialize the wol settings based on the eeprom settings */
1257         adapter->wol = adapter->eeprom_wol;
1258         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1259
1260         /* reset the hardware with the new settings */
1261         igb_reset(adapter);
1262
1263         /* let the f/w know that the h/w is now under the control of the
1264          * driver. */
1265         igb_get_hw_control(adapter);
1266
1267         /* tell the stack to leave us alone until igb_open() is called */
1268         netif_carrier_off(netdev);
1269         netif_tx_stop_all_queues(netdev);
1270
1271         strcpy(netdev->name, "eth%d");
1272         err = register_netdev(netdev);
1273         if (err)
1274                 goto err_register;
1275
1276 #ifdef CONFIG_IGB_DCA
1277         if ((adapter->flags & IGB_FLAG_HAS_DCA) &&
1278             (dca_add_requester(&pdev->dev) == 0)) {
1279                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
1280                 dev_info(&pdev->dev, "DCA enabled\n");
1281                 /* Always use CB2 mode, difference is masked
1282                  * in the CB driver. */
1283                 wr32(E1000_DCA_CTRL, 2);
1284                 igb_setup_dca(adapter);
1285         }
1286 #endif
1287
1288         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1289         /* print bus type/speed/width info */
1290         dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
1291                  netdev->name,
1292                  ((hw->bus.speed == e1000_bus_speed_2500)
1293                   ? "2.5Gb/s" : "unknown"),
1294                  ((hw->bus.width == e1000_bus_width_pcie_x4)
1295                   ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1296                   ? "Width x1" : "unknown"),
1297                  netdev->dev_addr);
1298
1299         igb_read_part_num(hw, &part_num);
1300         dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1301                 (part_num >> 8), (part_num & 0xff));
1302
1303         dev_info(&pdev->dev,
1304                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1305                 adapter->msix_entries ? "MSI-X" :
1306                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
1307                 adapter->num_rx_queues, adapter->num_tx_queues);
1308
1309         return 0;
1310
1311 err_register:
1312         igb_release_hw_control(adapter);
1313 err_eeprom:
1314         if (!igb_check_reset_block(hw))
1315                 igb_reset_phy(hw);
1316
1317         if (hw->flash_address)
1318                 iounmap(hw->flash_address);
1319
1320         igb_remove_device(hw);
1321         igb_free_queues(adapter);
1322 err_sw_init:
1323 err_hw_init:
1324         iounmap(hw->hw_addr);
1325 err_ioremap:
1326         free_netdev(netdev);
1327 err_alloc_etherdev:
1328         pci_release_selected_regions(pdev, bars);
1329 err_pci_reg:
1330 err_dma:
1331         pci_disable_device(pdev);
1332         return err;
1333 }
1334
1335 /**
1336  * igb_remove - Device Removal Routine
1337  * @pdev: PCI device information struct
1338  *
1339  * igb_remove is called by the PCI subsystem to alert the driver
1340  * that it should release a PCI device.  The could be caused by a
1341  * Hot-Plug event, or because the driver is going to be removed from
1342  * memory.
1343  **/
1344 static void __devexit igb_remove(struct pci_dev *pdev)
1345 {
1346         struct net_device *netdev = pci_get_drvdata(pdev);
1347         struct igb_adapter *adapter = netdev_priv(netdev);
1348 #ifdef CONFIG_IGB_DCA
1349         struct e1000_hw *hw = &adapter->hw;
1350 #endif
1351         int err;
1352
1353         /* flush_scheduled work may reschedule our watchdog task, so
1354          * explicitly disable watchdog tasks from being rescheduled  */
1355         set_bit(__IGB_DOWN, &adapter->state);
1356         del_timer_sync(&adapter->watchdog_timer);
1357         del_timer_sync(&adapter->phy_info_timer);
1358
1359         flush_scheduled_work();
1360
1361 #ifdef CONFIG_IGB_DCA
1362         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
1363                 dev_info(&pdev->dev, "DCA disabled\n");
1364                 dca_remove_requester(&pdev->dev);
1365                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
1366                 wr32(E1000_DCA_CTRL, 1);
1367         }
1368 #endif
1369
1370         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1371          * would have already happened in close and is redundant. */
1372         igb_release_hw_control(adapter);
1373
1374         unregister_netdev(netdev);
1375
1376         if (!igb_check_reset_block(&adapter->hw))
1377                 igb_reset_phy(&adapter->hw);
1378
1379         igb_remove_device(&adapter->hw);
1380         igb_reset_interrupt_capability(adapter);
1381
1382         igb_free_queues(adapter);
1383
1384         iounmap(adapter->hw.hw_addr);
1385         if (adapter->hw.flash_address)
1386                 iounmap(adapter->hw.flash_address);
1387         pci_release_selected_regions(pdev, adapter->bars);
1388
1389         free_netdev(netdev);
1390
1391         err = pci_disable_pcie_error_reporting(pdev);
1392         if (err)
1393                 dev_err(&pdev->dev,
1394                         "pci_disable_pcie_error_reporting failed 0x%x\n", err);
1395
1396         pci_disable_device(pdev);
1397 }
1398
1399 /**
1400  * igb_sw_init - Initialize general software structures (struct igb_adapter)
1401  * @adapter: board private structure to initialize
1402  *
1403  * igb_sw_init initializes the Adapter private data structure.
1404  * Fields are initialized based on PCI device information and
1405  * OS network device settings (MTU size).
1406  **/
1407 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1408 {
1409         struct e1000_hw *hw = &adapter->hw;
1410         struct net_device *netdev = adapter->netdev;
1411         struct pci_dev *pdev = adapter->pdev;
1412
1413         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1414
1415         adapter->tx_ring_count = IGB_DEFAULT_TXD;
1416         adapter->rx_ring_count = IGB_DEFAULT_RXD;
1417         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1418         adapter->rx_ps_hdr_size = 0; /* disable packet split */
1419         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1420         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1421
1422         /* Number of supported queues. */
1423         /* Having more queues than CPUs doesn't make sense. */
1424         adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
1425         adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
1426
1427         /* This call may decrease the number of queues depending on
1428          * interrupt mode. */
1429         igb_set_interrupt_capability(adapter);
1430
1431         if (igb_alloc_queues(adapter)) {
1432                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1433                 return -ENOMEM;
1434         }
1435
1436         /* Explicitly disable IRQ since the NIC can be in any state. */
1437         igb_irq_disable(adapter);
1438
1439         set_bit(__IGB_DOWN, &adapter->state);
1440         return 0;
1441 }
1442
1443 /**
1444  * igb_open - Called when a network interface is made active
1445  * @netdev: network interface device structure
1446  *
1447  * Returns 0 on success, negative value on failure
1448  *
1449  * The open entry point is called when a network interface is made
1450  * active by the system (IFF_UP).  At this point all resources needed
1451  * for transmit and receive operations are allocated, the interrupt
1452  * handler is registered with the OS, the watchdog timer is started,
1453  * and the stack is notified that the interface is ready.
1454  **/
1455 static int igb_open(struct net_device *netdev)
1456 {
1457         struct igb_adapter *adapter = netdev_priv(netdev);
1458         struct e1000_hw *hw = &adapter->hw;
1459         int err;
1460         int i;
1461
1462         /* disallow open during test */
1463         if (test_bit(__IGB_TESTING, &adapter->state))
1464                 return -EBUSY;
1465
1466         /* allocate transmit descriptors */
1467         err = igb_setup_all_tx_resources(adapter);
1468         if (err)
1469                 goto err_setup_tx;
1470
1471         /* allocate receive descriptors */
1472         err = igb_setup_all_rx_resources(adapter);
1473         if (err)
1474                 goto err_setup_rx;
1475
1476         /* e1000_power_up_phy(adapter); */
1477
1478         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1479         if ((adapter->hw.mng_cookie.status &
1480              E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1481                 igb_update_mng_vlan(adapter);
1482
1483         /* before we allocate an interrupt, we must be ready to handle it.
1484          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1485          * as soon as we call pci_request_irq, so we have to setup our
1486          * clean_rx handler before we do so.  */
1487         igb_configure(adapter);
1488
1489         err = igb_request_irq(adapter);
1490         if (err)
1491                 goto err_req_irq;
1492
1493         /* From here on the code is the same as igb_up() */
1494         clear_bit(__IGB_DOWN, &adapter->state);
1495
1496         for (i = 0; i < adapter->num_rx_queues; i++)
1497                 napi_enable(&adapter->rx_ring[i].napi);
1498
1499         /* Clear any pending interrupts. */
1500         rd32(E1000_ICR);
1501
1502         igb_irq_enable(adapter);
1503
1504         netif_tx_start_all_queues(netdev);
1505
1506         /* Fire a link status change interrupt to start the watchdog. */
1507         wr32(E1000_ICS, E1000_ICS_LSC);
1508
1509         return 0;
1510
1511 err_req_irq:
1512         igb_release_hw_control(adapter);
1513         /* e1000_power_down_phy(adapter); */
1514         igb_free_all_rx_resources(adapter);
1515 err_setup_rx:
1516         igb_free_all_tx_resources(adapter);
1517 err_setup_tx:
1518         igb_reset(adapter);
1519
1520         return err;
1521 }
1522
1523 /**
1524  * igb_close - Disables a network interface
1525  * @netdev: network interface device structure
1526  *
1527  * Returns 0, this is not allowed to fail
1528  *
1529  * The close entry point is called when an interface is de-activated
1530  * by the OS.  The hardware is still under the driver's control, but
1531  * needs to be disabled.  A global MAC reset is issued to stop the
1532  * hardware, and all transmit and receive resources are freed.
1533  **/
1534 static int igb_close(struct net_device *netdev)
1535 {
1536         struct igb_adapter *adapter = netdev_priv(netdev);
1537
1538         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1539         igb_down(adapter);
1540
1541         igb_free_irq(adapter);
1542
1543         igb_free_all_tx_resources(adapter);
1544         igb_free_all_rx_resources(adapter);
1545
1546         /* kill manageability vlan ID if supported, but not if a vlan with
1547          * the same ID is registered on the host OS (let 8021q kill it) */
1548         if ((adapter->hw.mng_cookie.status &
1549                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1550              !(adapter->vlgrp &&
1551                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1552                 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1553
1554         return 0;
1555 }
1556
1557 /**
1558  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1559  * @adapter: board private structure
1560  * @tx_ring: tx descriptor ring (for a specific queue) to setup
1561  *
1562  * Return 0 on success, negative on failure
1563  **/
1564
1565 int igb_setup_tx_resources(struct igb_adapter *adapter,
1566                            struct igb_ring *tx_ring)
1567 {
1568         struct pci_dev *pdev = adapter->pdev;
1569         int size;
1570
1571         size = sizeof(struct igb_buffer) * tx_ring->count;
1572         tx_ring->buffer_info = vmalloc(size);
1573         if (!tx_ring->buffer_info)
1574                 goto err;
1575         memset(tx_ring->buffer_info, 0, size);
1576
1577         /* round up to nearest 4K */
1578         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1579                         + sizeof(u32);
1580         tx_ring->size = ALIGN(tx_ring->size, 4096);
1581
1582         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1583                                              &tx_ring->dma);
1584
1585         if (!tx_ring->desc)
1586                 goto err;
1587
1588         tx_ring->adapter = adapter;
1589         tx_ring->next_to_use = 0;
1590         tx_ring->next_to_clean = 0;
1591         return 0;
1592
1593 err:
1594         vfree(tx_ring->buffer_info);
1595         dev_err(&adapter->pdev->dev,
1596                 "Unable to allocate memory for the transmit descriptor ring\n");
1597         return -ENOMEM;
1598 }
1599
1600 /**
1601  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1602  *                                (Descriptors) for all queues
1603  * @adapter: board private structure
1604  *
1605  * Return 0 on success, negative on failure
1606  **/
1607 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1608 {
1609         int i, err = 0;
1610         int r_idx;
1611
1612         for (i = 0; i < adapter->num_tx_queues; i++) {
1613                 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1614                 if (err) {
1615                         dev_err(&adapter->pdev->dev,
1616                                 "Allocation for Tx Queue %u failed\n", i);
1617                         for (i--; i >= 0; i--)
1618                                 igb_free_tx_resources(&adapter->tx_ring[i]);
1619                         break;
1620                 }
1621         }
1622
1623         for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1624                 r_idx = i % adapter->num_tx_queues;
1625                 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1626         }
1627         return err;
1628 }
1629
1630 /**
1631  * igb_configure_tx - Configure transmit Unit after Reset
1632  * @adapter: board private structure
1633  *
1634  * Configure the Tx unit of the MAC after a reset.
1635  **/
1636 static void igb_configure_tx(struct igb_adapter *adapter)
1637 {
1638         u64 tdba, tdwba;
1639         struct e1000_hw *hw = &adapter->hw;
1640         u32 tctl;
1641         u32 txdctl, txctrl;
1642         int i;
1643
1644         for (i = 0; i < adapter->num_tx_queues; i++) {
1645                 struct igb_ring *ring = &(adapter->tx_ring[i]);
1646
1647                 wr32(E1000_TDLEN(i),
1648                                 ring->count * sizeof(struct e1000_tx_desc));
1649                 tdba = ring->dma;
1650                 wr32(E1000_TDBAL(i),
1651                                 tdba & 0x00000000ffffffffULL);
1652                 wr32(E1000_TDBAH(i), tdba >> 32);
1653
1654                 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1655                 tdwba |= 1; /* enable head wb */
1656                 wr32(E1000_TDWBAL(i),
1657                                 tdwba & 0x00000000ffffffffULL);
1658                 wr32(E1000_TDWBAH(i), tdwba >> 32);
1659
1660                 ring->head = E1000_TDH(i);
1661                 ring->tail = E1000_TDT(i);
1662                 writel(0, hw->hw_addr + ring->tail);
1663                 writel(0, hw->hw_addr + ring->head);
1664                 txdctl = rd32(E1000_TXDCTL(i));
1665                 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1666                 wr32(E1000_TXDCTL(i), txdctl);
1667
1668                 /* Turn off Relaxed Ordering on head write-backs.  The
1669                  * writebacks MUST be delivered in order or it will
1670                  * completely screw up our bookeeping.
1671                  */
1672                 txctrl = rd32(E1000_DCA_TXCTRL(i));
1673                 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1674                 wr32(E1000_DCA_TXCTRL(i), txctrl);
1675         }
1676
1677
1678
1679         /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1680
1681         /* Program the Transmit Control Register */
1682
1683         tctl = rd32(E1000_TCTL);
1684         tctl &= ~E1000_TCTL_CT;
1685         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1686                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1687
1688         igb_config_collision_dist(hw);
1689
1690         /* Setup Transmit Descriptor Settings for eop descriptor */
1691         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1692
1693         /* Enable transmits */
1694         tctl |= E1000_TCTL_EN;
1695
1696         wr32(E1000_TCTL, tctl);
1697 }
1698
1699 /**
1700  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1701  * @adapter: board private structure
1702  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1703  *
1704  * Returns 0 on success, negative on failure
1705  **/
1706
1707 int igb_setup_rx_resources(struct igb_adapter *adapter,
1708                            struct igb_ring *rx_ring)
1709 {
1710         struct pci_dev *pdev = adapter->pdev;
1711         int size, desc_len;
1712
1713 #ifdef CONFIG_IGB_LRO
1714         size = sizeof(struct net_lro_desc) * MAX_LRO_DESCRIPTORS;
1715         rx_ring->lro_mgr.lro_arr = vmalloc(size);
1716         if (!rx_ring->lro_mgr.lro_arr)
1717                 goto err;
1718         memset(rx_ring->lro_mgr.lro_arr, 0, size);
1719 #endif
1720
1721         size = sizeof(struct igb_buffer) * rx_ring->count;
1722         rx_ring->buffer_info = vmalloc(size);
1723         if (!rx_ring->buffer_info)
1724                 goto err;
1725         memset(rx_ring->buffer_info, 0, size);
1726
1727         desc_len = sizeof(union e1000_adv_rx_desc);
1728
1729         /* Round up to nearest 4K */
1730         rx_ring->size = rx_ring->count * desc_len;
1731         rx_ring->size = ALIGN(rx_ring->size, 4096);
1732
1733         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1734                                              &rx_ring->dma);
1735
1736         if (!rx_ring->desc)
1737                 goto err;
1738
1739         rx_ring->next_to_clean = 0;
1740         rx_ring->next_to_use = 0;
1741
1742         rx_ring->adapter = adapter;
1743
1744         return 0;
1745
1746 err:
1747 #ifdef CONFIG_IGB_LRO
1748         vfree(rx_ring->lro_mgr.lro_arr);
1749         rx_ring->lro_mgr.lro_arr = NULL;
1750 #endif
1751         vfree(rx_ring->buffer_info);
1752         dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1753                 "the receive descriptor ring\n");
1754         return -ENOMEM;
1755 }
1756
1757 /**
1758  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1759  *                                (Descriptors) for all queues
1760  * @adapter: board private structure
1761  *
1762  * Return 0 on success, negative on failure
1763  **/
1764 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1765 {
1766         int i, err = 0;
1767
1768         for (i = 0; i < adapter->num_rx_queues; i++) {
1769                 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1770                 if (err) {
1771                         dev_err(&adapter->pdev->dev,
1772                                 "Allocation for Rx Queue %u failed\n", i);
1773                         for (i--; i >= 0; i--)
1774                                 igb_free_rx_resources(&adapter->rx_ring[i]);
1775                         break;
1776                 }
1777         }
1778
1779         return err;
1780 }
1781
1782 /**
1783  * igb_setup_rctl - configure the receive control registers
1784  * @adapter: Board private structure
1785  **/
1786 static void igb_setup_rctl(struct igb_adapter *adapter)
1787 {
1788         struct e1000_hw *hw = &adapter->hw;
1789         u32 rctl;
1790         u32 srrctl = 0;
1791         int i;
1792
1793         rctl = rd32(E1000_RCTL);
1794
1795         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1796         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1797
1798         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
1799                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1800
1801         /*
1802          * enable stripping of CRC. It's unlikely this will break BMC
1803          * redirection as it did with e1000. Newer features require
1804          * that the HW strips the CRC.
1805         */
1806         rctl |= E1000_RCTL_SECRC;
1807
1808         /*
1809          * disable store bad packets, long packet enable, and clear size bits.
1810          */
1811         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_LPE | E1000_RCTL_SZ_256);
1812
1813         if (adapter->netdev->mtu > ETH_DATA_LEN)
1814                 rctl |= E1000_RCTL_LPE;
1815
1816         /* Setup buffer sizes */
1817         switch (adapter->rx_buffer_len) {
1818         case IGB_RXBUFFER_256:
1819                 rctl |= E1000_RCTL_SZ_256;
1820                 break;
1821         case IGB_RXBUFFER_512:
1822                 rctl |= E1000_RCTL_SZ_512;
1823                 break;
1824         default:
1825                 srrctl = ALIGN(adapter->rx_buffer_len, 1024)
1826                          >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1827                 break;
1828         }
1829
1830         /* 82575 and greater support packet-split where the protocol
1831          * header is placed in skb->data and the packet data is
1832          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1833          * In the case of a non-split, skb->data is linearly filled,
1834          * followed by the page buffers.  Therefore, skb->data is
1835          * sized to hold the largest protocol header.
1836          */
1837         /* allocations using alloc_page take too long for regular MTU
1838          * so only enable packet split for jumbo frames */
1839         if (rctl & E1000_RCTL_LPE) {
1840                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1841                 srrctl |= adapter->rx_ps_hdr_size <<
1842                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1843                 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1844         } else {
1845                 adapter->rx_ps_hdr_size = 0;
1846                 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1847         }
1848
1849         for (i = 0; i < adapter->num_rx_queues; i++)
1850                 wr32(E1000_SRRCTL(i), srrctl);
1851
1852         wr32(E1000_RCTL, rctl);
1853 }
1854
1855 /**
1856  * igb_configure_rx - Configure receive Unit after Reset
1857  * @adapter: board private structure
1858  *
1859  * Configure the Rx unit of the MAC after a reset.
1860  **/
1861 static void igb_configure_rx(struct igb_adapter *adapter)
1862 {
1863         u64 rdba;
1864         struct e1000_hw *hw = &adapter->hw;
1865         u32 rctl, rxcsum;
1866         u32 rxdctl;
1867         int i;
1868
1869         /* disable receives while setting up the descriptors */
1870         rctl = rd32(E1000_RCTL);
1871         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1872         wrfl();
1873         mdelay(10);
1874
1875         if (adapter->itr_setting > 3)
1876                 wr32(E1000_ITR, adapter->itr);
1877
1878         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1879          * the Base and Length of the Rx Descriptor Ring */
1880         for (i = 0; i < adapter->num_rx_queues; i++) {
1881                 struct igb_ring *ring = &(adapter->rx_ring[i]);
1882                 rdba = ring->dma;
1883                 wr32(E1000_RDBAL(i),
1884                                 rdba & 0x00000000ffffffffULL);
1885                 wr32(E1000_RDBAH(i), rdba >> 32);
1886                 wr32(E1000_RDLEN(i),
1887                                ring->count * sizeof(union e1000_adv_rx_desc));
1888
1889                 ring->head = E1000_RDH(i);
1890                 ring->tail = E1000_RDT(i);
1891                 writel(0, hw->hw_addr + ring->tail);
1892                 writel(0, hw->hw_addr + ring->head);
1893
1894                 rxdctl = rd32(E1000_RXDCTL(i));
1895                 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1896                 rxdctl &= 0xFFF00000;
1897                 rxdctl |= IGB_RX_PTHRESH;
1898                 rxdctl |= IGB_RX_HTHRESH << 8;
1899                 rxdctl |= IGB_RX_WTHRESH << 16;
1900                 wr32(E1000_RXDCTL(i), rxdctl);
1901 #ifdef CONFIG_IGB_LRO
1902                 /* Intitial LRO Settings */
1903                 ring->lro_mgr.max_aggr = MAX_LRO_AGGR;
1904                 ring->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1905                 ring->lro_mgr.get_skb_header = igb_get_skb_hdr;
1906                 ring->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1907                 ring->lro_mgr.dev = adapter->netdev;
1908                 ring->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1909                 ring->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1910 #endif
1911         }
1912
1913         if (adapter->num_rx_queues > 1) {
1914                 u32 random[10];
1915                 u32 mrqc;
1916                 u32 j, shift;
1917                 union e1000_reta {
1918                         u32 dword;
1919                         u8  bytes[4];
1920                 } reta;
1921
1922                 get_random_bytes(&random[0], 40);
1923
1924                 if (hw->mac.type >= e1000_82576)
1925                         shift = 0;
1926                 else
1927                         shift = 6;
1928                 for (j = 0; j < (32 * 4); j++) {
1929                         reta.bytes[j & 3] =
1930                                 (j % adapter->num_rx_queues) << shift;
1931                         if ((j & 3) == 3)
1932                                 writel(reta.dword,
1933                                        hw->hw_addr + E1000_RETA(0) + (j & ~3));
1934                 }
1935                 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1936
1937                 /* Fill out hash function seeds */
1938                 for (j = 0; j < 10; j++)
1939                         array_wr32(E1000_RSSRK(0), j, random[j]);
1940
1941                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1942                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1943                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1944                          E1000_MRQC_RSS_FIELD_IPV6_TCP);
1945                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1946                          E1000_MRQC_RSS_FIELD_IPV6_UDP);
1947                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1948                          E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1949
1950
1951                 wr32(E1000_MRQC, mrqc);
1952
1953                 /* Multiqueue and raw packet checksumming are mutually
1954                  * exclusive.  Note that this not the same as TCP/IP
1955                  * checksumming, which works fine. */
1956                 rxcsum = rd32(E1000_RXCSUM);
1957                 rxcsum |= E1000_RXCSUM_PCSD;
1958                 wr32(E1000_RXCSUM, rxcsum);
1959         } else {
1960                 /* Enable Receive Checksum Offload for TCP and UDP */
1961                 rxcsum = rd32(E1000_RXCSUM);
1962                 if (adapter->rx_csum) {
1963                         rxcsum |= E1000_RXCSUM_TUOFL;
1964
1965                         /* Enable IPv4 payload checksum for UDP fragments
1966                          * Must be used in conjunction with packet-split. */
1967                         if (adapter->rx_ps_hdr_size)
1968                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1969                 } else {
1970                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1971                         /* don't need to clear IPPCSE as it defaults to 0 */
1972                 }
1973                 wr32(E1000_RXCSUM, rxcsum);
1974         }
1975
1976         if (adapter->vlgrp)
1977                 wr32(E1000_RLPML,
1978                                 adapter->max_frame_size + VLAN_TAG_SIZE);
1979         else
1980                 wr32(E1000_RLPML, adapter->max_frame_size);
1981
1982         /* Enable Receives */
1983         wr32(E1000_RCTL, rctl);
1984 }
1985
1986 /**
1987  * igb_free_tx_resources - Free Tx Resources per Queue
1988  * @tx_ring: Tx descriptor ring for a specific queue
1989  *
1990  * Free all transmit software resources
1991  **/
1992 void igb_free_tx_resources(struct igb_ring *tx_ring)
1993 {
1994         struct pci_dev *pdev = tx_ring->adapter->pdev;
1995
1996         igb_clean_tx_ring(tx_ring);
1997
1998         vfree(tx_ring->buffer_info);
1999         tx_ring->buffer_info = NULL;
2000
2001         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2002
2003         tx_ring->desc = NULL;
2004 }
2005
2006 /**
2007  * igb_free_all_tx_resources - Free Tx Resources for All Queues
2008  * @adapter: board private structure
2009  *
2010  * Free all transmit software resources
2011  **/
2012 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
2013 {
2014         int i;
2015
2016         for (i = 0; i < adapter->num_tx_queues; i++)
2017                 igb_free_tx_resources(&adapter->tx_ring[i]);
2018 }
2019
2020 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
2021                                            struct igb_buffer *buffer_info)
2022 {
2023         if (buffer_info->dma) {
2024                 pci_unmap_page(adapter->pdev,
2025                                 buffer_info->dma,
2026                                 buffer_info->length,
2027                                 PCI_DMA_TODEVICE);
2028                 buffer_info->dma = 0;
2029         }
2030         if (buffer_info->skb) {
2031                 dev_kfree_skb_any(buffer_info->skb);
2032                 buffer_info->skb = NULL;
2033         }
2034         buffer_info->time_stamp = 0;
2035         /* buffer_info must be completely set up in the transmit path */
2036 }
2037
2038 /**
2039  * igb_clean_tx_ring - Free Tx Buffers
2040  * @tx_ring: ring to be cleaned
2041  **/
2042 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
2043 {
2044         struct igb_adapter *adapter = tx_ring->adapter;
2045         struct igb_buffer *buffer_info;
2046         unsigned long size;
2047         unsigned int i;
2048
2049         if (!tx_ring->buffer_info)
2050                 return;
2051         /* Free all the Tx ring sk_buffs */
2052
2053         for (i = 0; i < tx_ring->count; i++) {
2054                 buffer_info = &tx_ring->buffer_info[i];
2055                 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2056         }
2057
2058         size = sizeof(struct igb_buffer) * tx_ring->count;
2059         memset(tx_ring->buffer_info, 0, size);
2060
2061         /* Zero out the descriptor ring */
2062
2063         memset(tx_ring->desc, 0, tx_ring->size);
2064
2065         tx_ring->next_to_use = 0;
2066         tx_ring->next_to_clean = 0;
2067
2068         writel(0, adapter->hw.hw_addr + tx_ring->head);
2069         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2070 }
2071
2072 /**
2073  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2074  * @adapter: board private structure
2075  **/
2076 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2077 {
2078         int i;
2079
2080         for (i = 0; i < adapter->num_tx_queues; i++)
2081                 igb_clean_tx_ring(&adapter->tx_ring[i]);
2082 }
2083
2084 /**
2085  * igb_free_rx_resources - Free Rx Resources
2086  * @rx_ring: ring to clean the resources from
2087  *
2088  * Free all receive software resources
2089  **/
2090 void igb_free_rx_resources(struct igb_ring *rx_ring)
2091 {
2092         struct pci_dev *pdev = rx_ring->adapter->pdev;
2093
2094         igb_clean_rx_ring(rx_ring);
2095
2096         vfree(rx_ring->buffer_info);
2097         rx_ring->buffer_info = NULL;
2098
2099 #ifdef CONFIG_IGB_LRO
2100         vfree(rx_ring->lro_mgr.lro_arr);
2101         rx_ring->lro_mgr.lro_arr = NULL;
2102 #endif
2103
2104         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2105
2106         rx_ring->desc = NULL;
2107 }
2108
2109 /**
2110  * igb_free_all_rx_resources - Free Rx Resources for All Queues
2111  * @adapter: board private structure
2112  *
2113  * Free all receive software resources
2114  **/
2115 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2116 {
2117         int i;
2118
2119         for (i = 0; i < adapter->num_rx_queues; i++)
2120                 igb_free_rx_resources(&adapter->rx_ring[i]);
2121 }
2122
2123 /**
2124  * igb_clean_rx_ring - Free Rx Buffers per Queue
2125  * @rx_ring: ring to free buffers from
2126  **/
2127 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
2128 {
2129         struct igb_adapter *adapter = rx_ring->adapter;
2130         struct igb_buffer *buffer_info;
2131         struct pci_dev *pdev = adapter->pdev;
2132         unsigned long size;
2133         unsigned int i;
2134
2135         if (!rx_ring->buffer_info)
2136                 return;
2137         /* Free all the Rx ring sk_buffs */
2138         for (i = 0; i < rx_ring->count; i++) {
2139                 buffer_info = &rx_ring->buffer_info[i];
2140                 if (buffer_info->dma) {
2141                         if (adapter->rx_ps_hdr_size)
2142                                 pci_unmap_single(pdev, buffer_info->dma,
2143                                                  adapter->rx_ps_hdr_size,
2144                                                  PCI_DMA_FROMDEVICE);
2145                         else
2146                                 pci_unmap_single(pdev, buffer_info->dma,
2147                                                  adapter->rx_buffer_len,
2148                                                  PCI_DMA_FROMDEVICE);
2149                         buffer_info->dma = 0;
2150                 }
2151
2152                 if (buffer_info->skb) {
2153                         dev_kfree_skb(buffer_info->skb);
2154                         buffer_info->skb = NULL;
2155                 }
2156                 if (buffer_info->page) {
2157                         if (buffer_info->page_dma)
2158                                 pci_unmap_page(pdev, buffer_info->page_dma,
2159                                                PAGE_SIZE / 2,
2160                                                PCI_DMA_FROMDEVICE);
2161                         put_page(buffer_info->page);
2162                         buffer_info->page = NULL;
2163                         buffer_info->page_dma = 0;
2164                         buffer_info->page_offset = 0;
2165                 }
2166         }
2167
2168         size = sizeof(struct igb_buffer) * rx_ring->count;
2169         memset(rx_ring->buffer_info, 0, size);
2170
2171         /* Zero out the descriptor ring */
2172         memset(rx_ring->desc, 0, rx_ring->size);
2173
2174         rx_ring->next_to_clean = 0;
2175         rx_ring->next_to_use = 0;
2176
2177         writel(0, adapter->hw.hw_addr + rx_ring->head);
2178         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2179 }
2180
2181 /**
2182  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2183  * @adapter: board private structure
2184  **/
2185 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2186 {
2187         int i;
2188
2189         for (i = 0; i < adapter->num_rx_queues; i++)
2190                 igb_clean_rx_ring(&adapter->rx_ring[i]);
2191 }
2192
2193 /**
2194  * igb_set_mac - Change the Ethernet Address of the NIC
2195  * @netdev: network interface device structure
2196  * @p: pointer to an address structure
2197  *
2198  * Returns 0 on success, negative on failure
2199  **/
2200 static int igb_set_mac(struct net_device *netdev, void *p)
2201 {
2202         struct igb_adapter *adapter = netdev_priv(netdev);
2203         struct sockaddr *addr = p;
2204
2205         if (!is_valid_ether_addr(addr->sa_data))
2206                 return -EADDRNOTAVAIL;
2207
2208         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2209         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2210
2211         adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2212
2213         return 0;
2214 }
2215
2216 /**
2217  * igb_set_multi - Multicast and Promiscuous mode set
2218  * @netdev: network interface device structure
2219  *
2220  * The set_multi entry point is called whenever the multicast address
2221  * list or the network interface flags are updated.  This routine is
2222  * responsible for configuring the hardware for proper multicast,
2223  * promiscuous mode, and all-multi behavior.
2224  **/
2225 static void igb_set_multi(struct net_device *netdev)
2226 {
2227         struct igb_adapter *adapter = netdev_priv(netdev);
2228         struct e1000_hw *hw = &adapter->hw;
2229         struct e1000_mac_info *mac = &hw->mac;
2230         struct dev_mc_list *mc_ptr;
2231         u8  *mta_list;
2232         u32 rctl;
2233         int i;
2234
2235         /* Check for Promiscuous and All Multicast modes */
2236
2237         rctl = rd32(E1000_RCTL);
2238
2239         if (netdev->flags & IFF_PROMISC) {
2240                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2241                 rctl &= ~E1000_RCTL_VFE;
2242         } else {
2243                 if (netdev->flags & IFF_ALLMULTI) {
2244                         rctl |= E1000_RCTL_MPE;
2245                         rctl &= ~E1000_RCTL_UPE;
2246                 } else
2247                         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2248                 rctl |= E1000_RCTL_VFE;
2249         }
2250         wr32(E1000_RCTL, rctl);
2251
2252         if (!netdev->mc_count) {
2253                 /* nothing to program, so clear mc list */
2254                 igb_update_mc_addr_list_82575(hw, NULL, 0, 1,
2255                                           mac->rar_entry_count);
2256                 return;
2257         }
2258
2259         mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2260         if (!mta_list)
2261                 return;
2262
2263         /* The shared function expects a packed array of only addresses. */
2264         mc_ptr = netdev->mc_list;
2265
2266         for (i = 0; i < netdev->mc_count; i++) {
2267                 if (!mc_ptr)
2268                         break;
2269                 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2270                 mc_ptr = mc_ptr->next;
2271         }
2272         igb_update_mc_addr_list_82575(hw, mta_list, i, 1,
2273                                       mac->rar_entry_count);
2274         kfree(mta_list);
2275 }
2276
2277 /* Need to wait a few seconds after link up to get diagnostic information from
2278  * the phy */
2279 static void igb_update_phy_info(unsigned long data)
2280 {
2281         struct igb_adapter *adapter = (struct igb_adapter *) data;
2282         igb_get_phy_info(&adapter->hw);
2283 }
2284
2285 /**
2286  * igb_watchdog - Timer Call-back
2287  * @data: pointer to adapter cast into an unsigned long
2288  **/
2289 static void igb_watchdog(unsigned long data)
2290 {
2291         struct igb_adapter *adapter = (struct igb_adapter *)data;
2292         /* Do the rest outside of interrupt context */
2293         schedule_work(&adapter->watchdog_task);
2294 }
2295
2296 static void igb_watchdog_task(struct work_struct *work)
2297 {
2298         struct igb_adapter *adapter = container_of(work,
2299                                         struct igb_adapter, watchdog_task);
2300         struct e1000_hw *hw = &adapter->hw;
2301
2302         struct net_device *netdev = adapter->netdev;
2303         struct igb_ring *tx_ring = adapter->tx_ring;
2304         struct e1000_mac_info *mac = &adapter->hw.mac;
2305         u32 link;
2306         u32 eics = 0;
2307         s32 ret_val;
2308         int i;
2309
2310         if ((netif_carrier_ok(netdev)) &&
2311             (rd32(E1000_STATUS) & E1000_STATUS_LU))
2312                 goto link_up;
2313
2314         ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2315         if ((ret_val == E1000_ERR_PHY) &&
2316             (hw->phy.type == e1000_phy_igp_3) &&
2317             (rd32(E1000_CTRL) &
2318              E1000_PHY_CTRL_GBE_DISABLE))
2319                 dev_info(&adapter->pdev->dev,
2320                          "Gigabit has been disabled, downgrading speed\n");
2321
2322         if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2323             !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2324                 link = mac->serdes_has_link;
2325         else
2326                 link = rd32(E1000_STATUS) &
2327                                       E1000_STATUS_LU;
2328
2329         if (link) {
2330                 if (!netif_carrier_ok(netdev)) {
2331                         u32 ctrl;
2332                         hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2333                                                    &adapter->link_speed,
2334                                                    &adapter->link_duplex);
2335
2336                         ctrl = rd32(E1000_CTRL);
2337                         /* Links status message must follow this format */
2338                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
2339                                  "Flow Control: %s\n",
2340                                  netdev->name,
2341                                  adapter->link_speed,
2342                                  adapter->link_duplex == FULL_DUPLEX ?
2343                                  "Full Duplex" : "Half Duplex",
2344                                  ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2345                                  E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2346                                  E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2347                                  E1000_CTRL_TFCE) ? "TX" : "None")));
2348
2349                         /* tweak tx_queue_len according to speed/duplex and
2350                          * adjust the timeout factor */
2351                         netdev->tx_queue_len = adapter->tx_queue_len;
2352                         adapter->tx_timeout_factor = 1;
2353                         switch (adapter->link_speed) {
2354                         case SPEED_10:
2355                                 netdev->tx_queue_len = 10;
2356                                 adapter->tx_timeout_factor = 14;
2357                                 break;
2358                         case SPEED_100:
2359                                 netdev->tx_queue_len = 100;
2360                                 /* maybe add some timeout factor ? */
2361                                 break;
2362                         }
2363
2364                         netif_carrier_on(netdev);
2365                         netif_tx_wake_all_queues(netdev);
2366
2367                         if (!test_bit(__IGB_DOWN, &adapter->state))
2368                                 mod_timer(&adapter->phy_info_timer,
2369                                           round_jiffies(jiffies + 2 * HZ));
2370                 }
2371         } else {
2372                 if (netif_carrier_ok(netdev)) {
2373                         adapter->link_speed = 0;
2374                         adapter->link_duplex = 0;
2375                         /* Links status message must follow this format */
2376                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
2377                                netdev->name);
2378                         netif_carrier_off(netdev);
2379                         netif_tx_stop_all_queues(netdev);
2380                         if (!test_bit(__IGB_DOWN, &adapter->state))
2381                                 mod_timer(&adapter->phy_info_timer,
2382                                           round_jiffies(jiffies + 2 * HZ));
2383                 }
2384         }
2385
2386 link_up:
2387         igb_update_stats(adapter);
2388
2389         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2390         adapter->tpt_old = adapter->stats.tpt;
2391         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2392         adapter->colc_old = adapter->stats.colc;
2393
2394         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2395         adapter->gorc_old = adapter->stats.gorc;
2396         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2397         adapter->gotc_old = adapter->stats.gotc;
2398
2399         igb_update_adaptive(&adapter->hw);
2400
2401         if (!netif_carrier_ok(netdev)) {
2402                 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2403                         /* We've lost link, so the controller stops DMA,
2404                          * but we've got queued Tx work that's never going
2405                          * to get done, so reset controller to flush Tx.
2406                          * (Do the reset outside of interrupt context). */
2407                         adapter->tx_timeout_count++;
2408                         schedule_work(&adapter->reset_task);
2409                 }
2410         }
2411
2412         /* Cause software interrupt to ensure rx ring is cleaned */
2413         if (adapter->msix_entries) {
2414                 for (i = 0; i < adapter->num_rx_queues; i++)
2415                         eics |= adapter->rx_ring[i].eims_value;
2416                 wr32(E1000_EICS, eics);
2417         } else {
2418                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
2419         }
2420
2421         /* Force detection of hung controller every watchdog period */
2422         tx_ring->detect_tx_hung = true;
2423
2424         /* Reset the timer */
2425         if (!test_bit(__IGB_DOWN, &adapter->state))
2426                 mod_timer(&adapter->watchdog_timer,
2427                           round_jiffies(jiffies + 2 * HZ));
2428 }
2429
2430 enum latency_range {
2431         lowest_latency = 0,
2432         low_latency = 1,
2433         bulk_latency = 2,
2434         latency_invalid = 255
2435 };
2436
2437
2438 /**
2439  * igb_update_ring_itr - update the dynamic ITR value based on packet size
2440  *
2441  *      Stores a new ITR value based on strictly on packet size.  This
2442  *      algorithm is less sophisticated than that used in igb_update_itr,
2443  *      due to the difficulty of synchronizing statistics across multiple
2444  *      receive rings.  The divisors and thresholds used by this fuction
2445  *      were determined based on theoretical maximum wire speed and testing
2446  *      data, in order to minimize response time while increasing bulk
2447  *      throughput.
2448  *      This functionality is controlled by the InterruptThrottleRate module
2449  *      parameter (see igb_param.c)
2450  *      NOTE:  This function is called only when operating in a multiqueue
2451  *             receive environment.
2452  * @rx_ring: pointer to ring
2453  **/
2454 static void igb_update_ring_itr(struct igb_ring *rx_ring)
2455 {
2456         int new_val = rx_ring->itr_val;
2457         int avg_wire_size = 0;
2458         struct igb_adapter *adapter = rx_ring->adapter;
2459
2460         if (!rx_ring->total_packets)
2461                 goto clear_counts; /* no packets, so don't do anything */
2462
2463         /* For non-gigabit speeds, just fix the interrupt rate at 4000
2464          * ints/sec - ITR timer value of 120 ticks.
2465          */
2466         if (adapter->link_speed != SPEED_1000) {
2467                 new_val = 120;
2468                 goto set_itr_val;
2469         }
2470         avg_wire_size = rx_ring->total_bytes / rx_ring->total_packets;
2471
2472         /* Add 24 bytes to size to account for CRC, preamble, and gap */
2473         avg_wire_size += 24;
2474
2475         /* Don't starve jumbo frames */
2476         avg_wire_size = min(avg_wire_size, 3000);
2477
2478         /* Give a little boost to mid-size frames */
2479         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
2480                 new_val = avg_wire_size / 3;
2481         else
2482                 new_val = avg_wire_size / 2;
2483
2484 set_itr_val:
2485         if (new_val != rx_ring->itr_val) {
2486                 rx_ring->itr_val = new_val;
2487                 rx_ring->set_itr = 1;
2488         }
2489 clear_counts:
2490         rx_ring->total_bytes = 0;
2491         rx_ring->total_packets = 0;
2492 }
2493
2494 /**
2495  * igb_update_itr - update the dynamic ITR value based on statistics
2496  *      Stores a new ITR value based on packets and byte
2497  *      counts during the last interrupt.  The advantage of per interrupt
2498  *      computation is faster updates and more accurate ITR for the current
2499  *      traffic pattern.  Constants in this function were computed
2500  *      based on theoretical maximum wire speed and thresholds were set based
2501  *      on testing data as well as attempting to minimize response time
2502  *      while increasing bulk throughput.
2503  *      this functionality is controlled by the InterruptThrottleRate module
2504  *      parameter (see igb_param.c)
2505  *      NOTE:  These calculations are only valid when operating in a single-
2506  *             queue environment.
2507  * @adapter: pointer to adapter
2508  * @itr_setting: current adapter->itr
2509  * @packets: the number of packets during this measurement interval
2510  * @bytes: the number of bytes during this measurement interval
2511  **/
2512 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2513                                    int packets, int bytes)
2514 {
2515         unsigned int retval = itr_setting;
2516
2517         if (packets == 0)
2518                 goto update_itr_done;
2519
2520         switch (itr_setting) {
2521         case lowest_latency:
2522                 /* handle TSO and jumbo frames */
2523                 if (bytes/packets > 8000)
2524                         retval = bulk_latency;
2525                 else if ((packets < 5) && (bytes > 512))
2526                         retval = low_latency;
2527                 break;
2528         case low_latency:  /* 50 usec aka 20000 ints/s */
2529                 if (bytes > 10000) {
2530                         /* this if handles the TSO accounting */
2531                         if (bytes/packets > 8000) {
2532                                 retval = bulk_latency;
2533                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2534                                 retval = bulk_latency;
2535                         } else if ((packets > 35)) {
2536                                 retval = lowest_latency;
2537                         }
2538                 } else if (bytes/packets > 2000) {
2539                         retval = bulk_latency;
2540                 } else if (packets <= 2 && bytes < 512) {
2541                         retval = lowest_latency;
2542                 }
2543                 break;
2544         case bulk_latency: /* 250 usec aka 4000 ints/s */
2545                 if (bytes > 25000) {
2546                         if (packets > 35)
2547                                 retval = low_latency;
2548                 } else if (bytes < 6000) {
2549                         retval = low_latency;
2550                 }
2551                 break;
2552         }
2553
2554 update_itr_done:
2555         return retval;
2556 }
2557
2558 static void igb_set_itr(struct igb_adapter *adapter)
2559 {
2560         u16 current_itr;
2561         u32 new_itr = adapter->itr;
2562
2563         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2564         if (adapter->link_speed != SPEED_1000) {
2565                 current_itr = 0;
2566                 new_itr = 4000;
2567                 goto set_itr_now;
2568         }
2569
2570         adapter->rx_itr = igb_update_itr(adapter,
2571                                     adapter->rx_itr,
2572                                     adapter->rx_ring->total_packets,
2573                                     adapter->rx_ring->total_bytes);
2574
2575         if (adapter->rx_ring->buddy) {
2576                 adapter->tx_itr = igb_update_itr(adapter,
2577                                             adapter->tx_itr,
2578                                             adapter->tx_ring->total_packets,
2579                                             adapter->tx_ring->total_bytes);
2580
2581                 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2582         } else {
2583                 current_itr = adapter->rx_itr;
2584         }
2585
2586         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2587         if (adapter->itr_setting == 3 &&
2588             current_itr == lowest_latency)
2589                 current_itr = low_latency;
2590
2591         switch (current_itr) {
2592         /* counts and packets in update_itr are dependent on these numbers */
2593         case lowest_latency:
2594                 new_itr = 70000;
2595                 break;
2596         case low_latency:
2597                 new_itr = 20000; /* aka hwitr = ~200 */
2598                 break;
2599         case bulk_latency:
2600                 new_itr = 4000;
2601                 break;
2602         default:
2603                 break;
2604         }
2605
2606 set_itr_now:
2607         adapter->rx_ring->total_bytes = 0;
2608         adapter->rx_ring->total_packets = 0;
2609         if (adapter->rx_ring->buddy) {
2610                 adapter->rx_ring->buddy->total_bytes = 0;
2611                 adapter->rx_ring->buddy->total_packets = 0;
2612         }
2613
2614         if (new_itr != adapter->itr) {
2615                 /* this attempts to bias the interrupt rate towards Bulk
2616                  * by adding intermediate steps when interrupt rate is
2617                  * increasing */
2618                 new_itr = new_itr > adapter->itr ?
2619                              min(adapter->itr + (new_itr >> 2), new_itr) :
2620                              new_itr;
2621                 /* Don't write the value here; it resets the adapter's
2622                  * internal timer, and causes us to delay far longer than
2623                  * we should between interrupts.  Instead, we write the ITR
2624                  * value at the beginning of the next interrupt so the timing
2625                  * ends up being correct.
2626                  */
2627                 adapter->itr = new_itr;
2628                 adapter->rx_ring->itr_val = 1000000000 / (new_itr * 256);
2629                 adapter->rx_ring->set_itr = 1;
2630         }
2631
2632         return;
2633 }
2634
2635
2636 #define IGB_TX_FLAGS_CSUM               0x00000001
2637 #define IGB_TX_FLAGS_VLAN               0x00000002
2638 #define IGB_TX_FLAGS_TSO                0x00000004
2639 #define IGB_TX_FLAGS_IPV4               0x00000008
2640 #define IGB_TX_FLAGS_VLAN_MASK  0xffff0000
2641 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2642
2643 static inline int igb_tso_adv(struct igb_adapter *adapter,
2644                               struct igb_ring *tx_ring,
2645                               struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2646 {
2647         struct e1000_adv_tx_context_desc *context_desc;
2648         unsigned int i;
2649         int err;
2650         struct igb_buffer *buffer_info;
2651         u32 info = 0, tu_cmd = 0;
2652         u32 mss_l4len_idx, l4len;
2653         *hdr_len = 0;
2654
2655         if (skb_header_cloned(skb)) {
2656                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2657                 if (err)
2658                         return err;
2659         }
2660
2661         l4len = tcp_hdrlen(skb);
2662         *hdr_len += l4len;
2663
2664         if (skb->protocol == htons(ETH_P_IP)) {
2665                 struct iphdr *iph = ip_hdr(skb);
2666                 iph->tot_len = 0;
2667                 iph->check = 0;
2668                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2669                                                          iph->daddr, 0,
2670                                                          IPPROTO_TCP,
2671                                                          0);
2672         } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2673                 ipv6_hdr(skb)->payload_len = 0;
2674                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2675                                                        &ipv6_hdr(skb)->daddr,
2676                                                        0, IPPROTO_TCP, 0);
2677         }
2678
2679         i = tx_ring->next_to_use;
2680
2681         buffer_info = &tx_ring->buffer_info[i];
2682         context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2683         /* VLAN MACLEN IPLEN */
2684         if (tx_flags & IGB_TX_FLAGS_VLAN)
2685                 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2686         info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2687         *hdr_len += skb_network_offset(skb);
2688         info |= skb_network_header_len(skb);
2689         *hdr_len += skb_network_header_len(skb);
2690         context_desc->vlan_macip_lens = cpu_to_le32(info);
2691
2692         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2693         tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2694
2695         if (skb->protocol == htons(ETH_P_IP))
2696                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2697         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2698
2699         context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2700
2701         /* MSS L4LEN IDX */
2702         mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2703         mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2704
2705         /* Context index must be unique per ring. */
2706         if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2707                 mss_l4len_idx |= tx_ring->queue_index << 4;
2708
2709         context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2710         context_desc->seqnum_seed = 0;
2711
2712         buffer_info->time_stamp = jiffies;
2713         buffer_info->dma = 0;
2714         i++;
2715         if (i == tx_ring->count)
2716                 i = 0;
2717
2718         tx_ring->next_to_use = i;
2719
2720         return true;
2721 }
2722
2723 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2724                                         struct igb_ring *tx_ring,
2725                                         struct sk_buff *skb, u32 tx_flags)
2726 {
2727         struct e1000_adv_tx_context_desc *context_desc;
2728         unsigned int i;
2729         struct igb_buffer *buffer_info;
2730         u32 info = 0, tu_cmd = 0;
2731
2732         if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2733             (tx_flags & IGB_TX_FLAGS_VLAN)) {
2734                 i = tx_ring->next_to_use;
2735                 buffer_info = &tx_ring->buffer_info[i];
2736                 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2737
2738                 if (tx_flags & IGB_TX_FLAGS_VLAN)
2739                         info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2740                 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2741                 if (skb->ip_summed == CHECKSUM_PARTIAL)
2742                         info |= skb_network_header_len(skb);
2743
2744                 context_desc->vlan_macip_lens = cpu_to_le32(info);
2745
2746                 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2747
2748                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2749                         switch (skb->protocol) {
2750                         case __constant_htons(ETH_P_IP):
2751                                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2752                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2753                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2754                                 break;
2755                         case __constant_htons(ETH_P_IPV6):
2756                                 /* XXX what about other V6 headers?? */
2757                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2758                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2759                                 break;
2760                         default:
2761                                 if (unlikely(net_ratelimit()))
2762                                         dev_warn(&adapter->pdev->dev,
2763                                             "partial checksum but proto=%x!\n",
2764                                             skb->protocol);
2765                                 break;
2766                         }
2767                 }
2768
2769                 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2770                 context_desc->seqnum_seed = 0;
2771                 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2772                         context_desc->mss_l4len_idx =
2773                                 cpu_to_le32(tx_ring->queue_index << 4);
2774
2775                 buffer_info->time_stamp = jiffies;
2776                 buffer_info->dma = 0;
2777
2778                 i++;
2779                 if (i == tx_ring->count)
2780                         i = 0;
2781                 tx_ring->next_to_use = i;
2782
2783                 return true;
2784         }
2785
2786
2787         return false;
2788 }
2789
2790 #define IGB_MAX_TXD_PWR 16
2791 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
2792
2793 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2794                                  struct igb_ring *tx_ring,
2795                                  struct sk_buff *skb)
2796 {
2797         struct igb_buffer *buffer_info;
2798         unsigned int len = skb_headlen(skb);
2799         unsigned int count = 0, i;
2800         unsigned int f;
2801
2802         i = tx_ring->next_to_use;
2803
2804         buffer_info = &tx_ring->buffer_info[i];
2805         BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2806         buffer_info->length = len;
2807         /* set time_stamp *before* dma to help avoid a possible race */
2808         buffer_info->time_stamp = jiffies;
2809         buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2810                                           PCI_DMA_TODEVICE);
2811         count++;
2812         i++;
2813         if (i == tx_ring->count)
2814                 i = 0;
2815
2816         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2817                 struct skb_frag_struct *frag;
2818
2819                 frag = &skb_shinfo(skb)->frags[f];
2820                 len = frag->size;
2821
2822                 buffer_info = &tx_ring->buffer_info[i];
2823                 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2824                 buffer_info->length = len;
2825                 buffer_info->time_stamp = jiffies;
2826                 buffer_info->dma = pci_map_page(adapter->pdev,
2827                                                 frag->page,
2828                                                 frag->page_offset,
2829                                                 len,
2830                                                 PCI_DMA_TODEVICE);
2831
2832                 count++;
2833                 i++;
2834                 if (i == tx_ring->count)
2835                         i = 0;
2836         }
2837
2838         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2839         tx_ring->buffer_info[i].skb = skb;
2840
2841         return count;
2842 }
2843
2844 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2845                                     struct igb_ring *tx_ring,
2846                                     int tx_flags, int count, u32 paylen,
2847                                     u8 hdr_len)
2848 {
2849         union e1000_adv_tx_desc *tx_desc = NULL;
2850         struct igb_buffer *buffer_info;
2851         u32 olinfo_status = 0, cmd_type_len;
2852         unsigned int i;
2853
2854         cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2855                         E1000_ADVTXD_DCMD_DEXT);
2856
2857         if (tx_flags & IGB_TX_FLAGS_VLAN)
2858                 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2859
2860         if (tx_flags & IGB_TX_FLAGS_TSO) {
2861                 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2862
2863                 /* insert tcp checksum */
2864                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2865
2866                 /* insert ip checksum */
2867                 if (tx_flags & IGB_TX_FLAGS_IPV4)
2868                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2869
2870         } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2871                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2872         }
2873
2874         if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
2875             (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2876                          IGB_TX_FLAGS_VLAN)))
2877                 olinfo_status |= tx_ring->queue_index << 4;
2878
2879         olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2880
2881         i = tx_ring->next_to_use;
2882         while (count--) {
2883                 buffer_info = &tx_ring->buffer_info[i];
2884                 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2885                 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2886                 tx_desc->read.cmd_type_len =
2887                         cpu_to_le32(cmd_type_len | buffer_info->length);
2888                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2889                 i++;
2890                 if (i == tx_ring->count)
2891                         i = 0;
2892         }
2893
2894         tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2895         /* Force memory writes to complete before letting h/w
2896          * know there are new descriptors to fetch.  (Only
2897          * applicable for weak-ordered memory model archs,
2898          * such as IA-64). */
2899         wmb();
2900
2901         tx_ring->next_to_use = i;
2902         writel(i, adapter->hw.hw_addr + tx_ring->tail);
2903         /* we need this if more than one processor can write to our tail
2904          * at a time, it syncronizes IO on IA64/Altix systems */
2905         mmiowb();
2906 }
2907
2908 static int __igb_maybe_stop_tx(struct net_device *netdev,
2909                                struct igb_ring *tx_ring, int size)
2910 {
2911         struct igb_adapter *adapter = netdev_priv(netdev);
2912
2913         netif_stop_subqueue(netdev, tx_ring->queue_index);
2914
2915         /* Herbert's original patch had:
2916          *  smp_mb__after_netif_stop_queue();
2917          * but since that doesn't exist yet, just open code it. */
2918         smp_mb();
2919
2920         /* We need to check again in a case another CPU has just
2921          * made room available. */
2922         if (IGB_DESC_UNUSED(tx_ring) < size)
2923                 return -EBUSY;
2924
2925         /* A reprieve! */
2926         netif_wake_subqueue(netdev, tx_ring->queue_index);
2927         ++adapter->restart_queue;
2928         return 0;
2929 }
2930
2931 static int igb_maybe_stop_tx(struct net_device *netdev,
2932                              struct igb_ring *tx_ring, int size)
2933 {
2934         if (IGB_DESC_UNUSED(tx_ring) >= size)
2935                 return 0;
2936         return __igb_maybe_stop_tx(netdev, tx_ring, size);
2937 }
2938
2939 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2940
2941 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2942                                    struct net_device *netdev,
2943                                    struct igb_ring *tx_ring)
2944 {
2945         struct igb_adapter *adapter = netdev_priv(netdev);
2946         unsigned int tx_flags = 0;
2947         unsigned int len;
2948         u8 hdr_len = 0;
2949         int tso = 0;
2950
2951         len = skb_headlen(skb);
2952
2953         if (test_bit(__IGB_DOWN, &adapter->state)) {
2954                 dev_kfree_skb_any(skb);
2955                 return NETDEV_TX_OK;
2956         }
2957
2958         if (skb->len <= 0) {
2959                 dev_kfree_skb_any(skb);
2960                 return NETDEV_TX_OK;
2961         }
2962
2963         /* need: 1 descriptor per page,
2964          *       + 2 desc gap to keep tail from touching head,
2965          *       + 1 desc for skb->data,
2966          *       + 1 desc for context descriptor,
2967          * otherwise try next time */
2968         if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2969                 /* this is a hard error */
2970                 return NETDEV_TX_BUSY;
2971         }
2972         skb_orphan(skb);
2973
2974         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2975                 tx_flags |= IGB_TX_FLAGS_VLAN;
2976                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2977         }
2978
2979         if (skb->protocol == htons(ETH_P_IP))
2980                 tx_flags |= IGB_TX_FLAGS_IPV4;
2981
2982         tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2983                                               &hdr_len) : 0;
2984
2985         if (tso < 0) {
2986                 dev_kfree_skb_any(skb);
2987                 return NETDEV_TX_OK;
2988         }
2989
2990         if (tso)
2991                 tx_flags |= IGB_TX_FLAGS_TSO;
2992         else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2993                         if (skb->ip_summed == CHECKSUM_PARTIAL)
2994                                 tx_flags |= IGB_TX_FLAGS_CSUM;
2995
2996         igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2997                          igb_tx_map_adv(adapter, tx_ring, skb),
2998                          skb->len, hdr_len);
2999
3000         netdev->trans_start = jiffies;
3001
3002         /* Make sure there is space in the ring for the next send. */
3003         igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
3004
3005         return NETDEV_TX_OK;
3006 }
3007
3008 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
3009 {
3010         struct igb_adapter *adapter = netdev_priv(netdev);
3011         struct igb_ring *tx_ring;
3012
3013         int r_idx = 0;
3014         r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
3015         tx_ring = adapter->multi_tx_table[r_idx];
3016
3017         /* This goes back to the question of how to logically map a tx queue
3018          * to a flow.  Right now, performance is impacted slightly negatively
3019          * if using multiple tx queues.  If the stack breaks away from a
3020          * single qdisc implementation, we can look at this again. */
3021         return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
3022 }
3023
3024 /**
3025  * igb_tx_timeout - Respond to a Tx Hang
3026  * @netdev: network interface device structure
3027  **/
3028 static void igb_tx_timeout(struct net_device *netdev)
3029 {
3030         struct igb_adapter *adapter = netdev_priv(netdev);
3031         struct e1000_hw *hw = &adapter->hw;
3032
3033         /* Do the reset outside of interrupt context */
3034         adapter->tx_timeout_count++;
3035         schedule_work(&adapter->reset_task);
3036         wr32(E1000_EICS, adapter->eims_enable_mask &
3037                 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
3038 }
3039
3040 static void igb_reset_task(struct work_struct *work)
3041 {
3042         struct igb_adapter *adapter;
3043         adapter = container_of(work, struct igb_adapter, reset_task);
3044
3045         igb_reinit_locked(adapter);
3046 }
3047
3048 /**
3049  * igb_get_stats - Get System Network Statistics
3050  * @netdev: network interface device structure
3051  *
3052  * Returns the address of the device statistics structure.
3053  * The statistics are actually updated from the timer callback.
3054  **/
3055 static struct net_device_stats *
3056 igb_get_stats(struct net_device *netdev)
3057 {
3058         struct igb_adapter *adapter = netdev_priv(netdev);
3059
3060         /* only return the current stats */
3061         return &adapter->net_stats;
3062 }
3063
3064 /**
3065  * igb_change_mtu - Change the Maximum Transfer Unit
3066  * @netdev: network interface device structure
3067  * @new_mtu: new value for maximum frame size
3068  *
3069  * Returns 0 on success, negative on failure
3070  **/
3071 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3072 {
3073         struct igb_adapter *adapter = netdev_priv(netdev);
3074         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3075
3076         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3077             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3078                 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3079                 return -EINVAL;
3080         }
3081
3082 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3083         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3084                 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3085                 return -EINVAL;
3086         }
3087
3088         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3089                 msleep(1);
3090         /* igb_down has a dependency on max_frame_size */
3091         adapter->max_frame_size = max_frame;
3092         if (netif_running(netdev))
3093                 igb_down(adapter);
3094
3095         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3096          * means we reserve 2 more, this pushes us to allocate from the next
3097          * larger slab size.
3098          * i.e. RXBUFFER_2048 --> size-4096 slab
3099          */
3100
3101         if (max_frame <= IGB_RXBUFFER_256)
3102                 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3103         else if (max_frame <= IGB_RXBUFFER_512)
3104                 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3105         else if (max_frame <= IGB_RXBUFFER_1024)
3106                 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3107         else if (max_frame <= IGB_RXBUFFER_2048)
3108                 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3109         else
3110 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3111                 adapter->rx_buffer_len = IGB_RXBUFFER_16384;
3112 #else
3113                 adapter->rx_buffer_len = PAGE_SIZE / 2;
3114 #endif
3115         /* adjust allocation if LPE protects us, and we aren't using SBP */
3116         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3117              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3118                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3119
3120         dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3121                  netdev->mtu, new_mtu);
3122         netdev->mtu = new_mtu;
3123
3124         if (netif_running(netdev))
3125                 igb_up(adapter);
3126         else
3127                 igb_reset(adapter);
3128
3129         clear_bit(__IGB_RESETTING, &adapter->state);
3130
3131         return 0;
3132 }
3133
3134 /**
3135  * igb_update_stats - Update the board statistics counters
3136  * @adapter: board private structure
3137  **/
3138
3139 void igb_update_stats(struct igb_adapter *adapter)
3140 {
3141         struct e1000_hw *hw = &adapter->hw;
3142         struct pci_dev *pdev = adapter->pdev;
3143         u16 phy_tmp;
3144
3145 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3146
3147         /*
3148          * Prevent stats update while adapter is being reset, or if the pci
3149          * connection is down.
3150          */
3151         if (adapter->link_speed == 0)
3152                 return;
3153         if (pci_channel_offline(pdev))
3154                 return;
3155
3156         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3157         adapter->stats.gprc += rd32(E1000_GPRC);
3158         adapter->stats.gorc += rd32(E1000_GORCL);
3159         rd32(E1000_GORCH); /* clear GORCL */
3160         adapter->stats.bprc += rd32(E1000_BPRC);
3161         adapter->stats.mprc += rd32(E1000_MPRC);
3162         adapter->stats.roc += rd32(E1000_ROC);
3163
3164         adapter->stats.prc64 += rd32(E1000_PRC64);
3165         adapter->stats.prc127 += rd32(E1000_PRC127);
3166         adapter->stats.prc255 += rd32(E1000_PRC255);
3167         adapter->stats.prc511 += rd32(E1000_PRC511);
3168         adapter->stats.prc1023 += rd32(E1000_PRC1023);
3169         adapter->stats.prc1522 += rd32(E1000_PRC1522);
3170         adapter->stats.symerrs += rd32(E1000_SYMERRS);
3171         adapter->stats.sec += rd32(E1000_SEC);
3172
3173         adapter->stats.mpc += rd32(E1000_MPC);
3174         adapter->stats.scc += rd32(E1000_SCC);
3175         adapter->stats.ecol += rd32(E1000_ECOL);
3176         adapter->stats.mcc += rd32(E1000_MCC);
3177         adapter->stats.latecol += rd32(E1000_LATECOL);
3178         adapter->stats.dc += rd32(E1000_DC);
3179         adapter->stats.rlec += rd32(E1000_RLEC);
3180         adapter->stats.xonrxc += rd32(E1000_XONRXC);
3181         adapter->stats.xontxc += rd32(E1000_XONTXC);
3182         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3183         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3184         adapter->stats.fcruc += rd32(E1000_FCRUC);
3185         adapter->stats.gptc += rd32(E1000_GPTC);
3186         adapter->stats.gotc += rd32(E1000_GOTCL);
3187         rd32(E1000_GOTCH); /* clear GOTCL */
3188         adapter->stats.rnbc += rd32(E1000_RNBC);
3189         adapter->stats.ruc += rd32(E1000_RUC);
3190         adapter->stats.rfc += rd32(E1000_RFC);
3191         adapter->stats.rjc += rd32(E1000_RJC);
3192         adapter->stats.tor += rd32(E1000_TORH);
3193         adapter->stats.tot += rd32(E1000_TOTH);
3194         adapter->stats.tpr += rd32(E1000_TPR);
3195
3196         adapter->stats.ptc64 += rd32(E1000_PTC64);
3197         adapter->stats.ptc127 += rd32(E1000_PTC127);
3198         adapter->stats.ptc255 += rd32(E1000_PTC255);
3199         adapter->stats.ptc511 += rd32(E1000_PTC511);
3200         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3201         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3202
3203         adapter->stats.mptc += rd32(E1000_MPTC);
3204         adapter->stats.bptc += rd32(E1000_BPTC);
3205
3206         /* used for adaptive IFS */
3207
3208         hw->mac.tx_packet_delta = rd32(E1000_TPT);
3209         adapter->stats.tpt += hw->mac.tx_packet_delta;
3210         hw->mac.collision_delta = rd32(E1000_COLC);
3211         adapter->stats.colc += hw->mac.collision_delta;
3212
3213         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3214         adapter->stats.rxerrc += rd32(E1000_RXERRC);
3215         adapter->stats.tncrs += rd32(E1000_TNCRS);
3216         adapter->stats.tsctc += rd32(E1000_TSCTC);
3217         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3218
3219         adapter->stats.iac += rd32(E1000_IAC);
3220         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3221         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3222         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3223         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3224         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3225         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3226         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3227         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3228
3229         /* Fill out the OS statistics structure */
3230         adapter->net_stats.multicast = adapter->stats.mprc;
3231         adapter->net_stats.collisions = adapter->stats.colc;
3232
3233         /* Rx Errors */
3234
3235         /* RLEC on some newer hardware can be incorrect so build
3236         * our own version based on RUC and ROC */
3237         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3238                 adapter->stats.crcerrs + adapter->stats.algnerrc +
3239                 adapter->stats.ruc + adapter->stats.roc +
3240                 adapter->stats.cexterr;
3241         adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3242                                               adapter->stats.roc;
3243         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3244         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3245         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3246
3247         /* Tx Errors */
3248         adapter->net_stats.tx_errors = adapter->stats.ecol +
3249                                        adapter->stats.latecol;
3250         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3251         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3252         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3253
3254         /* Tx Dropped needs to be maintained elsewhere */
3255
3256         /* Phy Stats */
3257         if (hw->phy.media_type == e1000_media_type_copper) {
3258                 if ((adapter->link_speed == SPEED_1000) &&
3259                    (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
3260                                               &phy_tmp))) {
3261                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3262                         adapter->phy_stats.idle_errors += phy_tmp;
3263                 }
3264         }
3265
3266         /* Management Stats */
3267         adapter->stats.mgptc += rd32(E1000_MGTPTC);
3268         adapter->stats.mgprc += rd32(E1000_MGTPRC);
3269         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3270 }
3271
3272
3273 static irqreturn_t igb_msix_other(int irq, void *data)
3274 {
3275         struct net_device *netdev = data;
3276         struct igb_adapter *adapter = netdev_priv(netdev);
3277         struct e1000_hw *hw = &adapter->hw;
3278         u32 icr = rd32(E1000_ICR);
3279
3280         /* reading ICR causes bit 31 of EICR to be cleared */
3281         if (!(icr & E1000_ICR_LSC))
3282                 goto no_link_interrupt;
3283         hw->mac.get_link_status = 1;
3284         /* guard against interrupt when we're going down */
3285         if (!test_bit(__IGB_DOWN, &adapter->state))
3286                 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3287
3288 no_link_interrupt:
3289         wr32(E1000_IMS, E1000_IMS_LSC);
3290         wr32(E1000_EIMS, adapter->eims_other);
3291
3292         return IRQ_HANDLED;
3293 }
3294
3295 static irqreturn_t igb_msix_tx(int irq, void *data)
3296 {
3297         struct igb_ring *tx_ring = data;
3298         struct igb_adapter *adapter = tx_ring->adapter;
3299         struct e1000_hw *hw = &adapter->hw;
3300
3301 #ifdef CONFIG_IGB_DCA
3302         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3303                 igb_update_tx_dca(tx_ring);
3304 #endif
3305         tx_ring->total_bytes = 0;
3306         tx_ring->total_packets = 0;
3307
3308         /* auto mask will automatically reenable the interrupt when we write
3309          * EICS */
3310         if (!igb_clean_tx_irq(tx_ring))
3311                 /* Ring was not completely cleaned, so fire another interrupt */
3312                 wr32(E1000_EICS, tx_ring->eims_value);
3313         else
3314                 wr32(E1000_EIMS, tx_ring->eims_value);
3315
3316         return IRQ_HANDLED;
3317 }
3318
3319 static void igb_write_itr(struct igb_ring *ring)
3320 {
3321         struct e1000_hw *hw = &ring->adapter->hw;
3322         if ((ring->adapter->itr_setting & 3) && ring->set_itr) {
3323                 switch (hw->mac.type) {
3324                 case e1000_82576:
3325                         wr32(ring->itr_register,
3326                              ring->itr_val |
3327                              0x80000000);
3328                         break;
3329                 default:
3330                         wr32(ring->itr_register,
3331                              ring->itr_val |
3332                              (ring->itr_val << 16));
3333                         break;
3334                 }
3335                 ring->set_itr = 0;
3336         }
3337 }
3338
3339 static irqreturn_t igb_msix_rx(int irq, void *data)
3340 {
3341         struct igb_ring *rx_ring = data;
3342         struct igb_adapter *adapter = rx_ring->adapter;
3343
3344         /* Write the ITR value calculated at the end of the
3345          * previous interrupt.
3346          */
3347
3348         igb_write_itr(rx_ring);
3349
3350         if (netif_rx_schedule_prep(&rx_ring->napi))
3351                 __netif_rx_schedule(&rx_ring->napi);
3352
3353 #ifdef CONFIG_IGB_DCA
3354         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3355                 igb_update_rx_dca(rx_ring);
3356 #endif
3357                 return IRQ_HANDLED;
3358 }
3359
3360 #ifdef CONFIG_IGB_DCA
3361 static void igb_update_rx_dca(struct igb_ring *rx_ring)
3362 {
3363         u32 dca_rxctrl;
3364         struct igb_adapter *adapter = rx_ring->adapter;
3365         struct e1000_hw *hw = &adapter->hw;
3366         int cpu = get_cpu();
3367         int q = rx_ring - adapter->rx_ring;
3368
3369         if (rx_ring->cpu != cpu) {
3370                 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
3371                 if (hw->mac.type == e1000_82576) {
3372                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3373                         dca_rxctrl |= dca_get_tag(cpu) <<
3374                                       E1000_DCA_RXCTRL_CPUID_SHIFT;
3375                 } else {
3376                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3377                         dca_rxctrl |= dca_get_tag(cpu);
3378                 }
3379                 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3380                 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3381                 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3382                 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3383                 rx_ring->cpu = cpu;
3384         }
3385         put_cpu();
3386 }
3387
3388 static void igb_update_tx_dca(struct igb_ring *tx_ring)
3389 {
3390         u32 dca_txctrl;
3391         struct igb_adapter *adapter = tx_ring->adapter;
3392         struct e1000_hw *hw = &adapter->hw;
3393         int cpu = get_cpu();
3394         int q = tx_ring - adapter->tx_ring;
3395
3396         if (tx_ring->cpu != cpu) {
3397                 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
3398                 if (hw->mac.type == e1000_82576) {
3399                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3400                         dca_txctrl |= dca_get_tag(cpu) <<
3401                                       E1000_DCA_TXCTRL_CPUID_SHIFT;
3402                 } else {
3403                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3404                         dca_txctrl |= dca_get_tag(cpu);
3405                 }
3406                 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3407                 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3408                 tx_ring->cpu = cpu;
3409         }
3410         put_cpu();
3411 }
3412
3413 static void igb_setup_dca(struct igb_adapter *adapter)
3414 {
3415         int i;
3416
3417         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
3418                 return;
3419
3420         for (i = 0; i < adapter->num_tx_queues; i++) {
3421                 adapter->tx_ring[i].cpu = -1;
3422                 igb_update_tx_dca(&adapter->tx_ring[i]);
3423         }
3424         for (i = 0; i < adapter->num_rx_queues; i++) {
3425                 adapter->rx_ring[i].cpu = -1;
3426                 igb_update_rx_dca(&adapter->rx_ring[i]);
3427         }
3428 }
3429
3430 static int __igb_notify_dca(struct device *dev, void *data)
3431 {
3432         struct net_device *netdev = dev_get_drvdata(dev);
3433         struct igb_adapter *adapter = netdev_priv(netdev);
3434         struct e1000_hw *hw = &adapter->hw;
3435         unsigned long event = *(unsigned long *)data;
3436
3437         if (!(adapter->flags & IGB_FLAG_HAS_DCA))
3438                 goto out;
3439
3440         switch (event) {
3441         case DCA_PROVIDER_ADD:
3442                 /* if already enabled, don't do it again */
3443                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3444                         break;
3445                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3446                 /* Always use CB2 mode, difference is masked
3447                  * in the CB driver. */
3448                 wr32(E1000_DCA_CTRL, 2);
3449                 if (dca_add_requester(dev) == 0) {
3450                         dev_info(&adapter->pdev->dev, "DCA enabled\n");
3451                         igb_setup_dca(adapter);
3452                         break;
3453                 }
3454                 /* Fall Through since DCA is disabled. */
3455         case DCA_PROVIDER_REMOVE:
3456                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3457                         /* without this a class_device is left
3458                          * hanging around in the sysfs model */
3459                         dca_remove_requester(dev);
3460                         dev_info(&adapter->pdev->dev, "DCA disabled\n");
3461                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3462                         wr32(E1000_DCA_CTRL, 1);
3463                 }
3464                 break;
3465         }
3466 out:
3467         return 0;
3468 }
3469
3470 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3471                           void *p)
3472 {
3473         int ret_val;
3474
3475         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3476                                          __igb_notify_dca);
3477
3478         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3479 }
3480 #endif /* CONFIG_IGB_DCA */
3481
3482 /**
3483  * igb_intr_msi - Interrupt Handler
3484  * @irq: interrupt number
3485  * @data: pointer to a network interface device structure
3486  **/
3487 static irqreturn_t igb_intr_msi(int irq, void *data)
3488 {
3489         struct net_device *netdev = data;
3490         struct igb_adapter *adapter = netdev_priv(netdev);
3491         struct e1000_hw *hw = &adapter->hw;
3492         /* read ICR disables interrupts using IAM */
3493         u32 icr = rd32(E1000_ICR);
3494
3495         igb_write_itr(adapter->rx_ring);
3496
3497         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3498                 hw->mac.get_link_status = 1;
3499                 if (!test_bit(__IGB_DOWN, &adapter->state))
3500                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3501         }
3502
3503         netif_rx_schedule(&adapter->rx_ring[0].napi);
3504
3505         return IRQ_HANDLED;
3506 }
3507
3508 /**
3509  * igb_intr - Interrupt Handler
3510  * @irq: interrupt number
3511  * @data: pointer to a network interface device structure
3512  **/
3513 static irqreturn_t igb_intr(int irq, void *data)
3514 {
3515         struct net_device *netdev = data;
3516         struct igb_adapter *adapter = netdev_priv(netdev);
3517         struct e1000_hw *hw = &adapter->hw;
3518         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
3519          * need for the IMC write */
3520         u32 icr = rd32(E1000_ICR);
3521         u32 eicr = 0;
3522         if (!icr)
3523                 return IRQ_NONE;  /* Not our interrupt */
3524
3525         igb_write_itr(adapter->rx_ring);
3526
3527         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3528          * not set, then the adapter didn't send an interrupt */
3529         if (!(icr & E1000_ICR_INT_ASSERTED))
3530                 return IRQ_NONE;
3531
3532         eicr = rd32(E1000_EICR);
3533
3534         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3535                 hw->mac.get_link_status = 1;
3536                 /* guard against interrupt when we're going down */
3537                 if (!test_bit(__IGB_DOWN, &adapter->state))
3538                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3539         }
3540
3541         netif_rx_schedule(&adapter->rx_ring[0].napi);
3542
3543         return IRQ_HANDLED;
3544 }
3545
3546 /**
3547  * igb_poll - NAPI Rx polling callback
3548  * @napi: napi polling structure
3549  * @budget: count of how many packets we should handle
3550  **/
3551 static int igb_poll(struct napi_struct *napi, int budget)
3552 {
3553         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3554         struct igb_adapter *adapter = rx_ring->adapter;
3555         struct net_device *netdev = adapter->netdev;
3556         int tx_clean_complete, work_done = 0;
3557
3558         /* this poll routine only supports one tx and one rx queue */
3559 #ifdef CONFIG_IGB_DCA
3560         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3561                 igb_update_tx_dca(&adapter->tx_ring[0]);
3562 #endif
3563         tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
3564
3565 #ifdef CONFIG_IGB_DCA
3566         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3567                 igb_update_rx_dca(&adapter->rx_ring[0]);
3568 #endif
3569         igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
3570
3571         /* If no Tx and not enough Rx work done, exit the polling mode */
3572         if ((tx_clean_complete && (work_done < budget)) ||
3573             !netif_running(netdev)) {
3574                 if (adapter->itr_setting & 3)
3575                         igb_set_itr(adapter);
3576                 netif_rx_complete(napi);
3577                 if (!test_bit(__IGB_DOWN, &adapter->state))
3578                         igb_irq_enable(adapter);
3579                 return 0;
3580         }
3581
3582         return 1;
3583 }
3584
3585 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3586 {
3587         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3588         struct igb_adapter *adapter = rx_ring->adapter;
3589         struct e1000_hw *hw = &adapter->hw;
3590         struct net_device *netdev = adapter->netdev;
3591         int work_done = 0;
3592
3593 #ifdef CONFIG_IGB_DCA
3594         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3595                 igb_update_rx_dca(rx_ring);
3596 #endif
3597         igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3598
3599
3600         /* If not enough Rx work done, exit the polling mode */
3601         if ((work_done == 0) || !netif_running(netdev)) {
3602                 netif_rx_complete(napi);
3603
3604                 if (adapter->itr_setting & 3) {
3605                         if (adapter->num_rx_queues == 1)
3606                                 igb_set_itr(adapter);
3607                         else
3608                                 igb_update_ring_itr(rx_ring);
3609                 }
3610
3611                 if (!test_bit(__IGB_DOWN, &adapter->state))
3612                         wr32(E1000_EIMS, rx_ring->eims_value);
3613
3614                 return 0;
3615         }
3616
3617         return 1;
3618 }
3619
3620 static inline u32 get_head(struct igb_ring *tx_ring)
3621 {
3622         void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3623         return le32_to_cpu(*(volatile __le32 *)end);
3624 }
3625
3626 /**
3627  * igb_clean_tx_irq - Reclaim resources after transmit completes
3628  * @adapter: board private structure
3629  * returns true if ring is completely cleaned
3630  **/
3631 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3632 {
3633         struct igb_adapter *adapter = tx_ring->adapter;
3634         struct e1000_hw *hw = &adapter->hw;
3635         struct net_device *netdev = adapter->netdev;
3636         struct e1000_tx_desc *tx_desc;
3637         struct igb_buffer *buffer_info;
3638         struct sk_buff *skb;
3639         unsigned int i;
3640         u32 head, oldhead;
3641         unsigned int count = 0;
3642         unsigned int total_bytes = 0, total_packets = 0;
3643         bool retval = true;
3644
3645         rmb();
3646         head = get_head(tx_ring);
3647         i = tx_ring->next_to_clean;
3648         while (1) {
3649                 while (i != head) {
3650                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3651                         buffer_info = &tx_ring->buffer_info[i];
3652                         skb = buffer_info->skb;
3653
3654                         if (skb) {
3655                                 unsigned int segs, bytecount;
3656                                 /* gso_segs is currently only valid for tcp */
3657                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3658                                 /* multiply data chunks by size of headers */
3659                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3660                                             skb->len;
3661                                 total_packets += segs;
3662                                 total_bytes += bytecount;
3663                         }
3664
3665                         igb_unmap_and_free_tx_resource(adapter, buffer_info);
3666
3667                         i++;
3668                         if (i == tx_ring->count)
3669                                 i = 0;
3670
3671                         count++;
3672                         if (count == IGB_MAX_TX_CLEAN) {
3673                                 retval = false;
3674                                 goto done_cleaning;
3675                         }
3676                 }
3677                 oldhead = head;
3678                 rmb();
3679                 head = get_head(tx_ring);
3680                 if (head == oldhead)
3681                         goto done_cleaning;
3682         }  /* while (1) */
3683
3684 done_cleaning:
3685         tx_ring->next_to_clean = i;
3686
3687         if (unlikely(count &&
3688                      netif_carrier_ok(netdev) &&
3689                      IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3690                 /* Make sure that anybody stopping the queue after this
3691                  * sees the new next_to_clean.
3692                  */
3693                 smp_mb();
3694                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3695                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3696                         netif_wake_subqueue(netdev, tx_ring->queue_index);
3697                         ++adapter->restart_queue;
3698                 }
3699         }
3700
3701         if (tx_ring->detect_tx_hung) {
3702                 /* Detect a transmit hang in hardware, this serializes the
3703                  * check with the clearing of time_stamp and movement of i */
3704                 tx_ring->detect_tx_hung = false;
3705                 if (tx_ring->buffer_info[i].time_stamp &&
3706                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3707                                (adapter->tx_timeout_factor * HZ))
3708                     && !(rd32(E1000_STATUS) &
3709                          E1000_STATUS_TXOFF)) {
3710
3711                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3712                         /* detected Tx unit hang */
3713                         dev_err(&adapter->pdev->dev,
3714                                 "Detected Tx Unit Hang\n"
3715                                 "  Tx Queue             <%d>\n"
3716                                 "  TDH                  <%x>\n"
3717                                 "  TDT                  <%x>\n"
3718                                 "  next_to_use          <%x>\n"
3719                                 "  next_to_clean        <%x>\n"
3720                                 "  head (WB)            <%x>\n"
3721                                 "buffer_info[next_to_clean]\n"
3722                                 "  time_stamp           <%lx>\n"
3723                                 "  jiffies              <%lx>\n"
3724                                 "  desc.status          <%x>\n",
3725                                 tx_ring->queue_index,
3726                                 readl(adapter->hw.hw_addr + tx_ring->head),
3727                                 readl(adapter->hw.hw_addr + tx_ring->tail),
3728                                 tx_ring->next_to_use,
3729                                 tx_ring->next_to_clean,
3730                                 head,
3731                                 tx_ring->buffer_info[i].time_stamp,
3732                                 jiffies,
3733                                 tx_desc->upper.fields.status);
3734                         netif_stop_subqueue(netdev, tx_ring->queue_index);
3735                 }
3736         }
3737         tx_ring->total_bytes += total_bytes;
3738         tx_ring->total_packets += total_packets;
3739         tx_ring->tx_stats.bytes += total_bytes;
3740         tx_ring->tx_stats.packets += total_packets;
3741         adapter->net_stats.tx_bytes += total_bytes;
3742         adapter->net_stats.tx_packets += total_packets;
3743         return retval;
3744 }
3745
3746 #ifdef CONFIG_IGB_LRO
3747  /**
3748  * igb_get_skb_hdr - helper function for LRO header processing
3749  * @skb: pointer to sk_buff to be added to LRO packet
3750  * @iphdr: pointer to ip header structure
3751  * @tcph: pointer to tcp header structure
3752  * @hdr_flags: pointer to header flags
3753  * @priv: pointer to the receive descriptor for the current sk_buff
3754  **/
3755 static int igb_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
3756                            u64 *hdr_flags, void *priv)
3757 {
3758         union e1000_adv_rx_desc *rx_desc = priv;
3759         u16 pkt_type = rx_desc->wb.lower.lo_dword.pkt_info &
3760                        (E1000_RXDADV_PKTTYPE_IPV4 | E1000_RXDADV_PKTTYPE_TCP);
3761
3762         /* Verify that this is a valid IPv4 TCP packet */
3763         if (pkt_type != (E1000_RXDADV_PKTTYPE_IPV4 |
3764                           E1000_RXDADV_PKTTYPE_TCP))
3765                 return -1;
3766
3767         /* Set network headers */
3768         skb_reset_network_header(skb);
3769         skb_set_transport_header(skb, ip_hdrlen(skb));
3770         *iphdr = ip_hdr(skb);
3771         *tcph = tcp_hdr(skb);
3772         *hdr_flags = LRO_IPV4 | LRO_TCP;
3773
3774         return 0;
3775
3776 }
3777 #endif /* CONFIG_IGB_LRO */
3778
3779 /**
3780  * igb_receive_skb - helper function to handle rx indications
3781  * @ring: pointer to receive ring receving this packet
3782  * @status: descriptor status field as written by hardware
3783  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3784  * @skb: pointer to sk_buff to be indicated to stack
3785  **/
3786 static void igb_receive_skb(struct igb_ring *ring, u8 status,
3787                             union e1000_adv_rx_desc * rx_desc,
3788                             struct sk_buff *skb)
3789 {
3790         struct igb_adapter * adapter = ring->adapter;
3791         bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
3792
3793 #ifdef CONFIG_IGB_LRO
3794         if (adapter->netdev->features & NETIF_F_LRO &&
3795             skb->ip_summed == CHECKSUM_UNNECESSARY) {
3796                 if (vlan_extracted)
3797                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
3798                                            adapter->vlgrp,
3799                                            le16_to_cpu(rx_desc->wb.upper.vlan),
3800                                            rx_desc);
3801                 else
3802                         lro_receive_skb(&ring->lro_mgr,skb, rx_desc);
3803                 ring->lro_used = 1;
3804         } else {
3805 #endif
3806                 if (vlan_extracted)
3807                         vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3808                                           le16_to_cpu(rx_desc->wb.upper.vlan));
3809                 else
3810
3811                         netif_receive_skb(skb);
3812 #ifdef CONFIG_IGB_LRO
3813         }
3814 #endif
3815 }
3816
3817
3818 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3819                                        u32 status_err, struct sk_buff *skb)
3820 {
3821         skb->ip_summed = CHECKSUM_NONE;
3822
3823         /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3824         if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3825                 return;
3826         /* TCP/UDP checksum error bit is set */
3827         if (status_err &
3828             (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3829                 /* let the stack verify checksum errors */
3830                 adapter->hw_csum_err++;
3831                 return;
3832         }
3833         /* It must be a TCP or UDP packet with a valid checksum */
3834         if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3835                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3836
3837         adapter->hw_csum_good++;
3838 }
3839
3840 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3841                                  int *work_done, int budget)
3842 {
3843         struct igb_adapter *adapter = rx_ring->adapter;
3844         struct net_device *netdev = adapter->netdev;
3845         struct pci_dev *pdev = adapter->pdev;
3846         union e1000_adv_rx_desc *rx_desc , *next_rxd;
3847         struct igb_buffer *buffer_info , *next_buffer;
3848         struct sk_buff *skb;
3849         unsigned int i;
3850         u32 length, hlen, staterr;
3851         bool cleaned = false;
3852         int cleaned_count = 0;
3853         unsigned int total_bytes = 0, total_packets = 0;
3854
3855         i = rx_ring->next_to_clean;
3856         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3857         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3858
3859         while (staterr & E1000_RXD_STAT_DD) {
3860                 if (*work_done >= budget)
3861                         break;
3862                 (*work_done)++;
3863                 buffer_info = &rx_ring->buffer_info[i];
3864
3865                 /* HW will not DMA in data larger than the given buffer, even
3866                  * if it parses the (NFS, of course) header to be larger.  In
3867                  * that case, it fills the header buffer and spills the rest
3868                  * into the page.
3869                  */
3870                 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3871                   E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3872                 if (hlen > adapter->rx_ps_hdr_size)
3873                         hlen = adapter->rx_ps_hdr_size;
3874
3875                 length = le16_to_cpu(rx_desc->wb.upper.length);
3876                 cleaned = true;
3877                 cleaned_count++;
3878
3879                 skb = buffer_info->skb;
3880                 prefetch(skb->data - NET_IP_ALIGN);
3881                 buffer_info->skb = NULL;
3882                 if (!adapter->rx_ps_hdr_size) {
3883                         pci_unmap_single(pdev, buffer_info->dma,
3884                                          adapter->rx_buffer_len +
3885                                            NET_IP_ALIGN,
3886                                          PCI_DMA_FROMDEVICE);
3887                         skb_put(skb, length);
3888                         goto send_up;
3889                 }
3890
3891                 if (!skb_shinfo(skb)->nr_frags) {
3892                         pci_unmap_single(pdev, buffer_info->dma,
3893                                          adapter->rx_ps_hdr_size +
3894                                            NET_IP_ALIGN,
3895                                          PCI_DMA_FROMDEVICE);
3896                         skb_put(skb, hlen);
3897                 }
3898
3899                 if (length) {
3900                         pci_unmap_page(pdev, buffer_info->page_dma,
3901                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
3902                         buffer_info->page_dma = 0;
3903
3904                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
3905                                                 buffer_info->page,
3906                                                 buffer_info->page_offset,
3907                                                 length);
3908
3909                         if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
3910                             (page_count(buffer_info->page) != 1))
3911                                 buffer_info->page = NULL;
3912                         else
3913                                 get_page(buffer_info->page);
3914
3915                         skb->len += length;
3916                         skb->data_len += length;
3917
3918                         skb->truesize += length;
3919                 }
3920 send_up:
3921                 i++;
3922                 if (i == rx_ring->count)
3923                         i = 0;
3924                 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3925                 prefetch(next_rxd);
3926                 next_buffer = &rx_ring->buffer_info[i];
3927
3928                 if (!(staterr & E1000_RXD_STAT_EOP)) {
3929                         buffer_info->skb = next_buffer->skb;
3930                         buffer_info->dma = next_buffer->dma;
3931                         next_buffer->skb = skb;
3932                         next_buffer->dma = 0;
3933                         goto next_desc;
3934                 }
3935
3936                 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3937                         dev_kfree_skb_irq(skb);
3938                         goto next_desc;
3939                 }
3940
3941                 total_bytes += skb->len;
3942                 total_packets++;
3943
3944                 igb_rx_checksum_adv(adapter, staterr, skb);
3945
3946                 skb->protocol = eth_type_trans(skb, netdev);
3947
3948                 igb_receive_skb(rx_ring, staterr, rx_desc, skb);
3949
3950 next_desc:
3951                 rx_desc->wb.upper.status_error = 0;
3952
3953                 /* return some buffers to hardware, one at a time is too slow */
3954                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3955                         igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3956                         cleaned_count = 0;
3957                 }
3958
3959                 /* use prefetched values */
3960                 rx_desc = next_rxd;
3961                 buffer_info = next_buffer;
3962
3963                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3964         }
3965
3966         rx_ring->next_to_clean = i;
3967         cleaned_count = IGB_DESC_UNUSED(rx_ring);
3968
3969 #ifdef CONFIG_IGB_LRO
3970         if (rx_ring->lro_used) {
3971                 lro_flush_all(&rx_ring->lro_mgr);
3972                 rx_ring->lro_used = 0;
3973         }
3974 #endif
3975
3976         if (cleaned_count)
3977                 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3978
3979         rx_ring->total_packets += total_packets;
3980         rx_ring->total_bytes += total_bytes;
3981         rx_ring->rx_stats.packets += total_packets;
3982         rx_ring->rx_stats.bytes += total_bytes;
3983         adapter->net_stats.rx_bytes += total_bytes;
3984         adapter->net_stats.rx_packets += total_packets;
3985         return cleaned;
3986 }
3987
3988
3989 /**
3990  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3991  * @adapter: address of board private structure
3992  **/
3993 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
3994                                      int cleaned_count)
3995 {
3996         struct igb_adapter *adapter = rx_ring->adapter;
3997         struct net_device *netdev = adapter->netdev;
3998         struct pci_dev *pdev = adapter->pdev;
3999         union e1000_adv_rx_desc *rx_desc;
4000         struct igb_buffer *buffer_info;
4001         struct sk_buff *skb;
4002         unsigned int i;
4003
4004         i = rx_ring->next_to_use;
4005         buffer_info = &rx_ring->buffer_info[i];
4006
4007         while (cleaned_count--) {
4008                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
4009
4010                 if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
4011                         if (!buffer_info->page) {
4012                                 buffer_info->page = alloc_page(GFP_ATOMIC);
4013                                 if (!buffer_info->page) {
4014                                         adapter->alloc_rx_buff_failed++;
4015                                         goto no_buffers;
4016                                 }
4017                                 buffer_info->page_offset = 0;
4018                         } else {
4019                                 buffer_info->page_offset ^= PAGE_SIZE / 2;
4020                         }
4021                         buffer_info->page_dma =
4022                                 pci_map_page(pdev,
4023                                              buffer_info->page,
4024                                              buffer_info->page_offset,
4025                                              PAGE_SIZE / 2,
4026                                              PCI_DMA_FROMDEVICE);
4027                 }
4028
4029                 if (!buffer_info->skb) {
4030                         int bufsz;
4031
4032                         if (adapter->rx_ps_hdr_size)
4033                                 bufsz = adapter->rx_ps_hdr_size;
4034                         else
4035                                 bufsz = adapter->rx_buffer_len;
4036                         bufsz += NET_IP_ALIGN;
4037                         skb = netdev_alloc_skb(netdev, bufsz);
4038
4039                         if (!skb) {
4040                                 adapter->alloc_rx_buff_failed++;
4041                                 goto no_buffers;
4042                         }
4043
4044                         /* Make buffer alignment 2 beyond a 16 byte boundary
4045                          * this will result in a 16 byte aligned IP header after
4046                          * the 14 byte MAC header is removed
4047                          */
4048                         skb_reserve(skb, NET_IP_ALIGN);
4049
4050                         buffer_info->skb = skb;
4051                         buffer_info->dma = pci_map_single(pdev, skb->data,
4052                                                           bufsz,
4053                                                           PCI_DMA_FROMDEVICE);
4054
4055                 }
4056                 /* Refresh the desc even if buffer_addrs didn't change because
4057                  * each write-back erases this info. */
4058                 if (adapter->rx_ps_hdr_size) {
4059                         rx_desc->read.pkt_addr =
4060                              cpu_to_le64(buffer_info->page_dma);
4061                         rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
4062                 } else {
4063                         rx_desc->read.pkt_addr =
4064                              cpu_to_le64(buffer_info->dma);
4065                         rx_desc->read.hdr_addr = 0;
4066                 }
4067
4068                 i++;
4069                 if (i == rx_ring->count)
4070                         i = 0;
4071                 buffer_info = &rx_ring->buffer_info[i];
4072         }
4073
4074 no_buffers:
4075         if (rx_ring->next_to_use != i) {
4076                 rx_ring->next_to_use = i;
4077                 if (i == 0)
4078                         i = (rx_ring->count - 1);
4079                 else
4080                         i--;
4081
4082                 /* Force memory writes to complete before letting h/w
4083                  * know there are new descriptors to fetch.  (Only
4084                  * applicable for weak-ordered memory model archs,
4085                  * such as IA-64). */
4086                 wmb();
4087                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4088         }
4089 }
4090
4091 /**
4092  * igb_mii_ioctl -
4093  * @netdev:
4094  * @ifreq:
4095  * @cmd:
4096  **/
4097 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4098 {
4099         struct igb_adapter *adapter = netdev_priv(netdev);
4100         struct mii_ioctl_data *data = if_mii(ifr);
4101
4102         if (adapter->hw.phy.media_type != e1000_media_type_copper)
4103                 return -EOPNOTSUPP;
4104
4105         switch (cmd) {
4106         case SIOCGMIIPHY:
4107                 data->phy_id = adapter->hw.phy.addr;
4108                 break;
4109         case SIOCGMIIREG:
4110                 if (!capable(CAP_NET_ADMIN))
4111                         return -EPERM;
4112                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4113                                      &data->val_out))
4114                         return -EIO;
4115                 break;
4116         case SIOCSMIIREG:
4117         default:
4118                 return -EOPNOTSUPP;
4119         }
4120         return 0;
4121 }
4122
4123 /**
4124  * igb_ioctl -
4125  * @netdev:
4126  * @ifreq:
4127  * @cmd:
4128  **/
4129 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4130 {
4131         switch (cmd) {
4132         case SIOCGMIIPHY:
4133         case SIOCGMIIREG:
4134         case SIOCSMIIREG:
4135                 return igb_mii_ioctl(netdev, ifr, cmd);
4136         default:
4137                 return -EOPNOTSUPP;
4138         }
4139 }
4140
4141 static void igb_vlan_rx_register(struct net_device *netdev,
4142                                  struct vlan_group *grp)
4143 {
4144         struct igb_adapter *adapter = netdev_priv(netdev);
4145         struct e1000_hw *hw = &adapter->hw;
4146         u32 ctrl, rctl;
4147
4148         igb_irq_disable(adapter);
4149         adapter->vlgrp = grp;
4150
4151         if (grp) {
4152                 /* enable VLAN tag insert/strip */
4153                 ctrl = rd32(E1000_CTRL);
4154                 ctrl |= E1000_CTRL_VME;
4155                 wr32(E1000_CTRL, ctrl);
4156
4157                 /* enable VLAN receive filtering */
4158                 rctl = rd32(E1000_RCTL);
4159                 rctl &= ~E1000_RCTL_CFIEN;
4160                 wr32(E1000_RCTL, rctl);
4161                 igb_update_mng_vlan(adapter);
4162                 wr32(E1000_RLPML,
4163                                 adapter->max_frame_size + VLAN_TAG_SIZE);
4164         } else {
4165                 /* disable VLAN tag insert/strip */
4166                 ctrl = rd32(E1000_CTRL);
4167                 ctrl &= ~E1000_CTRL_VME;
4168                 wr32(E1000_CTRL, ctrl);
4169
4170                 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4171                         igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4172                         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4173                 }
4174                 wr32(E1000_RLPML,
4175                                 adapter->max_frame_size);
4176         }
4177
4178         if (!test_bit(__IGB_DOWN, &adapter->state))
4179                 igb_irq_enable(adapter);
4180 }
4181
4182 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4183 {
4184         struct igb_adapter *adapter = netdev_priv(netdev);
4185         struct e1000_hw *hw = &adapter->hw;
4186         u32 vfta, index;
4187
4188         if ((adapter->hw.mng_cookie.status &
4189              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4190             (vid == adapter->mng_vlan_id))
4191                 return;
4192         /* add VID to filter table */
4193         index = (vid >> 5) & 0x7F;
4194         vfta = array_rd32(E1000_VFTA, index);
4195         vfta |= (1 << (vid & 0x1F));
4196         igb_write_vfta(&adapter->hw, index, vfta);
4197 }
4198
4199 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4200 {
4201         struct igb_adapter *adapter = netdev_priv(netdev);
4202         struct e1000_hw *hw = &adapter->hw;
4203         u32 vfta, index;
4204
4205         igb_irq_disable(adapter);
4206         vlan_group_set_device(adapter->vlgrp, vid, NULL);
4207
4208         if (!test_bit(__IGB_DOWN, &adapter->state))
4209                 igb_irq_enable(adapter);
4210
4211         if ((adapter->hw.mng_cookie.status &
4212              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4213             (vid == adapter->mng_vlan_id)) {
4214                 /* release control to f/w */
4215                 igb_release_hw_control(adapter);
4216                 return;
4217         }
4218
4219         /* remove VID from filter table */
4220         index = (vid >> 5) & 0x7F;
4221         vfta = array_rd32(E1000_VFTA, index);
4222         vfta &= ~(1 << (vid & 0x1F));
4223         igb_write_vfta(&adapter->hw, index, vfta);
4224 }
4225
4226 static void igb_restore_vlan(struct igb_adapter *adapter)
4227 {
4228         igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4229
4230         if (adapter->vlgrp) {
4231                 u16 vid;
4232                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4233                         if (!vlan_group_get_device(adapter->vlgrp, vid))
4234                                 continue;
4235                         igb_vlan_rx_add_vid(adapter->netdev, vid);
4236                 }
4237         }
4238 }
4239
4240 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4241 {
4242         struct e1000_mac_info *mac = &adapter->hw.mac;
4243
4244         mac->autoneg = 0;
4245
4246         /* Fiber NICs only allow 1000 gbps Full duplex */
4247         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4248                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4249                 dev_err(&adapter->pdev->dev,
4250                         "Unsupported Speed/Duplex configuration\n");
4251                 return -EINVAL;
4252         }
4253
4254         switch (spddplx) {
4255         case SPEED_10 + DUPLEX_HALF:
4256                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4257                 break;
4258         case SPEED_10 + DUPLEX_FULL:
4259                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4260                 break;
4261         case SPEED_100 + DUPLEX_HALF:
4262                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4263                 break;
4264         case SPEED_100 + DUPLEX_FULL:
4265                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4266                 break;
4267         case SPEED_1000 + DUPLEX_FULL:
4268                 mac->autoneg = 1;
4269                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4270                 break;
4271         case SPEED_1000 + DUPLEX_HALF: /* not supported */
4272         default:
4273                 dev_err(&adapter->pdev->dev,
4274                         "Unsupported Speed/Duplex configuration\n");
4275                 return -EINVAL;
4276         }
4277         return 0;
4278 }
4279
4280
4281 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4282 {
4283         struct net_device *netdev = pci_get_drvdata(pdev);
4284         struct igb_adapter *adapter = netdev_priv(netdev);
4285         struct e1000_hw *hw = &adapter->hw;
4286         u32 ctrl, rctl, status;
4287         u32 wufc = adapter->wol;
4288 #ifdef CONFIG_PM
4289         int retval = 0;
4290 #endif
4291
4292         netif_device_detach(netdev);
4293
4294         if (netif_running(netdev))
4295                 igb_close(netdev);
4296
4297         igb_reset_interrupt_capability(adapter);
4298
4299         igb_free_queues(adapter);
4300
4301 #ifdef CONFIG_PM
4302         retval = pci_save_state(pdev);
4303         if (retval)
4304                 return retval;
4305 #endif
4306
4307         status = rd32(E1000_STATUS);
4308         if (status & E1000_STATUS_LU)
4309                 wufc &= ~E1000_WUFC_LNKC;
4310
4311         if (wufc) {
4312                 igb_setup_rctl(adapter);
4313                 igb_set_multi(netdev);
4314
4315                 /* turn on all-multi mode if wake on multicast is enabled */
4316                 if (wufc & E1000_WUFC_MC) {
4317                         rctl = rd32(E1000_RCTL);
4318                         rctl |= E1000_RCTL_MPE;
4319                         wr32(E1000_RCTL, rctl);
4320                 }
4321
4322                 ctrl = rd32(E1000_CTRL);
4323                 /* advertise wake from D3Cold */
4324                 #define E1000_CTRL_ADVD3WUC 0x00100000
4325                 /* phy power management enable */
4326                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4327                 ctrl |= E1000_CTRL_ADVD3WUC;
4328                 wr32(E1000_CTRL, ctrl);
4329
4330                 /* Allow time for pending master requests to run */
4331                 igb_disable_pcie_master(&adapter->hw);
4332
4333                 wr32(E1000_WUC, E1000_WUC_PME_EN);
4334                 wr32(E1000_WUFC, wufc);
4335         } else {
4336                 wr32(E1000_WUC, 0);
4337                 wr32(E1000_WUFC, 0);
4338         }
4339
4340         /* make sure adapter isn't asleep if manageability/wol is enabled */
4341         if (wufc || adapter->en_mng_pt) {
4342                 pci_enable_wake(pdev, PCI_D3hot, 1);
4343                 pci_enable_wake(pdev, PCI_D3cold, 1);
4344         } else {
4345                 igb_shutdown_fiber_serdes_link_82575(hw);
4346                 pci_enable_wake(pdev, PCI_D3hot, 0);
4347                 pci_enable_wake(pdev, PCI_D3cold, 0);
4348         }
4349
4350         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
4351          * would have already happened in close and is redundant. */
4352         igb_release_hw_control(adapter);
4353
4354         pci_disable_device(pdev);
4355
4356         pci_set_power_state(pdev, pci_choose_state(pdev, state));
4357
4358         return 0;
4359 }
4360
4361 #ifdef CONFIG_PM
4362 static int igb_resume(struct pci_dev *pdev)
4363 {
4364         struct net_device *netdev = pci_get_drvdata(pdev);
4365         struct igb_adapter *adapter = netdev_priv(netdev);
4366         struct e1000_hw *hw = &adapter->hw;
4367         u32 err;
4368
4369         pci_set_power_state(pdev, PCI_D0);
4370         pci_restore_state(pdev);
4371
4372         if (adapter->need_ioport)
4373                 err = pci_enable_device(pdev);
4374         else
4375                 err = pci_enable_device_mem(pdev);
4376         if (err) {
4377                 dev_err(&pdev->dev,
4378                         "igb: Cannot enable PCI device from suspend\n");
4379                 return err;
4380         }
4381         pci_set_master(pdev);
4382
4383         pci_enable_wake(pdev, PCI_D3hot, 0);
4384         pci_enable_wake(pdev, PCI_D3cold, 0);
4385
4386         igb_set_interrupt_capability(adapter);
4387
4388         if (igb_alloc_queues(adapter)) {
4389                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4390                 return -ENOMEM;
4391         }
4392
4393         /* e1000_power_up_phy(adapter); */
4394
4395         igb_reset(adapter);
4396         wr32(E1000_WUS, ~0);
4397
4398         if (netif_running(netdev)) {
4399                 err = igb_open(netdev);
4400                 if (err)
4401                         return err;
4402         }
4403
4404         netif_device_attach(netdev);
4405
4406         /* let the f/w know that the h/w is now under the control of the
4407          * driver. */
4408         igb_get_hw_control(adapter);
4409
4410         return 0;
4411 }
4412 #endif
4413
4414 static void igb_shutdown(struct pci_dev *pdev)
4415 {
4416         igb_suspend(pdev, PMSG_SUSPEND);
4417 }
4418
4419 #ifdef CONFIG_NET_POLL_CONTROLLER
4420 /*
4421  * Polling 'interrupt' - used by things like netconsole to send skbs
4422  * without having to re-enable interrupts. It's not called while
4423  * the interrupt routine is executing.
4424  */
4425 static void igb_netpoll(struct net_device *netdev)
4426 {
4427         struct igb_adapter *adapter = netdev_priv(netdev);
4428         int i;
4429         int work_done = 0;
4430
4431         igb_irq_disable(adapter);
4432         adapter->flags |= IGB_FLAG_IN_NETPOLL;
4433
4434         for (i = 0; i < adapter->num_tx_queues; i++)
4435                 igb_clean_tx_irq(&adapter->tx_ring[i]);
4436
4437         for (i = 0; i < adapter->num_rx_queues; i++)
4438                 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4439                                      &work_done,
4440                                      adapter->rx_ring[i].napi.weight);
4441
4442         adapter->flags &= ~IGB_FLAG_IN_NETPOLL;
4443         igb_irq_enable(adapter);
4444 }
4445 #endif /* CONFIG_NET_POLL_CONTROLLER */
4446
4447 /**
4448  * igb_io_error_detected - called when PCI error is detected
4449  * @pdev: Pointer to PCI device
4450  * @state: The current pci connection state
4451  *
4452  * This function is called after a PCI bus error affecting
4453  * this device has been detected.
4454  */
4455 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4456                                               pci_channel_state_t state)
4457 {
4458         struct net_device *netdev = pci_get_drvdata(pdev);
4459         struct igb_adapter *adapter = netdev_priv(netdev);
4460
4461         netif_device_detach(netdev);
4462
4463         if (netif_running(netdev))
4464                 igb_down(adapter);
4465         pci_disable_device(pdev);
4466
4467         /* Request a slot slot reset. */
4468         return PCI_ERS_RESULT_NEED_RESET;
4469 }
4470
4471 /**
4472  * igb_io_slot_reset - called after the pci bus has been reset.
4473  * @pdev: Pointer to PCI device
4474  *
4475  * Restart the card from scratch, as if from a cold-boot. Implementation
4476  * resembles the first-half of the igb_resume routine.
4477  */
4478 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4479 {
4480         struct net_device *netdev = pci_get_drvdata(pdev);
4481         struct igb_adapter *adapter = netdev_priv(netdev);
4482         struct e1000_hw *hw = &adapter->hw;
4483         pci_ers_result_t result;
4484         int err;
4485
4486         if (adapter->need_ioport)
4487                 err = pci_enable_device(pdev);
4488         else
4489                 err = pci_enable_device_mem(pdev);
4490
4491         if (err) {
4492                 dev_err(&pdev->dev,
4493                         "Cannot re-enable PCI device after reset.\n");
4494                 result = PCI_ERS_RESULT_DISCONNECT;
4495         } else {
4496                 pci_set_master(pdev);
4497                 pci_restore_state(pdev);
4498
4499                 pci_enable_wake(pdev, PCI_D3hot, 0);
4500                 pci_enable_wake(pdev, PCI_D3cold, 0);
4501
4502                 igb_reset(adapter);
4503                 wr32(E1000_WUS, ~0);
4504                 result = PCI_ERS_RESULT_RECOVERED;
4505         }
4506
4507         err = pci_cleanup_aer_uncorrect_error_status(pdev);
4508         if (err) {
4509                 dev_err(&pdev->dev, "pci_cleanup_aer_uncorrect_error_status "
4510                         "failed 0x%0x\n", err);
4511                 /* non-fatal, continue */
4512         }
4513
4514         return result;
4515 }
4516
4517 /**
4518  * igb_io_resume - called when traffic can start flowing again.
4519  * @pdev: Pointer to PCI device
4520  *
4521  * This callback is called when the error recovery driver tells us that
4522  * its OK to resume normal operation. Implementation resembles the
4523  * second-half of the igb_resume routine.
4524  */
4525 static void igb_io_resume(struct pci_dev *pdev)
4526 {
4527         struct net_device *netdev = pci_get_drvdata(pdev);
4528         struct igb_adapter *adapter = netdev_priv(netdev);
4529
4530         if (netif_running(netdev)) {
4531                 if (igb_up(adapter)) {
4532                         dev_err(&pdev->dev, "igb_up failed after reset\n");
4533                         return;
4534                 }
4535         }
4536
4537         netif_device_attach(netdev);
4538
4539         /* let the f/w know that the h/w is now under the control of the
4540          * driver. */
4541         igb_get_hw_control(adapter);
4542 }
4543
4544 /* igb_main.c */