drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*******************************************************************************
   3   STMMAC Ethtool support
   4
   5   Copyright (C) 2007-2009  STMicroelectronics Ltd
   6
   7
   8   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
   9 *******************************************************************************/
  10
  11 #include <linux/etherdevice.h>
  12 #include <linux/ethtool.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/mii.h>
  15 #include <linux/phylink.h>
  16 #include <linux/net_tstamp.h>
  17 #include <asm/io.h>
  18
  19 #include "stmmac.h"
  20 #include "dwmac_dma.h"
  21 #include "dwxgmac2.h"
  22
  23 #define REG_SPACE_SIZE  0x1060
  24 #define GMAC4_REG_SPACE_SIZE    0x116C
  25 #define MAC100_ETHTOOL_NAME     "st_mac100"
  26 #define GMAC_ETHTOOL_NAME       "st_gmac"
  27 #define XGMAC_ETHTOOL_NAME      "st_xgmac"
  28
  29 /* Same as DMA_CHAN_BASE_ADDR defined in dwmac4_dma.h
  30  *
  31  * It is here because dwmac_dma.h and dwmac4_dam.h can not be included at the
  32  * same time due to the conflicting macro names.
  33  */
  34 #define GMAC4_DMA_CHAN_BASE_ADDR  0x00001100
  35
  36 #define ETHTOOL_DMA_OFFSET      55
  37
  38 struct stmmac_stats {
  39         char stat_string[ETH_GSTRING_LEN];
  40         int sizeof_stat;
  41         int stat_offset;
  42 };
  43
  44 #define STMMAC_STAT(m)  \
  45         { #m, sizeof_field(struct stmmac_extra_stats, m),       \
  46         offsetof(struct stmmac_priv, xstats.m)}
  47
  48 static const struct stmmac_stats stmmac_gstrings_stats[] = {
  49         /* Transmit errors */
  50         STMMAC_STAT(tx_underflow),
  51         STMMAC_STAT(tx_carrier),
  52         STMMAC_STAT(tx_losscarrier),
  53         STMMAC_STAT(vlan_tag),
  54         STMMAC_STAT(tx_deferred),
  55         STMMAC_STAT(tx_vlan),
  56         STMMAC_STAT(tx_jabber),
  57         STMMAC_STAT(tx_frame_flushed),
  58         STMMAC_STAT(tx_payload_error),
  59         STMMAC_STAT(tx_ip_header_error),
  60         /* Receive errors */
  61         STMMAC_STAT(rx_desc),
  62         STMMAC_STAT(sa_filter_fail),
  63         STMMAC_STAT(overflow_error),
  64         STMMAC_STAT(ipc_csum_error),
  65         STMMAC_STAT(rx_collision),
  66         STMMAC_STAT(rx_crc_errors),
  67         STMMAC_STAT(dribbling_bit),
  68         STMMAC_STAT(rx_length),
  69         STMMAC_STAT(rx_mii),
  70         STMMAC_STAT(rx_multicast),
  71         STMMAC_STAT(rx_gmac_overflow),
  72         STMMAC_STAT(rx_watchdog),
  73         STMMAC_STAT(da_rx_filter_fail),
  74         STMMAC_STAT(sa_rx_filter_fail),
  75         STMMAC_STAT(rx_missed_cntr),
  76         STMMAC_STAT(rx_overflow_cntr),
  77         STMMAC_STAT(rx_vlan),
  78         STMMAC_STAT(rx_split_hdr_pkt_n),
  79         /* Tx/Rx IRQ error info */
  80         STMMAC_STAT(tx_undeflow_irq),
  81         STMMAC_STAT(tx_process_stopped_irq),
  82         STMMAC_STAT(tx_jabber_irq),
  83         STMMAC_STAT(rx_overflow_irq),
  84         STMMAC_STAT(rx_buf_unav_irq),
  85         STMMAC_STAT(rx_process_stopped_irq),
  86         STMMAC_STAT(rx_watchdog_irq),
  87         STMMAC_STAT(tx_early_irq),
  88         STMMAC_STAT(fatal_bus_error_irq),
  89         /* Tx/Rx IRQ Events */
  90         STMMAC_STAT(rx_early_irq),
  91         STMMAC_STAT(threshold),
  92         STMMAC_STAT(irq_receive_pmt_irq_n),
  93         /* MMC info */
  94         STMMAC_STAT(mmc_tx_irq_n),
  95         STMMAC_STAT(mmc_rx_irq_n),
  96         STMMAC_STAT(mmc_rx_csum_offload_irq_n),
  97         /* EEE */
  98         STMMAC_STAT(irq_tx_path_in_lpi_mode_n),
  99         STMMAC_STAT(irq_tx_path_exit_lpi_mode_n),
 100         STMMAC_STAT(irq_rx_path_in_lpi_mode_n),
 101         STMMAC_STAT(irq_rx_path_exit_lpi_mode_n),
 102         STMMAC_STAT(phy_eee_wakeup_error_n),
 103         /* Extended RDES status */
 104         STMMAC_STAT(ip_hdr_err),
 105         STMMAC_STAT(ip_payload_err),
 106         STMMAC_STAT(ip_csum_bypassed),
 107         STMMAC_STAT(ipv4_pkt_rcvd),
 108         STMMAC_STAT(ipv6_pkt_rcvd),
 109         STMMAC_STAT(no_ptp_rx_msg_type_ext),
 110         STMMAC_STAT(ptp_rx_msg_type_sync),
 111         STMMAC_STAT(ptp_rx_msg_type_follow_up),
 112         STMMAC_STAT(ptp_rx_msg_type_delay_req),
 113         STMMAC_STAT(ptp_rx_msg_type_delay_resp),
 114         STMMAC_STAT(ptp_rx_msg_type_pdelay_req),
 115         STMMAC_STAT(ptp_rx_msg_type_pdelay_resp),
 116         STMMAC_STAT(ptp_rx_msg_type_pdelay_follow_up),
 117         STMMAC_STAT(ptp_rx_msg_type_announce),
 118         STMMAC_STAT(ptp_rx_msg_type_management),
 119         STMMAC_STAT(ptp_rx_msg_pkt_reserved_type),
 120         STMMAC_STAT(ptp_frame_type),
 121         STMMAC_STAT(ptp_ver),
 122         STMMAC_STAT(timestamp_dropped),
 123         STMMAC_STAT(av_pkt_rcvd),
 124         STMMAC_STAT(av_tagged_pkt_rcvd),
 125         STMMAC_STAT(vlan_tag_priority_val),
 126         STMMAC_STAT(l3_filter_match),
 127         STMMAC_STAT(l4_filter_match),
 128         STMMAC_STAT(l3_l4_filter_no_match),
 129         /* PCS */
 130         STMMAC_STAT(irq_pcs_ane_n),
 131         STMMAC_STAT(irq_pcs_link_n),
 132         STMMAC_STAT(irq_rgmii_n),
 133         /* DEBUG */
 134         STMMAC_STAT(mtl_tx_status_fifo_full),
 135         STMMAC_STAT(mtl_tx_fifo_not_empty),
 136         STMMAC_STAT(mmtl_fifo_ctrl),
 137         STMMAC_STAT(mtl_tx_fifo_read_ctrl_write),
 138         STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait),
 139         STMMAC_STAT(mtl_tx_fifo_read_ctrl_read),
 140         STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle),
 141         STMMAC_STAT(mac_tx_in_pause),
 142         STMMAC_STAT(mac_tx_frame_ctrl_xfer),
 143         STMMAC_STAT(mac_tx_frame_ctrl_idle),
 144         STMMAC_STAT(mac_tx_frame_ctrl_wait),
 145         STMMAC_STAT(mac_tx_frame_ctrl_pause),
 146         STMMAC_STAT(mac_gmii_tx_proto_engine),
 147         STMMAC_STAT(mtl_rx_fifo_fill_level_full),
 148         STMMAC_STAT(mtl_rx_fifo_fill_above_thresh),
 149         STMMAC_STAT(mtl_rx_fifo_fill_below_thresh),
 150         STMMAC_STAT(mtl_rx_fifo_fill_level_empty),
 151         STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush),
 152         STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data),
 153         STMMAC_STAT(mtl_rx_fifo_read_ctrl_status),
 154         STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle),
 155         STMMAC_STAT(mtl_rx_fifo_ctrl_active),
 156         STMMAC_STAT(mac_rx_frame_ctrl_fifo),
 157         STMMAC_STAT(mac_gmii_rx_proto_engine),
 158         /* EST */
 159         STMMAC_STAT(mtl_est_cgce),
 160         STMMAC_STAT(mtl_est_hlbs),
 161         STMMAC_STAT(mtl_est_hlbf),
 162         STMMAC_STAT(mtl_est_btre),
 163         STMMAC_STAT(mtl_est_btrlm),
 164 };
 165 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
 166
 167 /* statistics collected in queue which will be summed up for all TX or RX
 168  * queues, or summed up for both TX and RX queues(napi_poll, normal_irq_n).
 169  */
 170 static const char stmmac_qstats_string[][ETH_GSTRING_LEN] = {
 171         "rx_pkt_n",
 172         "rx_normal_irq_n",
 173         "tx_pkt_n",
 174         "tx_normal_irq_n",
 175         "tx_clean",
 176         "tx_set_ic_bit",
 177         "tx_tso_frames",
 178         "tx_tso_nfrags",
 179         "normal_irq_n",
 180         "napi_poll",
 181 };
 182 #define STMMAC_QSTATS ARRAY_SIZE(stmmac_qstats_string)
 183
 184 /* HW MAC Management counters (if supported) */
 185 #define STMMAC_MMC_STAT(m)      \
 186         { #m, sizeof_field(struct stmmac_counters, m),  \
 187         offsetof(struct stmmac_priv, mmc.m)}
 188
 189 static const struct stmmac_stats stmmac_mmc[] = {
 190         STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
 191         STMMAC_MMC_STAT(mmc_tx_framecount_gb),
 192         STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
 193         STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
 194         STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
 195         STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
 196         STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
 197         STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
 198         STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
 199         STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
 200         STMMAC_MMC_STAT(mmc_tx_unicast_gb),
 201         STMMAC_MMC_STAT(mmc_tx_multicast_gb),
 202         STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
 203         STMMAC_MMC_STAT(mmc_tx_underflow_error),
 204         STMMAC_MMC_STAT(mmc_tx_singlecol_g),
 205         STMMAC_MMC_STAT(mmc_tx_multicol_g),
 206         STMMAC_MMC_STAT(mmc_tx_deferred),
 207         STMMAC_MMC_STAT(mmc_tx_latecol),
 208         STMMAC_MMC_STAT(mmc_tx_exesscol),
 209         STMMAC_MMC_STAT(mmc_tx_carrier_error),
 210         STMMAC_MMC_STAT(mmc_tx_octetcount_g),
 211         STMMAC_MMC_STAT(mmc_tx_framecount_g),
 212         STMMAC_MMC_STAT(mmc_tx_excessdef),
 213         STMMAC_MMC_STAT(mmc_tx_pause_frame),
 214         STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
 215         STMMAC_MMC_STAT(mmc_tx_lpi_usec),
 216         STMMAC_MMC_STAT(mmc_tx_lpi_tran),
 217         STMMAC_MMC_STAT(mmc_rx_framecount_gb),
 218         STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
 219         STMMAC_MMC_STAT(mmc_rx_octetcount_g),
 220         STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
 221         STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
 222         STMMAC_MMC_STAT(mmc_rx_crc_error),
 223         STMMAC_MMC_STAT(mmc_rx_align_error),
 224         STMMAC_MMC_STAT(mmc_rx_run_error),
 225         STMMAC_MMC_STAT(mmc_rx_jabber_error),
 226         STMMAC_MMC_STAT(mmc_rx_undersize_g),
 227         STMMAC_MMC_STAT(mmc_rx_oversize_g),
 228         STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
 229         STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
 230         STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
 231         STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
 232         STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
 233         STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
 234         STMMAC_MMC_STAT(mmc_rx_unicast_g),
 235         STMMAC_MMC_STAT(mmc_rx_length_error),
 236         STMMAC_MMC_STAT(mmc_rx_autofrangetype),
 237         STMMAC_MMC_STAT(mmc_rx_pause_frames),
 238         STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
 239         STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
 240         STMMAC_MMC_STAT(mmc_rx_watchdog_error),
 241         STMMAC_MMC_STAT(mmc_rx_lpi_usec),
 242         STMMAC_MMC_STAT(mmc_rx_lpi_tran),
 243         STMMAC_MMC_STAT(mmc_rx_discard_frames_gb),
 244         STMMAC_MMC_STAT(mmc_rx_discard_octets_gb),
 245         STMMAC_MMC_STAT(mmc_rx_align_err_frames),
 246         STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
 247         STMMAC_MMC_STAT(mmc_rx_ipc_intr),
 248         STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
 249         STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
 250         STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
 251         STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
 252         STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
 253         STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
 254         STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
 255         STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
 256         STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
 257         STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
 258         STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
 259         STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
 260         STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
 261         STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
 262         STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
 263         STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
 264         STMMAC_MMC_STAT(mmc_rx_udp_gd),
 265         STMMAC_MMC_STAT(mmc_rx_udp_err),
 266         STMMAC_MMC_STAT(mmc_rx_tcp_gd),
 267         STMMAC_MMC_STAT(mmc_rx_tcp_err),
 268         STMMAC_MMC_STAT(mmc_rx_icmp_gd),
 269         STMMAC_MMC_STAT(mmc_rx_icmp_err),
 270         STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
 271         STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
 272         STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
 273         STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
 274         STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
 275         STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
 276         STMMAC_MMC_STAT(mmc_sgf_pass_fragment_cntr),
 277         STMMAC_MMC_STAT(mmc_sgf_fail_fragment_cntr),
 278         STMMAC_MMC_STAT(mmc_tx_fpe_fragment_cntr),
 279         STMMAC_MMC_STAT(mmc_tx_hold_req_cntr),
 280         STMMAC_MMC_STAT(mmc_tx_gate_overrun_cntr),
 281         STMMAC_MMC_STAT(mmc_rx_packet_assembly_err_cntr),
 282         STMMAC_MMC_STAT(mmc_rx_packet_smd_err_cntr),
 283         STMMAC_MMC_STAT(mmc_rx_packet_assembly_ok_cntr),
 284         STMMAC_MMC_STAT(mmc_rx_fpe_fragment_cntr),
 285 };
 286 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc)
 287
 288 static const char stmmac_qstats_tx_string[][ETH_GSTRING_LEN] = {
 289         "tx_pkt_n",
 290         "tx_irq_n",
 291 #define STMMAC_TXQ_STATS ARRAY_SIZE(stmmac_qstats_tx_string)
 292 };
 293
 294 static const char stmmac_qstats_rx_string[][ETH_GSTRING_LEN] = {
 295         "rx_pkt_n",
 296         "rx_irq_n",
 297 #define STMMAC_RXQ_STATS ARRAY_SIZE(stmmac_qstats_rx_string)
 298 };
 299
 300 static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
 301                                       struct ethtool_drvinfo *info)
 302 {
 303         struct stmmac_priv *priv = netdev_priv(dev);
 304
 305         if (priv->plat->has_gmac || priv->plat->has_gmac4)
 306                 strscpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
 307         else if (priv->plat->has_xgmac)
 308                 strscpy(info->driver, XGMAC_ETHTOOL_NAME, sizeof(info->driver));
 309         else
 310                 strscpy(info->driver, MAC100_ETHTOOL_NAME,
 311                         sizeof(info->driver));
 312
 313         if (priv->plat->pdev) {
 314                 strscpy(info->bus_info, pci_name(priv->plat->pdev),
 315                         sizeof(info->bus_info));
 316         }
 317 }
 318
 319 static int stmmac_ethtool_get_link_ksettings(struct net_device *dev,
 320                                              struct ethtool_link_ksettings *cmd)
 321 {
 322         struct stmmac_priv *priv = netdev_priv(dev);
 323
 324         if (priv->hw->pcs & STMMAC_PCS_RGMII ||
 325             priv->hw->pcs & STMMAC_PCS_SGMII) {
 326                 struct rgmii_adv adv;
 327                 u32 supported, advertising, lp_advertising;
 328
 329                 if (!priv->xstats.pcs_link) {
 330                         cmd->base.speed = SPEED_UNKNOWN;
 331                         cmd->base.duplex = DUPLEX_UNKNOWN;
 332                         return 0;
 333                 }
 334                 cmd->base.duplex = priv->xstats.pcs_duplex;
 335
 336                 cmd->base.speed = priv->xstats.pcs_speed;
 337
 338                 /* Get and convert ADV/LP_ADV from the HW AN registers */
 339                 if (stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv))
 340                         return -EOPNOTSUPP;     /* should never happen indeed */
 341
 342                 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */
 343
 344                 ethtool_convert_link_mode_to_legacy_u32(
 345                         &supported, cmd->link_modes.supported);
 346                 ethtool_convert_link_mode_to_legacy_u32(
 347                         &advertising, cmd->link_modes.advertising);
 348                 ethtool_convert_link_mode_to_legacy_u32(
 349                         &lp_advertising, cmd->link_modes.lp_advertising);
 350
 351                 if (adv.pause & STMMAC_PCS_PAUSE)
 352                         advertising |= ADVERTISED_Pause;
 353                 if (adv.pause & STMMAC_PCS_ASYM_PAUSE)
 354                         advertising |= ADVERTISED_Asym_Pause;
 355                 if (adv.lp_pause & STMMAC_PCS_PAUSE)
 356                         lp_advertising |= ADVERTISED_Pause;
 357                 if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE)
 358                         lp_advertising |= ADVERTISED_Asym_Pause;
 359
 360                 /* Reg49[3] always set because ANE is always supported */
 361                 cmd->base.autoneg = ADVERTISED_Autoneg;
 362                 supported |= SUPPORTED_Autoneg;
 363                 advertising |= ADVERTISED_Autoneg;
 364                 lp_advertising |= ADVERTISED_Autoneg;
 365
 366                 if (adv.duplex) {
 367                         supported |= (SUPPORTED_1000baseT_Full |
 368                                       SUPPORTED_100baseT_Full |
 369                                       SUPPORTED_10baseT_Full);
 370                         advertising |= (ADVERTISED_1000baseT_Full |
 371                                         ADVERTISED_100baseT_Full |
 372                                         ADVERTISED_10baseT_Full);
 373                 } else {
 374                         supported |= (SUPPORTED_1000baseT_Half |
 375                                       SUPPORTED_100baseT_Half |
 376                                       SUPPORTED_10baseT_Half);
 377                         advertising |= (ADVERTISED_1000baseT_Half |
 378                                         ADVERTISED_100baseT_Half |
 379                                         ADVERTISED_10baseT_Half);
 380                 }
 381                 if (adv.lp_duplex)
 382                         lp_advertising |= (ADVERTISED_1000baseT_Full |
 383                                            ADVERTISED_100baseT_Full |
 384                                            ADVERTISED_10baseT_Full);
 385                 else
 386                         lp_advertising |= (ADVERTISED_1000baseT_Half |
 387                                            ADVERTISED_100baseT_Half |
 388                                            ADVERTISED_10baseT_Half);
 389                 cmd->base.port = PORT_OTHER;
 390
 391                 ethtool_convert_legacy_u32_to_link_mode(
 392                         cmd->link_modes.supported, supported);
 393                 ethtool_convert_legacy_u32_to_link_mode(
 394                         cmd->link_modes.advertising, advertising);
 395                 ethtool_convert_legacy_u32_to_link_mode(
 396                         cmd->link_modes.lp_advertising, lp_advertising);
 397
 398                 return 0;
 399         }
 400
 401         return phylink_ethtool_ksettings_get(priv->phylink, cmd);
 402 }
 403
 404 static int
 405 stmmac_ethtool_set_link_ksettings(struct net_device *dev,
 406                                   const struct ethtool_link_ksettings *cmd)
 407 {
 408         struct stmmac_priv *priv = netdev_priv(dev);
 409
 410         if (priv->hw->pcs & STMMAC_PCS_RGMII ||
 411             priv->hw->pcs & STMMAC_PCS_SGMII) {
 412                 /* Only support ANE */
 413                 if (cmd->base.autoneg != AUTONEG_ENABLE)
 414                         return -EINVAL;
 415
 416                 mutex_lock(&priv->lock);
 417                 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, priv->hw->ps, 0);
 418                 mutex_unlock(&priv->lock);
 419
 420                 return 0;
 421         }
 422
 423         return phylink_ethtool_ksettings_set(priv->phylink, cmd);
 424 }
 425
 426 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
 427 {
 428         struct stmmac_priv *priv = netdev_priv(dev);
 429         return priv->msg_enable;
 430 }
 431
 432 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
 433 {
 434         struct stmmac_priv *priv = netdev_priv(dev);
 435         priv->msg_enable = level;
 436
 437 }
 438
 439 static int stmmac_check_if_running(struct net_device *dev)
 440 {
 441         if (!netif_running(dev))
 442                 return -EBUSY;
 443         return 0;
 444 }
 445
 446 static int stmmac_ethtool_get_regs_len(struct net_device *dev)
 447 {
 448         struct stmmac_priv *priv = netdev_priv(dev);
 449
 450         if (priv->plat->has_xgmac)
 451                 return XGMAC_REGSIZE * 4;
 452         else if (priv->plat->has_gmac4)
 453                 return GMAC4_REG_SPACE_SIZE;
 454         return REG_SPACE_SIZE;
 455 }
 456
 457 static void stmmac_ethtool_gregs(struct net_device *dev,
 458                           struct ethtool_regs *regs, void *space)
 459 {
 460         struct stmmac_priv *priv = netdev_priv(dev);
 461         u32 *reg_space = (u32 *) space;
 462
 463         stmmac_dump_mac_regs(priv, priv->hw, reg_space);
 464         stmmac_dump_dma_regs(priv, priv->ioaddr, reg_space);
 465
 466         /* Copy DMA registers to where ethtool expects them */
 467         if (priv->plat->has_gmac4) {
 468                 /* GMAC4 dumps its DMA registers at its DMA_CHAN_BASE_ADDR */
 469                 memcpy(&reg_space[ETHTOOL_DMA_OFFSET],
 470                        &reg_space[GMAC4_DMA_CHAN_BASE_ADDR / 4],
 471                        NUM_DWMAC4_DMA_REGS * 4);
 472         } else if (!priv->plat->has_xgmac) {
 473                 memcpy(&reg_space[ETHTOOL_DMA_OFFSET],
 474                        &reg_space[DMA_BUS_MODE / 4],
 475                        NUM_DWMAC1000_DMA_REGS * 4);
 476         }
 477 }
 478
 479 static int stmmac_nway_reset(struct net_device *dev)
 480 {
 481         struct stmmac_priv *priv = netdev_priv(dev);
 482
 483         return phylink_ethtool_nway_reset(priv->phylink);
 484 }
 485
 486 static void stmmac_get_ringparam(struct net_device *netdev,
 487                                  struct ethtool_ringparam *ring,
 488                                  struct kernel_ethtool_ringparam *kernel_ring,
 489                                  struct netlink_ext_ack *extack)
 490 {
 491         struct stmmac_priv *priv = netdev_priv(netdev);
 492
 493         ring->rx_max_pending = DMA_MAX_RX_SIZE;
 494         ring->tx_max_pending = DMA_MAX_TX_SIZE;
 495         ring->rx_pending = priv->dma_conf.dma_rx_size;
 496         ring->tx_pending = priv->dma_conf.dma_tx_size;
 497 }
 498
 499 static int stmmac_set_ringparam(struct net_device *netdev,
 500                                 struct ethtool_ringparam *ring,
 501                                 struct kernel_ethtool_ringparam *kernel_ring,
 502                                 struct netlink_ext_ack *extack)
 503 {
 504         if (ring->rx_mini_pending || ring->rx_jumbo_pending ||
 505             ring->rx_pending < DMA_MIN_RX_SIZE ||
 506             ring->rx_pending > DMA_MAX_RX_SIZE ||
 507             !is_power_of_2(ring->rx_pending) ||
 508             ring->tx_pending < DMA_MIN_TX_SIZE ||
 509             ring->tx_pending > DMA_MAX_TX_SIZE ||
 510             !is_power_of_2(ring->tx_pending))
 511                 return -EINVAL;
 512
 513         return stmmac_reinit_ringparam(netdev, ring->rx_pending,
 514                                        ring->tx_pending);
 515 }
 516
 517 static void
 518 stmmac_get_pauseparam(struct net_device *netdev,
 519                       struct ethtool_pauseparam *pause)
 520 {
 521         struct stmmac_priv *priv = netdev_priv(netdev);
 522         struct rgmii_adv adv_lp;
 523
 524         if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
 525                 pause->autoneg = 1;
 526                 if (!adv_lp.pause)
 527                         return;
 528         } else {
 529                 phylink_ethtool_get_pauseparam(priv->phylink, pause);
 530         }
 531 }
 532
 533 static int
 534 stmmac_set_pauseparam(struct net_device *netdev,
 535                       struct ethtool_pauseparam *pause)
 536 {
 537         struct stmmac_priv *priv = netdev_priv(netdev);
 538         struct rgmii_adv adv_lp;
 539
 540         if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
 541                 pause->autoneg = 1;
 542                 if (!adv_lp.pause)
 543                         return -EOPNOTSUPP;
 544                 return 0;
 545         } else {
 546                 return phylink_ethtool_set_pauseparam(priv->phylink, pause);
 547         }
 548 }
 549
 550 static void stmmac_get_per_qstats(struct stmmac_priv *priv, u64 *data)
 551 {
 552         u32 tx_cnt = priv->plat->tx_queues_to_use;
 553         u32 rx_cnt = priv->plat->rx_queues_to_use;
 554         unsigned int start;
 555         int q, stat;
 556         char *p;
 557
 558         for (q = 0; q < tx_cnt; q++) {
 559                 struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[q];
 560                 struct stmmac_txq_stats snapshot;
 561
 562                 do {
 563                         start = u64_stats_fetch_begin(&txq_stats->syncp);
 564                         snapshot = *txq_stats;
 565                 } while (u64_stats_fetch_retry(&txq_stats->syncp, start));
 566
 567                 p = (char *)&snapshot + offsetof(struct stmmac_txq_stats, tx_pkt_n);
 568                 for (stat = 0; stat < STMMAC_TXQ_STATS; stat++) {
 569                         *data++ = (*(u64 *)p);
 570                         p += sizeof(u64);
 571                 }
 572         }
 573
 574         for (q = 0; q < rx_cnt; q++) {
 575                 struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[q];
 576                 struct stmmac_rxq_stats snapshot;
 577
 578                 do {
 579                         start = u64_stats_fetch_begin(&rxq_stats->syncp);
 580                         snapshot = *rxq_stats;
 581                 } while (u64_stats_fetch_retry(&rxq_stats->syncp, start));
 582
 583                 p = (char *)&snapshot + offsetof(struct stmmac_rxq_stats, rx_pkt_n);
 584                 for (stat = 0; stat < STMMAC_RXQ_STATS; stat++) {
 585                         *data++ = (*(u64 *)p);
 586                         p += sizeof(u64);
 587                 }
 588         }
 589 }
 590
 591 static void stmmac_get_ethtool_stats(struct net_device *dev,
 592                                  struct ethtool_stats *dummy, u64 *data)
 593 {
 594         struct stmmac_priv *priv = netdev_priv(dev);
 595         u32 rx_queues_count = priv->plat->rx_queues_to_use;
 596         u32 tx_queues_count = priv->plat->tx_queues_to_use;
 597         u64 napi_poll = 0, normal_irq_n = 0;
 598         int i, j = 0, pos, ret;
 599         unsigned long count;
 600         unsigned int start;
 601
 602         if (priv->dma_cap.asp) {
 603                 for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
 604                         if (!stmmac_safety_feat_dump(priv, &priv->sstats, i,
 605                                                 &count, NULL))
 606                                 data[j++] = count;
 607                 }
 608         }
 609
 610         /* Update the DMA HW counters for dwmac10/100 */
 611         ret = stmmac_dma_diagnostic_fr(priv, &priv->xstats, priv->ioaddr);
 612         if (ret) {
 613                 /* If supported, for new GMAC chips expose the MMC counters */
 614                 if (priv->dma_cap.rmon) {
 615                         stmmac_mmc_read(priv, priv->mmcaddr, &priv->mmc);
 616
 617                         for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
 618                                 char *p;
 619                                 p = (char *)priv + stmmac_mmc[i].stat_offset;
 620
 621                                 data[j++] = (stmmac_mmc[i].sizeof_stat ==
 622                                              sizeof(u64)) ? (*(u64 *)p) :
 623                                              (*(u32 *)p);
 624                         }
 625                 }
 626                 if (priv->eee_enabled) {
 627                         int val = phylink_get_eee_err(priv->phylink);
 628                         if (val)
 629                                 priv->xstats.phy_eee_wakeup_error_n = val;
 630                 }
 631
 632                 if (priv->synopsys_id >= DWMAC_CORE_3_50)
 633                         stmmac_mac_debug(priv, priv->ioaddr,
 634                                         (void *)&priv->xstats,
 635                                         rx_queues_count, tx_queues_count);
 636         }
 637         for (i = 0; i < STMMAC_STATS_LEN; i++) {
 638                 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
 639                 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
 640                              sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
 641         }
 642
 643         pos = j;
 644         for (i = 0; i < rx_queues_count; i++) {
 645                 struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[i];
 646                 struct stmmac_rxq_stats snapshot;
 647
 648                 j = pos;
 649                 do {
 650                         start = u64_stats_fetch_begin(&rxq_stats->syncp);
 651                         snapshot = *rxq_stats;
 652                 } while (u64_stats_fetch_retry(&rxq_stats->syncp, start));
 653
 654                 data[j++] += snapshot.rx_pkt_n;
 655                 data[j++] += snapshot.rx_normal_irq_n;
 656                 normal_irq_n += snapshot.rx_normal_irq_n;
 657                 napi_poll += snapshot.napi_poll;
 658         }
 659
 660         pos = j;
 661         for (i = 0; i < tx_queues_count; i++) {
 662                 struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[i];
 663                 struct stmmac_txq_stats snapshot;
 664
 665                 j = pos;
 666                 do {
 667                         start = u64_stats_fetch_begin(&txq_stats->syncp);
 668                         snapshot = *txq_stats;
 669                 } while (u64_stats_fetch_retry(&txq_stats->syncp, start));
 670
 671                 data[j++] += snapshot.tx_pkt_n;
 672                 data[j++] += snapshot.tx_normal_irq_n;
 673                 normal_irq_n += snapshot.tx_normal_irq_n;
 674                 data[j++] += snapshot.tx_clean;
 675                 data[j++] += snapshot.tx_set_ic_bit;
 676                 data[j++] += snapshot.tx_tso_frames;
 677                 data[j++] += snapshot.tx_tso_nfrags;
 678                 napi_poll += snapshot.napi_poll;
 679         }
 680         normal_irq_n += priv->xstats.rx_early_irq;
 681         data[j++] = normal_irq_n;
 682         data[j++] = napi_poll;
 683
 684         stmmac_get_per_qstats(priv, &data[j]);
 685 }
 686
 687 static int stmmac_get_sset_count(struct net_device *netdev, int sset)
 688 {
 689         struct stmmac_priv *priv = netdev_priv(netdev);
 690         u32 tx_cnt = priv->plat->tx_queues_to_use;
 691         u32 rx_cnt = priv->plat->rx_queues_to_use;
 692         int i, len, safety_len = 0;
 693
 694         switch (sset) {
 695         case ETH_SS_STATS:
 696                 len = STMMAC_STATS_LEN + STMMAC_QSTATS +
 697                       STMMAC_TXQ_STATS * tx_cnt +
 698                       STMMAC_RXQ_STATS * rx_cnt;
 699
 700                 if (priv->dma_cap.rmon)
 701                         len += STMMAC_MMC_STATS_LEN;
 702                 if (priv->dma_cap.asp) {
 703                         for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
 704                                 if (!stmmac_safety_feat_dump(priv,
 705                                                         &priv->sstats, i,
 706                                                         NULL, NULL))
 707                                         safety_len++;
 708                         }
 709
 710                         len += safety_len;
 711                 }
 712
 713                 return len;
 714         case ETH_SS_TEST:
 715                 return stmmac_selftest_get_count(priv);
 716         default:
 717                 return -EOPNOTSUPP;
 718         }
 719 }
 720
 721 static void stmmac_get_qstats_string(struct stmmac_priv *priv, u8 *data)
 722 {
 723         u32 tx_cnt = priv->plat->tx_queues_to_use;
 724         u32 rx_cnt = priv->plat->rx_queues_to_use;
 725         int q, stat;
 726
 727         for (q = 0; q < tx_cnt; q++) {
 728                 for (stat = 0; stat < STMMAC_TXQ_STATS; stat++) {
 729                         snprintf(data, ETH_GSTRING_LEN, "q%d_%s", q,
 730                                  stmmac_qstats_tx_string[stat]);
 731                         data += ETH_GSTRING_LEN;
 732                 }
 733         }
 734         for (q = 0; q < rx_cnt; q++) {
 735                 for (stat = 0; stat < STMMAC_RXQ_STATS; stat++) {
 736                         snprintf(data, ETH_GSTRING_LEN, "q%d_%s", q,
 737                                  stmmac_qstats_rx_string[stat]);
 738                         data += ETH_GSTRING_LEN;
 739                 }
 740         }
 741 }
 742
 743 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
 744 {
 745         int i;
 746         u8 *p = data;
 747         struct stmmac_priv *priv = netdev_priv(dev);
 748
 749         switch (stringset) {
 750         case ETH_SS_STATS:
 751                 if (priv->dma_cap.asp) {
 752                         for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
 753                                 const char *desc;
 754                                 if (!stmmac_safety_feat_dump(priv,
 755                                                         &priv->sstats, i,
 756                                                         NULL, &desc)) {
 757                                         memcpy(p, desc, ETH_GSTRING_LEN);
 758                                         p += ETH_GSTRING_LEN;
 759                                 }
 760                         }
 761                 }
 762                 if (priv->dma_cap.rmon)
 763                         for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
 764                                 memcpy(p, stmmac_mmc[i].stat_string,
 765                                        ETH_GSTRING_LEN);
 766                                 p += ETH_GSTRING_LEN;
 767                         }
 768                 for (i = 0; i < STMMAC_STATS_LEN; i++) {
 769                         memcpy(p, stmmac_gstrings_stats[i].stat_string, ETH_GSTRING_LEN);
 770                         p += ETH_GSTRING_LEN;
 771                 }
 772                 for (i = 0; i < STMMAC_QSTATS; i++) {
 773                         memcpy(p, stmmac_qstats_string[i], ETH_GSTRING_LEN);
 774                         p += ETH_GSTRING_LEN;
 775                 }
 776                 stmmac_get_qstats_string(priv, p);
 777                 break;
 778         case ETH_SS_TEST:
 779                 stmmac_selftest_get_strings(priv, p);
 780                 break;
 781         default:
 782                 WARN_ON(1);
 783                 break;
 784         }
 785 }
 786
 787 /* Currently only support WOL through Magic packet. */
 788 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 789 {
 790         struct stmmac_priv *priv = netdev_priv(dev);
 791
 792         if (!priv->plat->pmt)
 793                 return phylink_ethtool_get_wol(priv->phylink, wol);
 794
 795         mutex_lock(&priv->lock);
 796         if (device_can_wakeup(priv->device)) {
 797                 wol->supported = WAKE_MAGIC | WAKE_UCAST;
 798                 if (priv->hw_cap_support && !priv->dma_cap.pmt_magic_frame)
 799                         wol->supported &= ~WAKE_MAGIC;
 800                 wol->wolopts = priv->wolopts;
 801         }
 802         mutex_unlock(&priv->lock);
 803 }
 804
 805 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 806 {
 807         struct stmmac_priv *priv = netdev_priv(dev);
 808         u32 support = WAKE_MAGIC | WAKE_UCAST;
 809
 810         if (!device_can_wakeup(priv->device))
 811                 return -EOPNOTSUPP;
 812
 813         if (!priv->plat->pmt) {
 814                 int ret = phylink_ethtool_set_wol(priv->phylink, wol);
 815
 816                 if (!ret)
 817                         device_set_wakeup_enable(priv->device, !!wol->wolopts);
 818                 return ret;
 819         }
 820
 821         /* By default almost all GMAC devices support the WoL via
 822          * magic frame but we can disable it if the HW capability
 823          * register shows no support for pmt_magic_frame. */
 824         if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame))
 825                 wol->wolopts &= ~WAKE_MAGIC;
 826
 827         if (wol->wolopts & ~support)
 828                 return -EINVAL;
 829
 830         if (wol->wolopts) {
 831                 pr_info("stmmac: wakeup enable\n");
 832                 device_set_wakeup_enable(priv->device, 1);
 833                 enable_irq_wake(priv->wol_irq);
 834         } else {
 835                 device_set_wakeup_enable(priv->device, 0);
 836                 disable_irq_wake(priv->wol_irq);
 837         }
 838
 839         mutex_lock(&priv->lock);
 840         priv->wolopts = wol->wolopts;
 841         mutex_unlock(&priv->lock);
 842
 843         return 0;
 844 }
 845
 846 static int stmmac_ethtool_op_get_eee(struct net_device *dev,
 847                                      struct ethtool_eee *edata)
 848 {
 849         struct stmmac_priv *priv = netdev_priv(dev);
 850
 851         if (!priv->dma_cap.eee)
 852                 return -EOPNOTSUPP;
 853
 854         edata->eee_enabled = priv->eee_enabled;
 855         edata->eee_active = priv->eee_active;
 856         edata->tx_lpi_timer = priv->tx_lpi_timer;
 857         edata->tx_lpi_enabled = priv->tx_lpi_enabled;
 858
 859         return phylink_ethtool_get_eee(priv->phylink, edata);
 860 }
 861
 862 static int stmmac_ethtool_op_set_eee(struct net_device *dev,
 863                                      struct ethtool_eee *edata)
 864 {
 865         struct stmmac_priv *priv = netdev_priv(dev);
 866         int ret;
 867
 868         if (!priv->dma_cap.eee)
 869                 return -EOPNOTSUPP;
 870
 871         if (priv->tx_lpi_enabled != edata->tx_lpi_enabled)
 872                 netdev_warn(priv->dev,
 873                             "Setting EEE tx-lpi is not supported\n");
 874
 875         if (!edata->eee_enabled)
 876                 stmmac_disable_eee_mode(priv);
 877
 878         ret = phylink_ethtool_set_eee(priv->phylink, edata);
 879         if (ret)
 880                 return ret;
 881
 882         if (edata->eee_enabled &&
 883             priv->tx_lpi_timer != edata->tx_lpi_timer) {
 884                 priv->tx_lpi_timer = edata->tx_lpi_timer;
 885                 stmmac_eee_init(priv);
 886         }
 887
 888         return 0;
 889 }
 890
 891 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
 892 {
 893         unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
 894
 895         if (!clk) {
 896                 clk = priv->plat->clk_ref_rate;
 897                 if (!clk)
 898                         return 0;
 899         }
 900
 901         return (usec * (clk / 1000000)) / 256;
 902 }
 903
 904 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
 905 {
 906         unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
 907
 908         if (!clk) {
 909                 clk = priv->plat->clk_ref_rate;
 910                 if (!clk)
 911                         return 0;
 912         }
 913
 914         return (riwt * 256) / (clk / 1000000);
 915 }
 916
 917 static int __stmmac_get_coalesce(struct net_device *dev,
 918                                  struct ethtool_coalesce *ec,
 919                                  int queue)
 920 {
 921         struct stmmac_priv *priv = netdev_priv(dev);
 922         u32 max_cnt;
 923         u32 rx_cnt;
 924         u32 tx_cnt;
 925
 926         rx_cnt = priv->plat->rx_queues_to_use;
 927         tx_cnt = priv->plat->tx_queues_to_use;
 928         max_cnt = max(rx_cnt, tx_cnt);
 929
 930         if (queue < 0)
 931                 queue = 0;
 932         else if (queue >= max_cnt)
 933                 return -EINVAL;
 934
 935         if (queue < tx_cnt) {
 936                 ec->tx_coalesce_usecs = priv->tx_coal_timer[queue];
 937                 ec->tx_max_coalesced_frames = priv->tx_coal_frames[queue];
 938         } else {
 939                 ec->tx_coalesce_usecs = 0;
 940                 ec->tx_max_coalesced_frames = 0;
 941         }
 942
 943         if (priv->use_riwt && queue < rx_cnt) {
 944                 ec->rx_max_coalesced_frames = priv->rx_coal_frames[queue];
 945                 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt[queue],
 946                                                          priv);
 947         } else {
 948                 ec->rx_max_coalesced_frames = 0;
 949                 ec->rx_coalesce_usecs = 0;
 950         }
 951
 952         return 0;
 953 }
 954
 955 static int stmmac_get_coalesce(struct net_device *dev,
 956                                struct ethtool_coalesce *ec,
 957                                struct kernel_ethtool_coalesce *kernel_coal,
 958                                struct netlink_ext_ack *extack)
 959 {
 960         return __stmmac_get_coalesce(dev, ec, -1);
 961 }
 962
 963 static int stmmac_get_per_queue_coalesce(struct net_device *dev, u32 queue,
 964                                          struct ethtool_coalesce *ec)
 965 {
 966         return __stmmac_get_coalesce(dev, ec, queue);
 967 }
 968
 969 static int __stmmac_set_coalesce(struct net_device *dev,
 970                                  struct ethtool_coalesce *ec,
 971                                  int queue)
 972 {
 973         struct stmmac_priv *priv = netdev_priv(dev);
 974         bool all_queues = false;
 975         unsigned int rx_riwt;
 976         u32 max_cnt;
 977         u32 rx_cnt;
 978         u32 tx_cnt;
 979
 980         rx_cnt = priv->plat->rx_queues_to_use;
 981         tx_cnt = priv->plat->tx_queues_to_use;
 982         max_cnt = max(rx_cnt, tx_cnt);
 983
 984         if (queue < 0)
 985                 all_queues = true;
 986         else if (queue >= max_cnt)
 987                 return -EINVAL;
 988
 989         if (priv->use_riwt) {
 990                 rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv);
 991
 992                 if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT))
 993                         return -EINVAL;
 994
 995                 if (all_queues) {
 996                         int i;
 997
 998                         for (i = 0; i < rx_cnt; i++) {
 999                                 priv->rx_riwt[i] = rx_riwt;
1000                                 stmmac_rx_watchdog(priv, priv->ioaddr,
1001                                                    rx_riwt, i);
1002                                 priv->rx_coal_frames[i] =
1003                                         ec->rx_max_coalesced_frames;
1004                         }
1005                 } else if (queue < rx_cnt) {
1006                         priv->rx_riwt[queue] = rx_riwt;
1007                         stmmac_rx_watchdog(priv, priv->ioaddr,
1008                                            rx_riwt, queue);
1009                         priv->rx_coal_frames[queue] =
1010                                 ec->rx_max_coalesced_frames;
1011                 }
1012         }
1013
1014         if ((ec->tx_coalesce_usecs == 0) &&
1015             (ec->tx_max_coalesced_frames == 0))
1016                 return -EINVAL;
1017
1018         if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) ||
1019             (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES))
1020                 return -EINVAL;
1021
1022         if (all_queues) {
1023                 int i;
1024
1025                 for (i = 0; i < tx_cnt; i++) {
1026                         priv->tx_coal_frames[i] =
1027                                 ec->tx_max_coalesced_frames;
1028                         priv->tx_coal_timer[i] =
1029                                 ec->tx_coalesce_usecs;
1030                 }
1031         } else if (queue < tx_cnt) {
1032                 priv->tx_coal_frames[queue] =
1033                         ec->tx_max_coalesced_frames;
1034                 priv->tx_coal_timer[queue] =
1035                         ec->tx_coalesce_usecs;
1036         }
1037
1038         return 0;
1039 }
1040
1041 static int stmmac_set_coalesce(struct net_device *dev,
1042                                struct ethtool_coalesce *ec,
1043                                struct kernel_ethtool_coalesce *kernel_coal,
1044                                struct netlink_ext_ack *extack)
1045 {
1046         return __stmmac_set_coalesce(dev, ec, -1);
1047 }
1048
1049 static int stmmac_set_per_queue_coalesce(struct net_device *dev, u32 queue,
1050                                          struct ethtool_coalesce *ec)
1051 {
1052         return __stmmac_set_coalesce(dev, ec, queue);
1053 }
1054
1055 static int stmmac_get_rxnfc(struct net_device *dev,
1056                             struct ethtool_rxnfc *rxnfc, u32 *rule_locs)
1057 {
1058         struct stmmac_priv *priv = netdev_priv(dev);
1059
1060         switch (rxnfc->cmd) {
1061         case ETHTOOL_GRXRINGS:
1062                 rxnfc->data = priv->plat->rx_queues_to_use;
1063                 break;
1064         default:
1065                 return -EOPNOTSUPP;
1066         }
1067
1068         return 0;
1069 }
1070
1071 static u32 stmmac_get_rxfh_key_size(struct net_device *dev)
1072 {
1073         struct stmmac_priv *priv = netdev_priv(dev);
1074
1075         return sizeof(priv->rss.key);
1076 }
1077
1078 static u32 stmmac_get_rxfh_indir_size(struct net_device *dev)
1079 {
1080         struct stmmac_priv *priv = netdev_priv(dev);
1081
1082         return ARRAY_SIZE(priv->rss.table);
1083 }
1084
1085 static int stmmac_get_rxfh(struct net_device *dev,
1086                            struct ethtool_rxfh_param *rxfh)
1087 {
1088         struct stmmac_priv *priv = netdev_priv(dev);
1089         int i;
1090
1091         if (rxfh->indir) {
1092                 for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
1093                         rxfh->indir[i] = priv->rss.table[i];
1094         }
1095
1096         if (rxfh->key)
1097                 memcpy(rxfh->key, priv->rss.key, sizeof(priv->rss.key));
1098         rxfh->hfunc = ETH_RSS_HASH_TOP;
1099
1100         return 0;
1101 }
1102
1103 static int stmmac_set_rxfh(struct net_device *dev,
1104                            struct ethtool_rxfh_param *rxfh,
1105                            struct netlink_ext_ack *extack)
1106 {
1107         struct stmmac_priv *priv = netdev_priv(dev);
1108         int i;
1109
1110         if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE &&
1111             rxfh->hfunc != ETH_RSS_HASH_TOP)
1112                 return -EOPNOTSUPP;
1113
1114         if (rxfh->indir) {
1115                 for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
1116                         priv->rss.table[i] = rxfh->indir[i];
1117         }
1118
1119         if (rxfh->key)
1120                 memcpy(priv->rss.key, rxfh->key, sizeof(priv->rss.key));
1121
1122         return stmmac_rss_configure(priv, priv->hw, &priv->rss,
1123                                     priv->plat->rx_queues_to_use);
1124 }
1125
1126 static void stmmac_get_channels(struct net_device *dev,
1127                                 struct ethtool_channels *chan)
1128 {
1129         struct stmmac_priv *priv = netdev_priv(dev);
1130
1131         chan->rx_count = priv->plat->rx_queues_to_use;
1132         chan->tx_count = priv->plat->tx_queues_to_use;
1133         chan->max_rx = priv->dma_cap.number_rx_queues;
1134         chan->max_tx = priv->dma_cap.number_tx_queues;
1135 }
1136
1137 static int stmmac_set_channels(struct net_device *dev,
1138                                struct ethtool_channels *chan)
1139 {
1140         struct stmmac_priv *priv = netdev_priv(dev);
1141
1142         if (chan->rx_count > priv->dma_cap.number_rx_queues ||
1143             chan->tx_count > priv->dma_cap.number_tx_queues ||
1144             !chan->rx_count || !chan->tx_count)
1145                 return -EINVAL;
1146
1147         return stmmac_reinit_queues(dev, chan->rx_count, chan->tx_count);
1148 }
1149
1150 static int stmmac_get_ts_info(struct net_device *dev,
1151                               struct ethtool_ts_info *info)
1152 {
1153         struct stmmac_priv *priv = netdev_priv(dev);
1154
1155         if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) {
1156
1157                 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1158                                         SOF_TIMESTAMPING_TX_HARDWARE |
1159                                         SOF_TIMESTAMPING_RX_SOFTWARE |
1160                                         SOF_TIMESTAMPING_RX_HARDWARE |
1161                                         SOF_TIMESTAMPING_SOFTWARE |
1162                                         SOF_TIMESTAMPING_RAW_HARDWARE;
1163
1164                 if (priv->ptp_clock)
1165                         info->phc_index = ptp_clock_index(priv->ptp_clock);
1166
1167                 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
1168
1169                 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
1170                                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
1171                                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1172                                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1173                                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1174                                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1175                                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
1176                                     (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
1177                                     (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
1178                                     (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
1179                                     (1 << HWTSTAMP_FILTER_ALL));
1180                 return 0;
1181         } else
1182                 return ethtool_op_get_ts_info(dev, info);
1183 }
1184
1185 static int stmmac_get_tunable(struct net_device *dev,
1186                               const struct ethtool_tunable *tuna, void *data)
1187 {
1188         struct stmmac_priv *priv = netdev_priv(dev);
1189         int ret = 0;
1190
1191         switch (tuna->id) {
1192         case ETHTOOL_RX_COPYBREAK:
1193                 *(u32 *)data = priv->rx_copybreak;
1194                 break;
1195         default:
1196                 ret = -EINVAL;
1197                 break;
1198         }
1199
1200         return ret;
1201 }
1202
1203 static int stmmac_set_tunable(struct net_device *dev,
1204                               const struct ethtool_tunable *tuna,
1205                               const void *data)
1206 {
1207         struct stmmac_priv *priv = netdev_priv(dev);
1208         int ret = 0;
1209
1210         switch (tuna->id) {
1211         case ETHTOOL_RX_COPYBREAK:
1212                 priv->rx_copybreak = *(u32 *)data;
1213                 break;
1214         default:
1215                 ret = -EINVAL;
1216                 break;
1217         }
1218
1219         return ret;
1220 }
1221
1222 static const struct ethtool_ops stmmac_ethtool_ops = {
1223         .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1224                                      ETHTOOL_COALESCE_MAX_FRAMES,
1225         .begin = stmmac_check_if_running,
1226         .get_drvinfo = stmmac_ethtool_getdrvinfo,
1227         .get_msglevel = stmmac_ethtool_getmsglevel,
1228         .set_msglevel = stmmac_ethtool_setmsglevel,
1229         .get_regs = stmmac_ethtool_gregs,
1230         .get_regs_len = stmmac_ethtool_get_regs_len,
1231         .get_link = ethtool_op_get_link,
1232         .nway_reset = stmmac_nway_reset,
1233         .get_ringparam = stmmac_get_ringparam,
1234         .set_ringparam = stmmac_set_ringparam,
1235         .get_pauseparam = stmmac_get_pauseparam,
1236         .set_pauseparam = stmmac_set_pauseparam,
1237         .self_test = stmmac_selftest_run,
1238         .get_ethtool_stats = stmmac_get_ethtool_stats,
1239         .get_strings = stmmac_get_strings,
1240         .get_wol = stmmac_get_wol,
1241         .set_wol = stmmac_set_wol,
1242         .get_eee = stmmac_ethtool_op_get_eee,
1243         .set_eee = stmmac_ethtool_op_set_eee,
1244         .get_sset_count = stmmac_get_sset_count,
1245         .get_rxnfc = stmmac_get_rxnfc,
1246         .get_rxfh_key_size = stmmac_get_rxfh_key_size,
1247         .get_rxfh_indir_size = stmmac_get_rxfh_indir_size,
1248         .get_rxfh = stmmac_get_rxfh,
1249         .set_rxfh = stmmac_set_rxfh,
1250         .get_ts_info = stmmac_get_ts_info,
1251         .get_coalesce = stmmac_get_coalesce,
1252         .set_coalesce = stmmac_set_coalesce,
1253         .get_per_queue_coalesce = stmmac_get_per_queue_coalesce,
1254         .set_per_queue_coalesce = stmmac_set_per_queue_coalesce,
1255         .get_channels = stmmac_get_channels,
1256         .set_channels = stmmac_set_channels,
1257         .get_tunable = stmmac_get_tunable,
1258         .set_tunable = stmmac_set_tunable,
1259         .get_link_ksettings = stmmac_ethtool_get_link_ksettings,
1260         .set_link_ksettings = stmmac_ethtool_set_link_ksettings,
1261 };
1262
1263 void stmmac_set_ethtool_ops(struct net_device *netdev)
1264 {
1265         netdev->ethtool_ops = &stmmac_ethtool_ops;
1266 }