2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #ifndef __MLX5_CORE_H__
34 #define __MLX5_CORE_H__
36 #include <linux/types.h>
37 #include <linux/kernel.h>
38 #include <linux/sched.h>
39 #include <linux/if_link.h>
40 #include <linux/firmware.h>
41 #include <linux/mlx5/cq.h>
42 #include <linux/mlx5/fs.h>
44 #define DRIVER_NAME "mlx5_core"
45 #define DRIVER_VERSION "5.0-0"
47 extern uint mlx5_core_debug_mask;
49 #define mlx5_core_dbg(__dev, format, ...) \
50 dev_dbg(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
51 __func__, __LINE__, current->pid, \
54 #define mlx5_core_dbg_once(__dev, format, ...) \
55 dev_dbg_once(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
56 __func__, __LINE__, current->pid, \
59 #define mlx5_core_dbg_mask(__dev, mask, format, ...) \
61 if ((mask) & mlx5_core_debug_mask) \
62 mlx5_core_dbg(__dev, format, ##__VA_ARGS__); \
65 #define mlx5_core_err(__dev, format, ...) \
66 dev_err(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
67 __func__, __LINE__, current->pid, \
70 #define mlx5_core_err_rl(__dev, format, ...) \
71 dev_err_ratelimited(&(__dev)->pdev->dev, \
72 "%s:%d:(pid %d): " format, \
73 __func__, __LINE__, current->pid, \
76 #define mlx5_core_warn(__dev, format, ...) \
77 dev_warn(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
78 __func__, __LINE__, current->pid, \
81 #define mlx5_core_info(__dev, format, ...) \
82 dev_info(&(__dev)->pdev->dev, format, ##__VA_ARGS__)
85 MLX5_CMD_DATA, /* print command payload only */
86 MLX5_CMD_TIME, /* print command execution time */
90 MLX5_DRIVER_STATUS_ABORTED = 0xfe,
91 MLX5_DRIVER_SYND = 0xbadd00de,
94 int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
95 int mlx5_query_board_id(struct mlx5_core_dev *dev);
96 int mlx5_cmd_init_hca(struct mlx5_core_dev *dev, uint32_t *sw_owner_id);
97 int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev);
98 int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev);
99 int mlx5_cmd_fast_teardown_hca(struct mlx5_core_dev *dev);
101 void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
102 unsigned long param);
103 void mlx5_core_page_fault(struct mlx5_core_dev *dev,
104 struct mlx5_pagefault *pfault);
105 void mlx5_port_module_event(struct mlx5_core_dev *dev, struct mlx5_eqe *eqe);
106 void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force);
107 void mlx5_disable_device(struct mlx5_core_dev *dev);
108 void mlx5_recover_device(struct mlx5_core_dev *dev);
109 int mlx5_sriov_init(struct mlx5_core_dev *dev);
110 void mlx5_sriov_cleanup(struct mlx5_core_dev *dev);
111 int mlx5_sriov_attach(struct mlx5_core_dev *dev);
112 void mlx5_sriov_detach(struct mlx5_core_dev *dev);
113 int mlx5_core_sriov_configure(struct pci_dev *dev, int num_vfs);
114 bool mlx5_sriov_is_enabled(struct mlx5_core_dev *dev);
115 int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id);
116 int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id);
117 int mlx5_create_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
118 void *context, u32 *element_id);
119 int mlx5_modify_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
120 void *context, u32 element_id,
122 int mlx5_destroy_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
124 int mlx5_wait_for_vf_pages(struct mlx5_core_dev *dev);
125 u64 mlx5_read_internal_timer(struct mlx5_core_dev *dev);
127 int mlx5_eq_init(struct mlx5_core_dev *dev);
128 void mlx5_eq_cleanup(struct mlx5_core_dev *dev);
129 int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx,
130 int nent, u64 mask, const char *name,
131 enum mlx5_eq_type type);
132 int mlx5_destroy_unmap_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
133 int mlx5_eq_add_cq(struct mlx5_eq *eq, struct mlx5_core_cq *cq);
134 int mlx5_eq_del_cq(struct mlx5_eq *eq, struct mlx5_core_cq *cq);
135 int mlx5_core_eq_query(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
136 u32 *out, int outlen);
137 int mlx5_start_eqs(struct mlx5_core_dev *dev);
138 void mlx5_stop_eqs(struct mlx5_core_dev *dev);
139 /* This function should only be called after mlx5_cmd_force_teardown_hca */
140 void mlx5_core_eq_free_irqs(struct mlx5_core_dev *dev);
141 struct mlx5_eq *mlx5_eqn2eq(struct mlx5_core_dev *dev, int eqn);
142 u32 mlx5_eq_poll_irq_disabled(struct mlx5_eq *eq);
143 void mlx5_cq_tasklet_cb(unsigned long data);
144 void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vec, bool forced);
145 int mlx5_debug_eq_add(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
146 void mlx5_debug_eq_remove(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
147 int mlx5_eq_debugfs_init(struct mlx5_core_dev *dev);
148 void mlx5_eq_debugfs_cleanup(struct mlx5_core_dev *dev);
149 int mlx5_cq_debugfs_init(struct mlx5_core_dev *dev);
150 void mlx5_cq_debugfs_cleanup(struct mlx5_core_dev *dev);
152 int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 *pcam, u8 feature_group,
153 u8 access_reg_group);
154 int mlx5_query_mcam_reg(struct mlx5_core_dev *dev, u32 *mcap, u8 feature_group,
155 u8 access_reg_group);
156 int mlx5_query_qcam_reg(struct mlx5_core_dev *mdev, u32 *qcam,
157 u8 feature_group, u8 access_reg_group);
159 void mlx5_lag_add(struct mlx5_core_dev *dev, struct net_device *netdev);
160 void mlx5_lag_remove(struct mlx5_core_dev *dev);
162 void mlx5_add_device(struct mlx5_interface *intf, struct mlx5_priv *priv);
163 void mlx5_remove_device(struct mlx5_interface *intf, struct mlx5_priv *priv);
164 void mlx5_attach_device(struct mlx5_core_dev *dev);
165 void mlx5_detach_device(struct mlx5_core_dev *dev);
166 bool mlx5_device_registered(struct mlx5_core_dev *dev);
167 int mlx5_register_device(struct mlx5_core_dev *dev);
168 void mlx5_unregister_device(struct mlx5_core_dev *dev);
169 void mlx5_add_dev_by_protocol(struct mlx5_core_dev *dev, int protocol);
170 void mlx5_remove_dev_by_protocol(struct mlx5_core_dev *dev, int protocol);
171 struct mlx5_core_dev *mlx5_get_next_phys_dev(struct mlx5_core_dev *dev);
172 void mlx5_dev_list_lock(void);
173 void mlx5_dev_list_unlock(void);
174 int mlx5_dev_list_trylock(void);
176 bool mlx5_lag_intf_add(struct mlx5_interface *intf, struct mlx5_priv *priv);
178 int mlx5_query_mtpps(struct mlx5_core_dev *dev, u32 *mtpps, u32 mtpps_size);
179 int mlx5_set_mtpps(struct mlx5_core_dev *mdev, u32 *mtpps, u32 mtpps_size);
180 int mlx5_query_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 *arm, u8 *mode);
181 int mlx5_set_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 arm, u8 mode);
183 #define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) && \
184 MLX5_CAP_GEN((mdev), pps_modify) && \
185 MLX5_CAP_MCAM_FEATURE((mdev), mtpps_fs) && \
186 MLX5_CAP_MCAM_FEATURE((mdev), mtpps_enh_out_per_adj))
188 int mlx5_firmware_flash(struct mlx5_core_dev *dev, const struct firmware *fw);
190 void mlx5e_init(void);
191 void mlx5e_cleanup(void);
193 static inline int mlx5_lag_is_lacp_owner(struct mlx5_core_dev *dev)
195 /* LACP owner conditions:
196 * 1) Function is physical.
197 * 2) LAG is supported by FW.
198 * 3) LAG is managed by driver (currently the only option).
200 return MLX5_CAP_GEN(dev, vport_group_manager) &&
201 (MLX5_CAP_GEN(dev, num_lag_ports) > 1) &&
202 MLX5_CAP_GEN(dev, lag_master);
205 int mlx5_lag_allow(struct mlx5_core_dev *dev);
206 int mlx5_lag_forbid(struct mlx5_core_dev *dev);
208 void mlx5_reload_interface(struct mlx5_core_dev *mdev, int protocol);
211 MLX5_NIC_IFC_FULL = 0,
212 MLX5_NIC_IFC_DISABLED = 1,
213 MLX5_NIC_IFC_NO_DRAM_NIC = 2,
214 MLX5_NIC_IFC_INVALID = 3
217 u8 mlx5_get_nic_state(struct mlx5_core_dev *dev);
218 void mlx5_set_nic_state(struct mlx5_core_dev *dev, u8 state);
219 #endif /* __MLX5_CORE_H__ */