2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
36 struct ethtool_drvinfo *drvinfo)
38 struct mlx5_core_dev *mdev = priv->mdev;
40 strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
41 strlcpy(drvinfo->version, DRIVER_VERSION,
42 sizeof(drvinfo->version));
43 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
45 fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
47 strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
48 sizeof(drvinfo->bus_info));
51 static void mlx5e_get_drvinfo(struct net_device *dev,
52 struct ethtool_drvinfo *drvinfo)
54 struct mlx5e_priv *priv = netdev_priv(dev);
56 mlx5e_ethtool_get_drvinfo(priv, drvinfo);
59 struct ptys2ethtool_config {
60 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
61 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
65 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
67 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...) \
69 struct ptys2ethtool_config *cfg; \
70 const unsigned int modes[] = { __VA_ARGS__ }; \
72 cfg = &ptys2ethtool_table[reg_]; \
73 cfg->speed = speed_; \
74 bitmap_zero(cfg->supported, \
75 __ETHTOOL_LINK_MODE_MASK_NBITS); \
76 bitmap_zero(cfg->advertised, \
77 __ETHTOOL_LINK_MODE_MASK_NBITS); \
78 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) { \
79 __set_bit(modes[i], cfg->supported); \
80 __set_bit(modes[i], cfg->advertised); \
84 void mlx5e_build_ptys2ethtool_map(void)
86 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, SPEED_1000,
87 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
88 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, SPEED_1000,
89 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
90 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, SPEED_10000,
91 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
92 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, SPEED_10000,
93 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
94 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, SPEED_10000,
95 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
96 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, SPEED_20000,
97 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
98 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, SPEED_40000,
99 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
100 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, SPEED_40000,
101 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
102 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, SPEED_56000,
103 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
104 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, SPEED_10000,
105 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
106 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, SPEED_10000,
107 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
108 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, SPEED_10000,
109 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
110 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, SPEED_40000,
111 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
112 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, SPEED_40000,
113 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
114 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, SPEED_50000,
115 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
116 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, SPEED_100000,
117 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
118 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, SPEED_100000,
119 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
120 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, SPEED_100000,
121 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
122 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, SPEED_100000,
123 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
124 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, SPEED_10000,
125 ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
126 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, SPEED_25000,
127 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
128 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, SPEED_25000,
129 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
130 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, SPEED_25000,
131 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
132 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, SPEED_50000,
133 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
134 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, SPEED_50000,
135 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
138 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
140 int i, num_stats = 0;
144 for (i = 0; i < mlx5e_num_stats_grps; i++)
145 num_stats += mlx5e_stats_grps[i].get_num_stats(priv);
147 case ETH_SS_PRIV_FLAGS:
148 return ARRAY_SIZE(mlx5e_priv_flags);
150 return mlx5e_self_test_num(priv);
157 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
159 struct mlx5e_priv *priv = netdev_priv(dev);
161 return mlx5e_ethtool_get_sset_count(priv, sset);
164 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, u8 *data)
168 for (i = 0; i < mlx5e_num_stats_grps; i++)
169 idx = mlx5e_stats_grps[i].fill_strings(priv, data, idx);
172 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
177 case ETH_SS_PRIV_FLAGS:
178 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
179 strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
183 for (i = 0; i < mlx5e_self_test_num(priv); i++)
184 strcpy(data + i * ETH_GSTRING_LEN,
185 mlx5e_self_tests[i]);
189 mlx5e_fill_stats_strings(priv, data);
194 static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
196 struct mlx5e_priv *priv = netdev_priv(dev);
198 mlx5e_ethtool_get_strings(priv, stringset, data);
201 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
202 struct ethtool_stats *stats, u64 *data)
209 mutex_lock(&priv->state_lock);
210 mlx5e_update_stats(priv);
211 mutex_unlock(&priv->state_lock);
213 for (i = 0; i < mlx5e_num_stats_grps; i++)
214 idx = mlx5e_stats_grps[i].fill_stats(priv, data, idx);
217 static void mlx5e_get_ethtool_stats(struct net_device *dev,
218 struct ethtool_stats *stats,
221 struct mlx5e_priv *priv = netdev_priv(dev);
223 mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
226 static u32 mlx5e_rx_wqes_to_packets(struct mlx5e_priv *priv, int rq_wq_type,
234 if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
237 stride_size = 1 << priv->channels.params.mpwqe_log_stride_sz;
238 num_strides = 1 << priv->channels.params.mpwqe_log_num_strides;
239 wqe_size = stride_size * num_strides;
241 packets_per_wqe = wqe_size /
242 ALIGN(ETH_DATA_LEN, stride_size);
243 return (1 << (order_base_2(num_wqe * packets_per_wqe) - 1));
246 static u32 mlx5e_packets_to_rx_wqes(struct mlx5e_priv *priv, int rq_wq_type,
255 if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
258 stride_size = 1 << priv->channels.params.mpwqe_log_stride_sz;
259 num_strides = 1 << priv->channels.params.mpwqe_log_num_strides;
260 wqe_size = stride_size * num_strides;
262 num_packets = (1 << order_base_2(num_packets));
264 packets_per_wqe = wqe_size /
265 ALIGN(ETH_DATA_LEN, stride_size);
266 num_wqes = DIV_ROUND_UP(num_packets, packets_per_wqe);
267 return 1 << (order_base_2(num_wqes));
270 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
271 struct ethtool_ringparam *param)
273 int rq_wq_type = priv->channels.params.rq_wq_type;
275 param->rx_max_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
276 1 << mlx5_max_log_rq_size(rq_wq_type));
277 param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
278 param->rx_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
279 1 << priv->channels.params.log_rq_size);
280 param->tx_pending = 1 << priv->channels.params.log_sq_size;
283 static void mlx5e_get_ringparam(struct net_device *dev,
284 struct ethtool_ringparam *param)
286 struct mlx5e_priv *priv = netdev_priv(dev);
288 mlx5e_ethtool_get_ringparam(priv, param);
291 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
292 struct ethtool_ringparam *param)
294 int rq_wq_type = priv->channels.params.rq_wq_type;
295 struct mlx5e_channels new_channels = {};
303 if (param->rx_jumbo_pending) {
304 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
308 if (param->rx_mini_pending) {
309 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
314 min_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
315 1 << mlx5_min_log_rq_size(rq_wq_type));
316 rx_pending_wqes = mlx5e_packets_to_rx_wqes(priv, rq_wq_type,
319 if (param->rx_pending < min_rq_size) {
320 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
321 __func__, param->rx_pending,
326 num_mtts = MLX5E_REQUIRED_MTTS(rx_pending_wqes);
327 if (priv->channels.params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
328 !MLX5E_VALID_NUM_MTTS(num_mtts)) {
329 netdev_info(priv->netdev, "%s: rx_pending (%d) request can't be satisfied, try to reduce.\n",
330 __func__, param->rx_pending);
334 if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
335 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
336 __func__, param->tx_pending,
337 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
341 log_rq_size = order_base_2(rx_pending_wqes);
342 log_sq_size = order_base_2(param->tx_pending);
344 if (log_rq_size == priv->channels.params.log_rq_size &&
345 log_sq_size == priv->channels.params.log_sq_size)
348 mutex_lock(&priv->state_lock);
350 new_channels.params = priv->channels.params;
351 new_channels.params.log_rq_size = log_rq_size;
352 new_channels.params.log_sq_size = log_sq_size;
354 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
355 priv->channels.params = new_channels.params;
359 err = mlx5e_open_channels(priv, &new_channels);
363 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
366 mutex_unlock(&priv->state_lock);
371 static int mlx5e_set_ringparam(struct net_device *dev,
372 struct ethtool_ringparam *param)
374 struct mlx5e_priv *priv = netdev_priv(dev);
376 return mlx5e_ethtool_set_ringparam(priv, param);
379 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
380 struct ethtool_channels *ch)
382 ch->max_combined = priv->profile->max_nch(priv->mdev);
383 ch->combined_count = priv->channels.params.num_channels;
386 static void mlx5e_get_channels(struct net_device *dev,
387 struct ethtool_channels *ch)
389 struct mlx5e_priv *priv = netdev_priv(dev);
391 mlx5e_ethtool_get_channels(priv, ch);
394 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
395 struct ethtool_channels *ch)
397 unsigned int count = ch->combined_count;
398 struct mlx5e_channels new_channels = {};
403 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
408 if (priv->channels.params.num_channels == count)
411 mutex_lock(&priv->state_lock);
413 new_channels.params = priv->channels.params;
414 new_channels.params.num_channels = count;
415 if (!netif_is_rxfh_configured(priv->netdev))
416 mlx5e_build_default_indir_rqt(new_channels.params.indirection_rqt,
417 MLX5E_INDIR_RQT_SIZE, count);
419 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
420 priv->channels.params = new_channels.params;
424 /* Create fresh channels with new parameters */
425 err = mlx5e_open_channels(priv, &new_channels);
429 arfs_enabled = priv->netdev->features & NETIF_F_NTUPLE;
431 mlx5e_arfs_disable(priv);
433 /* Switch to new channels, set new parameters and close old ones */
434 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
437 err = mlx5e_arfs_enable(priv);
439 netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
444 mutex_unlock(&priv->state_lock);
449 static int mlx5e_set_channels(struct net_device *dev,
450 struct ethtool_channels *ch)
452 struct mlx5e_priv *priv = netdev_priv(dev);
454 return mlx5e_ethtool_set_channels(priv, ch);
457 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
458 struct ethtool_coalesce *coal)
460 if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
463 coal->rx_coalesce_usecs = priv->channels.params.rx_cq_moderation.usec;
464 coal->rx_max_coalesced_frames = priv->channels.params.rx_cq_moderation.pkts;
465 coal->tx_coalesce_usecs = priv->channels.params.tx_cq_moderation.usec;
466 coal->tx_max_coalesced_frames = priv->channels.params.tx_cq_moderation.pkts;
467 coal->use_adaptive_rx_coalesce = priv->channels.params.rx_dim_enabled;
472 static int mlx5e_get_coalesce(struct net_device *netdev,
473 struct ethtool_coalesce *coal)
475 struct mlx5e_priv *priv = netdev_priv(netdev);
477 return mlx5e_ethtool_get_coalesce(priv, coal);
481 mlx5e_set_priv_channels_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
483 struct mlx5_core_dev *mdev = priv->mdev;
487 for (i = 0; i < priv->channels.num; ++i) {
488 struct mlx5e_channel *c = priv->channels.c[i];
490 for (tc = 0; tc < c->num_tc; tc++) {
491 mlx5_core_modify_cq_moderation(mdev,
493 coal->tx_coalesce_usecs,
494 coal->tx_max_coalesced_frames);
497 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
498 coal->rx_coalesce_usecs,
499 coal->rx_max_coalesced_frames);
503 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
504 struct ethtool_coalesce *coal)
506 struct mlx5_core_dev *mdev = priv->mdev;
507 struct mlx5e_channels new_channels = {};
511 if (!MLX5_CAP_GEN(mdev, cq_moderation))
514 mutex_lock(&priv->state_lock);
515 new_channels.params = priv->channels.params;
517 new_channels.params.tx_cq_moderation.usec = coal->tx_coalesce_usecs;
518 new_channels.params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
519 new_channels.params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
520 new_channels.params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
521 new_channels.params.rx_dim_enabled = !!coal->use_adaptive_rx_coalesce;
523 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
524 priv->channels.params = new_channels.params;
529 reset = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled;
531 mlx5e_set_priv_channels_coalesce(priv, coal);
532 priv->channels.params = new_channels.params;
536 /* open fresh channels with new coal parameters */
537 err = mlx5e_open_channels(priv, &new_channels);
541 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
544 mutex_unlock(&priv->state_lock);
548 static int mlx5e_set_coalesce(struct net_device *netdev,
549 struct ethtool_coalesce *coal)
551 struct mlx5e_priv *priv = netdev_priv(netdev);
553 return mlx5e_ethtool_set_coalesce(priv, coal);
556 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
559 unsigned long proto_cap = eth_proto_cap;
562 for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
563 bitmap_or(supported_modes, supported_modes,
564 ptys2ethtool_table[proto].supported,
565 __ETHTOOL_LINK_MODE_MASK_NBITS);
568 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
571 unsigned long proto_cap = eth_proto_cap;
574 for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
575 bitmap_or(advertising_modes, advertising_modes,
576 ptys2ethtool_table[proto].advertised,
577 __ETHTOOL_LINK_MODE_MASK_NBITS);
580 static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings *link_ksettings,
584 if (!connector_type || connector_type >= MLX5E_CONNECTOR_TYPE_NUMBER) {
585 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
586 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
587 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
588 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
589 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
590 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
591 ethtool_link_ksettings_add_link_mode(link_ksettings,
594 ethtool_link_ksettings_add_link_mode(link_ksettings,
599 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
600 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
601 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
602 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
603 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
604 ethtool_link_ksettings_add_link_mode(link_ksettings,
607 ethtool_link_ksettings_add_link_mode(link_ksettings,
614 switch (connector_type) {
616 ethtool_link_ksettings_add_link_mode(link_ksettings,
618 ethtool_link_ksettings_add_link_mode(link_ksettings,
622 ethtool_link_ksettings_add_link_mode(link_ksettings,
624 ethtool_link_ksettings_add_link_mode(link_ksettings,
628 ethtool_link_ksettings_add_link_mode(link_ksettings,
630 ethtool_link_ksettings_add_link_mode(link_ksettings,
634 ethtool_link_ksettings_add_link_mode(link_ksettings,
636 ethtool_link_ksettings_add_link_mode(link_ksettings,
639 case MLX5E_PORT_FIBRE:
640 ethtool_link_ksettings_add_link_mode(link_ksettings,
642 ethtool_link_ksettings_add_link_mode(link_ksettings,
646 ethtool_link_ksettings_add_link_mode(link_ksettings,
647 supported, Backplane);
648 ethtool_link_ksettings_add_link_mode(link_ksettings,
649 advertising, Backplane);
651 case MLX5E_PORT_NONE:
652 case MLX5E_PORT_OTHER:
658 int mlx5e_get_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
665 err = mlx5_query_port_proto_cap(mdev, &proto_cap, MLX5_PTYS_EN);
669 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i)
670 if (proto_cap & MLX5E_PROT_MASK(i))
671 max_speed = max(max_speed, ptys2ethtool_table[i].speed);
677 static void get_speed_duplex(struct net_device *netdev,
679 struct ethtool_link_ksettings *link_ksettings)
682 u32 speed = SPEED_UNKNOWN;
683 u8 duplex = DUPLEX_UNKNOWN;
685 if (!netif_carrier_ok(netdev))
688 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
689 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
690 speed = ptys2ethtool_table[i].speed;
691 duplex = DUPLEX_FULL;
696 link_ksettings->base.speed = speed;
697 link_ksettings->base.duplex = duplex;
700 static void get_supported(u32 eth_proto_cap,
701 struct ethtool_link_ksettings *link_ksettings)
703 unsigned long *supported = link_ksettings->link_modes.supported;
705 ptys2ethtool_supported_link(supported, eth_proto_cap);
706 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
709 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
711 struct ethtool_link_ksettings *link_ksettings)
713 unsigned long *advertising = link_ksettings->link_modes.advertising;
715 ptys2ethtool_adver_link(advertising, eth_proto_cap);
717 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
718 if (tx_pause ^ rx_pause)
719 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
722 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
723 [MLX5E_PORT_UNKNOWN] = PORT_OTHER,
724 [MLX5E_PORT_NONE] = PORT_NONE,
725 [MLX5E_PORT_TP] = PORT_TP,
726 [MLX5E_PORT_AUI] = PORT_AUI,
727 [MLX5E_PORT_BNC] = PORT_BNC,
728 [MLX5E_PORT_MII] = PORT_MII,
729 [MLX5E_PORT_FIBRE] = PORT_FIBRE,
730 [MLX5E_PORT_DA] = PORT_DA,
731 [MLX5E_PORT_OTHER] = PORT_OTHER,
734 static u8 get_connector_port(u32 eth_proto, u8 connector_type)
736 if (connector_type && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
737 return ptys2connector_type[connector_type];
740 (MLX5E_PROT_MASK(MLX5E_10GBASE_SR) |
741 MLX5E_PROT_MASK(MLX5E_40GBASE_SR4) |
742 MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
743 MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
748 (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
749 MLX5E_PROT_MASK(MLX5E_10GBASE_CR) |
750 MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
755 (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
756 MLX5E_PROT_MASK(MLX5E_10GBASE_KR) |
757 MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
758 MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
765 static void get_lp_advertising(u32 eth_proto_lp,
766 struct ethtool_link_ksettings *link_ksettings)
768 unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
770 ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
773 static int mlx5e_get_link_ksettings(struct net_device *netdev,
774 struct ethtool_link_ksettings *link_ksettings)
776 struct mlx5e_priv *priv = netdev_priv(netdev);
777 struct mlx5_core_dev *mdev = priv->mdev;
778 u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
790 err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
792 netdev_err(netdev, "%s: query port ptys failed: %d\n",
797 eth_proto_cap = MLX5_GET(ptys_reg, out, eth_proto_capability);
798 eth_proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);
799 eth_proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper);
800 eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
801 an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
802 an_status = MLX5_GET(ptys_reg, out, an_status);
803 connector_type = MLX5_GET(ptys_reg, out, connector_type);
805 mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
807 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
808 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
810 get_supported(eth_proto_cap, link_ksettings);
811 get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings);
812 get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
814 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
816 link_ksettings->base.port = get_connector_port(eth_proto_oper,
818 ptys2ethtool_supported_advertised_port(link_ksettings, eth_proto_admin,
820 get_lp_advertising(eth_proto_lp, link_ksettings);
822 if (an_status == MLX5_AN_COMPLETE)
823 ethtool_link_ksettings_add_link_mode(link_ksettings,
824 lp_advertising, Autoneg);
826 link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
828 ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
830 if (!an_disable_admin)
831 ethtool_link_ksettings_add_link_mode(link_ksettings,
832 advertising, Autoneg);
838 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
840 u32 i, ptys_modes = 0;
842 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
843 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
845 __ETHTOOL_LINK_MODE_MASK_NBITS))
846 ptys_modes |= MLX5E_PROT_MASK(i);
852 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
854 u32 i, speed_links = 0;
856 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
857 if (ptys2ethtool_table[i].speed == speed)
858 speed_links |= MLX5E_PROT_MASK(i);
864 static int mlx5e_set_link_ksettings(struct net_device *netdev,
865 const struct ethtool_link_ksettings *link_ksettings)
867 struct mlx5e_priv *priv = netdev_priv(netdev);
868 struct mlx5_core_dev *mdev = priv->mdev;
869 u32 eth_proto_cap, eth_proto_admin;
870 bool an_changes = false;
879 speed = link_ksettings->base.speed;
881 link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
882 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
883 mlx5e_ethtool2ptys_speed_link(speed);
885 err = mlx5_query_port_proto_cap(mdev, ð_proto_cap, MLX5_PTYS_EN);
887 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
892 link_modes = link_modes & eth_proto_cap;
894 netdev_err(netdev, "%s: Not supported link mode(s) requested",
900 err = mlx5_query_port_proto_admin(mdev, ð_proto_admin, MLX5_PTYS_EN);
902 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
907 mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
908 &an_disable_cap, &an_disable_admin);
910 an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
911 an_changes = ((!an_disable && an_disable_admin) ||
912 (an_disable && !an_disable_admin));
914 if (!an_changes && link_modes == eth_proto_admin)
917 mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
918 mlx5_toggle_port_link(mdev);
924 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
926 struct mlx5e_priv *priv = netdev_priv(netdev);
928 return sizeof(priv->channels.params.toeplitz_hash_key);
931 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
933 return MLX5E_INDIR_RQT_SIZE;
936 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
939 struct mlx5e_priv *priv = netdev_priv(netdev);
942 memcpy(indir, priv->channels.params.indirection_rqt,
943 sizeof(priv->channels.params.indirection_rqt));
946 memcpy(key, priv->channels.params.toeplitz_hash_key,
947 sizeof(priv->channels.params.toeplitz_hash_key));
950 *hfunc = priv->channels.params.rss_hfunc;
955 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
957 void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
958 struct mlx5_core_dev *mdev = priv->mdev;
959 int ctxlen = MLX5_ST_SZ_BYTES(tirc);
962 MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
964 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
965 memset(tirc, 0, ctxlen);
966 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
967 mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
970 if (!mlx5e_tunnel_inner_ft_supported(priv->mdev))
973 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
974 memset(tirc, 0, ctxlen);
975 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, true);
976 mlx5_core_modify_tir(mdev, priv->inner_indir_tir[tt].tirn, in, inlen);
980 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
981 const u8 *key, const u8 hfunc)
983 struct mlx5e_priv *priv = netdev_priv(dev);
984 int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
985 bool hash_changed = false;
988 if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
989 (hfunc != ETH_RSS_HASH_XOR) &&
990 (hfunc != ETH_RSS_HASH_TOP))
993 in = kvzalloc(inlen, GFP_KERNEL);
997 mutex_lock(&priv->state_lock);
999 if (hfunc != ETH_RSS_HASH_NO_CHANGE &&
1000 hfunc != priv->channels.params.rss_hfunc) {
1001 priv->channels.params.rss_hfunc = hfunc;
1002 hash_changed = true;
1006 memcpy(priv->channels.params.indirection_rqt, indir,
1007 sizeof(priv->channels.params.indirection_rqt));
1009 if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1010 u32 rqtn = priv->indir_rqt.rqtn;
1011 struct mlx5e_redirect_rqt_param rrp = {
1015 .hfunc = priv->channels.params.rss_hfunc,
1016 .channels = &priv->channels,
1021 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
1026 memcpy(priv->channels.params.toeplitz_hash_key, key,
1027 sizeof(priv->channels.params.toeplitz_hash_key));
1028 hash_changed = hash_changed ||
1029 priv->channels.params.rss_hfunc == ETH_RSS_HASH_TOP;
1033 mlx5e_modify_tirs_hash(priv, in, inlen);
1035 mutex_unlock(&priv->state_lock);
1042 static int mlx5e_get_rxnfc(struct net_device *netdev,
1043 struct ethtool_rxnfc *info, u32 *rule_locs)
1045 struct mlx5e_priv *priv = netdev_priv(netdev);
1048 switch (info->cmd) {
1049 case ETHTOOL_GRXRINGS:
1050 info->data = priv->channels.params.num_channels;
1052 case ETHTOOL_GRXCLSRLCNT:
1053 info->rule_cnt = priv->fs.ethtool.tot_num_rules;
1055 case ETHTOOL_GRXCLSRULE:
1056 err = mlx5e_ethtool_get_flow(priv, info, info->fs.location);
1058 case ETHTOOL_GRXCLSRLALL:
1059 err = mlx5e_ethtool_get_all_flows(priv, info, rule_locs);
1069 static int mlx5e_get_tunable(struct net_device *dev,
1070 const struct ethtool_tunable *tuna,
1073 const struct mlx5e_priv *priv = netdev_priv(dev);
1077 case ETHTOOL_TX_COPYBREAK:
1078 *(u32 *)data = priv->channels.params.tx_max_inline;
1088 static int mlx5e_set_tunable(struct net_device *dev,
1089 const struct ethtool_tunable *tuna,
1092 struct mlx5e_priv *priv = netdev_priv(dev);
1093 struct mlx5_core_dev *mdev = priv->mdev;
1094 struct mlx5e_channels new_channels = {};
1098 mutex_lock(&priv->state_lock);
1101 case ETHTOOL_TX_COPYBREAK:
1103 if (val > mlx5e_get_max_inline_cap(mdev)) {
1108 new_channels.params = priv->channels.params;
1109 new_channels.params.tx_max_inline = val;
1111 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1112 priv->channels.params = new_channels.params;
1116 err = mlx5e_open_channels(priv, &new_channels);
1119 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1127 mutex_unlock(&priv->state_lock);
1131 static void mlx5e_get_pauseparam(struct net_device *netdev,
1132 struct ethtool_pauseparam *pauseparam)
1134 struct mlx5e_priv *priv = netdev_priv(netdev);
1135 struct mlx5_core_dev *mdev = priv->mdev;
1138 err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1139 &pauseparam->tx_pause);
1141 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1146 static int mlx5e_set_pauseparam(struct net_device *netdev,
1147 struct ethtool_pauseparam *pauseparam)
1149 struct mlx5e_priv *priv = netdev_priv(netdev);
1150 struct mlx5_core_dev *mdev = priv->mdev;
1153 if (pauseparam->autoneg)
1156 err = mlx5_set_port_pause(mdev,
1157 pauseparam->rx_pause ? 1 : 0,
1158 pauseparam->tx_pause ? 1 : 0);
1160 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1167 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1168 struct ethtool_ts_info *info)
1170 struct mlx5_core_dev *mdev = priv->mdev;
1173 ret = ethtool_op_get_ts_info(priv->netdev, info);
1177 info->phc_index = mdev->clock.ptp ?
1178 ptp_clock_index(mdev->clock.ptp) : -1;
1180 if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
1183 info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
1184 SOF_TIMESTAMPING_RX_HARDWARE |
1185 SOF_TIMESTAMPING_RAW_HARDWARE;
1187 info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1188 BIT(HWTSTAMP_TX_ON);
1190 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1191 BIT(HWTSTAMP_FILTER_ALL);
1196 static int mlx5e_get_ts_info(struct net_device *dev,
1197 struct ethtool_ts_info *info)
1199 struct mlx5e_priv *priv = netdev_priv(dev);
1201 return mlx5e_ethtool_get_ts_info(priv, info);
1204 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1208 if (MLX5_CAP_GEN(mdev, wol_g))
1211 if (MLX5_CAP_GEN(mdev, wol_s))
1212 ret |= WAKE_MAGICSECURE;
1214 if (MLX5_CAP_GEN(mdev, wol_a))
1217 if (MLX5_CAP_GEN(mdev, wol_b))
1220 if (MLX5_CAP_GEN(mdev, wol_m))
1223 if (MLX5_CAP_GEN(mdev, wol_u))
1226 if (MLX5_CAP_GEN(mdev, wol_p))
1232 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1236 if (mode & MLX5_WOL_MAGIC)
1239 if (mode & MLX5_WOL_SECURED_MAGIC)
1240 ret |= WAKE_MAGICSECURE;
1242 if (mode & MLX5_WOL_ARP)
1245 if (mode & MLX5_WOL_BROADCAST)
1248 if (mode & MLX5_WOL_MULTICAST)
1251 if (mode & MLX5_WOL_UNICAST)
1254 if (mode & MLX5_WOL_PHY_ACTIVITY)
1260 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1264 if (mode & WAKE_MAGIC)
1265 ret |= MLX5_WOL_MAGIC;
1267 if (mode & WAKE_MAGICSECURE)
1268 ret |= MLX5_WOL_SECURED_MAGIC;
1270 if (mode & WAKE_ARP)
1271 ret |= MLX5_WOL_ARP;
1273 if (mode & WAKE_BCAST)
1274 ret |= MLX5_WOL_BROADCAST;
1276 if (mode & WAKE_MCAST)
1277 ret |= MLX5_WOL_MULTICAST;
1279 if (mode & WAKE_UCAST)
1280 ret |= MLX5_WOL_UNICAST;
1282 if (mode & WAKE_PHY)
1283 ret |= MLX5_WOL_PHY_ACTIVITY;
1288 static void mlx5e_get_wol(struct net_device *netdev,
1289 struct ethtool_wolinfo *wol)
1291 struct mlx5e_priv *priv = netdev_priv(netdev);
1292 struct mlx5_core_dev *mdev = priv->mdev;
1296 memset(wol, 0, sizeof(*wol));
1298 wol->supported = mlx5e_get_wol_supported(mdev);
1299 if (!wol->supported)
1302 err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1306 wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1309 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1311 struct mlx5e_priv *priv = netdev_priv(netdev);
1312 struct mlx5_core_dev *mdev = priv->mdev;
1313 __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1319 if (wol->wolopts & ~wol_supported)
1322 mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1324 return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1327 static u32 mlx5e_get_msglevel(struct net_device *dev)
1329 return ((struct mlx5e_priv *)netdev_priv(dev))->msglevel;
1332 static void mlx5e_set_msglevel(struct net_device *dev, u32 val)
1334 ((struct mlx5e_priv *)netdev_priv(dev))->msglevel = val;
1337 static int mlx5e_set_phys_id(struct net_device *dev,
1338 enum ethtool_phys_id_state state)
1340 struct mlx5e_priv *priv = netdev_priv(dev);
1341 struct mlx5_core_dev *mdev = priv->mdev;
1342 u16 beacon_duration;
1344 if (!MLX5_CAP_GEN(mdev, beacon_led))
1348 case ETHTOOL_ID_ACTIVE:
1349 beacon_duration = MLX5_BEACON_DURATION_INF;
1351 case ETHTOOL_ID_INACTIVE:
1352 beacon_duration = MLX5_BEACON_DURATION_OFF;
1358 return mlx5_set_port_beacon(mdev, beacon_duration);
1361 static int mlx5e_get_module_info(struct net_device *netdev,
1362 struct ethtool_modinfo *modinfo)
1364 struct mlx5e_priv *priv = netdev_priv(netdev);
1365 struct mlx5_core_dev *dev = priv->mdev;
1369 size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1373 /* data[0] = identifier byte */
1375 case MLX5_MODULE_ID_QSFP:
1376 modinfo->type = ETH_MODULE_SFF_8436;
1377 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1379 case MLX5_MODULE_ID_QSFP_PLUS:
1380 case MLX5_MODULE_ID_QSFP28:
1381 /* data[1] = revision id */
1382 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1383 modinfo->type = ETH_MODULE_SFF_8636;
1384 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1386 modinfo->type = ETH_MODULE_SFF_8436;
1387 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1390 case MLX5_MODULE_ID_SFP:
1391 modinfo->type = ETH_MODULE_SFF_8472;
1392 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1395 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1403 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1404 struct ethtool_eeprom *ee,
1407 struct mlx5e_priv *priv = netdev_priv(netdev);
1408 struct mlx5_core_dev *mdev = priv->mdev;
1409 int offset = ee->offset;
1416 memset(data, 0, ee->len);
1418 while (i < ee->len) {
1419 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1426 if (size_read < 0) {
1427 netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1428 __func__, size_read);
1433 offset += size_read;
1439 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1441 static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1444 struct mlx5e_priv *priv = netdev_priv(netdev);
1445 struct mlx5_core_dev *mdev = priv->mdev;
1446 struct mlx5e_channels new_channels = {};
1448 u8 cq_period_mode, current_cq_period_mode;
1451 cq_period_mode = enable ?
1452 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1453 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1454 current_cq_period_mode = is_rx_cq ?
1455 priv->channels.params.rx_cq_moderation.cq_period_mode :
1456 priv->channels.params.tx_cq_moderation.cq_period_mode;
1457 mode_changed = cq_period_mode != current_cq_period_mode;
1459 if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1460 !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1466 new_channels.params = priv->channels.params;
1468 mlx5e_set_rx_cq_mode_params(&new_channels.params, cq_period_mode);
1470 mlx5e_set_tx_cq_mode_params(&new_channels.params, cq_period_mode);
1472 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1473 priv->channels.params = new_channels.params;
1477 err = mlx5e_open_channels(priv, &new_channels);
1481 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1485 static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
1487 return set_pflag_cqe_based_moder(netdev, enable, false);
1490 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1492 return set_pflag_cqe_based_moder(netdev, enable, true);
1495 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
1497 bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1498 struct mlx5e_channels new_channels = {};
1501 if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1502 return new_val ? -EOPNOTSUPP : 0;
1504 if (curr_val == new_val)
1507 new_channels.params = priv->channels.params;
1508 MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1510 new_channels.params.mpwqe_log_stride_sz =
1511 MLX5E_MPWQE_STRIDE_SZ(priv->mdev, new_val);
1512 new_channels.params.mpwqe_log_num_strides =
1513 MLX5_MPWRQ_LOG_WQE_SZ - new_channels.params.mpwqe_log_stride_sz;
1515 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1516 priv->channels.params = new_channels.params;
1520 err = mlx5e_open_channels(priv, &new_channels);
1524 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1525 mlx5e_dbg(DRV, priv, "MLX5E: RxCqeCmprss was turned %s\n",
1526 MLX5E_GET_PFLAG(&priv->channels.params,
1527 MLX5E_PFLAG_RX_CQE_COMPRESS) ? "ON" : "OFF");
1532 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1535 struct mlx5e_priv *priv = netdev_priv(netdev);
1536 struct mlx5_core_dev *mdev = priv->mdev;
1538 if (!MLX5_CAP_GEN(mdev, cqe_compression))
1541 if (enable && priv->tstamp.rx_filter != HWTSTAMP_FILTER_NONE) {
1542 netdev_err(netdev, "Can't enable cqe compression while timestamping is enabled.\n");
1546 mlx5e_modify_rx_cqe_compression_locked(priv, enable);
1547 priv->channels.params.rx_cqe_compress_def = enable;
1552 static int mlx5e_handle_pflag(struct net_device *netdev,
1554 enum mlx5e_priv_flag flag,
1555 mlx5e_pflag_handler pflag_handler)
1557 struct mlx5e_priv *priv = netdev_priv(netdev);
1558 bool enable = !!(wanted_flags & flag);
1559 u32 changes = wanted_flags ^ priv->channels.params.pflags;
1562 if (!(changes & flag))
1565 err = pflag_handler(netdev, enable);
1567 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1568 enable ? "Enable" : "Disable", flag, err);
1572 MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
1576 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1578 struct mlx5e_priv *priv = netdev_priv(netdev);
1581 mutex_lock(&priv->state_lock);
1582 err = mlx5e_handle_pflag(netdev, pflags,
1583 MLX5E_PFLAG_RX_CQE_BASED_MODER,
1584 set_pflag_rx_cqe_based_moder);
1588 err = mlx5e_handle_pflag(netdev, pflags,
1589 MLX5E_PFLAG_TX_CQE_BASED_MODER,
1590 set_pflag_tx_cqe_based_moder);
1594 err = mlx5e_handle_pflag(netdev, pflags,
1595 MLX5E_PFLAG_RX_CQE_COMPRESS,
1596 set_pflag_rx_cqe_compress);
1599 mutex_unlock(&priv->state_lock);
1603 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1605 struct mlx5e_priv *priv = netdev_priv(netdev);
1607 return priv->channels.params.pflags;
1610 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1613 struct mlx5e_priv *priv = netdev_priv(dev);
1616 case ETHTOOL_SRXCLSRLINS:
1617 err = mlx5e_ethtool_flow_replace(priv, &cmd->fs);
1619 case ETHTOOL_SRXCLSRLDEL:
1620 err = mlx5e_ethtool_flow_remove(priv, cmd->fs.location);
1630 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1631 struct ethtool_flash *flash)
1633 struct mlx5_core_dev *mdev = priv->mdev;
1634 struct net_device *dev = priv->netdev;
1635 const struct firmware *fw;
1638 if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1641 err = request_firmware_direct(&fw, flash->data, &dev->dev);
1648 err = mlx5_firmware_flash(mdev, fw);
1649 release_firmware(fw);
1656 static int mlx5e_flash_device(struct net_device *dev,
1657 struct ethtool_flash *flash)
1659 struct mlx5e_priv *priv = netdev_priv(dev);
1661 return mlx5e_ethtool_flash_device(priv, flash);
1664 const struct ethtool_ops mlx5e_ethtool_ops = {
1665 .get_drvinfo = mlx5e_get_drvinfo,
1666 .get_link = ethtool_op_get_link,
1667 .get_strings = mlx5e_get_strings,
1668 .get_sset_count = mlx5e_get_sset_count,
1669 .get_ethtool_stats = mlx5e_get_ethtool_stats,
1670 .get_ringparam = mlx5e_get_ringparam,
1671 .set_ringparam = mlx5e_set_ringparam,
1672 .get_channels = mlx5e_get_channels,
1673 .set_channels = mlx5e_set_channels,
1674 .get_coalesce = mlx5e_get_coalesce,
1675 .set_coalesce = mlx5e_set_coalesce,
1676 .get_link_ksettings = mlx5e_get_link_ksettings,
1677 .set_link_ksettings = mlx5e_set_link_ksettings,
1678 .get_rxfh_key_size = mlx5e_get_rxfh_key_size,
1679 .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1680 .get_rxfh = mlx5e_get_rxfh,
1681 .set_rxfh = mlx5e_set_rxfh,
1682 .get_rxnfc = mlx5e_get_rxnfc,
1683 .set_rxnfc = mlx5e_set_rxnfc,
1684 .flash_device = mlx5e_flash_device,
1685 .get_tunable = mlx5e_get_tunable,
1686 .set_tunable = mlx5e_set_tunable,
1687 .get_pauseparam = mlx5e_get_pauseparam,
1688 .set_pauseparam = mlx5e_set_pauseparam,
1689 .get_ts_info = mlx5e_get_ts_info,
1690 .set_phys_id = mlx5e_set_phys_id,
1691 .get_wol = mlx5e_get_wol,
1692 .set_wol = mlx5e_set_wol,
1693 .get_module_info = mlx5e_get_module_info,
1694 .get_module_eeprom = mlx5e_get_module_eeprom,
1695 .get_priv_flags = mlx5e_get_priv_flags,
1696 .set_priv_flags = mlx5e_set_priv_flags,
1697 .self_test = mlx5e_self_test,
1698 .get_msglevel = mlx5e_get_msglevel,
1699 .set_msglevel = mlx5e_set_msglevel,