2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
36 struct ethtool_drvinfo *drvinfo)
38 struct mlx5_core_dev *mdev = priv->mdev;
40 strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
41 strlcpy(drvinfo->version, DRIVER_VERSION,
42 sizeof(drvinfo->version));
43 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
45 fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
47 strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
48 sizeof(drvinfo->bus_info));
51 static void mlx5e_get_drvinfo(struct net_device *dev,
52 struct ethtool_drvinfo *drvinfo)
54 struct mlx5e_priv *priv = netdev_priv(dev);
56 mlx5e_ethtool_get_drvinfo(priv, drvinfo);
59 struct ptys2ethtool_config {
60 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
61 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
65 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
67 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...) \
69 struct ptys2ethtool_config *cfg; \
70 const unsigned int modes[] = { __VA_ARGS__ }; \
72 cfg = &ptys2ethtool_table[reg_]; \
73 cfg->speed = speed_; \
74 bitmap_zero(cfg->supported, \
75 __ETHTOOL_LINK_MODE_MASK_NBITS); \
76 bitmap_zero(cfg->advertised, \
77 __ETHTOOL_LINK_MODE_MASK_NBITS); \
78 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) { \
79 __set_bit(modes[i], cfg->supported); \
80 __set_bit(modes[i], cfg->advertised); \
84 void mlx5e_build_ptys2ethtool_map(void)
86 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, SPEED_1000,
87 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
88 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, SPEED_1000,
89 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
90 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, SPEED_10000,
91 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
92 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, SPEED_10000,
93 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
94 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, SPEED_10000,
95 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
96 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, SPEED_20000,
97 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
98 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, SPEED_40000,
99 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
100 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, SPEED_40000,
101 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
102 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, SPEED_56000,
103 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
104 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, SPEED_10000,
105 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
106 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, SPEED_10000,
107 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
108 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, SPEED_10000,
109 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
110 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, SPEED_40000,
111 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
112 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, SPEED_40000,
113 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
114 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, SPEED_50000,
115 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
116 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, SPEED_100000,
117 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
118 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, SPEED_100000,
119 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
120 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, SPEED_100000,
121 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
122 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, SPEED_100000,
123 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
124 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, SPEED_10000,
125 ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
126 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, SPEED_25000,
127 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
128 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, SPEED_25000,
129 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
130 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, SPEED_25000,
131 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
132 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, SPEED_50000,
133 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
134 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, SPEED_50000,
135 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
138 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
140 int i, num_stats = 0;
144 for (i = 0; i < mlx5e_num_stats_grps; i++)
145 num_stats += mlx5e_stats_grps[i].get_num_stats(priv);
147 case ETH_SS_PRIV_FLAGS:
148 return ARRAY_SIZE(mlx5e_priv_flags);
150 return mlx5e_self_test_num(priv);
157 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
159 struct mlx5e_priv *priv = netdev_priv(dev);
161 return mlx5e_ethtool_get_sset_count(priv, sset);
164 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, u8 *data)
168 for (i = 0; i < mlx5e_num_stats_grps; i++)
169 idx = mlx5e_stats_grps[i].fill_strings(priv, data, idx);
172 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
177 case ETH_SS_PRIV_FLAGS:
178 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
179 strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
183 for (i = 0; i < mlx5e_self_test_num(priv); i++)
184 strcpy(data + i * ETH_GSTRING_LEN,
185 mlx5e_self_tests[i]);
189 mlx5e_fill_stats_strings(priv, data);
194 static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
196 struct mlx5e_priv *priv = netdev_priv(dev);
198 mlx5e_ethtool_get_strings(priv, stringset, data);
201 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
202 struct ethtool_stats *stats, u64 *data)
209 mutex_lock(&priv->state_lock);
210 if (test_bit(MLX5E_STATE_OPENED, &priv->state))
211 mlx5e_update_stats(priv, true);
212 mutex_unlock(&priv->state_lock);
214 for (i = 0; i < mlx5e_num_stats_grps; i++)
215 idx = mlx5e_stats_grps[i].fill_stats(priv, data, idx);
218 static void mlx5e_get_ethtool_stats(struct net_device *dev,
219 struct ethtool_stats *stats,
222 struct mlx5e_priv *priv = netdev_priv(dev);
224 mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
227 static u32 mlx5e_rx_wqes_to_packets(struct mlx5e_priv *priv, int rq_wq_type,
235 if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
238 stride_size = 1 << priv->channels.params.mpwqe_log_stride_sz;
239 num_strides = 1 << priv->channels.params.mpwqe_log_num_strides;
240 wqe_size = stride_size * num_strides;
242 packets_per_wqe = wqe_size /
243 ALIGN(ETH_DATA_LEN, stride_size);
244 return (1 << (order_base_2(num_wqe * packets_per_wqe) - 1));
247 static u32 mlx5e_packets_to_rx_wqes(struct mlx5e_priv *priv, int rq_wq_type,
256 if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
259 stride_size = 1 << priv->channels.params.mpwqe_log_stride_sz;
260 num_strides = 1 << priv->channels.params.mpwqe_log_num_strides;
261 wqe_size = stride_size * num_strides;
263 num_packets = (1 << order_base_2(num_packets));
265 packets_per_wqe = wqe_size /
266 ALIGN(ETH_DATA_LEN, stride_size);
267 num_wqes = DIV_ROUND_UP(num_packets, packets_per_wqe);
268 return 1 << (order_base_2(num_wqes));
271 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
272 struct ethtool_ringparam *param)
274 int rq_wq_type = priv->channels.params.rq_wq_type;
276 param->rx_max_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
277 1 << mlx5_max_log_rq_size(rq_wq_type));
278 param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
279 param->rx_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
280 1 << priv->channels.params.log_rq_size);
281 param->tx_pending = 1 << priv->channels.params.log_sq_size;
284 static void mlx5e_get_ringparam(struct net_device *dev,
285 struct ethtool_ringparam *param)
287 struct mlx5e_priv *priv = netdev_priv(dev);
289 mlx5e_ethtool_get_ringparam(priv, param);
292 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
293 struct ethtool_ringparam *param)
295 int rq_wq_type = priv->channels.params.rq_wq_type;
296 struct mlx5e_channels new_channels = {};
305 if (param->rx_jumbo_pending) {
306 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
310 if (param->rx_mini_pending) {
311 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
316 min_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
317 1 << mlx5_min_log_rq_size(rq_wq_type));
318 max_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
319 1 << mlx5_max_log_rq_size(rq_wq_type));
320 rx_pending_wqes = mlx5e_packets_to_rx_wqes(priv, rq_wq_type,
323 if (param->rx_pending < min_rq_size) {
324 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
325 __func__, param->rx_pending,
329 if (param->rx_pending > max_rq_size) {
330 netdev_info(priv->netdev, "%s: rx_pending (%d) > max (%d)\n",
331 __func__, param->rx_pending,
336 num_mtts = MLX5E_REQUIRED_MTTS(rx_pending_wqes);
337 if (priv->channels.params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
338 !MLX5E_VALID_NUM_MTTS(num_mtts)) {
339 netdev_info(priv->netdev, "%s: rx_pending (%d) request can't be satisfied, try to reduce.\n",
340 __func__, param->rx_pending);
344 if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
345 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
346 __func__, param->tx_pending,
347 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
350 if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
351 netdev_info(priv->netdev, "%s: tx_pending (%d) > max (%d)\n",
352 __func__, param->tx_pending,
353 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
357 log_rq_size = order_base_2(rx_pending_wqes);
358 log_sq_size = order_base_2(param->tx_pending);
360 if (log_rq_size == priv->channels.params.log_rq_size &&
361 log_sq_size == priv->channels.params.log_sq_size)
364 mutex_lock(&priv->state_lock);
366 new_channels.params = priv->channels.params;
367 new_channels.params.log_rq_size = log_rq_size;
368 new_channels.params.log_sq_size = log_sq_size;
370 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
371 priv->channels.params = new_channels.params;
375 err = mlx5e_open_channels(priv, &new_channels);
379 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
382 mutex_unlock(&priv->state_lock);
387 static int mlx5e_set_ringparam(struct net_device *dev,
388 struct ethtool_ringparam *param)
390 struct mlx5e_priv *priv = netdev_priv(dev);
392 return mlx5e_ethtool_set_ringparam(priv, param);
395 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
396 struct ethtool_channels *ch)
398 ch->max_combined = priv->profile->max_nch(priv->mdev);
399 ch->combined_count = priv->channels.params.num_channels;
402 static void mlx5e_get_channels(struct net_device *dev,
403 struct ethtool_channels *ch)
405 struct mlx5e_priv *priv = netdev_priv(dev);
407 mlx5e_ethtool_get_channels(priv, ch);
410 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
411 struct ethtool_channels *ch)
413 unsigned int count = ch->combined_count;
414 struct mlx5e_channels new_channels = {};
419 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
424 if (priv->channels.params.num_channels == count)
427 mutex_lock(&priv->state_lock);
429 new_channels.params = priv->channels.params;
430 new_channels.params.num_channels = count;
431 if (!netif_is_rxfh_configured(priv->netdev))
432 mlx5e_build_default_indir_rqt(new_channels.params.indirection_rqt,
433 MLX5E_INDIR_RQT_SIZE, count);
435 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
436 priv->channels.params = new_channels.params;
440 /* Create fresh channels with new parameters */
441 err = mlx5e_open_channels(priv, &new_channels);
445 arfs_enabled = priv->netdev->features & NETIF_F_NTUPLE;
447 mlx5e_arfs_disable(priv);
449 /* Switch to new channels, set new parameters and close old ones */
450 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
453 err = mlx5e_arfs_enable(priv);
455 netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
460 mutex_unlock(&priv->state_lock);
465 static int mlx5e_set_channels(struct net_device *dev,
466 struct ethtool_channels *ch)
468 struct mlx5e_priv *priv = netdev_priv(dev);
470 return mlx5e_ethtool_set_channels(priv, ch);
473 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
474 struct ethtool_coalesce *coal)
476 if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
479 coal->rx_coalesce_usecs = priv->channels.params.rx_cq_moderation.usec;
480 coal->rx_max_coalesced_frames = priv->channels.params.rx_cq_moderation.pkts;
481 coal->tx_coalesce_usecs = priv->channels.params.tx_cq_moderation.usec;
482 coal->tx_max_coalesced_frames = priv->channels.params.tx_cq_moderation.pkts;
483 coal->use_adaptive_rx_coalesce = priv->channels.params.rx_am_enabled;
488 static int mlx5e_get_coalesce(struct net_device *netdev,
489 struct ethtool_coalesce *coal)
491 struct mlx5e_priv *priv = netdev_priv(netdev);
493 return mlx5e_ethtool_get_coalesce(priv, coal);
497 mlx5e_set_priv_channels_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
499 struct mlx5_core_dev *mdev = priv->mdev;
503 for (i = 0; i < priv->channels.num; ++i) {
504 struct mlx5e_channel *c = priv->channels.c[i];
506 for (tc = 0; tc < c->num_tc; tc++) {
507 mlx5_core_modify_cq_moderation(mdev,
509 coal->tx_coalesce_usecs,
510 coal->tx_max_coalesced_frames);
513 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
514 coal->rx_coalesce_usecs,
515 coal->rx_max_coalesced_frames);
519 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
520 struct ethtool_coalesce *coal)
522 struct mlx5_core_dev *mdev = priv->mdev;
523 struct mlx5e_channels new_channels = {};
527 if (!MLX5_CAP_GEN(mdev, cq_moderation))
530 mutex_lock(&priv->state_lock);
531 new_channels.params = priv->channels.params;
533 new_channels.params.tx_cq_moderation.usec = coal->tx_coalesce_usecs;
534 new_channels.params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
535 new_channels.params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
536 new_channels.params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
537 new_channels.params.rx_am_enabled = !!coal->use_adaptive_rx_coalesce;
539 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
540 priv->channels.params = new_channels.params;
545 reset = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_am_enabled;
547 mlx5e_set_priv_channels_coalesce(priv, coal);
548 priv->channels.params = new_channels.params;
552 /* open fresh channels with new coal parameters */
553 err = mlx5e_open_channels(priv, &new_channels);
557 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
560 mutex_unlock(&priv->state_lock);
564 static int mlx5e_set_coalesce(struct net_device *netdev,
565 struct ethtool_coalesce *coal)
567 struct mlx5e_priv *priv = netdev_priv(netdev);
569 return mlx5e_ethtool_set_coalesce(priv, coal);
572 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
575 unsigned long proto_cap = eth_proto_cap;
578 for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
579 bitmap_or(supported_modes, supported_modes,
580 ptys2ethtool_table[proto].supported,
581 __ETHTOOL_LINK_MODE_MASK_NBITS);
584 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
587 unsigned long proto_cap = eth_proto_cap;
590 for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
591 bitmap_or(advertising_modes, advertising_modes,
592 ptys2ethtool_table[proto].advertised,
593 __ETHTOOL_LINK_MODE_MASK_NBITS);
596 static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings *link_ksettings,
600 if (!connector_type || connector_type >= MLX5E_CONNECTOR_TYPE_NUMBER) {
601 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
602 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
603 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
604 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
605 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
606 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
607 ethtool_link_ksettings_add_link_mode(link_ksettings,
610 ethtool_link_ksettings_add_link_mode(link_ksettings,
615 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
616 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
617 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
618 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
619 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
620 ethtool_link_ksettings_add_link_mode(link_ksettings,
623 ethtool_link_ksettings_add_link_mode(link_ksettings,
630 switch (connector_type) {
632 ethtool_link_ksettings_add_link_mode(link_ksettings,
634 ethtool_link_ksettings_add_link_mode(link_ksettings,
638 ethtool_link_ksettings_add_link_mode(link_ksettings,
640 ethtool_link_ksettings_add_link_mode(link_ksettings,
644 ethtool_link_ksettings_add_link_mode(link_ksettings,
646 ethtool_link_ksettings_add_link_mode(link_ksettings,
650 ethtool_link_ksettings_add_link_mode(link_ksettings,
652 ethtool_link_ksettings_add_link_mode(link_ksettings,
655 case MLX5E_PORT_FIBRE:
656 ethtool_link_ksettings_add_link_mode(link_ksettings,
658 ethtool_link_ksettings_add_link_mode(link_ksettings,
662 ethtool_link_ksettings_add_link_mode(link_ksettings,
663 supported, Backplane);
664 ethtool_link_ksettings_add_link_mode(link_ksettings,
665 advertising, Backplane);
667 case MLX5E_PORT_NONE:
668 case MLX5E_PORT_OTHER:
674 int mlx5e_get_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
681 err = mlx5_query_port_proto_cap(mdev, &proto_cap, MLX5_PTYS_EN);
685 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i)
686 if (proto_cap & MLX5E_PROT_MASK(i))
687 max_speed = max(max_speed, ptys2ethtool_table[i].speed);
693 static void get_speed_duplex(struct net_device *netdev,
695 struct ethtool_link_ksettings *link_ksettings)
698 u32 speed = SPEED_UNKNOWN;
699 u8 duplex = DUPLEX_UNKNOWN;
701 if (!netif_carrier_ok(netdev))
704 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
705 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
706 speed = ptys2ethtool_table[i].speed;
707 duplex = DUPLEX_FULL;
712 link_ksettings->base.speed = speed;
713 link_ksettings->base.duplex = duplex;
716 static void get_supported(u32 eth_proto_cap,
717 struct ethtool_link_ksettings *link_ksettings)
719 unsigned long *supported = link_ksettings->link_modes.supported;
721 ptys2ethtool_supported_link(supported, eth_proto_cap);
722 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
725 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
727 struct ethtool_link_ksettings *link_ksettings)
729 unsigned long *advertising = link_ksettings->link_modes.advertising;
731 ptys2ethtool_adver_link(advertising, eth_proto_cap);
733 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
734 if (tx_pause ^ rx_pause)
735 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
738 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
739 [MLX5E_PORT_UNKNOWN] = PORT_OTHER,
740 [MLX5E_PORT_NONE] = PORT_NONE,
741 [MLX5E_PORT_TP] = PORT_TP,
742 [MLX5E_PORT_AUI] = PORT_AUI,
743 [MLX5E_PORT_BNC] = PORT_BNC,
744 [MLX5E_PORT_MII] = PORT_MII,
745 [MLX5E_PORT_FIBRE] = PORT_FIBRE,
746 [MLX5E_PORT_DA] = PORT_DA,
747 [MLX5E_PORT_OTHER] = PORT_OTHER,
750 static u8 get_connector_port(u32 eth_proto, u8 connector_type)
752 if (connector_type && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
753 return ptys2connector_type[connector_type];
756 (MLX5E_PROT_MASK(MLX5E_10GBASE_SR) |
757 MLX5E_PROT_MASK(MLX5E_40GBASE_SR4) |
758 MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
759 MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
764 (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
765 MLX5E_PROT_MASK(MLX5E_10GBASE_CR) |
766 MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
771 (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
772 MLX5E_PROT_MASK(MLX5E_10GBASE_KR) |
773 MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
774 MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
781 static void get_lp_advertising(u32 eth_proto_lp,
782 struct ethtool_link_ksettings *link_ksettings)
784 unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
786 ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
789 static int mlx5e_get_link_ksettings(struct net_device *netdev,
790 struct ethtool_link_ksettings *link_ksettings)
792 struct mlx5e_priv *priv = netdev_priv(netdev);
793 struct mlx5_core_dev *mdev = priv->mdev;
794 u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
806 err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
808 netdev_err(netdev, "%s: query port ptys failed: %d\n",
813 eth_proto_cap = MLX5_GET(ptys_reg, out, eth_proto_capability);
814 eth_proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);
815 eth_proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper);
816 eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
817 an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
818 an_status = MLX5_GET(ptys_reg, out, an_status);
819 connector_type = MLX5_GET(ptys_reg, out, connector_type);
821 mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
823 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
824 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
826 get_supported(eth_proto_cap, link_ksettings);
827 get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings);
828 get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
830 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
832 link_ksettings->base.port = get_connector_port(eth_proto_oper,
834 ptys2ethtool_supported_advertised_port(link_ksettings, eth_proto_admin,
836 get_lp_advertising(eth_proto_lp, link_ksettings);
838 if (an_status == MLX5_AN_COMPLETE)
839 ethtool_link_ksettings_add_link_mode(link_ksettings,
840 lp_advertising, Autoneg);
842 link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
844 ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
846 if (!an_disable_admin)
847 ethtool_link_ksettings_add_link_mode(link_ksettings,
848 advertising, Autoneg);
854 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
856 u32 i, ptys_modes = 0;
858 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
859 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
861 __ETHTOOL_LINK_MODE_MASK_NBITS))
862 ptys_modes |= MLX5E_PROT_MASK(i);
868 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
870 u32 i, speed_links = 0;
872 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
873 if (ptys2ethtool_table[i].speed == speed)
874 speed_links |= MLX5E_PROT_MASK(i);
880 static int mlx5e_set_link_ksettings(struct net_device *netdev,
881 const struct ethtool_link_ksettings *link_ksettings)
883 struct mlx5e_priv *priv = netdev_priv(netdev);
884 struct mlx5_core_dev *mdev = priv->mdev;
885 u32 eth_proto_cap, eth_proto_admin;
886 bool an_changes = false;
895 speed = link_ksettings->base.speed;
897 link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
898 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
899 mlx5e_ethtool2ptys_speed_link(speed);
901 err = mlx5_query_port_proto_cap(mdev, ð_proto_cap, MLX5_PTYS_EN);
903 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
908 link_modes = link_modes & eth_proto_cap;
910 netdev_err(netdev, "%s: Not supported link mode(s) requested",
916 err = mlx5_query_port_proto_admin(mdev, ð_proto_admin, MLX5_PTYS_EN);
918 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
923 mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
924 &an_disable_cap, &an_disable_admin);
926 an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
927 an_changes = ((!an_disable && an_disable_admin) ||
928 (an_disable && !an_disable_admin));
930 if (!an_changes && link_modes == eth_proto_admin)
933 mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
934 mlx5_toggle_port_link(mdev);
940 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
942 struct mlx5e_priv *priv = netdev_priv(netdev);
944 return sizeof(priv->channels.params.toeplitz_hash_key);
947 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
949 return MLX5E_INDIR_RQT_SIZE;
952 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
955 struct mlx5e_priv *priv = netdev_priv(netdev);
958 memcpy(indir, priv->channels.params.indirection_rqt,
959 sizeof(priv->channels.params.indirection_rqt));
962 memcpy(key, priv->channels.params.toeplitz_hash_key,
963 sizeof(priv->channels.params.toeplitz_hash_key));
966 *hfunc = priv->channels.params.rss_hfunc;
971 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
973 void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
974 struct mlx5_core_dev *mdev = priv->mdev;
975 int ctxlen = MLX5_ST_SZ_BYTES(tirc);
978 MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
980 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
981 memset(tirc, 0, ctxlen);
982 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
983 mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
986 if (!mlx5e_tunnel_inner_ft_supported(priv->mdev))
989 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
990 memset(tirc, 0, ctxlen);
991 mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, true);
992 mlx5_core_modify_tir(mdev, priv->inner_indir_tir[tt].tirn, in, inlen);
996 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
997 const u8 *key, const u8 hfunc)
999 struct mlx5e_priv *priv = netdev_priv(dev);
1000 int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
1001 bool hash_changed = false;
1004 if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
1005 (hfunc != ETH_RSS_HASH_XOR) &&
1006 (hfunc != ETH_RSS_HASH_TOP))
1009 in = kvzalloc(inlen, GFP_KERNEL);
1013 mutex_lock(&priv->state_lock);
1015 if (hfunc != ETH_RSS_HASH_NO_CHANGE &&
1016 hfunc != priv->channels.params.rss_hfunc) {
1017 priv->channels.params.rss_hfunc = hfunc;
1018 hash_changed = true;
1022 memcpy(priv->channels.params.indirection_rqt, indir,
1023 sizeof(priv->channels.params.indirection_rqt));
1025 if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1026 u32 rqtn = priv->indir_rqt.rqtn;
1027 struct mlx5e_redirect_rqt_param rrp = {
1031 .hfunc = priv->channels.params.rss_hfunc,
1032 .channels = &priv->channels,
1037 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
1042 memcpy(priv->channels.params.toeplitz_hash_key, key,
1043 sizeof(priv->channels.params.toeplitz_hash_key));
1044 hash_changed = hash_changed ||
1045 priv->channels.params.rss_hfunc == ETH_RSS_HASH_TOP;
1049 mlx5e_modify_tirs_hash(priv, in, inlen);
1051 mutex_unlock(&priv->state_lock);
1058 static int mlx5e_get_rxnfc(struct net_device *netdev,
1059 struct ethtool_rxnfc *info, u32 *rule_locs)
1061 struct mlx5e_priv *priv = netdev_priv(netdev);
1064 switch (info->cmd) {
1065 case ETHTOOL_GRXRINGS:
1066 info->data = priv->channels.params.num_channels;
1068 case ETHTOOL_GRXCLSRLCNT:
1069 info->rule_cnt = priv->fs.ethtool.tot_num_rules;
1071 case ETHTOOL_GRXCLSRULE:
1072 err = mlx5e_ethtool_get_flow(priv, info, info->fs.location);
1074 case ETHTOOL_GRXCLSRLALL:
1075 err = mlx5e_ethtool_get_all_flows(priv, info, rule_locs);
1085 static int mlx5e_get_tunable(struct net_device *dev,
1086 const struct ethtool_tunable *tuna,
1089 const struct mlx5e_priv *priv = netdev_priv(dev);
1093 case ETHTOOL_TX_COPYBREAK:
1094 *(u32 *)data = priv->channels.params.tx_max_inline;
1104 static int mlx5e_set_tunable(struct net_device *dev,
1105 const struct ethtool_tunable *tuna,
1108 struct mlx5e_priv *priv = netdev_priv(dev);
1109 struct mlx5_core_dev *mdev = priv->mdev;
1110 struct mlx5e_channels new_channels = {};
1114 mutex_lock(&priv->state_lock);
1117 case ETHTOOL_TX_COPYBREAK:
1119 if (val > mlx5e_get_max_inline_cap(mdev)) {
1124 new_channels.params = priv->channels.params;
1125 new_channels.params.tx_max_inline = val;
1127 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1128 priv->channels.params = new_channels.params;
1132 err = mlx5e_open_channels(priv, &new_channels);
1135 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1143 mutex_unlock(&priv->state_lock);
1147 static void mlx5e_get_pauseparam(struct net_device *netdev,
1148 struct ethtool_pauseparam *pauseparam)
1150 struct mlx5e_priv *priv = netdev_priv(netdev);
1151 struct mlx5_core_dev *mdev = priv->mdev;
1154 err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1155 &pauseparam->tx_pause);
1157 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1162 static int mlx5e_set_pauseparam(struct net_device *netdev,
1163 struct ethtool_pauseparam *pauseparam)
1165 struct mlx5e_priv *priv = netdev_priv(netdev);
1166 struct mlx5_core_dev *mdev = priv->mdev;
1169 if (pauseparam->autoneg)
1172 err = mlx5_set_port_pause(mdev,
1173 pauseparam->rx_pause ? 1 : 0,
1174 pauseparam->tx_pause ? 1 : 0);
1176 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1183 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1184 struct ethtool_ts_info *info)
1186 struct mlx5_core_dev *mdev = priv->mdev;
1189 ret = ethtool_op_get_ts_info(priv->netdev, info);
1193 info->phc_index = mdev->clock.ptp ?
1194 ptp_clock_index(mdev->clock.ptp) : -1;
1196 if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
1199 info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
1200 SOF_TIMESTAMPING_RX_HARDWARE |
1201 SOF_TIMESTAMPING_RAW_HARDWARE;
1203 info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1204 BIT(HWTSTAMP_TX_ON);
1206 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1207 BIT(HWTSTAMP_FILTER_ALL);
1212 static int mlx5e_get_ts_info(struct net_device *dev,
1213 struct ethtool_ts_info *info)
1215 struct mlx5e_priv *priv = netdev_priv(dev);
1217 return mlx5e_ethtool_get_ts_info(priv, info);
1220 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1224 if (MLX5_CAP_GEN(mdev, wol_g))
1227 if (MLX5_CAP_GEN(mdev, wol_s))
1228 ret |= WAKE_MAGICSECURE;
1230 if (MLX5_CAP_GEN(mdev, wol_a))
1233 if (MLX5_CAP_GEN(mdev, wol_b))
1236 if (MLX5_CAP_GEN(mdev, wol_m))
1239 if (MLX5_CAP_GEN(mdev, wol_u))
1242 if (MLX5_CAP_GEN(mdev, wol_p))
1248 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1252 if (mode & MLX5_WOL_MAGIC)
1255 if (mode & MLX5_WOL_SECURED_MAGIC)
1256 ret |= WAKE_MAGICSECURE;
1258 if (mode & MLX5_WOL_ARP)
1261 if (mode & MLX5_WOL_BROADCAST)
1264 if (mode & MLX5_WOL_MULTICAST)
1267 if (mode & MLX5_WOL_UNICAST)
1270 if (mode & MLX5_WOL_PHY_ACTIVITY)
1276 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1280 if (mode & WAKE_MAGIC)
1281 ret |= MLX5_WOL_MAGIC;
1283 if (mode & WAKE_MAGICSECURE)
1284 ret |= MLX5_WOL_SECURED_MAGIC;
1286 if (mode & WAKE_ARP)
1287 ret |= MLX5_WOL_ARP;
1289 if (mode & WAKE_BCAST)
1290 ret |= MLX5_WOL_BROADCAST;
1292 if (mode & WAKE_MCAST)
1293 ret |= MLX5_WOL_MULTICAST;
1295 if (mode & WAKE_UCAST)
1296 ret |= MLX5_WOL_UNICAST;
1298 if (mode & WAKE_PHY)
1299 ret |= MLX5_WOL_PHY_ACTIVITY;
1304 static void mlx5e_get_wol(struct net_device *netdev,
1305 struct ethtool_wolinfo *wol)
1307 struct mlx5e_priv *priv = netdev_priv(netdev);
1308 struct mlx5_core_dev *mdev = priv->mdev;
1312 memset(wol, 0, sizeof(*wol));
1314 wol->supported = mlx5e_get_wol_supported(mdev);
1315 if (!wol->supported)
1318 err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1322 wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1325 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1327 struct mlx5e_priv *priv = netdev_priv(netdev);
1328 struct mlx5_core_dev *mdev = priv->mdev;
1329 __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1335 if (wol->wolopts & ~wol_supported)
1338 mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1340 return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1343 static u32 mlx5e_get_msglevel(struct net_device *dev)
1345 return ((struct mlx5e_priv *)netdev_priv(dev))->msglevel;
1348 static void mlx5e_set_msglevel(struct net_device *dev, u32 val)
1350 ((struct mlx5e_priv *)netdev_priv(dev))->msglevel = val;
1353 static int mlx5e_set_phys_id(struct net_device *dev,
1354 enum ethtool_phys_id_state state)
1356 struct mlx5e_priv *priv = netdev_priv(dev);
1357 struct mlx5_core_dev *mdev = priv->mdev;
1358 u16 beacon_duration;
1360 if (!MLX5_CAP_GEN(mdev, beacon_led))
1364 case ETHTOOL_ID_ACTIVE:
1365 beacon_duration = MLX5_BEACON_DURATION_INF;
1367 case ETHTOOL_ID_INACTIVE:
1368 beacon_duration = MLX5_BEACON_DURATION_OFF;
1374 return mlx5_set_port_beacon(mdev, beacon_duration);
1377 static int mlx5e_get_module_info(struct net_device *netdev,
1378 struct ethtool_modinfo *modinfo)
1380 struct mlx5e_priv *priv = netdev_priv(netdev);
1381 struct mlx5_core_dev *dev = priv->mdev;
1385 size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1389 /* data[0] = identifier byte */
1391 case MLX5_MODULE_ID_QSFP:
1392 modinfo->type = ETH_MODULE_SFF_8436;
1393 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1395 case MLX5_MODULE_ID_QSFP_PLUS:
1396 case MLX5_MODULE_ID_QSFP28:
1397 /* data[1] = revision id */
1398 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1399 modinfo->type = ETH_MODULE_SFF_8636;
1400 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1402 modinfo->type = ETH_MODULE_SFF_8436;
1403 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1406 case MLX5_MODULE_ID_SFP:
1407 modinfo->type = ETH_MODULE_SFF_8472;
1408 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1411 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1419 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1420 struct ethtool_eeprom *ee,
1423 struct mlx5e_priv *priv = netdev_priv(netdev);
1424 struct mlx5_core_dev *mdev = priv->mdev;
1425 int offset = ee->offset;
1432 memset(data, 0, ee->len);
1434 while (i < ee->len) {
1435 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1442 if (size_read < 0) {
1443 netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1444 __func__, size_read);
1449 offset += size_read;
1455 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1457 static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1460 struct mlx5e_priv *priv = netdev_priv(netdev);
1461 struct mlx5_core_dev *mdev = priv->mdev;
1462 struct mlx5e_channels new_channels = {};
1464 u8 cq_period_mode, current_cq_period_mode;
1467 cq_period_mode = enable ?
1468 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1469 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1470 current_cq_period_mode = is_rx_cq ?
1471 priv->channels.params.rx_cq_moderation.cq_period_mode :
1472 priv->channels.params.tx_cq_moderation.cq_period_mode;
1473 mode_changed = cq_period_mode != current_cq_period_mode;
1475 if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1476 !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1482 new_channels.params = priv->channels.params;
1484 mlx5e_set_rx_cq_mode_params(&new_channels.params, cq_period_mode);
1486 mlx5e_set_tx_cq_mode_params(&new_channels.params, cq_period_mode);
1488 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1489 priv->channels.params = new_channels.params;
1493 err = mlx5e_open_channels(priv, &new_channels);
1497 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1501 static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
1503 return set_pflag_cqe_based_moder(netdev, enable, false);
1506 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1508 return set_pflag_cqe_based_moder(netdev, enable, true);
1511 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
1513 bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1514 struct mlx5e_channels new_channels = {};
1517 if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1518 return new_val ? -EOPNOTSUPP : 0;
1520 if (curr_val == new_val)
1523 new_channels.params = priv->channels.params;
1524 MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1526 mlx5e_set_rq_type_params(priv->mdev, &new_channels.params,
1527 new_channels.params.rq_wq_type);
1529 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1530 priv->channels.params = new_channels.params;
1534 err = mlx5e_open_channels(priv, &new_channels);
1538 mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1542 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1545 struct mlx5e_priv *priv = netdev_priv(netdev);
1546 struct mlx5_core_dev *mdev = priv->mdev;
1548 if (!MLX5_CAP_GEN(mdev, cqe_compression))
1551 if (enable && priv->tstamp.rx_filter != HWTSTAMP_FILTER_NONE) {
1552 netdev_err(netdev, "Can't enable cqe compression while timestamping is enabled.\n");
1556 mlx5e_modify_rx_cqe_compression_locked(priv, enable);
1557 priv->channels.params.rx_cqe_compress_def = enable;
1562 static int mlx5e_handle_pflag(struct net_device *netdev,
1564 enum mlx5e_priv_flag flag,
1565 mlx5e_pflag_handler pflag_handler)
1567 struct mlx5e_priv *priv = netdev_priv(netdev);
1568 bool enable = !!(wanted_flags & flag);
1569 u32 changes = wanted_flags ^ priv->channels.params.pflags;
1572 if (!(changes & flag))
1575 err = pflag_handler(netdev, enable);
1577 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1578 enable ? "Enable" : "Disable", flag, err);
1582 MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
1586 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1588 struct mlx5e_priv *priv = netdev_priv(netdev);
1591 mutex_lock(&priv->state_lock);
1592 err = mlx5e_handle_pflag(netdev, pflags,
1593 MLX5E_PFLAG_RX_CQE_BASED_MODER,
1594 set_pflag_rx_cqe_based_moder);
1598 err = mlx5e_handle_pflag(netdev, pflags,
1599 MLX5E_PFLAG_TX_CQE_BASED_MODER,
1600 set_pflag_tx_cqe_based_moder);
1604 err = mlx5e_handle_pflag(netdev, pflags,
1605 MLX5E_PFLAG_RX_CQE_COMPRESS,
1606 set_pflag_rx_cqe_compress);
1609 mutex_unlock(&priv->state_lock);
1613 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1615 struct mlx5e_priv *priv = netdev_priv(netdev);
1617 return priv->channels.params.pflags;
1620 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1623 struct mlx5e_priv *priv = netdev_priv(dev);
1626 case ETHTOOL_SRXCLSRLINS:
1627 err = mlx5e_ethtool_flow_replace(priv, &cmd->fs);
1629 case ETHTOOL_SRXCLSRLDEL:
1630 err = mlx5e_ethtool_flow_remove(priv, cmd->fs.location);
1640 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1641 struct ethtool_flash *flash)
1643 struct mlx5_core_dev *mdev = priv->mdev;
1644 struct net_device *dev = priv->netdev;
1645 const struct firmware *fw;
1648 if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1651 err = request_firmware_direct(&fw, flash->data, &dev->dev);
1658 err = mlx5_firmware_flash(mdev, fw);
1659 release_firmware(fw);
1666 static int mlx5e_flash_device(struct net_device *dev,
1667 struct ethtool_flash *flash)
1669 struct mlx5e_priv *priv = netdev_priv(dev);
1671 return mlx5e_ethtool_flash_device(priv, flash);
1674 const struct ethtool_ops mlx5e_ethtool_ops = {
1675 .get_drvinfo = mlx5e_get_drvinfo,
1676 .get_link = ethtool_op_get_link,
1677 .get_strings = mlx5e_get_strings,
1678 .get_sset_count = mlx5e_get_sset_count,
1679 .get_ethtool_stats = mlx5e_get_ethtool_stats,
1680 .get_ringparam = mlx5e_get_ringparam,
1681 .set_ringparam = mlx5e_set_ringparam,
1682 .get_channels = mlx5e_get_channels,
1683 .set_channels = mlx5e_set_channels,
1684 .get_coalesce = mlx5e_get_coalesce,
1685 .set_coalesce = mlx5e_set_coalesce,
1686 .get_link_ksettings = mlx5e_get_link_ksettings,
1687 .set_link_ksettings = mlx5e_set_link_ksettings,
1688 .get_rxfh_key_size = mlx5e_get_rxfh_key_size,
1689 .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1690 .get_rxfh = mlx5e_get_rxfh,
1691 .set_rxfh = mlx5e_set_rxfh,
1692 .get_rxnfc = mlx5e_get_rxnfc,
1693 .set_rxnfc = mlx5e_set_rxnfc,
1694 .flash_device = mlx5e_flash_device,
1695 .get_tunable = mlx5e_get_tunable,
1696 .set_tunable = mlx5e_set_tunable,
1697 .get_pauseparam = mlx5e_get_pauseparam,
1698 .set_pauseparam = mlx5e_set_pauseparam,
1699 .get_ts_info = mlx5e_get_ts_info,
1700 .set_phys_id = mlx5e_set_phys_id,
1701 .get_wol = mlx5e_get_wol,
1702 .set_wol = mlx5e_set_wol,
1703 .get_module_info = mlx5e_get_module_info,
1704 .get_module_eeprom = mlx5e_get_module_eeprom,
1705 .get_priv_flags = mlx5e_get_priv_flags,
1706 .set_priv_flags = mlx5e_set_priv_flags,
1707 .self_test = mlx5e_self_test,
1708 .get_msglevel = mlx5e_get_msglevel,
1709 .set_msglevel = mlx5e_set_msglevel,