1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2019 Mellanox Technologies */
11 #include "sf/dev/dev.h"
14 static int mlx5_devlink_flash_update(struct devlink *devlink,
15 struct devlink_flash_update_params *params,
16 struct netlink_ext_ack *extack)
18 struct mlx5_core_dev *dev = devlink_priv(devlink);
20 return mlx5_firmware_flash(dev, params->fw, extack);
23 static u8 mlx5_fw_ver_major(u32 version)
25 return (version >> 24) & 0xff;
28 static u8 mlx5_fw_ver_minor(u32 version)
30 return (version >> 16) & 0xff;
33 static u16 mlx5_fw_ver_subminor(u32 version)
35 return version & 0xffff;
38 #define DEVLINK_FW_STRING_LEN 32
41 mlx5_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,
42 struct netlink_ext_ack *extack)
44 struct mlx5_core_dev *dev = devlink_priv(devlink);
45 char version_str[DEVLINK_FW_STRING_LEN];
46 u32 running_fw, stored_fw;
49 err = devlink_info_version_fixed_put(req, "fw.psid", dev->board_id);
53 err = mlx5_fw_version_query(dev, &running_fw, &stored_fw);
57 snprintf(version_str, sizeof(version_str), "%d.%d.%04d",
58 mlx5_fw_ver_major(running_fw), mlx5_fw_ver_minor(running_fw),
59 mlx5_fw_ver_subminor(running_fw));
60 err = devlink_info_version_running_put(req, "fw.version", version_str);
63 err = devlink_info_version_running_put(req,
64 DEVLINK_INFO_VERSION_GENERIC_FW,
69 /* no pending version, return running (stored) version */
71 stored_fw = running_fw;
73 snprintf(version_str, sizeof(version_str), "%d.%d.%04d",
74 mlx5_fw_ver_major(stored_fw), mlx5_fw_ver_minor(stored_fw),
75 mlx5_fw_ver_subminor(stored_fw));
76 err = devlink_info_version_stored_put(req, "fw.version", version_str);
79 return devlink_info_version_stored_put(req,
80 DEVLINK_INFO_VERSION_GENERIC_FW,
84 static int mlx5_devlink_reload_fw_activate(struct devlink *devlink, struct netlink_ext_ack *extack)
86 struct mlx5_core_dev *dev = devlink_priv(devlink);
87 u8 reset_level, reset_type, net_port_alive;
90 err = mlx5_fw_reset_query(dev, &reset_level, &reset_type);
93 if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL3)) {
94 NL_SET_ERR_MSG_MOD(extack, "FW activate requires reboot");
98 net_port_alive = !!(reset_type & MLX5_MFRL_REG_RESET_TYPE_NET_PORT_ALIVE);
99 err = mlx5_fw_reset_set_reset_sync(dev, net_port_alive, extack);
103 err = mlx5_fw_reset_wait_reset_done(dev);
107 mlx5_unload_one_devl_locked(dev, true);
108 err = mlx5_health_wait_pci_up(dev);
110 NL_SET_ERR_MSG_MOD(extack, "FW activate aborted, PCI reads fail after reset");
115 static int mlx5_devlink_trigger_fw_live_patch(struct devlink *devlink,
116 struct netlink_ext_ack *extack)
118 struct mlx5_core_dev *dev = devlink_priv(devlink);
122 err = mlx5_fw_reset_query(dev, &reset_level, NULL);
125 if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL0)) {
126 NL_SET_ERR_MSG_MOD(extack,
127 "FW upgrade to the stored FW can't be done by FW live patching");
131 return mlx5_fw_reset_set_live_patch(dev);
134 static int mlx5_devlink_reload_down(struct devlink *devlink, bool netns_change,
135 enum devlink_reload_action action,
136 enum devlink_reload_limit limit,
137 struct netlink_ext_ack *extack)
139 struct mlx5_core_dev *dev = devlink_priv(devlink);
140 struct pci_dev *pdev = dev->pdev;
143 if (mlx5_dev_is_lightweight(dev)) {
144 if (action != DEVLINK_RELOAD_ACTION_DRIVER_REINIT)
146 mlx5_unload_one_light(dev);
150 if (mlx5_lag_is_active(dev)) {
151 NL_SET_ERR_MSG_MOD(extack, "reload is unsupported in Lag mode");
155 if (mlx5_core_is_mp_slave(dev)) {
156 NL_SET_ERR_MSG_MOD(extack, "reload is unsupported for multi port slave");
160 if (action == DEVLINK_RELOAD_ACTION_FW_ACTIVATE &&
161 !dev->priv.fw_reset) {
162 NL_SET_ERR_MSG_MOD(extack, "FW activate is unsupported for this function");
166 if (mlx5_core_is_pf(dev) && pci_num_vf(pdev))
167 NL_SET_ERR_MSG_MOD(extack, "reload while VFs are present is unfavorable");
170 case DEVLINK_RELOAD_ACTION_DRIVER_REINIT:
171 mlx5_unload_one_devl_locked(dev, false);
173 case DEVLINK_RELOAD_ACTION_FW_ACTIVATE:
174 if (limit == DEVLINK_RELOAD_LIMIT_NO_RESET)
175 ret = mlx5_devlink_trigger_fw_live_patch(devlink, extack);
177 ret = mlx5_devlink_reload_fw_activate(devlink, extack);
180 /* Unsupported action should not get to this function */
188 static int mlx5_devlink_reload_up(struct devlink *devlink, enum devlink_reload_action action,
189 enum devlink_reload_limit limit, u32 *actions_performed,
190 struct netlink_ext_ack *extack)
192 struct mlx5_core_dev *dev = devlink_priv(devlink);
195 *actions_performed = BIT(action);
197 case DEVLINK_RELOAD_ACTION_DRIVER_REINIT:
198 if (mlx5_dev_is_lightweight(dev)) {
199 mlx5_fw_reporters_create(dev);
200 return mlx5_init_one_devl_locked(dev);
202 ret = mlx5_load_one_devl_locked(dev, false);
204 case DEVLINK_RELOAD_ACTION_FW_ACTIVATE:
205 if (limit == DEVLINK_RELOAD_LIMIT_NO_RESET)
207 /* On fw_activate action, also driver is reloaded and reinit performed */
208 *actions_performed |= BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT);
209 ret = mlx5_load_one_devl_locked(dev, true);
212 ret = mlx5_fw_reset_verify_fw_complete(dev, extack);
215 /* Unsupported action should not get to this function */
223 static struct mlx5_devlink_trap *mlx5_find_trap_by_id(struct mlx5_core_dev *dev, int trap_id)
225 struct mlx5_devlink_trap *dl_trap;
227 list_for_each_entry(dl_trap, &dev->priv.traps, list)
228 if (dl_trap->trap.id == trap_id)
234 static int mlx5_devlink_trap_init(struct devlink *devlink, const struct devlink_trap *trap,
237 struct mlx5_core_dev *dev = devlink_priv(devlink);
238 struct mlx5_devlink_trap *dl_trap;
240 dl_trap = kzalloc(sizeof(*dl_trap), GFP_KERNEL);
244 dl_trap->trap.id = trap->id;
245 dl_trap->trap.action = DEVLINK_TRAP_ACTION_DROP;
246 dl_trap->item = trap_ctx;
248 if (mlx5_find_trap_by_id(dev, trap->id)) {
250 mlx5_core_err(dev, "Devlink trap: Trap 0x%x already found", trap->id);
254 list_add_tail(&dl_trap->list, &dev->priv.traps);
258 static void mlx5_devlink_trap_fini(struct devlink *devlink, const struct devlink_trap *trap,
261 struct mlx5_core_dev *dev = devlink_priv(devlink);
262 struct mlx5_devlink_trap *dl_trap;
264 dl_trap = mlx5_find_trap_by_id(dev, trap->id);
266 mlx5_core_err(dev, "Devlink trap: Missing trap id 0x%x", trap->id);
269 list_del(&dl_trap->list);
273 static int mlx5_devlink_trap_action_set(struct devlink *devlink,
274 const struct devlink_trap *trap,
275 enum devlink_trap_action action,
276 struct netlink_ext_ack *extack)
278 struct mlx5_core_dev *dev = devlink_priv(devlink);
279 struct mlx5_devlink_trap_event_ctx trap_event_ctx;
280 enum devlink_trap_action action_orig;
281 struct mlx5_devlink_trap *dl_trap;
284 if (is_mdev_switchdev_mode(dev)) {
285 NL_SET_ERR_MSG_MOD(extack, "Devlink traps can't be set in switchdev mode");
289 dl_trap = mlx5_find_trap_by_id(dev, trap->id);
291 mlx5_core_err(dev, "Devlink trap: Set action on invalid trap id 0x%x", trap->id);
295 if (action != DEVLINK_TRAP_ACTION_DROP && action != DEVLINK_TRAP_ACTION_TRAP)
298 if (action == dl_trap->trap.action)
301 action_orig = dl_trap->trap.action;
302 dl_trap->trap.action = action;
303 trap_event_ctx.trap = &dl_trap->trap;
304 trap_event_ctx.err = 0;
305 err = mlx5_blocking_notifier_call_chain(dev, MLX5_DRIVER_EVENT_TYPE_TRAP,
307 if (err == NOTIFY_BAD)
308 dl_trap->trap.action = action_orig;
310 return trap_event_ctx.err;
313 static const struct devlink_ops mlx5_devlink_ops = {
314 #ifdef CONFIG_MLX5_ESWITCH
315 .eswitch_mode_set = mlx5_devlink_eswitch_mode_set,
316 .eswitch_mode_get = mlx5_devlink_eswitch_mode_get,
317 .eswitch_inline_mode_set = mlx5_devlink_eswitch_inline_mode_set,
318 .eswitch_inline_mode_get = mlx5_devlink_eswitch_inline_mode_get,
319 .eswitch_encap_mode_set = mlx5_devlink_eswitch_encap_mode_set,
320 .eswitch_encap_mode_get = mlx5_devlink_eswitch_encap_mode_get,
321 .rate_leaf_tx_share_set = mlx5_esw_devlink_rate_leaf_tx_share_set,
322 .rate_leaf_tx_max_set = mlx5_esw_devlink_rate_leaf_tx_max_set,
323 .rate_node_tx_share_set = mlx5_esw_devlink_rate_node_tx_share_set,
324 .rate_node_tx_max_set = mlx5_esw_devlink_rate_node_tx_max_set,
325 .rate_node_new = mlx5_esw_devlink_rate_node_new,
326 .rate_node_del = mlx5_esw_devlink_rate_node_del,
327 .rate_leaf_parent_set = mlx5_esw_devlink_rate_parent_set,
329 #ifdef CONFIG_MLX5_SF_MANAGER
330 .port_new = mlx5_devlink_sf_port_new,
332 .flash_update = mlx5_devlink_flash_update,
333 .info_get = mlx5_devlink_info_get,
334 .reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
335 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE),
336 .reload_limits = BIT(DEVLINK_RELOAD_LIMIT_NO_RESET),
337 .reload_down = mlx5_devlink_reload_down,
338 .reload_up = mlx5_devlink_reload_up,
339 .trap_init = mlx5_devlink_trap_init,
340 .trap_fini = mlx5_devlink_trap_fini,
341 .trap_action_set = mlx5_devlink_trap_action_set,
344 void mlx5_devlink_trap_report(struct mlx5_core_dev *dev, int trap_id, struct sk_buff *skb,
345 struct devlink_port *dl_port)
347 struct devlink *devlink = priv_to_devlink(dev);
348 struct mlx5_devlink_trap *dl_trap;
350 dl_trap = mlx5_find_trap_by_id(dev, trap_id);
352 mlx5_core_err(dev, "Devlink trap: Report on invalid trap id 0x%x", trap_id);
356 if (dl_trap->trap.action != DEVLINK_TRAP_ACTION_TRAP) {
357 mlx5_core_dbg(dev, "Devlink trap: Trap id %d has action %d", trap_id,
358 dl_trap->trap.action);
361 devlink_trap_report(devlink, skb, dl_trap->item, dl_port, NULL);
364 int mlx5_devlink_trap_get_num_active(struct mlx5_core_dev *dev)
366 struct mlx5_devlink_trap *dl_trap;
369 list_for_each_entry(dl_trap, &dev->priv.traps, list)
370 if (dl_trap->trap.action == DEVLINK_TRAP_ACTION_TRAP)
376 int mlx5_devlink_traps_get_action(struct mlx5_core_dev *dev, int trap_id,
377 enum devlink_trap_action *action)
379 struct mlx5_devlink_trap *dl_trap;
381 dl_trap = mlx5_find_trap_by_id(dev, trap_id);
383 mlx5_core_err(dev, "Devlink trap: Get action on invalid trap id 0x%x",
388 *action = dl_trap->trap.action;
392 struct devlink *mlx5_devlink_alloc(struct device *dev)
394 return devlink_alloc(&mlx5_devlink_ops, sizeof(struct mlx5_core_dev),
398 void mlx5_devlink_free(struct devlink *devlink)
400 devlink_free(devlink);
403 static int mlx5_devlink_enable_roce_validate(struct devlink *devlink, u32 id,
404 union devlink_param_value val,
405 struct netlink_ext_ack *extack)
407 struct mlx5_core_dev *dev = devlink_priv(devlink);
408 bool new_state = val.vbool;
410 if (new_state && !MLX5_CAP_GEN(dev, roce) &&
411 !(MLX5_CAP_GEN(dev, roce_rw_supported) && MLX5_CAP_GEN_MAX(dev, roce))) {
412 NL_SET_ERR_MSG_MOD(extack, "Device doesn't support RoCE");
415 if (mlx5_core_is_mp_slave(dev) || mlx5_lag_is_active(dev)) {
416 NL_SET_ERR_MSG_MOD(extack, "Multi port slave/Lag device can't configure RoCE");
423 #ifdef CONFIG_MLX5_ESWITCH
424 static int mlx5_devlink_large_group_num_validate(struct devlink *devlink, u32 id,
425 union devlink_param_value val,
426 struct netlink_ext_ack *extack)
428 int group_num = val.vu32;
430 if (group_num < 1 || group_num > 1024) {
431 NL_SET_ERR_MSG_MOD(extack,
432 "Unsupported group number, supported range is 1-1024");
440 static int mlx5_devlink_eq_depth_validate(struct devlink *devlink, u32 id,
441 union devlink_param_value val,
442 struct netlink_ext_ack *extack)
444 return (val.vu32 >= 64 && val.vu32 <= 4096) ? 0 : -EINVAL;
448 mlx5_devlink_hairpin_num_queues_validate(struct devlink *devlink, u32 id,
449 union devlink_param_value val,
450 struct netlink_ext_ack *extack)
452 return val.vu32 ? 0 : -EINVAL;
456 mlx5_devlink_hairpin_queue_size_validate(struct devlink *devlink, u32 id,
457 union devlink_param_value val,
458 struct netlink_ext_ack *extack)
460 struct mlx5_core_dev *dev = devlink_priv(devlink);
461 u32 val32 = val.vu32;
463 if (!is_power_of_2(val32)) {
464 NL_SET_ERR_MSG_MOD(extack, "Value is not power of two");
468 if (val32 > BIT(MLX5_CAP_GEN(dev, log_max_hairpin_num_packets))) {
469 NL_SET_ERR_MSG_FMT_MOD(
470 extack, "Maximum hairpin queue size is %lu",
471 BIT(MLX5_CAP_GEN(dev, log_max_hairpin_num_packets)));
478 static void mlx5_devlink_hairpin_params_init_values(struct devlink *devlink)
480 struct mlx5_core_dev *dev = devlink_priv(devlink);
481 union devlink_param_value value;
485 /* set hairpin pair per each 50Gbs share of the link */
486 mlx5_port_max_linkspeed(dev, &link_speed);
487 link_speed = max_t(u32, link_speed, 50000);
488 link_speed64 = link_speed;
489 do_div(link_speed64, 50000);
491 value.vu32 = link_speed64;
492 devl_param_driverinit_value_set(
493 devlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_NUM_QUEUES, value);
496 BIT(min_t(u32, 16 - MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(dev),
497 MLX5_CAP_GEN(dev, log_max_hairpin_num_packets)));
498 devl_param_driverinit_value_set(
499 devlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_QUEUE_SIZE, value);
502 static const struct devlink_param mlx5_devlink_params[] = {
503 DEVLINK_PARAM_GENERIC(ENABLE_ROCE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
504 NULL, NULL, mlx5_devlink_enable_roce_validate),
505 #ifdef CONFIG_MLX5_ESWITCH
506 DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_ESW_LARGE_GROUP_NUM,
507 "fdb_large_groups", DEVLINK_PARAM_TYPE_U32,
508 BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
510 mlx5_devlink_large_group_num_validate),
512 DEVLINK_PARAM_GENERIC(IO_EQ_SIZE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
513 NULL, NULL, mlx5_devlink_eq_depth_validate),
514 DEVLINK_PARAM_GENERIC(EVENT_EQ_SIZE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
515 NULL, NULL, mlx5_devlink_eq_depth_validate),
518 static void mlx5_devlink_set_params_init_values(struct devlink *devlink)
520 struct mlx5_core_dev *dev = devlink_priv(devlink);
521 union devlink_param_value value;
523 value.vbool = MLX5_CAP_GEN(dev, roce) && !mlx5_dev_is_lightweight(dev);
524 devl_param_driverinit_value_set(devlink,
525 DEVLINK_PARAM_GENERIC_ID_ENABLE_ROCE,
528 #ifdef CONFIG_MLX5_ESWITCH
529 value.vu32 = ESW_OFFLOADS_DEFAULT_NUM_GROUPS;
530 devl_param_driverinit_value_set(devlink,
531 MLX5_DEVLINK_PARAM_ID_ESW_LARGE_GROUP_NUM,
535 value.vu32 = MLX5_COMP_EQ_SIZE;
536 devl_param_driverinit_value_set(devlink,
537 DEVLINK_PARAM_GENERIC_ID_IO_EQ_SIZE,
540 value.vu32 = MLX5_NUM_ASYNC_EQE;
541 devl_param_driverinit_value_set(devlink,
542 DEVLINK_PARAM_GENERIC_ID_EVENT_EQ_SIZE,
546 static const struct devlink_param mlx5_devlink_eth_params[] = {
547 DEVLINK_PARAM_GENERIC(ENABLE_ETH, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
549 DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_HAIRPIN_NUM_QUEUES,
550 "hairpin_num_queues", DEVLINK_PARAM_TYPE_U32,
551 BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,
552 mlx5_devlink_hairpin_num_queues_validate),
553 DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_HAIRPIN_QUEUE_SIZE,
554 "hairpin_queue_size", DEVLINK_PARAM_TYPE_U32,
555 BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,
556 mlx5_devlink_hairpin_queue_size_validate),
559 static int mlx5_devlink_eth_params_register(struct devlink *devlink)
561 struct mlx5_core_dev *dev = devlink_priv(devlink);
562 union devlink_param_value value;
565 if (!mlx5_eth_supported(dev))
568 err = devl_params_register(devlink, mlx5_devlink_eth_params,
569 ARRAY_SIZE(mlx5_devlink_eth_params));
573 value.vbool = !mlx5_dev_is_lightweight(dev);
574 devl_param_driverinit_value_set(devlink,
575 DEVLINK_PARAM_GENERIC_ID_ENABLE_ETH,
578 mlx5_devlink_hairpin_params_init_values(devlink);
583 static void mlx5_devlink_eth_params_unregister(struct devlink *devlink)
585 struct mlx5_core_dev *dev = devlink_priv(devlink);
587 if (!mlx5_eth_supported(dev))
590 devl_params_unregister(devlink, mlx5_devlink_eth_params,
591 ARRAY_SIZE(mlx5_devlink_eth_params));
594 static int mlx5_devlink_enable_rdma_validate(struct devlink *devlink, u32 id,
595 union devlink_param_value val,
596 struct netlink_ext_ack *extack)
598 struct mlx5_core_dev *dev = devlink_priv(devlink);
599 bool new_state = val.vbool;
601 if (new_state && !mlx5_rdma_supported(dev))
606 static const struct devlink_param mlx5_devlink_rdma_params[] = {
607 DEVLINK_PARAM_GENERIC(ENABLE_RDMA, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
608 NULL, NULL, mlx5_devlink_enable_rdma_validate),
611 static int mlx5_devlink_rdma_params_register(struct devlink *devlink)
613 struct mlx5_core_dev *dev = devlink_priv(devlink);
614 union devlink_param_value value;
617 if (!IS_ENABLED(CONFIG_MLX5_INFINIBAND))
620 err = devl_params_register(devlink, mlx5_devlink_rdma_params,
621 ARRAY_SIZE(mlx5_devlink_rdma_params));
625 value.vbool = !mlx5_dev_is_lightweight(dev);
626 devl_param_driverinit_value_set(devlink,
627 DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA,
632 static void mlx5_devlink_rdma_params_unregister(struct devlink *devlink)
634 if (!IS_ENABLED(CONFIG_MLX5_INFINIBAND))
637 devl_params_unregister(devlink, mlx5_devlink_rdma_params,
638 ARRAY_SIZE(mlx5_devlink_rdma_params));
641 static const struct devlink_param mlx5_devlink_vnet_params[] = {
642 DEVLINK_PARAM_GENERIC(ENABLE_VNET, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
646 static int mlx5_devlink_vnet_params_register(struct devlink *devlink)
648 struct mlx5_core_dev *dev = devlink_priv(devlink);
649 union devlink_param_value value;
652 if (!mlx5_vnet_supported(dev))
655 err = devl_params_register(devlink, mlx5_devlink_vnet_params,
656 ARRAY_SIZE(mlx5_devlink_vnet_params));
660 value.vbool = !mlx5_dev_is_lightweight(dev);
661 devl_param_driverinit_value_set(devlink,
662 DEVLINK_PARAM_GENERIC_ID_ENABLE_VNET,
667 static void mlx5_devlink_vnet_params_unregister(struct devlink *devlink)
669 struct mlx5_core_dev *dev = devlink_priv(devlink);
671 if (!mlx5_vnet_supported(dev))
674 devl_params_unregister(devlink, mlx5_devlink_vnet_params,
675 ARRAY_SIZE(mlx5_devlink_vnet_params));
678 static int mlx5_devlink_auxdev_params_register(struct devlink *devlink)
682 err = mlx5_devlink_eth_params_register(devlink);
686 err = mlx5_devlink_rdma_params_register(devlink);
690 err = mlx5_devlink_vnet_params_register(devlink);
696 mlx5_devlink_rdma_params_unregister(devlink);
698 mlx5_devlink_eth_params_unregister(devlink);
702 static void mlx5_devlink_auxdev_params_unregister(struct devlink *devlink)
704 mlx5_devlink_vnet_params_unregister(devlink);
705 mlx5_devlink_rdma_params_unregister(devlink);
706 mlx5_devlink_eth_params_unregister(devlink);
709 static int mlx5_devlink_max_uc_list_validate(struct devlink *devlink, u32 id,
710 union devlink_param_value val,
711 struct netlink_ext_ack *extack)
713 struct mlx5_core_dev *dev = devlink_priv(devlink);
716 NL_SET_ERR_MSG_MOD(extack, "max_macs value must be greater than 0");
720 if (!is_power_of_2(val.vu32)) {
721 NL_SET_ERR_MSG_MOD(extack, "Only power of 2 values are supported for max_macs");
725 if (ilog2(val.vu32) >
726 MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list)) {
727 NL_SET_ERR_MSG_MOD(extack, "max_macs value is out of the supported range");
734 static const struct devlink_param mlx5_devlink_max_uc_list_params[] = {
735 DEVLINK_PARAM_GENERIC(MAX_MACS, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
736 NULL, NULL, mlx5_devlink_max_uc_list_validate),
739 static int mlx5_devlink_max_uc_list_params_register(struct devlink *devlink)
741 struct mlx5_core_dev *dev = devlink_priv(devlink);
742 union devlink_param_value value;
745 if (!MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list_wr_supported))
748 err = devl_params_register(devlink, mlx5_devlink_max_uc_list_params,
749 ARRAY_SIZE(mlx5_devlink_max_uc_list_params));
753 value.vu32 = 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list);
754 devl_param_driverinit_value_set(devlink,
755 DEVLINK_PARAM_GENERIC_ID_MAX_MACS,
761 mlx5_devlink_max_uc_list_params_unregister(struct devlink *devlink)
763 struct mlx5_core_dev *dev = devlink_priv(devlink);
765 if (!MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list_wr_supported))
768 devl_params_unregister(devlink, mlx5_devlink_max_uc_list_params,
769 ARRAY_SIZE(mlx5_devlink_max_uc_list_params));
772 #define MLX5_TRAP_DROP(_id, _group_id) \
773 DEVLINK_TRAP_GENERIC(DROP, DROP, _id, \
774 DEVLINK_TRAP_GROUP_GENERIC_ID_##_group_id, \
775 DEVLINK_TRAP_METADATA_TYPE_F_IN_PORT)
777 static const struct devlink_trap mlx5_traps_arr[] = {
778 MLX5_TRAP_DROP(INGRESS_VLAN_FILTER, L2_DROPS),
779 MLX5_TRAP_DROP(DMAC_FILTER, L2_DROPS),
782 static const struct devlink_trap_group mlx5_trap_groups_arr[] = {
783 DEVLINK_TRAP_GROUP_GENERIC(L2_DROPS, 0),
786 int mlx5_devlink_traps_register(struct devlink *devlink)
788 struct mlx5_core_dev *core_dev = devlink_priv(devlink);
791 err = devl_trap_groups_register(devlink, mlx5_trap_groups_arr,
792 ARRAY_SIZE(mlx5_trap_groups_arr));
796 err = devl_traps_register(devlink, mlx5_traps_arr, ARRAY_SIZE(mlx5_traps_arr),
803 devl_trap_groups_unregister(devlink, mlx5_trap_groups_arr,
804 ARRAY_SIZE(mlx5_trap_groups_arr));
808 void mlx5_devlink_traps_unregister(struct devlink *devlink)
810 devl_traps_unregister(devlink, mlx5_traps_arr, ARRAY_SIZE(mlx5_traps_arr));
811 devl_trap_groups_unregister(devlink, mlx5_trap_groups_arr,
812 ARRAY_SIZE(mlx5_trap_groups_arr));
815 int mlx5_devlink_params_register(struct devlink *devlink)
819 /* Here only the driver init params should be registered.
820 * Runtime params should be registered by the code which
821 * behaviour they configure.
824 err = devl_params_register(devlink, mlx5_devlink_params,
825 ARRAY_SIZE(mlx5_devlink_params));
829 mlx5_devlink_set_params_init_values(devlink);
831 err = mlx5_devlink_auxdev_params_register(devlink);
835 err = mlx5_devlink_max_uc_list_params_register(devlink);
837 goto max_uc_list_err;
842 mlx5_devlink_auxdev_params_unregister(devlink);
844 devl_params_unregister(devlink, mlx5_devlink_params,
845 ARRAY_SIZE(mlx5_devlink_params));
849 void mlx5_devlink_params_unregister(struct devlink *devlink)
851 mlx5_devlink_max_uc_list_params_unregister(devlink);
852 mlx5_devlink_auxdev_params_unregister(devlink);
853 devl_params_unregister(devlink, mlx5_devlink_params,
854 ARRAY_SIZE(mlx5_devlink_params));