2 * Copyright (c) 2012 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/mlx4/device.h>
38 int mlx4_en_timestamp_config(struct net_device *dev, int tx_type, int rx_filter)
40 struct mlx4_en_priv *priv = netdev_priv(dev);
41 struct mlx4_en_dev *mdev = priv->mdev;
45 if (priv->hwtstamp_config.tx_type == tx_type &&
46 priv->hwtstamp_config.rx_filter == rx_filter)
49 mutex_lock(&mdev->state_lock);
52 mlx4_en_stop_port(dev, 1);
55 mlx4_en_free_resources(priv);
57 en_warn(priv, "Changing Time Stamp configuration\n");
59 priv->hwtstamp_config.tx_type = tx_type;
60 priv->hwtstamp_config.rx_filter = rx_filter;
62 if (rx_filter != HWTSTAMP_FILTER_NONE)
63 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
65 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
67 err = mlx4_en_alloc_resources(priv);
69 en_err(priv, "Failed reallocating port resources\n");
73 err = mlx4_en_start_port(dev);
75 en_err(priv, "Failed starting port\n");
79 mutex_unlock(&mdev->state_lock);
80 netdev_features_change(dev);
84 /* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)
86 static cycle_t mlx4_en_read_clock(const struct cyclecounter *tc)
88 struct mlx4_en_dev *mdev =
89 container_of(tc, struct mlx4_en_dev, cycles);
90 struct mlx4_dev *dev = mdev->dev;
92 return mlx4_read_clock(dev) & tc->mask;
95 u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe)
98 struct mlx4_ts_cqe *ts_cqe = (struct mlx4_ts_cqe *)cqe;
100 lo = (u64)be16_to_cpu(ts_cqe->timestamp_lo);
101 hi = ((u64)be32_to_cpu(ts_cqe->timestamp_hi) + !lo) << 16;
106 void mlx4_en_fill_hwtstamps(struct mlx4_en_dev *mdev,
107 struct skb_shared_hwtstamps *hwts,
113 read_lock_irqsave(&mdev->clock_lock, flags);
114 nsec = timecounter_cyc2time(&mdev->clock, timestamp);
115 read_unlock_irqrestore(&mdev->clock_lock, flags);
117 memset(hwts, 0, sizeof(struct skb_shared_hwtstamps));
118 hwts->hwtstamp = ns_to_ktime(nsec);
122 * mlx4_en_remove_timestamp - disable PTP device
123 * @mdev: board private structure
125 * Stop the PTP support.
127 void mlx4_en_remove_timestamp(struct mlx4_en_dev *mdev)
129 if (mdev->ptp_clock) {
130 ptp_clock_unregister(mdev->ptp_clock);
131 mdev->ptp_clock = NULL;
132 mlx4_info(mdev, "removed PHC\n");
136 void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev)
138 bool timeout = time_is_before_jiffies(mdev->last_overflow_check +
139 mdev->overflow_period);
143 write_lock_irqsave(&mdev->clock_lock, flags);
144 timecounter_read(&mdev->clock);
145 write_unlock_irqrestore(&mdev->clock_lock, flags);
146 mdev->last_overflow_check = jiffies;
151 * mlx4_en_phc_adjfreq - adjust the frequency of the hardware clock
152 * @ptp: ptp clock structure
153 * @delta: Desired frequency change in parts per billion
155 * Adjust the frequency of the PHC cycle counter by the indicated delta from
156 * the base frequency.
158 static int mlx4_en_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
164 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
171 mult = mdev->nominal_c_mult;
174 diff = div_u64(adj, 1000000000ULL);
176 write_lock_irqsave(&mdev->clock_lock, flags);
177 timecounter_read(&mdev->clock);
178 mdev->cycles.mult = neg_adj ? mult - diff : mult + diff;
179 write_unlock_irqrestore(&mdev->clock_lock, flags);
185 * mlx4_en_phc_adjtime - Shift the time of the hardware clock
186 * @ptp: ptp clock structure
187 * @delta: Desired change in nanoseconds
189 * Adjust the timer by resetting the timecounter structure.
191 static int mlx4_en_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
193 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
198 write_lock_irqsave(&mdev->clock_lock, flags);
199 now = timecounter_read(&mdev->clock);
201 timecounter_init(&mdev->clock, &mdev->cycles, now);
202 write_unlock_irqrestore(&mdev->clock_lock, flags);
208 * mlx4_en_phc_gettime - Reads the current time from the hardware clock
209 * @ptp: ptp clock structure
210 * @ts: timespec structure to hold the current time value
212 * Read the timecounter and return the correct value in ns after converting
213 * it into a struct timespec.
215 static int mlx4_en_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
217 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
223 write_lock_irqsave(&mdev->clock_lock, flags);
224 ns = timecounter_read(&mdev->clock);
225 write_unlock_irqrestore(&mdev->clock_lock, flags);
227 ts->tv_sec = div_u64_rem(ns, NSEC_PER_SEC, &remainder);
228 ts->tv_nsec = remainder;
234 * mlx4_en_phc_settime - Set the current time on the hardware clock
235 * @ptp: ptp clock structure
236 * @ts: timespec containing the new time for the cycle counter
238 * Reset the timecounter to use a new base value instead of the kernel
241 static int mlx4_en_phc_settime(struct ptp_clock_info *ptp,
242 const struct timespec *ts)
244 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
246 u64 ns = timespec_to_ns(ts);
249 /* reset the timecounter */
250 write_lock_irqsave(&mdev->clock_lock, flags);
251 timecounter_init(&mdev->clock, &mdev->cycles, ns);
252 write_unlock_irqrestore(&mdev->clock_lock, flags);
258 * mlx4_en_phc_enable - enable or disable an ancillary feature
259 * @ptp: ptp clock structure
260 * @request: Desired resource to enable or disable
261 * @on: Caller passes one to enable or zero to disable
263 * Enable (or disable) ancillary features of the PHC subsystem.
264 * Currently, no ancillary features are supported.
266 static int mlx4_en_phc_enable(struct ptp_clock_info __always_unused *ptp,
267 struct ptp_clock_request __always_unused *request,
268 int __always_unused on)
273 static const struct ptp_clock_info mlx4_en_ptp_clock_info = {
274 .owner = THIS_MODULE,
275 .max_adj = 100000000,
281 .adjfreq = mlx4_en_phc_adjfreq,
282 .adjtime = mlx4_en_phc_adjtime,
283 .gettime = mlx4_en_phc_gettime,
284 .settime = mlx4_en_phc_settime,
285 .enable = mlx4_en_phc_enable,
288 void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev)
290 struct mlx4_dev *dev = mdev->dev;
294 rwlock_init(&mdev->clock_lock);
296 memset(&mdev->cycles, 0, sizeof(mdev->cycles));
297 mdev->cycles.read = mlx4_en_read_clock;
298 mdev->cycles.mask = CLOCKSOURCE_MASK(48);
299 /* Using shift to make calculation more accurate. Since current HW
300 * clock frequency is 427 MHz, and cycles are given using a 48 bits
301 * register, the biggest shift when calculating using u64, is 14
302 * (max_cycles * multiplier < 2^64)
304 mdev->cycles.shift = 14;
306 clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift);
307 mdev->nominal_c_mult = mdev->cycles.mult;
309 write_lock_irqsave(&mdev->clock_lock, flags);
310 timecounter_init(&mdev->clock, &mdev->cycles,
311 ktime_to_ns(ktime_get_real()));
312 write_unlock_irqrestore(&mdev->clock_lock, flags);
314 /* Calculate period in seconds to call the overflow watchdog - to make
315 * sure counter is checked at least once every wrap around.
317 ns = cyclecounter_cyc2ns(&mdev->cycles, mdev->cycles.mask);
318 do_div(ns, NSEC_PER_SEC / 2 / HZ);
319 mdev->overflow_period = ns;
321 /* Configure the PHC */
322 mdev->ptp_clock_info = mlx4_en_ptp_clock_info;
323 snprintf(mdev->ptp_clock_info.name, 16, "mlx4 ptp");
325 mdev->ptp_clock = ptp_clock_register(&mdev->ptp_clock_info,
327 if (IS_ERR(mdev->ptp_clock)) {
328 mdev->ptp_clock = NULL;
329 mlx4_err(mdev, "ptp_clock_register failed\n");
331 mlx4_info(mdev, "registered PHC clock\n");