Merge tag 'kvm-s390-master-5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / drivers / net / ethernet / chelsio / inline_crypto / ch_ktls / chcr_ktls.h
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (C) 2020 Chelsio Communications.  All rights reserved. */
3
4 #ifndef __CHCR_KTLS_H__
5 #define __CHCR_KTLS_H__
6
7 #include "cxgb4.h"
8 #include "t4_msg.h"
9 #include "t4_tcb.h"
10 #include "l2t.h"
11 #include "chcr_common.h"
12 #include "cxgb4_uld.h"
13 #include "clip_tbl.h"
14
15 #define CHCR_KTLS_DRV_MODULE_NAME "ch_ktls"
16 #define CHCR_KTLS_DRV_VERSION "1.0.0.0-ko"
17 #define CHCR_KTLS_DRV_DESC "Chelsio NIC TLS ULD Driver"
18
19 #define CHCR_TCB_STATE_CLOSED   0
20 #define CHCR_KTLS_KEY_CTX_LEN   16
21 #define CHCR_SET_TCB_FIELD_LEN  sizeof(struct cpl_set_tcb_field)
22 #define CHCR_PLAIN_TX_DATA_LEN  (sizeof(struct fw_ulptx_wr) +\
23                                  sizeof(struct ulp_txpkt) +\
24                                  sizeof(struct ulptx_idata) +\
25                                  sizeof(struct cpl_tx_data))
26
27 #define CHCR_KTLS_WR_SIZE       (CHCR_PLAIN_TX_DATA_LEN +\
28                                  sizeof(struct cpl_tx_sec_pdu))
29 #define FALLBACK                35
30
31 enum ch_ktls_open_state {
32         CH_KTLS_OPEN_SUCCESS = 0,
33         CH_KTLS_OPEN_PENDING = 1,
34         CH_KTLS_OPEN_FAILURE = 2,
35 };
36
37 struct chcr_ktls_info {
38         struct sock *sk;
39         spinlock_t lock; /* lock for pending_close */
40         struct ktls_key_ctx key_ctx;
41         struct adapter *adap;
42         struct l2t_entry *l2te;
43         struct net_device *netdev;
44         struct completion completion;
45         u64 iv;
46         u64 record_no;
47         int tid;
48         int atid;
49         int rx_qid;
50         u32 iv_size;
51         u32 prev_seq;
52         u32 prev_ack;
53         u32 salt_size;
54         u32 key_ctx_len;
55         u32 scmd0_seqno_numivs;
56         u32 scmd0_ivgen_hdrlen;
57         u32 tcp_start_seq_number;
58         u32 scmd0_short_seqno_numivs;
59         u32 scmd0_short_ivgen_hdrlen;
60         u16 prev_win;
61         u8 tx_chan;
62         u8 smt_idx;
63         u8 port_id;
64         u8 ip_family;
65         u8 first_qset;
66         enum ch_ktls_open_state open_state;
67         bool pending_close;
68 };
69
70 struct chcr_ktls_ofld_ctx_tx {
71         struct tls_offload_context_tx base;
72         struct chcr_ktls_info *chcr_info;
73 };
74
75 struct chcr_ktls_uld_ctx {
76         struct list_head entry;
77         struct cxgb4_lld_info lldi;
78 };
79
80 static inline struct chcr_ktls_ofld_ctx_tx *
81 chcr_get_ktls_tx_context(struct tls_context *tls_ctx)
82 {
83         BUILD_BUG_ON(sizeof(struct chcr_ktls_ofld_ctx_tx) >
84                      TLS_OFFLOAD_CONTEXT_SIZE_TX);
85         return container_of(tls_offload_ctx_tx(tls_ctx),
86                             struct chcr_ktls_ofld_ctx_tx,
87                             base);
88 }
89
90 static inline int chcr_get_first_rx_qid(struct adapter *adap)
91 {
92         /* u_ctx is saved in adap, fetch it */
93         struct chcr_ktls_uld_ctx *u_ctx = adap->uld[CXGB4_ULD_KTLS].handle;
94
95         if (!u_ctx)
96                 return -1;
97         return u_ctx->lldi.rxq_ids[0];
98 }
99
100 typedef int (*chcr_handler_func)(struct adapter *adap, unsigned char *input);
101 #endif /* __CHCR_KTLS_H__ */