2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
5 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
45 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
50 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/version.h>
56 #include <linux/types.h>
57 #include <linux/errno.h>
58 #include <linux/ioport.h>
59 #include <linux/pci.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/kernel.h>
62 #include <linux/netdevice.h>
63 #include <linux/etherdevice.h>
64 #include <linux/skbuff.h>
65 #include <linux/init.h>
66 #include <linux/delay.h>
68 #include <linux/highmem.h>
69 #include <linux/sockios.h>
71 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
72 #include <linux/if_vlan.h>
76 #include <linux/ethtool.h>
82 #include <asm/system.h>
85 #include <asm/byteorder.h>
86 #include <asm/uaccess.h>
89 #define DRV_NAME "acenic"
93 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
94 #define ACE_IS_TIGON_I(ap) 0
95 #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
97 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
98 #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
101 #ifndef PCI_VENDOR_ID_ALTEON
102 #define PCI_VENDOR_ID_ALTEON 0x12ae
104 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
105 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
106 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
108 #ifndef PCI_DEVICE_ID_3COM_3C985
109 #define PCI_DEVICE_ID_3COM_3C985 0x0001
111 #ifndef PCI_VENDOR_ID_NETGEAR
112 #define PCI_VENDOR_ID_NETGEAR 0x1385
113 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
115 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
116 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
121 * Farallon used the DEC vendor ID by mistake and they seem not
124 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
125 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
127 #ifndef PCI_DEVICE_ID_FARALLON_PN9100T
128 #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
130 #ifndef PCI_VENDOR_ID_SGI
131 #define PCI_VENDOR_ID_SGI 0x10a9
133 #ifndef PCI_DEVICE_ID_SGI_ACENIC
134 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
137 static struct pci_device_id acenic_pci_tbl[] = {
138 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
139 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
140 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
141 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
142 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
143 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
144 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
145 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
146 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
147 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
149 * Farallon used the DEC vendor ID on their cards incorrectly,
150 * then later Alteon's ID.
152 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
153 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
154 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
155 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
156 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
157 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
160 MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
162 #ifndef SET_NETDEV_DEV
163 #define SET_NETDEV_DEV(net, pdev) do{} while(0)
166 #define ace_sync_irq(irq) synchronize_irq(irq)
168 #ifndef offset_in_page
169 #define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
172 #define ACE_MAX_MOD_PARMS 8
173 #define BOARD_IDX_STATIC 0
174 #define BOARD_IDX_OVERFLOW -1
176 #if (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) && \
177 defined(NETIF_F_HW_VLAN_RX)
178 #define ACENIC_DO_VLAN 1
179 #define ACE_RCB_VLAN_FLAG RCB_FLG_VLAN_ASSIST
181 #define ACENIC_DO_VLAN 0
182 #define ACE_RCB_VLAN_FLAG 0
188 * These must be defined before the firmware is included.
190 #define MAX_TEXT_LEN 96*1024
191 #define MAX_RODATA_LEN 8*1024
192 #define MAX_DATA_LEN 2*1024
194 #include "acenic_firmware.h"
196 #ifndef tigon2FwReleaseLocal
197 #define tigon2FwReleaseLocal 0
201 * This driver currently supports Tigon I and Tigon II based cards
202 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
203 * GA620. The driver should also work on the SGI, DEC and Farallon
204 * versions of the card, however I have not been able to test that
207 * This card is really neat, it supports receive hardware checksumming
208 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
209 * firmware. Also the programming interface is quite neat, except for
210 * the parts dealing with the i2c eeprom on the card ;-)
212 * Using jumbo frames:
214 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
215 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
216 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
217 * interface number and <MTU> being the MTU value.
221 * When compiled as a loadable module, the driver allows for a number
222 * of module parameters to be specified. The driver supports the
223 * following module parameters:
225 * trace=<val> - Firmware trace level. This requires special traced
226 * firmware to replace the firmware supplied with
227 * the driver - for debugging purposes only.
229 * link=<val> - Link state. Normally you want to use the default link
230 * parameters set by the driver. This can be used to
231 * override these in case your switch doesn't negotiate
232 * the link properly. Valid values are:
233 * 0x0001 - Force half duplex link.
234 * 0x0002 - Do not negotiate line speed with the other end.
235 * 0x0010 - 10Mbit/sec link.
236 * 0x0020 - 100Mbit/sec link.
237 * 0x0040 - 1000Mbit/sec link.
238 * 0x0100 - Do not negotiate flow control.
239 * 0x0200 - Enable RX flow control Y
240 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
241 * Default value is 0x0270, ie. enable link+flow
242 * control negotiation. Negotiating the highest
243 * possible link speed with RX flow control enabled.
245 * When disabling link speed negotiation, only one link
246 * speed is allowed to be specified!
248 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
249 * to wait for more packets to arive before
250 * interrupting the host, from the time the first
253 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
254 * to wait for more packets to arive in the transmit ring,
255 * before interrupting the host, after transmitting the
256 * first packet in the ring.
258 * max_tx_desc=<val> - maximum number of transmit descriptors
259 * (packets) transmitted before interrupting the host.
261 * max_rx_desc=<val> - maximum number of receive descriptors
262 * (packets) received before interrupting the host.
264 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
265 * increments of the NIC's on board memory to be used for
266 * transmit and receive buffers. For the 1MB NIC app. 800KB
267 * is available, on the 1/2MB NIC app. 300KB is available.
268 * 68KB will always be available as a minimum for both
269 * directions. The default value is a 50/50 split.
270 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
271 * operations, default (1) is to always disable this as
272 * that is what Alteon does on NT. I have not been able
273 * to measure any real performance differences with
274 * this on my systems. Set <val>=0 if you want to
275 * enable these operations.
277 * If you use more than one NIC, specify the parameters for the
278 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
279 * run tracing on NIC #2 but not on NIC #1 and #3.
283 * - Proper multicast support.
284 * - NIC dump support.
285 * - More tuning parameters.
287 * The mini ring is not used under Linux and I am not sure it makes sense
288 * to actually use it.
290 * New interrupt handler strategy:
292 * The old interrupt handler worked using the traditional method of
293 * replacing an skbuff with a new one when a packet arrives. However
294 * the rx rings do not need to contain a static number of buffer
295 * descriptors, thus it makes sense to move the memory allocation out
296 * of the main interrupt handler and do it in a bottom half handler
297 * and only allocate new buffers when the number of buffers in the
298 * ring is below a certain threshold. In order to avoid starving the
299 * NIC under heavy load it is however necessary to force allocation
300 * when hitting a minimum threshold. The strategy for alloction is as
303 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
304 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
305 * the buffers in the interrupt handler
306 * RX_RING_THRES - maximum number of buffers in the rx ring
307 * RX_MINI_THRES - maximum number of buffers in the mini ring
308 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
310 * One advantagous side effect of this allocation approach is that the
311 * entire rx processing can be done without holding any spin lock
312 * since the rx rings and registers are totally independent of the tx
313 * ring and its registers. This of course includes the kmalloc's of
314 * new skb's. Thus start_xmit can run in parallel with rx processing
315 * and the memory allocation on SMP systems.
317 * Note that running the skb reallocation in a bottom half opens up
318 * another can of races which needs to be handled properly. In
319 * particular it can happen that the interrupt handler tries to run
320 * the reallocation while the bottom half is either running on another
321 * CPU or was interrupted on the same CPU. To get around this the
322 * driver uses bitops to prevent the reallocation routines from being
325 * TX handling can also be done without holding any spin lock, wheee
326 * this is fun! since tx_ret_csm is only written to by the interrupt
327 * handler. The case to be aware of is when shutting down the device
328 * and cleaning up where it is necessary to make sure that
329 * start_xmit() is not running while this is happening. Well DaveM
330 * informs me that this case is already protected against ... bye bye
331 * Mr. Spin Lock, it was nice to know you.
333 * TX interrupts are now partly disabled so the NIC will only generate
334 * TX interrupts for the number of coal ticks, not for the number of
335 * TX packets in the queue. This should reduce the number of TX only,
336 * ie. when no RX processing is done, interrupts seen.
340 * Threshold values for RX buffer allocation - the low water marks for
341 * when to start refilling the rings are set to 75% of the ring
342 * sizes. It seems to make sense to refill the rings entirely from the
343 * intrrupt handler once it gets below the panic threshold, that way
344 * we don't risk that the refilling is moved to another CPU when the
345 * one running the interrupt handler just got the slab code hot in its
348 #define RX_RING_SIZE 72
349 #define RX_MINI_SIZE 64
350 #define RX_JUMBO_SIZE 48
352 #define RX_PANIC_STD_THRES 16
353 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
354 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
355 #define RX_PANIC_MINI_THRES 12
356 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
357 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
358 #define RX_PANIC_JUMBO_THRES 6
359 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
360 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
364 * Size of the mini ring entries, basically these just should be big
365 * enough to take TCP ACKs
367 #define ACE_MINI_SIZE 100
369 #define ACE_MINI_BUFSIZE ACE_MINI_SIZE
370 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
371 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
374 * There seems to be a magic difference in the effect between 995 and 996
375 * but little difference between 900 and 995 ... no idea why.
377 * There is now a default set of tuning parameters which is set, depending
378 * on whether or not the user enables Jumbo frames. It's assumed that if
379 * Jumbo frames are enabled, the user wants optimal tuning for that case.
381 #define DEF_TX_COAL 400 /* 996 */
382 #define DEF_TX_MAX_DESC 60 /* was 40 */
383 #define DEF_RX_COAL 120 /* 1000 */
384 #define DEF_RX_MAX_DESC 25
385 #define DEF_TX_RATIO 21 /* 24 */
387 #define DEF_JUMBO_TX_COAL 20
388 #define DEF_JUMBO_TX_MAX_DESC 60
389 #define DEF_JUMBO_RX_COAL 30
390 #define DEF_JUMBO_RX_MAX_DESC 6
391 #define DEF_JUMBO_TX_RATIO 21
393 #if tigon2FwReleaseLocal < 20001118
395 * Standard firmware and early modifications duplicate
396 * IRQ load without this flag (coal timer is never reset).
397 * Note that with this flag tx_coal should be less than
398 * time to xmit full tx ring.
399 * 400usec is not so bad for tx ring size of 128.
401 #define TX_COAL_INTS_ONLY 1 /* worth it */
404 * With modified firmware, this is not necessary, but still useful.
406 #define TX_COAL_INTS_ONLY 1
410 #define DEF_STAT (2 * TICKS_PER_SEC)
413 static int link[ACE_MAX_MOD_PARMS];
414 static int trace[ACE_MAX_MOD_PARMS];
415 static int tx_coal_tick[ACE_MAX_MOD_PARMS];
416 static int rx_coal_tick[ACE_MAX_MOD_PARMS];
417 static int max_tx_desc[ACE_MAX_MOD_PARMS];
418 static int max_rx_desc[ACE_MAX_MOD_PARMS];
419 static int tx_ratio[ACE_MAX_MOD_PARMS];
420 static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
422 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
423 MODULE_LICENSE("GPL");
424 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
426 module_param_array(link, int, NULL, 0);
427 module_param_array(trace, int, NULL, 0);
428 module_param_array(tx_coal_tick, int, NULL, 0);
429 module_param_array(max_tx_desc, int, NULL, 0);
430 module_param_array(rx_coal_tick, int, NULL, 0);
431 module_param_array(max_rx_desc, int, NULL, 0);
432 module_param_array(tx_ratio, int, NULL, 0);
433 MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
434 MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
435 MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
436 MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
437 MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
438 MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
439 MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
442 static char version[] __devinitdata =
443 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
444 " http://home.cern.ch/~jes/gige/acenic.html\n";
446 static int ace_get_settings(struct net_device *, struct ethtool_cmd *);
447 static int ace_set_settings(struct net_device *, struct ethtool_cmd *);
448 static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
450 static const struct ethtool_ops ace_ethtool_ops = {
451 .get_settings = ace_get_settings,
452 .set_settings = ace_set_settings,
453 .get_drvinfo = ace_get_drvinfo,
456 static void ace_watchdog(struct net_device *dev);
458 static int __devinit acenic_probe_one(struct pci_dev *pdev,
459 const struct pci_device_id *id)
461 struct net_device *dev;
462 struct ace_private *ap;
463 static int boards_found;
465 dev = alloc_etherdev(sizeof(struct ace_private));
467 printk(KERN_ERR "acenic: Unable to allocate "
468 "net_device structure!\n");
472 SET_MODULE_OWNER(dev);
473 SET_NETDEV_DEV(dev, &pdev->dev);
477 ap->name = pci_name(pdev);
479 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
481 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
482 dev->vlan_rx_register = ace_vlan_rx_register;
485 dev->tx_timeout = &ace_watchdog;
486 dev->watchdog_timeo = 5*HZ;
488 dev->open = &ace_open;
489 dev->stop = &ace_close;
490 dev->hard_start_xmit = &ace_start_xmit;
491 dev->get_stats = &ace_get_stats;
492 dev->set_multicast_list = &ace_set_multicast_list;
493 SET_ETHTOOL_OPS(dev, &ace_ethtool_ops);
494 dev->set_mac_address = &ace_set_mac_addr;
495 dev->change_mtu = &ace_change_mtu;
497 /* we only display this string ONCE */
501 if (pci_enable_device(pdev))
502 goto fail_free_netdev;
505 * Enable master mode before we start playing with the
506 * pci_command word since pci_set_master() will modify
509 pci_set_master(pdev);
511 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
513 /* OpenFirmware on Mac's does not set this - DOH.. */
514 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
515 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
516 "access - was not enabled by BIOS/Firmware\n",
518 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
519 pci_write_config_word(ap->pdev, PCI_COMMAND,
524 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency);
525 if (ap->pci_latency <= 0x40) {
526 ap->pci_latency = 0x40;
527 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency);
531 * Remap the regs into kernel space - this is abuse of
532 * dev->base_addr since it was means for I/O port
533 * addresses but who gives a damn.
535 dev->base_addr = pci_resource_start(pdev, 0);
536 ap->regs = ioremap(dev->base_addr, 0x4000);
538 printk(KERN_ERR "%s: Unable to map I/O register, "
539 "AceNIC %i will be disabled.\n",
540 ap->name, boards_found);
541 goto fail_free_netdev;
544 switch(pdev->vendor) {
545 case PCI_VENDOR_ID_ALTEON:
546 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
547 printk(KERN_INFO "%s: Farallon PN9100-T ",
550 printk(KERN_INFO "%s: Alteon AceNIC ",
554 case PCI_VENDOR_ID_3COM:
555 printk(KERN_INFO "%s: 3Com 3C985 ", ap->name);
557 case PCI_VENDOR_ID_NETGEAR:
558 printk(KERN_INFO "%s: NetGear GA620 ", ap->name);
560 case PCI_VENDOR_ID_DEC:
561 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
562 printk(KERN_INFO "%s: Farallon PN9000-SX ",
566 case PCI_VENDOR_ID_SGI:
567 printk(KERN_INFO "%s: SGI AceNIC ", ap->name);
570 printk(KERN_INFO "%s: Unknown AceNIC ", ap->name);
574 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
575 printk("irq %d\n", pdev->irq);
577 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
578 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
579 printk(KERN_ERR "%s: Driver compiled without Tigon I"
580 " support - NIC disabled\n", dev->name);
585 if (ace_allocate_descriptors(dev))
586 goto fail_free_netdev;
589 if (boards_found >= ACE_MAX_MOD_PARMS)
590 ap->board_idx = BOARD_IDX_OVERFLOW;
592 ap->board_idx = boards_found;
594 ap->board_idx = BOARD_IDX_STATIC;
598 goto fail_free_netdev;
600 if (register_netdev(dev)) {
601 printk(KERN_ERR "acenic: device registration failed\n");
604 ap->name = dev->name;
606 if (ap->pci_using_dac)
607 dev->features |= NETIF_F_HIGHDMA;
609 pci_set_drvdata(pdev, dev);
615 ace_init_cleanup(dev);
621 static void __devexit acenic_remove_one(struct pci_dev *pdev)
623 struct net_device *dev = pci_get_drvdata(pdev);
624 struct ace_private *ap = netdev_priv(dev);
625 struct ace_regs __iomem *regs = ap->regs;
628 unregister_netdev(dev);
630 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
631 if (ap->version >= 2)
632 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
635 * This clears any pending interrupts
637 writel(1, ®s->Mb0Lo);
638 readl(®s->CpuCtrl); /* flush */
641 * Make sure no other CPUs are processing interrupts
642 * on the card before the buffers are being released.
643 * Otherwise one might experience some `interesting'
646 * Then release the RX buffers - jumbo buffers were
647 * already released in ace_close().
649 ace_sync_irq(dev->irq);
651 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
652 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
655 struct ring_info *ringp;
658 ringp = &ap->skb->rx_std_skbuff[i];
659 mapping = pci_unmap_addr(ringp, mapping);
660 pci_unmap_page(ap->pdev, mapping,
664 ap->rx_std_ring[i].size = 0;
665 ap->skb->rx_std_skbuff[i].skb = NULL;
670 if (ap->version >= 2) {
671 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
672 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
675 struct ring_info *ringp;
678 ringp = &ap->skb->rx_mini_skbuff[i];
679 mapping = pci_unmap_addr(ringp,mapping);
680 pci_unmap_page(ap->pdev, mapping,
684 ap->rx_mini_ring[i].size = 0;
685 ap->skb->rx_mini_skbuff[i].skb = NULL;
691 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
692 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
694 struct ring_info *ringp;
697 ringp = &ap->skb->rx_jumbo_skbuff[i];
698 mapping = pci_unmap_addr(ringp, mapping);
699 pci_unmap_page(ap->pdev, mapping,
703 ap->rx_jumbo_ring[i].size = 0;
704 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
709 ace_init_cleanup(dev);
713 static struct pci_driver acenic_pci_driver = {
715 .id_table = acenic_pci_tbl,
716 .probe = acenic_probe_one,
717 .remove = __devexit_p(acenic_remove_one),
720 static int __init acenic_init(void)
722 return pci_register_driver(&acenic_pci_driver);
725 static void __exit acenic_exit(void)
727 pci_unregister_driver(&acenic_pci_driver);
730 module_init(acenic_init);
731 module_exit(acenic_exit);
733 static void ace_free_descriptors(struct net_device *dev)
735 struct ace_private *ap = netdev_priv(dev);
738 if (ap->rx_std_ring != NULL) {
739 size = (sizeof(struct rx_desc) *
740 (RX_STD_RING_ENTRIES +
741 RX_JUMBO_RING_ENTRIES +
742 RX_MINI_RING_ENTRIES +
743 RX_RETURN_RING_ENTRIES));
744 pci_free_consistent(ap->pdev, size, ap->rx_std_ring,
745 ap->rx_ring_base_dma);
746 ap->rx_std_ring = NULL;
747 ap->rx_jumbo_ring = NULL;
748 ap->rx_mini_ring = NULL;
749 ap->rx_return_ring = NULL;
751 if (ap->evt_ring != NULL) {
752 size = (sizeof(struct event) * EVT_RING_ENTRIES);
753 pci_free_consistent(ap->pdev, size, ap->evt_ring,
757 if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
758 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
759 pci_free_consistent(ap->pdev, size, ap->tx_ring,
764 if (ap->evt_prd != NULL) {
765 pci_free_consistent(ap->pdev, sizeof(u32),
766 (void *)ap->evt_prd, ap->evt_prd_dma);
769 if (ap->rx_ret_prd != NULL) {
770 pci_free_consistent(ap->pdev, sizeof(u32),
771 (void *)ap->rx_ret_prd,
773 ap->rx_ret_prd = NULL;
775 if (ap->tx_csm != NULL) {
776 pci_free_consistent(ap->pdev, sizeof(u32),
777 (void *)ap->tx_csm, ap->tx_csm_dma);
783 static int ace_allocate_descriptors(struct net_device *dev)
785 struct ace_private *ap = netdev_priv(dev);
788 size = (sizeof(struct rx_desc) *
789 (RX_STD_RING_ENTRIES +
790 RX_JUMBO_RING_ENTRIES +
791 RX_MINI_RING_ENTRIES +
792 RX_RETURN_RING_ENTRIES));
794 ap->rx_std_ring = pci_alloc_consistent(ap->pdev, size,
795 &ap->rx_ring_base_dma);
796 if (ap->rx_std_ring == NULL)
799 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
800 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
801 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
803 size = (sizeof(struct event) * EVT_RING_ENTRIES);
805 ap->evt_ring = pci_alloc_consistent(ap->pdev, size, &ap->evt_ring_dma);
807 if (ap->evt_ring == NULL)
811 * Only allocate a host TX ring for the Tigon II, the Tigon I
812 * has to use PCI registers for this ;-(
814 if (!ACE_IS_TIGON_I(ap)) {
815 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
817 ap->tx_ring = pci_alloc_consistent(ap->pdev, size,
820 if (ap->tx_ring == NULL)
824 ap->evt_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
826 if (ap->evt_prd == NULL)
829 ap->rx_ret_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
830 &ap->rx_ret_prd_dma);
831 if (ap->rx_ret_prd == NULL)
834 ap->tx_csm = pci_alloc_consistent(ap->pdev, sizeof(u32),
836 if (ap->tx_csm == NULL)
843 ace_init_cleanup(dev);
849 * Generic cleanup handling data allocated during init. Used when the
850 * module is unloaded or if an error occurs during initialization
852 static void ace_init_cleanup(struct net_device *dev)
854 struct ace_private *ap;
856 ap = netdev_priv(dev);
858 ace_free_descriptors(dev);
861 pci_free_consistent(ap->pdev, sizeof(struct ace_info),
862 ap->info, ap->info_dma);
864 kfree(ap->trace_buf);
867 free_irq(dev->irq, dev);
874 * Commands are considered to be slow.
876 static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
880 idx = readl(®s->CmdPrd);
882 writel(*(u32 *)(cmd), ®s->CmdRng[idx]);
883 idx = (idx + 1) % CMD_RING_ENTRIES;
885 writel(idx, ®s->CmdPrd);
889 static int __devinit ace_init(struct net_device *dev)
891 struct ace_private *ap;
892 struct ace_regs __iomem *regs;
893 struct ace_info *info = NULL;
894 struct pci_dev *pdev;
897 u32 tig_ver, mac1, mac2, tmp, pci_state;
898 int board_idx, ecode = 0;
900 unsigned char cache_size;
902 ap = netdev_priv(dev);
905 board_idx = ap->board_idx;
908 * aman@sgi.com - its useful to do a NIC reset here to
909 * address the `Firmware not running' problem subsequent
910 * to any crashes involving the NIC
912 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);
913 readl(®s->HostCtrl); /* PCI write posting */
917 * Don't access any other registers before this point!
921 * This will most likely need BYTE_SWAP once we switch
922 * to using __raw_writel()
924 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
927 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
930 readl(®s->HostCtrl); /* PCI write posting */
933 * Stop the NIC CPU and clear pending interrupts
935 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
936 readl(®s->CpuCtrl); /* PCI write posting */
937 writel(0, ®s->Mb0Lo);
939 tig_ver = readl(®s->HostCtrl) >> 28;
942 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
945 printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
946 tig_ver, tigonFwReleaseMajor, tigonFwReleaseMinor,
948 writel(0, ®s->LocalCtrl);
950 ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
954 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
955 tig_ver, tigon2FwReleaseMajor, tigon2FwReleaseMinor,
957 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
958 readl(®s->CpuBCtrl); /* PCI write posting */
960 * The SRAM bank size does _not_ indicate the amount
961 * of memory on the card, it controls the _bank_ size!
962 * Ie. a 1MB AceNIC will have two banks of 512KB.
964 writel(SRAM_BANK_512K, ®s->LocalCtrl);
965 writel(SYNC_SRAM_TIMING, ®s->MiscCfg);
967 ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
970 printk(KERN_WARNING " Unsupported Tigon version detected "
977 * ModeStat _must_ be set after the SRAM settings as this change
978 * seems to corrupt the ModeStat and possible other registers.
979 * The SRAM settings survive resets and setting it to the same
980 * value a second time works as well. This is what caused the
981 * `Firmware not running' problem on the Tigon II.
984 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
985 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
987 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
988 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
990 readl(®s->ModeStat); /* PCI write posting */
993 for(i = 0; i < 4; i++) {
997 tmp = read_eeprom_byte(dev, 0x8c+i);
1002 mac1 |= (tmp & 0xff);
1005 for(i = 4; i < 8; i++) {
1009 tmp = read_eeprom_byte(dev, 0x8c+i);
1014 mac2 |= (tmp & 0xff);
1017 writel(mac1, ®s->MacAddrHi);
1018 writel(mac2, ®s->MacAddrLo);
1020 printk("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
1021 (mac1 >> 8) & 0xff, mac1 & 0xff, (mac2 >> 24) &0xff,
1022 (mac2 >> 16) & 0xff, (mac2 >> 8) & 0xff, mac2 & 0xff);
1024 dev->dev_addr[0] = (mac1 >> 8) & 0xff;
1025 dev->dev_addr[1] = mac1 & 0xff;
1026 dev->dev_addr[2] = (mac2 >> 24) & 0xff;
1027 dev->dev_addr[3] = (mac2 >> 16) & 0xff;
1028 dev->dev_addr[4] = (mac2 >> 8) & 0xff;
1029 dev->dev_addr[5] = mac2 & 0xff;
1032 * Looks like this is necessary to deal with on all architectures,
1033 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1034 * Ie. having two NICs in the machine, one will have the cache
1035 * line set at boot time, the other will not.
1038 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1040 if (cache_size != SMP_CACHE_BYTES) {
1041 printk(KERN_INFO " PCI cache line size set incorrectly "
1042 "(%i bytes) by BIOS/FW, ", cache_size);
1043 if (cache_size > SMP_CACHE_BYTES)
1044 printk("expecting %i\n", SMP_CACHE_BYTES);
1046 printk("correcting to %i\n", SMP_CACHE_BYTES);
1047 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1048 SMP_CACHE_BYTES >> 2);
1052 pci_state = readl(®s->PciState);
1053 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1054 "latency: %i clks\n",
1055 (pci_state & PCI_32BIT) ? 32 : 64,
1056 (pci_state & PCI_66MHZ) ? 66 : 33,
1060 * Set the max DMA transfer size. Seems that for most systems
1061 * the performance is better when no MAX parameter is
1062 * set. However for systems enabling PCI write and invalidate,
1063 * DMA writes must be set to the L1 cache line size to get
1064 * optimal performance.
1066 * The default is now to turn the PCI write and invalidate off
1067 * - that is what Alteon does for NT.
1069 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1070 if (ap->version >= 2) {
1071 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1073 * Tuning parameters only supported for 8 cards
1075 if (board_idx == BOARD_IDX_OVERFLOW ||
1076 dis_pci_mem_inval[board_idx]) {
1077 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1078 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1079 pci_write_config_word(pdev, PCI_COMMAND,
1081 printk(KERN_INFO " Disabling PCI memory "
1082 "write and invalidate\n");
1084 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1085 printk(KERN_INFO " PCI memory write & invalidate "
1086 "enabled by BIOS, enabling counter measures\n");
1088 switch(SMP_CACHE_BYTES) {
1090 tmp |= DMA_WRITE_MAX_16;
1093 tmp |= DMA_WRITE_MAX_32;
1096 tmp |= DMA_WRITE_MAX_64;
1099 tmp |= DMA_WRITE_MAX_128;
1102 printk(KERN_INFO " Cache line size %i not "
1103 "supported, PCI write and invalidate "
1104 "disabled\n", SMP_CACHE_BYTES);
1105 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1106 pci_write_config_word(pdev, PCI_COMMAND,
1114 * On this platform, we know what the best dma settings
1115 * are. We use 64-byte maximum bursts, because if we
1116 * burst larger than the cache line size (or even cross
1117 * a 64byte boundary in a single burst) the UltraSparc
1118 * PCI controller will disconnect at 64-byte multiples.
1120 * Read-multiple will be properly enabled above, and when
1121 * set will give the PCI controller proper hints about
1124 tmp &= ~DMA_READ_WRITE_MASK;
1125 tmp |= DMA_READ_MAX_64;
1126 tmp |= DMA_WRITE_MAX_64;
1129 tmp &= ~DMA_READ_WRITE_MASK;
1130 tmp |= DMA_READ_MAX_128;
1132 * All the docs say MUST NOT. Well, I did.
1133 * Nothing terrible happens, if we load wrong size.
1134 * Bit w&i still works better!
1136 tmp |= DMA_WRITE_MAX_128;
1138 writel(tmp, ®s->PciState);
1142 * The Host PCI bus controller driver has to set FBB.
1143 * If all devices on that PCI bus support FBB, then the controller
1144 * can enable FBB support in the Host PCI Bus controller (or on
1145 * the PCI-PCI bridge if that applies).
1149 * I have received reports from people having problems when this
1152 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1153 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1154 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1155 pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1160 * Configure DMA attributes.
1162 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
1163 ap->pci_using_dac = 1;
1164 } else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1165 ap->pci_using_dac = 0;
1172 * Initialize the generic info block and the command+event rings
1173 * and the control blocks for the transmit and receive rings
1174 * as they need to be setup once and for all.
1176 if (!(info = pci_alloc_consistent(ap->pdev, sizeof(struct ace_info),
1184 * Get the memory for the skb rings.
1186 if (!(ap->skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1191 ecode = request_irq(pdev->irq, ace_interrupt, IRQF_SHARED,
1194 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1195 DRV_NAME, pdev->irq);
1198 dev->irq = pdev->irq;
1201 spin_lock_init(&ap->debug_lock);
1202 ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1203 ap->last_std_rx = 0;
1204 ap->last_mini_rx = 0;
1207 memset(ap->info, 0, sizeof(struct ace_info));
1208 memset(ap->skb, 0, sizeof(struct ace_skb));
1210 ace_load_firmware(dev);
1213 tmp_ptr = ap->info_dma;
1214 writel(tmp_ptr >> 32, ®s->InfoPtrHi);
1215 writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);
1217 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1219 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1220 info->evt_ctrl.flags = 0;
1224 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1225 writel(0, ®s->EvtCsm);
1227 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1228 info->cmd_ctrl.flags = 0;
1229 info->cmd_ctrl.max_len = 0;
1231 for (i = 0; i < CMD_RING_ENTRIES; i++)
1232 writel(0, ®s->CmdRng[i]);
1234 writel(0, ®s->CmdPrd);
1235 writel(0, ®s->CmdCsm);
1237 tmp_ptr = ap->info_dma;
1238 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1239 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1241 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1242 info->rx_std_ctrl.max_len = ACE_STD_BUFSIZE;
1243 info->rx_std_ctrl.flags =
1244 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1246 memset(ap->rx_std_ring, 0,
1247 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1249 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1250 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1252 ap->rx_std_skbprd = 0;
1253 atomic_set(&ap->cur_rx_bufs, 0);
1255 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1256 (ap->rx_ring_base_dma +
1257 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1258 info->rx_jumbo_ctrl.max_len = 0;
1259 info->rx_jumbo_ctrl.flags =
1260 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1262 memset(ap->rx_jumbo_ring, 0,
1263 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1265 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1266 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1268 ap->rx_jumbo_skbprd = 0;
1269 atomic_set(&ap->cur_jumbo_bufs, 0);
1271 memset(ap->rx_mini_ring, 0,
1272 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1274 if (ap->version >= 2) {
1275 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1276 (ap->rx_ring_base_dma +
1277 (sizeof(struct rx_desc) *
1278 (RX_STD_RING_ENTRIES +
1279 RX_JUMBO_RING_ENTRIES))));
1280 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1281 info->rx_mini_ctrl.flags =
1282 RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|ACE_RCB_VLAN_FLAG;
1284 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1285 ap->rx_mini_ring[i].flags =
1286 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1288 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1289 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1290 info->rx_mini_ctrl.max_len = 0;
1293 ap->rx_mini_skbprd = 0;
1294 atomic_set(&ap->cur_mini_bufs, 0);
1296 set_aceaddr(&info->rx_return_ctrl.rngptr,
1297 (ap->rx_ring_base_dma +
1298 (sizeof(struct rx_desc) *
1299 (RX_STD_RING_ENTRIES +
1300 RX_JUMBO_RING_ENTRIES +
1301 RX_MINI_RING_ENTRIES))));
1302 info->rx_return_ctrl.flags = 0;
1303 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1305 memset(ap->rx_return_ring, 0,
1306 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1308 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1309 *(ap->rx_ret_prd) = 0;
1311 writel(TX_RING_BASE, ®s->WinBase);
1313 if (ACE_IS_TIGON_I(ap)) {
1314 ap->tx_ring = (struct tx_desc *) regs->Window;
1315 for (i = 0; i < (TIGON_I_TX_RING_ENTRIES
1316 * sizeof(struct tx_desc)) / sizeof(u32); i++)
1317 writel(0, (void __iomem *)ap->tx_ring + i * 4);
1319 set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);
1321 memset(ap->tx_ring, 0,
1322 MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1324 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1327 info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1328 tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1331 * The Tigon I does not like having the TX ring in host memory ;-(
1333 if (!ACE_IS_TIGON_I(ap))
1334 tmp |= RCB_FLG_TX_HOST_RING;
1335 #if TX_COAL_INTS_ONLY
1336 tmp |= RCB_FLG_COAL_INT_ONLY;
1338 info->tx_ctrl.flags = tmp;
1340 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1343 * Potential item for tuning parameter
1346 writel(DMA_THRESH_16W, ®s->DmaReadCfg);
1347 writel(DMA_THRESH_16W, ®s->DmaWriteCfg);
1349 writel(DMA_THRESH_8W, ®s->DmaReadCfg);
1350 writel(DMA_THRESH_8W, ®s->DmaWriteCfg);
1353 writel(0, ®s->MaskInt);
1354 writel(1, ®s->IfIdx);
1357 * McKinley boxes do not like us fiddling with AssistState
1360 writel(1, ®s->AssistState);
1363 writel(DEF_STAT, ®s->TuneStatTicks);
1364 writel(DEF_TRACE, ®s->TuneTrace);
1366 ace_set_rxtx_parms(dev, 0);
1368 if (board_idx == BOARD_IDX_OVERFLOW) {
1369 printk(KERN_WARNING "%s: more than %i NICs detected, "
1370 "ignoring module parameters!\n",
1371 ap->name, ACE_MAX_MOD_PARMS);
1372 } else if (board_idx >= 0) {
1373 if (tx_coal_tick[board_idx])
1374 writel(tx_coal_tick[board_idx],
1375 ®s->TuneTxCoalTicks);
1376 if (max_tx_desc[board_idx])
1377 writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);
1379 if (rx_coal_tick[board_idx])
1380 writel(rx_coal_tick[board_idx],
1381 ®s->TuneRxCoalTicks);
1382 if (max_rx_desc[board_idx])
1383 writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);
1385 if (trace[board_idx])
1386 writel(trace[board_idx], ®s->TuneTrace);
1388 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1389 writel(tx_ratio[board_idx], ®s->TxBufRat);
1393 * Default link parameters
1395 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1396 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1397 if(ap->version >= 2)
1398 tmp |= LNK_TX_FLOW_CTL_Y;
1401 * Override link default parameters
1403 if ((board_idx >= 0) && link[board_idx]) {
1404 int option = link[board_idx];
1408 if (option & 0x01) {
1409 printk(KERN_INFO "%s: Setting half duplex link\n",
1411 tmp &= ~LNK_FULL_DUPLEX;
1414 tmp &= ~LNK_NEGOTIATE;
1421 if ((option & 0x70) == 0) {
1422 printk(KERN_WARNING "%s: No media speed specified, "
1423 "forcing auto negotiation\n", ap->name);
1424 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1425 LNK_100MB | LNK_10MB;
1427 if ((option & 0x100) == 0)
1428 tmp |= LNK_NEG_FCTL;
1430 printk(KERN_INFO "%s: Disabling flow control "
1431 "negotiation\n", ap->name);
1433 tmp |= LNK_RX_FLOW_CTL_Y;
1434 if ((option & 0x400) && (ap->version >= 2)) {
1435 printk(KERN_INFO "%s: Enabling TX flow control\n",
1437 tmp |= LNK_TX_FLOW_CTL_Y;
1442 writel(tmp, ®s->TuneLink);
1443 if (ap->version >= 2)
1444 writel(tmp, ®s->TuneFastLink);
1446 if (ACE_IS_TIGON_I(ap))
1447 writel(tigonFwStartAddr, ®s->Pc);
1448 if (ap->version == 2)
1449 writel(tigon2FwStartAddr, ®s->Pc);
1451 writel(0, ®s->Mb0Lo);
1454 * Set tx_csm before we start receiving interrupts, otherwise
1455 * the interrupt handler might think it is supposed to process
1456 * tx ints before we are up and running, which may cause a null
1457 * pointer access in the int handler.
1460 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1463 ace_set_txprd(regs, ap, 0);
1464 writel(0, ®s->RxRetCsm);
1467 * Zero the stats before starting the interface
1469 memset(&ap->stats, 0, sizeof(ap->stats));
1472 * Enable DMA engine now.
1473 * If we do this sooner, Mckinley box pukes.
1474 * I assume it's because Tigon II DMA engine wants to check
1475 * *something* even before the CPU is started.
1477 writel(1, ®s->AssistState); /* enable DMA */
1482 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
1483 readl(®s->CpuCtrl);
1486 * Wait for the firmware to spin up - max 3 seconds.
1488 myjif = jiffies + 3 * HZ;
1489 while (time_before(jiffies, myjif) && !ap->fw_running)
1492 if (!ap->fw_running) {
1493 printk(KERN_ERR "%s: Firmware NOT running!\n", ap->name);
1496 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1497 readl(®s->CpuCtrl);
1499 /* aman@sgi.com - account for badly behaving firmware/NIC:
1500 * - have observed that the NIC may continue to generate
1501 * interrupts for some reason; attempt to stop it - halt
1502 * second CPU for Tigon II cards, and also clear Mb0
1503 * - if we're a module, we'll fail to load if this was
1504 * the only GbE card in the system => if the kernel does
1505 * see an interrupt from the NIC, code to handle it is
1506 * gone and OOps! - so free_irq also
1508 if (ap->version >= 2)
1509 writel(readl(®s->CpuBCtrl) | CPU_HALT,
1511 writel(0, ®s->Mb0Lo);
1512 readl(®s->Mb0Lo);
1519 * We load the ring here as there seem to be no way to tell the
1520 * firmware to wipe the ring without re-initializing it.
1522 if (!test_and_set_bit(0, &ap->std_refill_busy))
1523 ace_load_std_rx_ring(ap, RX_RING_SIZE);
1525 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1527 if (ap->version >= 2) {
1528 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1529 ace_load_mini_rx_ring(ap, RX_MINI_SIZE);
1531 printk(KERN_ERR "%s: Someone is busy refilling "
1532 "the RX mini ring\n", ap->name);
1537 ace_init_cleanup(dev);
1542 static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1544 struct ace_private *ap = netdev_priv(dev);
1545 struct ace_regs __iomem *regs = ap->regs;
1546 int board_idx = ap->board_idx;
1548 if (board_idx >= 0) {
1550 if (!tx_coal_tick[board_idx])
1551 writel(DEF_TX_COAL, ®s->TuneTxCoalTicks);
1552 if (!max_tx_desc[board_idx])
1553 writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);
1554 if (!rx_coal_tick[board_idx])
1555 writel(DEF_RX_COAL, ®s->TuneRxCoalTicks);
1556 if (!max_rx_desc[board_idx])
1557 writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);
1558 if (!tx_ratio[board_idx])
1559 writel(DEF_TX_RATIO, ®s->TxBufRat);
1561 if (!tx_coal_tick[board_idx])
1562 writel(DEF_JUMBO_TX_COAL,
1563 ®s->TuneTxCoalTicks);
1564 if (!max_tx_desc[board_idx])
1565 writel(DEF_JUMBO_TX_MAX_DESC,
1566 ®s->TuneMaxTxDesc);
1567 if (!rx_coal_tick[board_idx])
1568 writel(DEF_JUMBO_RX_COAL,
1569 ®s->TuneRxCoalTicks);
1570 if (!max_rx_desc[board_idx])
1571 writel(DEF_JUMBO_RX_MAX_DESC,
1572 ®s->TuneMaxRxDesc);
1573 if (!tx_ratio[board_idx])
1574 writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);
1580 static void ace_watchdog(struct net_device *data)
1582 struct net_device *dev = data;
1583 struct ace_private *ap = netdev_priv(dev);
1584 struct ace_regs __iomem *regs = ap->regs;
1587 * We haven't received a stats update event for more than 2.5
1588 * seconds and there is data in the transmit queue, thus we
1589 * asume the card is stuck.
1591 if (*ap->tx_csm != ap->tx_ret_csm) {
1592 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1593 dev->name, (unsigned int)readl(®s->HostCtrl));
1594 /* This can happen due to ieee flow control. */
1596 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1599 netif_wake_queue(dev);
1605 static void ace_tasklet(unsigned long dev)
1607 struct ace_private *ap = netdev_priv((struct net_device *)dev);
1610 cur_size = atomic_read(&ap->cur_rx_bufs);
1611 if ((cur_size < RX_LOW_STD_THRES) &&
1612 !test_and_set_bit(0, &ap->std_refill_busy)) {
1614 printk("refilling buffers (current %i)\n", cur_size);
1616 ace_load_std_rx_ring(ap, RX_RING_SIZE - cur_size);
1619 if (ap->version >= 2) {
1620 cur_size = atomic_read(&ap->cur_mini_bufs);
1621 if ((cur_size < RX_LOW_MINI_THRES) &&
1622 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1624 printk("refilling mini buffers (current %i)\n",
1627 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
1631 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1632 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1633 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1635 printk("refilling jumbo buffers (current %i)\n", cur_size);
1637 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
1639 ap->tasklet_pending = 0;
1644 * Copy the contents of the NIC's trace buffer to kernel memory.
1646 static void ace_dump_trace(struct ace_private *ap)
1650 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1657 * Load the standard rx ring.
1659 * Loading rings is safe without holding the spin lock since this is
1660 * done only before the device is enabled, thus no interrupts are
1661 * generated and by the interrupt handler/tasklet handler.
1663 static void ace_load_std_rx_ring(struct ace_private *ap, int nr_bufs)
1665 struct ace_regs __iomem *regs = ap->regs;
1669 prefetchw(&ap->cur_rx_bufs);
1671 idx = ap->rx_std_skbprd;
1673 for (i = 0; i < nr_bufs; i++) {
1674 struct sk_buff *skb;
1678 skb = alloc_skb(ACE_STD_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1682 skb_reserve(skb, NET_IP_ALIGN);
1683 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1684 offset_in_page(skb->data),
1686 PCI_DMA_FROMDEVICE);
1687 ap->skb->rx_std_skbuff[idx].skb = skb;
1688 pci_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1691 rd = &ap->rx_std_ring[idx];
1692 set_aceaddr(&rd->addr, mapping);
1693 rd->size = ACE_STD_BUFSIZE;
1695 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1701 atomic_add(i, &ap->cur_rx_bufs);
1702 ap->rx_std_skbprd = idx;
1704 if (ACE_IS_TIGON_I(ap)) {
1706 cmd.evt = C_SET_RX_PRD_IDX;
1708 cmd.idx = ap->rx_std_skbprd;
1709 ace_issue_cmd(regs, &cmd);
1711 writel(idx, ®s->RxStdPrd);
1716 clear_bit(0, &ap->std_refill_busy);
1720 printk(KERN_INFO "Out of memory when allocating "
1721 "standard receive buffers\n");
1726 static void ace_load_mini_rx_ring(struct ace_private *ap, int nr_bufs)
1728 struct ace_regs __iomem *regs = ap->regs;
1731 prefetchw(&ap->cur_mini_bufs);
1733 idx = ap->rx_mini_skbprd;
1734 for (i = 0; i < nr_bufs; i++) {
1735 struct sk_buff *skb;
1739 skb = alloc_skb(ACE_MINI_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1743 skb_reserve(skb, NET_IP_ALIGN);
1744 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1745 offset_in_page(skb->data),
1747 PCI_DMA_FROMDEVICE);
1748 ap->skb->rx_mini_skbuff[idx].skb = skb;
1749 pci_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
1752 rd = &ap->rx_mini_ring[idx];
1753 set_aceaddr(&rd->addr, mapping);
1754 rd->size = ACE_MINI_BUFSIZE;
1756 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1762 atomic_add(i, &ap->cur_mini_bufs);
1764 ap->rx_mini_skbprd = idx;
1766 writel(idx, ®s->RxMiniPrd);
1770 clear_bit(0, &ap->mini_refill_busy);
1773 printk(KERN_INFO "Out of memory when allocating "
1774 "mini receive buffers\n");
1780 * Load the jumbo rx ring, this may happen at any time if the MTU
1781 * is changed to a value > 1500.
1783 static void ace_load_jumbo_rx_ring(struct ace_private *ap, int nr_bufs)
1785 struct ace_regs __iomem *regs = ap->regs;
1788 idx = ap->rx_jumbo_skbprd;
1790 for (i = 0; i < nr_bufs; i++) {
1791 struct sk_buff *skb;
1795 skb = alloc_skb(ACE_JUMBO_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1799 skb_reserve(skb, NET_IP_ALIGN);
1800 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1801 offset_in_page(skb->data),
1803 PCI_DMA_FROMDEVICE);
1804 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1805 pci_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
1808 rd = &ap->rx_jumbo_ring[idx];
1809 set_aceaddr(&rd->addr, mapping);
1810 rd->size = ACE_JUMBO_BUFSIZE;
1812 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1818 atomic_add(i, &ap->cur_jumbo_bufs);
1819 ap->rx_jumbo_skbprd = idx;
1821 if (ACE_IS_TIGON_I(ap)) {
1823 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1825 cmd.idx = ap->rx_jumbo_skbprd;
1826 ace_issue_cmd(regs, &cmd);
1828 writel(idx, ®s->RxJumboPrd);
1833 clear_bit(0, &ap->jumbo_refill_busy);
1836 if (net_ratelimit())
1837 printk(KERN_INFO "Out of memory when allocating "
1838 "jumbo receive buffers\n");
1844 * All events are considered to be slow (RX/TX ints do not generate
1845 * events) and are handled here, outside the main interrupt handler,
1846 * to reduce the size of the handler.
1848 static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1850 struct ace_private *ap;
1852 ap = netdev_priv(dev);
1854 while (evtcsm != evtprd) {
1855 switch (ap->evt_ring[evtcsm].evt) {
1857 printk(KERN_INFO "%s: Firmware up and running\n",
1862 case E_STATS_UPDATED:
1866 u16 code = ap->evt_ring[evtcsm].code;
1870 u32 state = readl(&ap->regs->GigLnkState);
1871 printk(KERN_WARNING "%s: Optical link UP "
1872 "(%s Duplex, Flow Control: %s%s)\n",
1874 state & LNK_FULL_DUPLEX ? "Full":"Half",
1875 state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1876 state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1880 printk(KERN_WARNING "%s: Optical link DOWN\n",
1883 case E_C_LINK_10_100:
1884 printk(KERN_WARNING "%s: 10/100BaseT link "
1888 printk(KERN_ERR "%s: Unknown optical link "
1889 "state %02x\n", ap->name, code);
1894 switch(ap->evt_ring[evtcsm].code) {
1895 case E_C_ERR_INVAL_CMD:
1896 printk(KERN_ERR "%s: invalid command error\n",
1899 case E_C_ERR_UNIMP_CMD:
1900 printk(KERN_ERR "%s: unimplemented command "
1901 "error\n", ap->name);
1903 case E_C_ERR_BAD_CFG:
1904 printk(KERN_ERR "%s: bad config error\n",
1908 printk(KERN_ERR "%s: unknown error %02x\n",
1909 ap->name, ap->evt_ring[evtcsm].code);
1912 case E_RESET_JUMBO_RNG:
1915 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1916 if (ap->skb->rx_jumbo_skbuff[i].skb) {
1917 ap->rx_jumbo_ring[i].size = 0;
1918 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
1919 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1920 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1924 if (ACE_IS_TIGON_I(ap)) {
1926 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1929 ace_issue_cmd(ap->regs, &cmd);
1931 writel(0, &((ap->regs)->RxJumboPrd));
1936 ap->rx_jumbo_skbprd = 0;
1937 printk(KERN_INFO "%s: Jumbo ring flushed\n",
1939 clear_bit(0, &ap->jumbo_refill_busy);
1943 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1944 ap->name, ap->evt_ring[evtcsm].evt);
1946 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1953 static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1955 struct ace_private *ap = netdev_priv(dev);
1957 int mini_count = 0, std_count = 0;
1961 prefetchw(&ap->cur_rx_bufs);
1962 prefetchw(&ap->cur_mini_bufs);
1964 while (idx != rxretprd) {
1965 struct ring_info *rip;
1966 struct sk_buff *skb;
1967 struct rx_desc *rxdesc, *retdesc;
1969 int bd_flags, desc_type, mapsize;
1973 /* make sure the rx descriptor isn't read before rxretprd */
1974 if (idx == rxretcsm)
1977 retdesc = &ap->rx_return_ring[idx];
1978 skbidx = retdesc->idx;
1979 bd_flags = retdesc->flags;
1980 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
1984 * Normal frames do not have any flags set
1986 * Mini and normal frames arrive frequently,
1987 * so use a local counter to avoid doing
1988 * atomic operations for each packet arriving.
1991 rip = &ap->skb->rx_std_skbuff[skbidx];
1992 mapsize = ACE_STD_BUFSIZE;
1993 rxdesc = &ap->rx_std_ring[skbidx];
1997 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
1998 mapsize = ACE_JUMBO_BUFSIZE;
1999 rxdesc = &ap->rx_jumbo_ring[skbidx];
2000 atomic_dec(&ap->cur_jumbo_bufs);
2003 rip = &ap->skb->rx_mini_skbuff[skbidx];
2004 mapsize = ACE_MINI_BUFSIZE;
2005 rxdesc = &ap->rx_mini_ring[skbidx];
2009 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
2010 "returned by NIC\n", dev->name,
2017 pci_unmap_page(ap->pdev,
2018 pci_unmap_addr(rip, mapping),
2020 PCI_DMA_FROMDEVICE);
2021 skb_put(skb, retdesc->size);
2026 csum = retdesc->tcp_udp_csum;
2028 skb->protocol = eth_type_trans(skb, dev);
2031 * Instead of forcing the poor tigon mips cpu to calculate
2032 * pseudo hdr checksum, we do this ourselves.
2034 if (bd_flags & BD_FLG_TCP_UDP_SUM) {
2035 skb->csum = htons(csum);
2036 skb->ip_summed = CHECKSUM_COMPLETE;
2038 skb->ip_summed = CHECKSUM_NONE;
2043 if (ap->vlgrp && (bd_flags & BD_FLG_VLAN_TAG)) {
2044 vlan_hwaccel_rx(skb, ap->vlgrp, retdesc->vlan);
2049 dev->last_rx = jiffies;
2050 ap->stats.rx_packets++;
2051 ap->stats.rx_bytes += retdesc->size;
2053 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2056 atomic_sub(std_count, &ap->cur_rx_bufs);
2057 if (!ACE_IS_TIGON_I(ap))
2058 atomic_sub(mini_count, &ap->cur_mini_bufs);
2062 * According to the documentation RxRetCsm is obsolete with
2063 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2065 if (ACE_IS_TIGON_I(ap)) {
2066 writel(idx, &ap->regs->RxRetCsm);
2077 static inline void ace_tx_int(struct net_device *dev,
2080 struct ace_private *ap = netdev_priv(dev);
2083 struct sk_buff *skb;
2085 struct tx_ring_info *info;
2087 info = ap->skb->tx_skbuff + idx;
2089 mapping = pci_unmap_addr(info, mapping);
2092 pci_unmap_page(ap->pdev, mapping,
2093 pci_unmap_len(info, maplen),
2095 pci_unmap_addr_set(info, mapping, 0);
2099 ap->stats.tx_packets++;
2100 ap->stats.tx_bytes += skb->len;
2101 dev_kfree_skb_irq(skb);
2105 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2106 } while (idx != txcsm);
2108 if (netif_queue_stopped(dev))
2109 netif_wake_queue(dev);
2112 ap->tx_ret_csm = txcsm;
2114 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2116 * We could try to make it before. In this case we would get
2117 * the following race condition: hard_start_xmit on other cpu
2118 * enters after we advanced tx_ret_csm and fills space,
2119 * which we have just freed, so that we make illegal device wakeup.
2120 * There is no good way to workaround this (at entry
2121 * to ace_start_xmit detects this condition and prevents
2122 * ring corruption, but it is not a good workaround.)
2124 * When tx_ret_csm is advanced after, we wake up device _only_
2125 * if we really have some space in ring (though the core doing
2126 * hard_start_xmit can see full ring for some period and has to
2127 * synchronize.) Superb.
2128 * BUT! We get another subtle race condition. hard_start_xmit
2129 * may think that ring is full between wakeup and advancing
2130 * tx_ret_csm and will stop device instantly! It is not so bad.
2131 * We are guaranteed that there is something in ring, so that
2132 * the next irq will resume transmission. To speedup this we could
2133 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2134 * (see ace_start_xmit).
2136 * Well, this dilemma exists in all lock-free devices.
2137 * We, following scheme used in drivers by Donald Becker,
2138 * select the least dangerous.
2144 static irqreturn_t ace_interrupt(int irq, void *dev_id)
2146 struct net_device *dev = (struct net_device *)dev_id;
2147 struct ace_private *ap = netdev_priv(dev);
2148 struct ace_regs __iomem *regs = ap->regs;
2150 u32 txcsm, rxretcsm, rxretprd;
2154 * In case of PCI shared interrupts or spurious interrupts,
2155 * we want to make sure it is actually our interrupt before
2156 * spending any time in here.
2158 if (!(readl(®s->HostCtrl) & IN_INT))
2162 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2163 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2164 * writel(0, ®s->Mb0Lo).
2166 * "IRQ avoidance" recommended in docs applies to IRQs served
2167 * threads and it is wrong even for that case.
2169 writel(0, ®s->Mb0Lo);
2170 readl(®s->Mb0Lo);
2173 * There is no conflict between transmit handling in
2174 * start_xmit and receive processing, thus there is no reason
2175 * to take a spin lock for RX handling. Wait until we start
2176 * working on the other stuff - hey we don't need a spin lock
2179 rxretprd = *ap->rx_ret_prd;
2180 rxretcsm = ap->cur_rx;
2182 if (rxretprd != rxretcsm)
2183 ace_rx_int(dev, rxretprd, rxretcsm);
2185 txcsm = *ap->tx_csm;
2186 idx = ap->tx_ret_csm;
2190 * If each skb takes only one descriptor this check degenerates
2191 * to identity, because new space has just been opened.
2192 * But if skbs are fragmented we must check that this index
2193 * update releases enough of space, otherwise we just
2194 * wait for device to make more work.
2196 if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2197 ace_tx_int(dev, txcsm, idx);
2200 evtcsm = readl(®s->EvtCsm);
2201 evtprd = *ap->evt_prd;
2203 if (evtcsm != evtprd) {
2204 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2205 writel(evtcsm, ®s->EvtCsm);
2209 * This has to go last in the interrupt handler and run with
2210 * the spin lock released ... what lock?
2212 if (netif_running(dev)) {
2214 int run_tasklet = 0;
2216 cur_size = atomic_read(&ap->cur_rx_bufs);
2217 if (cur_size < RX_LOW_STD_THRES) {
2218 if ((cur_size < RX_PANIC_STD_THRES) &&
2219 !test_and_set_bit(0, &ap->std_refill_busy)) {
2221 printk("low on std buffers %i\n", cur_size);
2223 ace_load_std_rx_ring(ap,
2224 RX_RING_SIZE - cur_size);
2229 if (!ACE_IS_TIGON_I(ap)) {
2230 cur_size = atomic_read(&ap->cur_mini_bufs);
2231 if (cur_size < RX_LOW_MINI_THRES) {
2232 if ((cur_size < RX_PANIC_MINI_THRES) &&
2233 !test_and_set_bit(0,
2234 &ap->mini_refill_busy)) {
2236 printk("low on mini buffers %i\n",
2239 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
2246 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2247 if (cur_size < RX_LOW_JUMBO_THRES) {
2248 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2249 !test_and_set_bit(0,
2250 &ap->jumbo_refill_busy)){
2252 printk("low on jumbo buffers %i\n",
2255 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
2260 if (run_tasklet && !ap->tasklet_pending) {
2261 ap->tasklet_pending = 1;
2262 tasklet_schedule(&ap->ace_tasklet);
2271 static void ace_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
2273 struct ace_private *ap = netdev_priv(dev);
2274 unsigned long flags;
2276 local_irq_save(flags);
2281 ace_unmask_irq(dev);
2282 local_irq_restore(flags);
2284 #endif /* ACENIC_DO_VLAN */
2287 static int ace_open(struct net_device *dev)
2289 struct ace_private *ap = netdev_priv(dev);
2290 struct ace_regs __iomem *regs = ap->regs;
2293 if (!(ap->fw_running)) {
2294 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2298 writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);
2300 cmd.evt = C_CLEAR_STATS;
2303 ace_issue_cmd(regs, &cmd);
2305 cmd.evt = C_HOST_STATE;
2306 cmd.code = C_C_STACK_UP;
2308 ace_issue_cmd(regs, &cmd);
2311 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2312 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2314 if (dev->flags & IFF_PROMISC) {
2315 cmd.evt = C_SET_PROMISC_MODE;
2316 cmd.code = C_C_PROMISC_ENABLE;
2318 ace_issue_cmd(regs, &cmd);
2326 cmd.evt = C_LNK_NEGOTIATION;
2329 ace_issue_cmd(regs, &cmd);
2332 netif_start_queue(dev);
2335 * Setup the bottom half rx ring refill handler
2337 tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2342 static int ace_close(struct net_device *dev)
2344 struct ace_private *ap = netdev_priv(dev);
2345 struct ace_regs __iomem *regs = ap->regs;
2347 unsigned long flags;
2351 * Without (or before) releasing irq and stopping hardware, this
2352 * is an absolute non-sense, by the way. It will be reset instantly
2355 netif_stop_queue(dev);
2359 cmd.evt = C_SET_PROMISC_MODE;
2360 cmd.code = C_C_PROMISC_DISABLE;
2362 ace_issue_cmd(regs, &cmd);
2366 cmd.evt = C_HOST_STATE;
2367 cmd.code = C_C_STACK_DOWN;
2369 ace_issue_cmd(regs, &cmd);
2371 tasklet_kill(&ap->ace_tasklet);
2374 * Make sure one CPU is not processing packets while
2375 * buffers are being released by another.
2378 local_irq_save(flags);
2381 for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2382 struct sk_buff *skb;
2384 struct tx_ring_info *info;
2386 info = ap->skb->tx_skbuff + i;
2388 mapping = pci_unmap_addr(info, mapping);
2391 if (ACE_IS_TIGON_I(ap)) {
2392 struct tx_desc __iomem *tx
2393 = (struct tx_desc __iomem *) &ap->tx_ring[i];
2394 writel(0, &tx->addr.addrhi);
2395 writel(0, &tx->addr.addrlo);
2396 writel(0, &tx->flagsize);
2398 memset(ap->tx_ring + i, 0,
2399 sizeof(struct tx_desc));
2400 pci_unmap_page(ap->pdev, mapping,
2401 pci_unmap_len(info, maplen),
2403 pci_unmap_addr_set(info, mapping, 0);
2412 cmd.evt = C_RESET_JUMBO_RNG;
2415 ace_issue_cmd(regs, &cmd);
2418 ace_unmask_irq(dev);
2419 local_irq_restore(flags);
2425 static inline dma_addr_t
2426 ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2427 struct sk_buff *tail, u32 idx)
2430 struct tx_ring_info *info;
2432 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
2433 offset_in_page(skb->data),
2434 skb->len, PCI_DMA_TODEVICE);
2436 info = ap->skb->tx_skbuff + idx;
2438 pci_unmap_addr_set(info, mapping, mapping);
2439 pci_unmap_len_set(info, maplen, skb->len);
2445 ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2446 u32 flagsize, u32 vlan_tag)
2448 #if !USE_TX_COAL_NOW
2449 flagsize &= ~BD_FLG_COAL_NOW;
2452 if (ACE_IS_TIGON_I(ap)) {
2453 struct tx_desc __iomem *io = (struct tx_desc __iomem *) desc;
2454 writel(addr >> 32, &io->addr.addrhi);
2455 writel(addr & 0xffffffff, &io->addr.addrlo);
2456 writel(flagsize, &io->flagsize);
2458 writel(vlan_tag, &io->vlanres);
2461 desc->addr.addrhi = addr >> 32;
2462 desc->addr.addrlo = addr;
2463 desc->flagsize = flagsize;
2465 desc->vlanres = vlan_tag;
2471 static int ace_start_xmit(struct sk_buff *skb, struct net_device *dev)
2473 struct ace_private *ap = netdev_priv(dev);
2474 struct ace_regs __iomem *regs = ap->regs;
2475 struct tx_desc *desc;
2477 unsigned long maxjiff = jiffies + 3*HZ;
2482 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2485 if (!skb_shinfo(skb)->nr_frags) {
2489 mapping = ace_map_tx_skb(ap, skb, skb, idx);
2490 flagsize = (skb->len << 16) | (BD_FLG_END);
2491 if (skb->ip_summed == CHECKSUM_PARTIAL)
2492 flagsize |= BD_FLG_TCP_UDP_SUM;
2494 if (vlan_tx_tag_present(skb)) {
2495 flagsize |= BD_FLG_VLAN_TAG;
2496 vlan_tag = vlan_tx_tag_get(skb);
2499 desc = ap->tx_ring + idx;
2500 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2502 /* Look at ace_tx_int for explanations. */
2503 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2504 flagsize |= BD_FLG_COAL_NOW;
2506 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2512 mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2513 flagsize = (skb_headlen(skb) << 16);
2514 if (skb->ip_summed == CHECKSUM_PARTIAL)
2515 flagsize |= BD_FLG_TCP_UDP_SUM;
2517 if (vlan_tx_tag_present(skb)) {
2518 flagsize |= BD_FLG_VLAN_TAG;
2519 vlan_tag = vlan_tx_tag_get(skb);
2523 ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);
2525 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2527 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2528 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2529 struct tx_ring_info *info;
2532 info = ap->skb->tx_skbuff + idx;
2533 desc = ap->tx_ring + idx;
2535 mapping = pci_map_page(ap->pdev, frag->page,
2536 frag->page_offset, frag->size,
2539 flagsize = (frag->size << 16);
2540 if (skb->ip_summed == CHECKSUM_PARTIAL)
2541 flagsize |= BD_FLG_TCP_UDP_SUM;
2542 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2544 if (i == skb_shinfo(skb)->nr_frags - 1) {
2545 flagsize |= BD_FLG_END;
2546 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2547 flagsize |= BD_FLG_COAL_NOW;
2550 * Only the last fragment frees
2557 pci_unmap_addr_set(info, mapping, mapping);
2558 pci_unmap_len_set(info, maplen, frag->size);
2559 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2565 ace_set_txprd(regs, ap, idx);
2567 if (flagsize & BD_FLG_COAL_NOW) {
2568 netif_stop_queue(dev);
2571 * A TX-descriptor producer (an IRQ) might have gotten
2572 * inbetween, making the ring free again. Since xmit is
2573 * serialized, this is the only situation we have to
2576 if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2577 netif_wake_queue(dev);
2580 dev->trans_start = jiffies;
2581 return NETDEV_TX_OK;
2585 * This race condition is unavoidable with lock-free drivers.
2586 * We wake up the queue _before_ tx_prd is advanced, so that we can
2587 * enter hard_start_xmit too early, while tx ring still looks closed.
2588 * This happens ~1-4 times per 100000 packets, so that we can allow
2589 * to loop syncing to other CPU. Probably, we need an additional
2590 * wmb() in ace_tx_intr as well.
2592 * Note that this race is relieved by reserving one more entry
2593 * in tx ring than it is necessary (see original non-SG driver).
2594 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2595 * is already overkill.
2597 * Alternative is to return with 1 not throttling queue. In this
2598 * case loop becomes longer, no more useful effects.
2600 if (time_before(jiffies, maxjiff)) {
2606 /* The ring is stuck full. */
2607 printk(KERN_WARNING "%s: Transmit ring stuck full\n", dev->name);
2608 return NETDEV_TX_BUSY;
2612 static int ace_change_mtu(struct net_device *dev, int new_mtu)
2614 struct ace_private *ap = netdev_priv(dev);
2615 struct ace_regs __iomem *regs = ap->regs;
2617 if (new_mtu > ACE_JUMBO_MTU)
2620 writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);
2623 if (new_mtu > ACE_STD_MTU) {
2625 printk(KERN_INFO "%s: Enabling Jumbo frame "
2626 "support\n", dev->name);
2628 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2629 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2630 ace_set_rxtx_parms(dev, 1);
2633 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2634 ace_sync_irq(dev->irq);
2635 ace_set_rxtx_parms(dev, 0);
2639 cmd.evt = C_RESET_JUMBO_RNG;
2642 ace_issue_cmd(regs, &cmd);
2649 static int ace_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2651 struct ace_private *ap = netdev_priv(dev);
2652 struct ace_regs __iomem *regs = ap->regs;
2655 memset(ecmd, 0, sizeof(struct ethtool_cmd));
2657 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2658 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2659 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2660 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2662 ecmd->port = PORT_FIBRE;
2663 ecmd->transceiver = XCVR_INTERNAL;
2665 link = readl(®s->GigLnkState);
2666 if (link & LNK_1000MB)
2667 ecmd->speed = SPEED_1000;
2669 link = readl(®s->FastLnkState);
2670 if (link & LNK_100MB)
2671 ecmd->speed = SPEED_100;
2672 else if (link & LNK_10MB)
2673 ecmd->speed = SPEED_10;
2677 if (link & LNK_FULL_DUPLEX)
2678 ecmd->duplex = DUPLEX_FULL;
2680 ecmd->duplex = DUPLEX_HALF;
2682 if (link & LNK_NEGOTIATE)
2683 ecmd->autoneg = AUTONEG_ENABLE;
2685 ecmd->autoneg = AUTONEG_DISABLE;
2689 * Current struct ethtool_cmd is insufficient
2691 ecmd->trace = readl(®s->TuneTrace);
2693 ecmd->txcoal = readl(®s->TuneTxCoalTicks);
2694 ecmd->rxcoal = readl(®s->TuneRxCoalTicks);
2696 ecmd->maxtxpkt = readl(®s->TuneMaxTxDesc);
2697 ecmd->maxrxpkt = readl(®s->TuneMaxRxDesc);
2702 static int ace_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2704 struct ace_private *ap = netdev_priv(dev);
2705 struct ace_regs __iomem *regs = ap->regs;
2708 link = readl(®s->GigLnkState);
2709 if (link & LNK_1000MB)
2712 link = readl(®s->FastLnkState);
2713 if (link & LNK_100MB)
2715 else if (link & LNK_10MB)
2721 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2722 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2723 if (!ACE_IS_TIGON_I(ap))
2724 link |= LNK_TX_FLOW_CTL_Y;
2725 if (ecmd->autoneg == AUTONEG_ENABLE)
2726 link |= LNK_NEGOTIATE;
2727 if (ecmd->speed != speed) {
2728 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2742 if (ecmd->duplex == DUPLEX_FULL)
2743 link |= LNK_FULL_DUPLEX;
2745 if (link != ap->link) {
2747 printk(KERN_INFO "%s: Renegotiating link state\n",
2751 writel(link, ®s->TuneLink);
2752 if (!ACE_IS_TIGON_I(ap))
2753 writel(link, ®s->TuneFastLink);
2756 cmd.evt = C_LNK_NEGOTIATION;
2759 ace_issue_cmd(regs, &cmd);
2764 static void ace_get_drvinfo(struct net_device *dev,
2765 struct ethtool_drvinfo *info)
2767 struct ace_private *ap = netdev_priv(dev);
2769 strlcpy(info->driver, "acenic", sizeof(info->driver));
2770 snprintf(info->version, sizeof(info->version), "%i.%i.%i",
2771 tigonFwReleaseMajor, tigonFwReleaseMinor,
2775 strlcpy(info->bus_info, pci_name(ap->pdev),
2776 sizeof(info->bus_info));
2781 * Set the hardware MAC address.
2783 static int ace_set_mac_addr(struct net_device *dev, void *p)
2785 struct ace_private *ap = netdev_priv(dev);
2786 struct ace_regs __iomem *regs = ap->regs;
2787 struct sockaddr *addr=p;
2791 if(netif_running(dev))
2794 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2796 da = (u8 *)dev->dev_addr;
2798 writel(da[0] << 8 | da[1], ®s->MacAddrHi);
2799 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2802 cmd.evt = C_SET_MAC_ADDR;
2805 ace_issue_cmd(regs, &cmd);
2811 static void ace_set_multicast_list(struct net_device *dev)
2813 struct ace_private *ap = netdev_priv(dev);
2814 struct ace_regs __iomem *regs = ap->regs;
2817 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2818 cmd.evt = C_SET_MULTICAST_MODE;
2819 cmd.code = C_C_MCAST_ENABLE;
2821 ace_issue_cmd(regs, &cmd);
2823 } else if (ap->mcast_all) {
2824 cmd.evt = C_SET_MULTICAST_MODE;
2825 cmd.code = C_C_MCAST_DISABLE;
2827 ace_issue_cmd(regs, &cmd);
2831 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2832 cmd.evt = C_SET_PROMISC_MODE;
2833 cmd.code = C_C_PROMISC_ENABLE;
2835 ace_issue_cmd(regs, &cmd);
2837 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2838 cmd.evt = C_SET_PROMISC_MODE;
2839 cmd.code = C_C_PROMISC_DISABLE;
2841 ace_issue_cmd(regs, &cmd);
2846 * For the time being multicast relies on the upper layers
2847 * filtering it properly. The Firmware does not allow one to
2848 * set the entire multicast list at a time and keeping track of
2849 * it here is going to be messy.
2851 if ((dev->mc_count) && !(ap->mcast_all)) {
2852 cmd.evt = C_SET_MULTICAST_MODE;
2853 cmd.code = C_C_MCAST_ENABLE;
2855 ace_issue_cmd(regs, &cmd);
2856 }else if (!ap->mcast_all) {
2857 cmd.evt = C_SET_MULTICAST_MODE;
2858 cmd.code = C_C_MCAST_DISABLE;
2860 ace_issue_cmd(regs, &cmd);
2865 static struct net_device_stats *ace_get_stats(struct net_device *dev)
2867 struct ace_private *ap = netdev_priv(dev);
2868 struct ace_mac_stats __iomem *mac_stats =
2869 (struct ace_mac_stats __iomem *)ap->regs->Stats;
2871 ap->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2872 ap->stats.multicast = readl(&mac_stats->kept_mc);
2873 ap->stats.collisions = readl(&mac_stats->coll);
2879 static void __devinit ace_copy(struct ace_regs __iomem *regs, void *src,
2882 void __iomem *tdest;
2890 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2891 min_t(u32, size, ACE_WINDOW_SIZE));
2892 tdest = (void __iomem *) ®s->Window +
2893 (dest & (ACE_WINDOW_SIZE - 1));
2894 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2896 * This requires byte swapping on big endian, however
2897 * writel does that for us
2900 for (i = 0; i < (tsize / 4); i++) {
2901 writel(wsrc[i], tdest + i*4);
2912 static void __devinit ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2914 void __iomem *tdest;
2921 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2922 min_t(u32, size, ACE_WINDOW_SIZE));
2923 tdest = (void __iomem *) ®s->Window +
2924 (dest & (ACE_WINDOW_SIZE - 1));
2925 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2927 for (i = 0; i < (tsize / 4); i++) {
2928 writel(0, tdest + i*4);
2940 * Download the firmware into the SRAM on the NIC
2942 * This operation requires the NIC to be halted and is performed with
2943 * interrupts disabled and with the spinlock hold.
2945 int __devinit ace_load_firmware(struct net_device *dev)
2947 struct ace_private *ap = netdev_priv(dev);
2948 struct ace_regs __iomem *regs = ap->regs;
2950 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
2951 printk(KERN_ERR "%s: trying to download firmware while the "
2952 "CPU is running!\n", ap->name);
2957 * Do not try to clear more than 512KB or we end up seeing
2958 * funny things on NICs with only 512KB SRAM
2960 ace_clear(regs, 0x2000, 0x80000-0x2000);
2961 if (ACE_IS_TIGON_I(ap)) {
2962 ace_copy(regs, tigonFwText, tigonFwTextAddr, tigonFwTextLen);
2963 ace_copy(regs, tigonFwData, tigonFwDataAddr, tigonFwDataLen);
2964 ace_copy(regs, tigonFwRodata, tigonFwRodataAddr,
2966 ace_clear(regs, tigonFwBssAddr, tigonFwBssLen);
2967 ace_clear(regs, tigonFwSbssAddr, tigonFwSbssLen);
2968 }else if (ap->version == 2) {
2969 ace_clear(regs, tigon2FwBssAddr, tigon2FwBssLen);
2970 ace_clear(regs, tigon2FwSbssAddr, tigon2FwSbssLen);
2971 ace_copy(regs, tigon2FwText, tigon2FwTextAddr,tigon2FwTextLen);
2972 ace_copy(regs, tigon2FwRodata, tigon2FwRodataAddr,
2974 ace_copy(regs, tigon2FwData, tigon2FwDataAddr,tigon2FwDataLen);
2982 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
2984 * Accessing the EEPROM is `interesting' to say the least - don't read
2985 * this code right after dinner.
2987 * This is all about black magic and bit-banging the device .... I
2988 * wonder in what hospital they have put the guy who designed the i2c
2991 * Oh yes, this is only the beginning!
2993 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
2994 * code i2c readout code by beta testing all my hacks.
2996 static void __devinit eeprom_start(struct ace_regs __iomem *regs)
3000 readl(®s->LocalCtrl);
3001 udelay(ACE_SHORT_DELAY);
3002 local = readl(®s->LocalCtrl);
3003 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
3004 writel(local, ®s->LocalCtrl);
3005 readl(®s->LocalCtrl);
3007 udelay(ACE_SHORT_DELAY);
3008 local |= EEPROM_CLK_OUT;
3009 writel(local, ®s->LocalCtrl);
3010 readl(®s->LocalCtrl);
3012 udelay(ACE_SHORT_DELAY);
3013 local &= ~EEPROM_DATA_OUT;
3014 writel(local, ®s->LocalCtrl);
3015 readl(®s->LocalCtrl);
3017 udelay(ACE_SHORT_DELAY);
3018 local &= ~EEPROM_CLK_OUT;
3019 writel(local, ®s->LocalCtrl);
3020 readl(®s->LocalCtrl);
3025 static void __devinit eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
3030 udelay(ACE_SHORT_DELAY);
3031 local = readl(®s->LocalCtrl);
3032 local &= ~EEPROM_DATA_OUT;
3033 local |= EEPROM_WRITE_ENABLE;
3034 writel(local, ®s->LocalCtrl);
3035 readl(®s->LocalCtrl);
3038 for (i = 0; i < 8; i++, magic <<= 1) {
3039 udelay(ACE_SHORT_DELAY);
3041 local |= EEPROM_DATA_OUT;
3043 local &= ~EEPROM_DATA_OUT;
3044 writel(local, ®s->LocalCtrl);
3045 readl(®s->LocalCtrl);
3048 udelay(ACE_SHORT_DELAY);
3049 local |= EEPROM_CLK_OUT;
3050 writel(local, ®s->LocalCtrl);
3051 readl(®s->LocalCtrl);
3053 udelay(ACE_SHORT_DELAY);
3054 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3055 writel(local, ®s->LocalCtrl);
3056 readl(®s->LocalCtrl);
3062 static int __devinit eeprom_check_ack(struct ace_regs __iomem *regs)
3067 local = readl(®s->LocalCtrl);
3068 local &= ~EEPROM_WRITE_ENABLE;
3069 writel(local, ®s->LocalCtrl);
3070 readl(®s->LocalCtrl);
3072 udelay(ACE_LONG_DELAY);
3073 local |= EEPROM_CLK_OUT;
3074 writel(local, ®s->LocalCtrl);
3075 readl(®s->LocalCtrl);
3077 udelay(ACE_SHORT_DELAY);
3078 /* sample data in middle of high clk */
3079 state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
3080 udelay(ACE_SHORT_DELAY);
3082 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3083 readl(®s->LocalCtrl);
3090 static void __devinit eeprom_stop(struct ace_regs __iomem *regs)
3094 udelay(ACE_SHORT_DELAY);
3095 local = readl(®s->LocalCtrl);
3096 local |= EEPROM_WRITE_ENABLE;
3097 writel(local, ®s->LocalCtrl);
3098 readl(®s->LocalCtrl);
3100 udelay(ACE_SHORT_DELAY);
3101 local &= ~EEPROM_DATA_OUT;
3102 writel(local, ®s->LocalCtrl);
3103 readl(®s->LocalCtrl);
3105 udelay(ACE_SHORT_DELAY);
3106 local |= EEPROM_CLK_OUT;
3107 writel(local, ®s->LocalCtrl);
3108 readl(®s->LocalCtrl);
3110 udelay(ACE_SHORT_DELAY);
3111 local |= EEPROM_DATA_OUT;
3112 writel(local, ®s->LocalCtrl);
3113 readl(®s->LocalCtrl);
3115 udelay(ACE_LONG_DELAY);
3116 local &= ~EEPROM_CLK_OUT;
3117 writel(local, ®s->LocalCtrl);
3123 * Read a whole byte from the EEPROM.
3125 static int __devinit read_eeprom_byte(struct net_device *dev,
3126 unsigned long offset)
3128 struct ace_private *ap = netdev_priv(dev);
3129 struct ace_regs __iomem *regs = ap->regs;
3130 unsigned long flags;
3136 printk(KERN_ERR "No device!\n");
3142 * Don't take interrupts on this CPU will bit banging
3143 * the %#%#@$ I2C device
3145 local_irq_save(flags);
3149 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3150 if (eeprom_check_ack(regs)) {
3151 local_irq_restore(flags);
3152 printk(KERN_ERR "%s: Unable to sync eeprom\n", ap->name);
3154 goto eeprom_read_error;
3157 eeprom_prep(regs, (offset >> 8) & 0xff);
3158 if (eeprom_check_ack(regs)) {
3159 local_irq_restore(flags);
3160 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3163 goto eeprom_read_error;
3166 eeprom_prep(regs, offset & 0xff);
3167 if (eeprom_check_ack(regs)) {
3168 local_irq_restore(flags);
3169 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3172 goto eeprom_read_error;
3176 eeprom_prep(regs, EEPROM_READ_SELECT);
3177 if (eeprom_check_ack(regs)) {
3178 local_irq_restore(flags);
3179 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3182 goto eeprom_read_error;
3185 for (i = 0; i < 8; i++) {
3186 local = readl(®s->LocalCtrl);
3187 local &= ~EEPROM_WRITE_ENABLE;
3188 writel(local, ®s->LocalCtrl);
3189 readl(®s->LocalCtrl);
3190 udelay(ACE_LONG_DELAY);
3192 local |= EEPROM_CLK_OUT;
3193 writel(local, ®s->LocalCtrl);
3194 readl(®s->LocalCtrl);
3196 udelay(ACE_SHORT_DELAY);
3197 /* sample data mid high clk */
3198 result = (result << 1) |
3199 ((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
3200 udelay(ACE_SHORT_DELAY);
3202 local = readl(®s->LocalCtrl);
3203 local &= ~EEPROM_CLK_OUT;
3204 writel(local, ®s->LocalCtrl);
3205 readl(®s->LocalCtrl);
3206 udelay(ACE_SHORT_DELAY);
3209 local |= EEPROM_WRITE_ENABLE;
3210 writel(local, ®s->LocalCtrl);
3211 readl(®s->LocalCtrl);
3213 udelay(ACE_SHORT_DELAY);
3217 local |= EEPROM_DATA_OUT;
3218 writel(local, ®s->LocalCtrl);
3219 readl(®s->LocalCtrl);
3221 udelay(ACE_SHORT_DELAY);
3222 writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
3223 readl(®s->LocalCtrl);
3224 udelay(ACE_LONG_DELAY);
3225 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3226 readl(®s->LocalCtrl);
3228 udelay(ACE_SHORT_DELAY);
3231 local_irq_restore(flags);
3236 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3244 * compile-command: "gcc -D__SMP__ -D__KERNEL__ -DMODULE -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -DMODVERSIONS -include ../../include/linux/modversions.h -c -o acenic.o acenic.c"