1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
7 #ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H
8 #define __LINUX_MTD_SPI_NOR_INTERNAL_H
12 #define SPI_NOR_MAX_ID_LEN 6
14 * 256 bytes is a sane default for most older flashes. Newer flashes will
15 * have the page size defined within their SFDP tables.
17 #define SPI_NOR_DEFAULT_PAGE_SIZE 256
18 #define SPI_NOR_DEFAULT_N_BANKS 1
19 #define SPI_NOR_DEFAULT_SECTOR_SIZE SZ_64K
21 /* Standard SPI NOR flash operations. */
22 #define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \
23 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 0), \
24 SPI_MEM_OP_ADDR(naddr, 0, 0), \
25 SPI_MEM_OP_DUMMY(ndummy, 0), \
26 SPI_MEM_OP_DATA_IN(len, buf, 0))
28 #define SPI_NOR_WREN_OP \
29 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREN, 0), \
31 SPI_MEM_OP_NO_DUMMY, \
34 #define SPI_NOR_WRDI_OP \
35 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRDI, 0), \
37 SPI_MEM_OP_NO_DUMMY, \
40 #define SPI_NOR_RDSR_OP(buf) \
41 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0), \
43 SPI_MEM_OP_NO_DUMMY, \
44 SPI_MEM_OP_DATA_IN(1, buf, 0))
46 #define SPI_NOR_WRSR_OP(buf, len) \
47 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 0), \
49 SPI_MEM_OP_NO_DUMMY, \
50 SPI_MEM_OP_DATA_OUT(len, buf, 0))
52 #define SPI_NOR_RDSR2_OP(buf) \
53 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 0), \
55 SPI_MEM_OP_NO_DUMMY, \
56 SPI_MEM_OP_DATA_OUT(1, buf, 0))
58 #define SPI_NOR_WRSR2_OP(buf) \
59 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 0), \
61 SPI_MEM_OP_NO_DUMMY, \
62 SPI_MEM_OP_DATA_OUT(1, buf, 0))
64 #define SPI_NOR_RDCR_OP(buf) \
65 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 0), \
67 SPI_MEM_OP_NO_DUMMY, \
68 SPI_MEM_OP_DATA_IN(1, buf, 0))
70 #define SPI_NOR_EN4B_EX4B_OP(enable) \
71 SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B, 0), \
73 SPI_MEM_OP_NO_DUMMY, \
76 #define SPI_NOR_BRWR_OP(buf) \
77 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_BRWR, 0), \
79 SPI_MEM_OP_NO_DUMMY, \
80 SPI_MEM_OP_DATA_OUT(1, buf, 0))
82 #define SPI_NOR_GBULK_OP \
83 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_GBULK, 0), \
85 SPI_MEM_OP_NO_DUMMY, \
88 #define SPI_NOR_DIE_ERASE_OP(opcode, addr_nbytes, addr, dice) \
89 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
90 SPI_MEM_OP_ADDR(dice ? addr_nbytes : 0, addr, 0), \
91 SPI_MEM_OP_NO_DUMMY, \
94 #define SPI_NOR_SECTOR_ERASE_OP(opcode, addr_nbytes, addr) \
95 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
96 SPI_MEM_OP_ADDR(addr_nbytes, addr, 0), \
97 SPI_MEM_OP_NO_DUMMY, \
100 #define SPI_NOR_READ_OP(opcode) \
101 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
102 SPI_MEM_OP_ADDR(3, 0, 0), \
103 SPI_MEM_OP_DUMMY(1, 0), \
104 SPI_MEM_OP_DATA_IN(2, NULL, 0))
106 #define SPI_NOR_PP_OP(opcode) \
107 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
108 SPI_MEM_OP_ADDR(3, 0, 0), \
109 SPI_MEM_OP_NO_DUMMY, \
110 SPI_MEM_OP_DATA_OUT(2, NULL, 0))
112 #define SPINOR_SRSTEN_OP \
113 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0), \
114 SPI_MEM_OP_NO_DUMMY, \
115 SPI_MEM_OP_NO_ADDR, \
118 #define SPINOR_SRST_OP \
119 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRST, 0), \
120 SPI_MEM_OP_NO_DUMMY, \
121 SPI_MEM_OP_NO_ADDR, \
124 /* Keep these in sync with the list in debugfs.c */
125 enum spi_nor_option_flags {
126 SNOR_F_HAS_SR_TB = BIT(0),
127 SNOR_F_NO_OP_CHIP_ERASE = BIT(1),
128 SNOR_F_BROKEN_RESET = BIT(2),
129 SNOR_F_4B_OPCODES = BIT(3),
130 SNOR_F_HAS_4BAIT = BIT(4),
131 SNOR_F_HAS_LOCK = BIT(5),
132 SNOR_F_HAS_16BIT_SR = BIT(6),
133 SNOR_F_NO_READ_CR = BIT(7),
134 SNOR_F_HAS_SR_TB_BIT6 = BIT(8),
135 SNOR_F_HAS_4BIT_BP = BIT(9),
136 SNOR_F_HAS_SR_BP3_BIT6 = BIT(10),
137 SNOR_F_IO_MODE_EN_VOLATILE = BIT(11),
138 SNOR_F_SOFT_RESET = BIT(12),
139 SNOR_F_SWP_IS_VOLATILE = BIT(13),
140 SNOR_F_RWW = BIT(14),
141 SNOR_F_ECC = BIT(15),
142 SNOR_F_NO_WP = BIT(16),
145 struct spi_nor_read_command {
149 enum spi_nor_protocol proto;
152 struct spi_nor_pp_command {
154 enum spi_nor_protocol proto;
157 enum spi_nor_read_command_index {
160 SNOR_CMD_READ_1_1_1_DTR,
166 SNOR_CMD_READ_1_2_2_DTR,
172 SNOR_CMD_READ_1_4_4_DTR,
178 SNOR_CMD_READ_1_8_8_DTR,
179 SNOR_CMD_READ_8_8_8_DTR,
184 enum spi_nor_pp_command_index {
196 SNOR_CMD_PP_8_8_8_DTR,
202 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
203 * @size: the size of the sector/block erased by the erase type.
204 * JEDEC JESD216B imposes erase sizes to be a power of 2.
205 * @size_shift: @size is a power of 2, the shift is stored in
207 * @size_mask: the size mask based on @size_shift.
208 * @opcode: the SPI command op code to erase the sector/block.
209 * @idx: Erase Type index as sorted in the Basic Flash Parameter
210 * Table. It will be used to synchronize the supported
211 * Erase Types with the ones identified in the SFDP
214 struct spi_nor_erase_type {
223 * struct spi_nor_erase_command - Used for non-uniform erases
224 * The structure is used to describe a list of erase commands to be executed
225 * once we validate that the erase can be performed. The elements in the list
226 * are run-length encoded.
227 * @list: for inclusion into the list of erase commands.
228 * @count: how many times the same erase command should be
229 * consecutively used.
230 * @size: the size of the sector/block erased by the command.
231 * @opcode: the SPI command op code to erase the sector/block.
233 struct spi_nor_erase_command {
234 struct list_head list;
241 * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region
242 * @offset: the offset in the data array of erase region start.
243 * LSB bits are used as a bitmask encoding flags to
244 * determine if this region is overlaid, if this region is
245 * the last in the SPI NOR flash memory and to indicate
246 * all the supported erase commands inside this region.
247 * The erase types are sorted in ascending order with the
248 * smallest Erase Type size being at BIT(0).
249 * @size: the size of the region in bytes.
251 struct spi_nor_erase_region {
256 #define SNOR_ERASE_TYPE_MAX 4
257 #define SNOR_ERASE_TYPE_MASK GENMASK_ULL(SNOR_ERASE_TYPE_MAX - 1, 0)
259 #define SNOR_LAST_REGION BIT(4)
260 #define SNOR_OVERLAID_REGION BIT(5)
262 #define SNOR_ERASE_FLAGS_MAX 6
263 #define SNOR_ERASE_FLAGS_MASK GENMASK_ULL(SNOR_ERASE_FLAGS_MAX - 1, 0)
266 * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map
267 * @regions: array of erase regions. The regions are consecutive in
268 * address space. Walking through the regions is done
270 * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform
271 * sector size (legacy implementation).
272 * @erase_type: an array of erase types shared by all the regions.
273 * The erase types are sorted in ascending order, with the
274 * smallest Erase Type size being the first member in the
276 * @uniform_erase_type: bitmask encoding erase types that can erase the
277 * entire memory. This member is completed at init by
278 * uniform and non-uniform SPI NOR flash memories if they
279 * support at least one erase type that can erase the
282 struct spi_nor_erase_map {
283 struct spi_nor_erase_region *regions;
284 struct spi_nor_erase_region uniform_region;
285 struct spi_nor_erase_type erase_type[SNOR_ERASE_TYPE_MAX];
286 u8 uniform_erase_type;
290 * struct spi_nor_locking_ops - SPI NOR locking methods
291 * @lock: lock a region of the SPI NOR.
292 * @unlock: unlock a region of the SPI NOR.
293 * @is_locked: check if a region of the SPI NOR is completely locked
295 struct spi_nor_locking_ops {
296 int (*lock)(struct spi_nor *nor, loff_t ofs, u64 len);
297 int (*unlock)(struct spi_nor *nor, loff_t ofs, u64 len);
298 int (*is_locked)(struct spi_nor *nor, loff_t ofs, u64 len);
302 * struct spi_nor_otp_organization - Structure to describe the SPI NOR OTP regions
303 * @len: size of one OTP region in bytes.
304 * @base: start address of the OTP area.
305 * @offset: offset between consecutive OTP regions if there are more
307 * @n_regions: number of individual OTP regions.
309 struct spi_nor_otp_organization {
313 unsigned int n_regions;
317 * struct spi_nor_otp_ops - SPI NOR OTP methods
318 * @read: read from the SPI NOR OTP area.
319 * @write: write to the SPI NOR OTP area.
320 * @lock: lock an OTP region.
321 * @erase: erase an OTP region.
322 * @is_locked: check if an OTP region of the SPI NOR is locked.
324 struct spi_nor_otp_ops {
325 int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
326 int (*write)(struct spi_nor *nor, loff_t addr, size_t len,
328 int (*lock)(struct spi_nor *nor, unsigned int region);
329 int (*erase)(struct spi_nor *nor, loff_t addr);
330 int (*is_locked)(struct spi_nor *nor, unsigned int region);
334 * struct spi_nor_otp - SPI NOR OTP grouping structure
335 * @org: OTP region organization
336 * @ops: OTP access ops
339 const struct spi_nor_otp_organization *org;
340 const struct spi_nor_otp_ops *ops;
344 * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
345 * Includes legacy flash parameters and settings that can be overwritten
346 * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216
347 * Serial Flash Discoverable Parameters (SFDP) tables.
349 * @bank_size: the flash memory bank density in bytes.
350 * @size: the total flash memory density in bytes.
351 * @writesize Minimal writable flash unit size. Defaults to 1. Set to
352 * ECC unit size for ECC-ed flashes.
353 * @page_size: the page size of the SPI NOR flash memory.
354 * @addr_nbytes: number of address bytes to send.
355 * @addr_mode_nbytes: number of address bytes of current address mode. Useful
356 * when the flash operates with 4B opcodes but needs the
357 * internal address mode for opcodes that don't have a 4B
358 * opcode correspondent.
359 * @rdsr_dummy: dummy cycles needed for Read Status Register command
361 * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register
362 * command in octal DTR mode.
363 * @n_banks: number of banks.
364 * @n_dice: number of dice in the flash memory.
365 * @die_erase_opcode: die erase opcode. Defaults to SPINOR_OP_CHIP_ERASE.
366 * @vreg_offset: volatile register offset for each die.
367 * @hwcaps: describes the read and page program hardware
369 * @reads: read capabilities ordered by priority: the higher index
370 * in the array, the higher priority.
371 * @page_programs: page program capabilities ordered by priority: the
372 * higher index in the array, the higher priority.
373 * @erase_map: the erase map parsed from the SFDP Sector Map Parameter
375 * @otp: SPI NOR OTP info.
376 * @set_octal_dtr: enables or disables SPI NOR octal DTR mode.
377 * @quad_enable: enables SPI NOR quad mode.
378 * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
379 * @convert_addr: converts an absolute address into something the flash
380 * will understand. Particularly useful when pagesize is
382 * @setup: (optional) configures the SPI NOR memory. Useful for
383 * SPI NOR flashes that have peculiarities to the SPI NOR
384 * standard e.g. different opcodes, specific address
385 * calculation, page size, etc.
386 * @ready: (optional) flashes might use a different mechanism
387 * than reading the status register to indicate they
388 * are ready for a new command
389 * @locking_ops: SPI NOR locking methods.
390 * @priv: flash's private data.
392 struct spi_nor_flash_parameter {
406 struct spi_nor_hwcaps hwcaps;
407 struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
408 struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
410 struct spi_nor_erase_map erase_map;
411 struct spi_nor_otp otp;
413 int (*set_octal_dtr)(struct spi_nor *nor, bool enable);
414 int (*quad_enable)(struct spi_nor *nor);
415 int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
416 u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
417 int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps);
418 int (*ready)(struct spi_nor *nor);
420 const struct spi_nor_locking_ops *locking_ops;
425 * struct spi_nor_fixups - SPI NOR fixup hooks
426 * @default_init: called after default flash parameters init. Used to tweak
427 * flash parameters when information provided by the flash_info
428 * table is incomplete or wrong.
429 * @post_bfpt: called after the BFPT table has been parsed
430 * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs
431 * that do not support RDSFDP). Typically used to tweak various
432 * parameters that could not be extracted by other means (i.e.
433 * when information provided by the SFDP/flash_info tables are
434 * incomplete or wrong).
435 * @late_init: used to initialize flash parameters that are not declared in the
436 * JESD216 SFDP standard, or where SFDP tables not defined at all.
437 * Will replace the default_init() hook.
439 * Those hooks can be used to tweak the SPI NOR configuration when the SFDP
440 * table is broken or not available.
442 struct spi_nor_fixups {
443 void (*default_init)(struct spi_nor *nor);
444 int (*post_bfpt)(struct spi_nor *nor,
445 const struct sfdp_parameter_header *bfpt_header,
446 const struct sfdp_bfpt *bfpt);
447 int (*post_sfdp)(struct spi_nor *nor);
448 int (*late_init)(struct spi_nor *nor);
452 * struct spi_nor_id - SPI NOR flash ID.
454 * @bytes: the bytes returned by the flash when issuing command 9F. Typically,
455 * the first byte is the manufacturer ID code (see JEP106) and the next
456 * two bytes are a flash part specific ID.
457 * @len: the number of bytes of ID.
465 * struct flash_info - SPI NOR flash_info entry.
466 * @id: pointer to struct spi_nor_id or NULL, which means "no ID" (mostly
468 * @name: (obsolete) the name of the flash. Do not set it for new additions.
469 * @size: the size of the flash in bytes.
470 * @sector_size: (optional) the size listed here is what works with
471 * SPINOR_OP_SE, which isn't necessarily called a "sector" by
472 * the vendor. Defaults to 64k.
473 * @n_banks: (optional) the number of banks. Defaults to 1.
474 * @page_size: (optional) the flash's page size. Defaults to 256.
475 * @addr_nbytes: number of address bytes to send.
477 * @flags: flags that indicate support that is not defined by the
478 * JESD216 standard in its SFDP tables. Flag meanings:
479 * SPI_NOR_HAS_LOCK: flash supports lock/unlock via SR
480 * SPI_NOR_HAS_TB: flash SR has Top/Bottom (TB) protect bit. Must be
481 * used with SPI_NOR_HAS_LOCK.
482 * SPI_NOR_TB_SR_BIT6: Top/Bottom (TB) is bit 6 of status register.
483 * Must be used with SPI_NOR_HAS_TB.
484 * SPI_NOR_4BIT_BP: flash SR has 4 bit fields (BP0-3) for block
486 * SPI_NOR_BP3_SR_BIT6: BP3 is bit 6 of status register. Must be used with
488 * SPI_NOR_SWP_IS_VOLATILE: flash has volatile software write protection bits.
489 * Usually these will power-up in a write-protected
491 * SPI_NOR_NO_ERASE: no erase command needed.
492 * SPI_NOR_NO_FR: can't do fastread.
493 * SPI_NOR_QUAD_PP: flash supports Quad Input Page Program.
494 * SPI_NOR_RWW: flash supports reads while write.
496 * @no_sfdp_flags: flags that indicate support that can be discovered via SFDP.
497 * Used when SFDP tables are not defined in the flash. These
498 * flags are used together with the SPI_NOR_SKIP_SFDP flag.
499 * SPI_NOR_SKIP_SFDP: skip parsing of SFDP tables.
500 * SECT_4K: SPINOR_OP_BE_4K works uniformly.
501 * SPI_NOR_DUAL_READ: flash supports Dual Read.
502 * SPI_NOR_QUAD_READ: flash supports Quad Read.
503 * SPI_NOR_OCTAL_READ: flash supports Octal Read.
504 * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read.
505 * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program.
507 * @fixup_flags: flags that indicate support that can be discovered via SFDP
508 * ideally, but can not be discovered for this particular flash
509 * because the SFDP table that indicates this support is not
510 * defined by the flash. In case the table for this support is
511 * defined but has wrong values, one should instead use a
512 * post_sfdp() hook to set the SNOR_F equivalent flag.
514 * SPI_NOR_4B_OPCODES: use dedicated 4byte address op codes to support
515 * memory size above 128Mib.
516 * SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode
517 * via a volatile bit.
518 * @mfr_flags: manufacturer private flags. Used in the manufacturer fixup
519 * hooks to differentiate support between flashes of the same
521 * @otp_org: flash's OTP organization.
522 * @fixups: part specific fixup hooks.
526 const struct spi_nor_id *id;
528 unsigned sector_size;
534 #define SPI_NOR_HAS_LOCK BIT(0)
535 #define SPI_NOR_HAS_TB BIT(1)
536 #define SPI_NOR_TB_SR_BIT6 BIT(2)
537 #define SPI_NOR_4BIT_BP BIT(3)
538 #define SPI_NOR_BP3_SR_BIT6 BIT(4)
539 #define SPI_NOR_SWP_IS_VOLATILE BIT(5)
540 #define SPI_NOR_NO_ERASE BIT(6)
541 #define SPI_NOR_NO_FR BIT(7)
542 #define SPI_NOR_QUAD_PP BIT(8)
543 #define SPI_NOR_RWW BIT(9)
546 #define SPI_NOR_SKIP_SFDP BIT(0)
547 #define SECT_4K BIT(1)
548 #define SPI_NOR_DUAL_READ BIT(3)
549 #define SPI_NOR_QUAD_READ BIT(4)
550 #define SPI_NOR_OCTAL_READ BIT(5)
551 #define SPI_NOR_OCTAL_DTR_READ BIT(6)
552 #define SPI_NOR_OCTAL_DTR_PP BIT(7)
555 #define SPI_NOR_4B_OPCODES BIT(0)
556 #define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1)
560 const struct spi_nor_otp_organization *otp;
561 const struct spi_nor_fixups *fixups;
564 #define SNOR_ID(...) \
565 (&(const struct spi_nor_id){ \
566 .bytes = (const u8[]){ __VA_ARGS__ }, \
567 .len = sizeof((u8[]){ __VA_ARGS__ }), \
570 #define SNOR_OTP(_len, _n_regions, _base, _offset) \
571 (&(const struct spi_nor_otp_organization){ \
574 .offset = (_offset), \
575 .n_regions = (_n_regions), \
579 * struct spi_nor_manufacturer - SPI NOR manufacturer object
580 * @name: manufacturer name
581 * @parts: array of parts supported by this manufacturer
582 * @nparts: number of entries in the parts array
583 * @fixups: hooks called at various points in time during spi_nor_scan()
585 struct spi_nor_manufacturer {
587 const struct flash_info *parts;
589 const struct spi_nor_fixups *fixups;
593 * struct sfdp - SFDP data
594 * @num_dwords: number of entries in the dwords array
595 * @dwords: array of double words of the SFDP data
602 /* Manufacturer drivers. */
603 extern const struct spi_nor_manufacturer spi_nor_atmel;
604 extern const struct spi_nor_manufacturer spi_nor_eon;
605 extern const struct spi_nor_manufacturer spi_nor_esmt;
606 extern const struct spi_nor_manufacturer spi_nor_everspin;
607 extern const struct spi_nor_manufacturer spi_nor_gigadevice;
608 extern const struct spi_nor_manufacturer spi_nor_intel;
609 extern const struct spi_nor_manufacturer spi_nor_issi;
610 extern const struct spi_nor_manufacturer spi_nor_macronix;
611 extern const struct spi_nor_manufacturer spi_nor_micron;
612 extern const struct spi_nor_manufacturer spi_nor_st;
613 extern const struct spi_nor_manufacturer spi_nor_spansion;
614 extern const struct spi_nor_manufacturer spi_nor_sst;
615 extern const struct spi_nor_manufacturer spi_nor_winbond;
616 extern const struct spi_nor_manufacturer spi_nor_xilinx;
617 extern const struct spi_nor_manufacturer spi_nor_xmc;
619 extern const struct attribute_group *spi_nor_sysfs_groups[];
621 void spi_nor_spimem_setup_op(const struct spi_nor *nor,
622 struct spi_mem_op *op,
623 const enum spi_nor_protocol proto);
624 int spi_nor_write_enable(struct spi_nor *nor);
625 int spi_nor_write_disable(struct spi_nor *nor);
626 int spi_nor_set_4byte_addr_mode_en4b_ex4b(struct spi_nor *nor, bool enable);
627 int spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(struct spi_nor *nor,
629 int spi_nor_set_4byte_addr_mode_brwr(struct spi_nor *nor, bool enable);
630 int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable);
631 int spi_nor_wait_till_ready(struct spi_nor *nor);
632 int spi_nor_global_block_unlock(struct spi_nor *nor);
633 int spi_nor_prep_and_lock(struct spi_nor *nor);
634 void spi_nor_unlock_and_unprep(struct spi_nor *nor);
635 int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor);
636 int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor);
637 int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor);
638 int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id,
639 enum spi_nor_protocol reg_proto);
640 int spi_nor_read_sr(struct spi_nor *nor, u8 *sr);
641 int spi_nor_sr_ready(struct spi_nor *nor);
642 int spi_nor_read_cr(struct spi_nor *nor, u8 *cr);
643 int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len);
644 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1);
645 int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr);
647 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
649 ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
651 int spi_nor_read_any_reg(struct spi_nor *nor, struct spi_mem_op *op,
652 enum spi_nor_protocol proto);
653 int spi_nor_write_any_volatile_reg(struct spi_nor *nor, struct spi_mem_op *op,
654 enum spi_nor_protocol proto);
655 int spi_nor_erase_sector(struct spi_nor *nor, u32 addr);
657 int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
658 int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len,
660 int spi_nor_otp_erase_secr(struct spi_nor *nor, loff_t addr);
661 int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region);
662 int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region);
664 int spi_nor_hwcaps_read2cmd(u32 hwcaps);
665 int spi_nor_hwcaps_pp2cmd(u32 hwcaps);
666 u8 spi_nor_convert_3to4_read(u8 opcode);
667 void spi_nor_set_read_settings(struct spi_nor_read_command *read,
671 enum spi_nor_protocol proto);
672 void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode,
673 enum spi_nor_protocol proto);
675 void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size,
677 void spi_nor_mask_erase_type(struct spi_nor_erase_type *erase);
678 struct spi_nor_erase_region *
679 spi_nor_region_next(struct spi_nor_erase_region *region);
680 void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map,
681 u8 erase_mask, u64 flash_size);
683 int spi_nor_post_bfpt_fixups(struct spi_nor *nor,
684 const struct sfdp_parameter_header *bfpt_header,
685 const struct sfdp_bfpt *bfpt);
687 void spi_nor_init_default_locking_ops(struct spi_nor *nor);
688 void spi_nor_try_unlock_all(struct spi_nor *nor);
689 void spi_nor_set_mtd_locking_ops(struct spi_nor *nor);
690 void spi_nor_set_mtd_otp_ops(struct spi_nor *nor);
692 int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode,
693 u8 *buf, size_t len);
694 int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode,
695 const u8 *buf, size_t len);
697 int spi_nor_check_sfdp_signature(struct spi_nor *nor);
698 int spi_nor_parse_sfdp(struct spi_nor *nor);
700 static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
702 return container_of(mtd, struct spi_nor, mtd);
706 * spi_nor_needs_sfdp() - returns true if SFDP parsing is used for this flash.
708 * Return: true if SFDP parsing is needed
710 static inline bool spi_nor_needs_sfdp(const struct spi_nor *nor)
713 * The flash size is one property parsed by the SFDP. We use it as an
714 * indicator whether we need SFDP parsing for a particular flash. I.e.
715 * non-legacy flash entries in flash_info will have a size of zero iff
716 * SFDP should be used.
718 return !nor->info->size;
721 #ifdef CONFIG_DEBUG_FS
722 void spi_nor_debugfs_register(struct spi_nor *nor);
723 void spi_nor_debugfs_shutdown(void);
725 static inline void spi_nor_debugfs_register(struct spi_nor *nor) {}
726 static inline void spi_nor_debugfs_shutdown(void) {}
729 #endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */