1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the MMC / SD / SDIO IP found in:
5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
7 * Copyright (C) 2015-19 Renesas Electronics Corporation
8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
9 * Copyright (C) 2017 Horms Solutions, Simon Horman
10 * Copyright (C) 2011 Guennadi Liakhovetski
11 * Copyright (C) 2007 Ian Molton
12 * Copyright (C) 2004 Ian Molton
14 * This driver draws mainly on scattered spec sheets, Reverse engineering
15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16 * support). (Further 4 bit support from a later datasheet).
19 * Investigate using a workqueue for PIO transfers
21 * Better Power management
22 * Handle MMC errors better
23 * double buffer support
27 #include <linux/delay.h>
28 #include <linux/device.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/highmem.h>
31 #include <linux/interrupt.h>
33 #include <linux/irq.h>
34 #include <linux/mfd/tmio.h>
35 #include <linux/mmc/card.h>
36 #include <linux/mmc/host.h>
37 #include <linux/mmc/mmc.h>
38 #include <linux/mmc/slot-gpio.h>
39 #include <linux/module.h>
40 #include <linux/pagemap.h>
41 #include <linux/platform_device.h>
42 #include <linux/pm_qos.h>
43 #include <linux/pm_runtime.h>
44 #include <linux/regulator/consumer.h>
45 #include <linux/mmc/sdio.h>
46 #include <linux/scatterlist.h>
47 #include <linux/sizes.h>
48 #include <linux/spinlock.h>
49 #include <linux/workqueue.h>
53 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
54 struct mmc_data *data)
57 host->dma_ops->start(host, data);
60 static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host)
62 if (host->dma_ops && host->dma_ops->end)
63 host->dma_ops->end(host);
66 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
69 host->dma_ops->enable(host, enable);
72 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
73 struct tmio_mmc_data *pdata)
76 host->dma_ops->request(host, pdata);
83 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
86 host->dma_ops->release(host);
89 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
92 host->dma_ops->abort(host);
95 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
98 host->dma_ops->dataend(host);
101 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
103 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
104 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
106 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
108 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
110 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
111 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
113 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
115 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
117 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
120 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
122 host->sg_len = data->sg_len;
123 host->sg_ptr = data->sg;
124 host->sg_orig = data->sg;
128 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
130 host->sg_ptr = sg_next(host->sg_ptr);
132 return --host->sg_len;
135 #define CMDREQ_TIMEOUT 5000
137 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
139 struct tmio_mmc_host *host = mmc_priv(mmc);
141 if (enable && !host->sdio_irq_enabled) {
144 /* Keep device active while SDIO irq is enabled */
145 pm_runtime_get_sync(mmc_dev(mmc));
147 host->sdio_irq_enabled = true;
148 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
150 /* Clear obsolete interrupts before enabling */
151 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
152 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
153 sdio_status |= TMIO_SDIO_SETBITS_MASK;
154 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
156 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
157 } else if (!enable && host->sdio_irq_enabled) {
158 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
159 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
161 host->sdio_irq_enabled = false;
162 pm_runtime_mark_last_busy(mmc_dev(mmc));
163 pm_runtime_put_autosuspend(mmc_dev(mmc));
167 static void tmio_mmc_reset(struct tmio_mmc_host *host)
169 /* FIXME - should we set stop clock reg here */
170 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
171 usleep_range(10000, 11000);
172 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
173 usleep_range(10000, 11000);
175 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
176 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
177 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
181 static void tmio_mmc_reset_work(struct work_struct *work)
183 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
184 delayed_reset_work.work);
185 struct mmc_request *mrq;
188 spin_lock_irqsave(&host->lock, flags);
192 * is request already finished? Since we use a non-blocking
193 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
194 * us, so, have to check for IS_ERR(host->mrq)
196 if (IS_ERR_OR_NULL(mrq) ||
197 time_is_after_jiffies(host->last_req_ts +
198 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
199 spin_unlock_irqrestore(&host->lock, flags);
203 dev_warn(&host->pdev->dev,
204 "timeout waiting for hardware interrupt (CMD%u)\n",
208 host->data->error = -ETIMEDOUT;
210 host->cmd->error = -ETIMEDOUT;
212 mrq->cmd->error = -ETIMEDOUT;
217 spin_unlock_irqrestore(&host->lock, flags);
221 /* Ready for new calls */
224 tmio_mmc_abort_dma(host);
225 mmc_request_done(host->mmc, mrq);
228 /* These are the bitmasks the tmio chip requires to implement the MMC response
229 * types. Note that R1 and R6 are the same in this scheme. */
230 #define APP_CMD 0x0040
231 #define RESP_NONE 0x0300
232 #define RESP_R1 0x0400
233 #define RESP_R1B 0x0500
234 #define RESP_R2 0x0600
235 #define RESP_R3 0x0700
236 #define DATA_PRESENT 0x0800
237 #define TRANSFER_READ 0x1000
238 #define TRANSFER_MULTI 0x2000
239 #define SECURITY_CMD 0x4000
240 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
242 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
243 struct mmc_command *cmd)
245 struct mmc_data *data = host->data;
248 switch (mmc_resp_type(cmd)) {
249 case MMC_RSP_NONE: c |= RESP_NONE; break;
251 case MMC_RSP_R1_NO_CRC:
253 case MMC_RSP_R1B: c |= RESP_R1B; break;
254 case MMC_RSP_R2: c |= RESP_R2; break;
255 case MMC_RSP_R3: c |= RESP_R3; break;
257 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
263 /* FIXME - this seems to be ok commented out but the spec suggest this bit
264 * should be set when issuing app commands.
265 * if(cmd->flags & MMC_FLAG_ACMD)
270 if (data->blocks > 1) {
271 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
275 * Disable auto CMD12 at IO_RW_EXTENDED and
276 * SET_BLOCK_COUNT when doing multiple block transfer
278 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
279 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
282 if (data->flags & MMC_DATA_READ)
286 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
288 /* Fire off the command */
289 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
290 sd_ctrl_write16(host, CTL_SD_CMD, c);
295 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
299 int is_read = host->data->flags & MMC_DATA_READ;
305 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
307 u32 *buf32 = (u32 *)buf;
310 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
313 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
316 /* if count was multiple of 4 */
324 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
325 memcpy(buf32, &data, count);
327 memcpy(&data, buf32, count);
328 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
335 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
337 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
339 /* if count was even number */
343 /* if count was odd number */
344 buf8 = (u8 *)(buf + (count >> 1));
349 * driver and this function are assuming that
350 * it is used as little endian
353 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
355 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
359 * This chip always returns (at least?) as much data as you ask for.
360 * I'm unsure what happens if you ask for less than a block. This should be
361 * looked into to ensure that a funny length read doesn't hose the controller.
363 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
365 struct mmc_data *data = host->data;
372 pr_err("PIO IRQ in DMA mode!\n");
375 pr_debug("Spurious PIO IRQ\n");
379 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
380 buf = (unsigned short *)(sg_virt + host->sg_off);
382 count = host->sg_ptr->length - host->sg_off;
383 if (count > data->blksz)
386 pr_debug("count: %08x offset: %08x flags %08x\n",
387 count, host->sg_off, data->flags);
389 /* Transfer the data */
390 tmio_mmc_transfer_data(host, buf, count);
392 host->sg_off += count;
394 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
396 if (host->sg_off == host->sg_ptr->length)
397 tmio_mmc_next_sg(host);
400 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
402 if (host->sg_ptr == &host->bounce_sg) {
404 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
406 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
407 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
411 /* needs to be called with host->lock held */
412 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
414 struct mmc_data *data = host->data;
415 struct mmc_command *stop;
420 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
425 /* FIXME - return correct transfer count on errors */
427 data->bytes_xfered = data->blocks * data->blksz;
429 data->bytes_xfered = 0;
431 pr_debug("Completed data request\n");
434 * FIXME: other drivers allow an optional stop command of any given type
435 * which we dont do, as the chip can auto generate them.
436 * Perhaps we can be smarter about when to use auto CMD12 and
437 * only issue the auto request when we know this is the desired
438 * stop command, allowing fallback to the stop command the
439 * upper layers expect. For now, we do what works.
442 if (data->flags & MMC_DATA_READ) {
444 tmio_mmc_check_bounce_buffer(host);
445 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
448 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
452 if (stop && !host->mrq->sbc) {
453 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
454 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
455 stop->opcode, stop->arg);
457 /* fill in response from auto CMD12 */
458 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
460 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
463 schedule_work(&host->done);
465 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
467 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
469 struct mmc_data *data;
471 spin_lock(&host->lock);
477 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
478 stat & TMIO_STAT_TXUNDERRUN)
479 data->error = -EILSEQ;
480 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
481 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
485 * Has all data been written out yet? Testing on SuperH showed,
486 * that in most cases the first interrupt comes already with the
487 * BUSY status bit clear, but on some operations, like mount or
488 * in the beginning of a write / sync / umount, there is one
489 * DATAEND interrupt with the BUSY bit set, in this cases
490 * waiting for one more interrupt fixes the problem.
492 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
493 if (status & TMIO_STAT_SCLKDIVEN)
496 if (!(status & TMIO_STAT_CMD_BUSY))
501 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
502 tmio_mmc_dataend_dma(host);
504 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
505 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
506 tmio_mmc_dataend_dma(host);
508 tmio_mmc_do_data_irq(host);
509 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
512 spin_unlock(&host->lock);
515 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
517 struct mmc_command *cmd = host->cmd;
520 spin_lock(&host->lock);
523 pr_debug("Spurious CMD irq\n");
527 /* This controller is sicker than the PXA one. Not only do we need to
528 * drop the top 8 bits of the first response word, we also need to
529 * modify the order of the response for short response command types.
532 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
533 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
535 if (cmd->flags & MMC_RSP_136) {
536 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
537 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
538 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
540 } else if (cmd->flags & MMC_RSP_R3) {
541 cmd->resp[0] = cmd->resp[3];
544 if (stat & TMIO_STAT_CMDTIMEOUT)
545 cmd->error = -ETIMEDOUT;
546 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
547 stat & TMIO_STAT_STOPBIT_ERR ||
548 stat & TMIO_STAT_CMD_IDX_ERR)
549 cmd->error = -EILSEQ;
551 /* If there is data to handle we enable data IRQs here, and
552 * we will ultimatley finish the request in the data_end handler.
553 * If theres no data or we encountered an error, finish now.
555 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
556 if (host->data->flags & MMC_DATA_READ) {
558 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
560 tmio_mmc_disable_mmc_irqs(host,
562 tasklet_schedule(&host->dma_issue);
566 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
568 tmio_mmc_disable_mmc_irqs(host,
570 tasklet_schedule(&host->dma_issue);
574 schedule_work(&host->done);
578 spin_unlock(&host->lock);
581 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
582 int ireg, int status)
584 struct mmc_host *mmc = host->mmc;
586 /* Card insert / remove attempts */
587 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
588 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
589 TMIO_STAT_CARD_REMOVE);
590 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
591 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
592 !work_pending(&mmc->detect.work))
593 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
600 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
603 /* Command completion */
604 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
605 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
606 TMIO_STAT_CMDTIMEOUT);
607 tmio_mmc_cmd_irq(host, status);
612 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
613 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
614 tmio_mmc_pio_irq(host);
618 /* Data transfer completion */
619 if (ireg & TMIO_STAT_DATAEND) {
620 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
621 tmio_mmc_data_irq(host, status);
628 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
630 struct mmc_host *mmc = host->mmc;
631 struct tmio_mmc_data *pdata = host->pdata;
632 unsigned int ireg, status;
633 unsigned int sdio_status;
635 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
638 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
639 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
641 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
642 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
643 sdio_status |= TMIO_SDIO_SETBITS_MASK;
645 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
647 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
648 mmc_signal_sdio_irq(mmc);
653 irqreturn_t tmio_mmc_irq(int irq, void *devid)
655 struct tmio_mmc_host *host = devid;
656 unsigned int ireg, status;
658 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
659 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
661 /* Clear the status except the interrupt status */
662 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
664 if (__tmio_mmc_card_detect_irq(host, ireg, status))
666 if (__tmio_mmc_sdcard_irq(host, ireg, status))
669 if (__tmio_mmc_sdio_irq(host))
674 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
676 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
677 struct mmc_data *data)
679 struct tmio_mmc_data *pdata = host->pdata;
681 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
682 data->blksz, data->blocks);
684 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
685 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
686 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
687 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
689 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
690 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
691 mmc_hostname(host->mmc), data->blksz);
696 tmio_mmc_init_sg(host, data);
698 host->dma_on = false;
700 /* Set transfer length / blocksize */
701 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
702 if (host->mmc->max_blk_count >= SZ_64K)
703 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
705 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
707 tmio_mmc_start_dma(host, data);
712 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
714 struct tmio_mmc_host *host = mmc_priv(mmc);
717 host->hw_reset(host);
720 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
722 struct tmio_mmc_host *host = mmc_priv(mmc);
725 if (!host->execute_tuning)
728 ret = host->execute_tuning(host, opcode);
731 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
738 static void tmio_process_mrq(struct tmio_mmc_host *host,
739 struct mmc_request *mrq)
741 struct mmc_command *cmd;
744 if (mrq->sbc && host->cmd != mrq->sbc) {
749 ret = tmio_mmc_start_data(host, mrq->data);
755 ret = tmio_mmc_start_command(host, cmd);
759 schedule_delayed_work(&host->delayed_reset_work,
760 msecs_to_jiffies(CMDREQ_TIMEOUT));
765 mrq->cmd->error = ret;
766 mmc_request_done(host->mmc, mrq);
769 /* Process requests from the MMC layer */
770 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
772 struct tmio_mmc_host *host = mmc_priv(mmc);
775 spin_lock_irqsave(&host->lock, flags);
778 pr_debug("request not null\n");
779 if (IS_ERR(host->mrq)) {
780 spin_unlock_irqrestore(&host->lock, flags);
781 mrq->cmd->error = -EAGAIN;
782 mmc_request_done(mmc, mrq);
787 host->last_req_ts = jiffies;
791 spin_unlock_irqrestore(&host->lock, flags);
793 tmio_process_mrq(host, mrq);
796 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
798 struct mmc_request *mrq;
801 spin_lock_irqsave(&host->lock, flags);
803 tmio_mmc_end_dma(host);
806 if (IS_ERR_OR_NULL(mrq)) {
807 spin_unlock_irqrestore(&host->lock, flags);
811 /* If not SET_BLOCK_COUNT, clear old data */
812 if (host->cmd != mrq->sbc) {
818 cancel_delayed_work(&host->delayed_reset_work);
820 spin_unlock_irqrestore(&host->lock, flags);
822 if (mrq->cmd->error || (mrq->data && mrq->data->error))
823 tmio_mmc_abort_dma(host);
825 /* Error means retune, but executed command was still successful */
826 if (host->check_retune && host->check_retune(host))
827 mmc_retune_needed(host->mmc);
829 /* If SET_BLOCK_COUNT, continue with main command */
830 if (host->mrq && !mrq->cmd->error) {
831 tmio_process_mrq(host, mrq);
835 mmc_request_done(host->mmc, mrq);
838 static void tmio_mmc_done_work(struct work_struct *work)
840 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
842 tmio_mmc_finish_request(host);
845 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
847 struct mmc_host *mmc = host->mmc;
850 /* .set_ios() is returning void, so, no chance to report an error */
853 host->set_pwr(host->pdev, 1);
855 if (!IS_ERR(mmc->supply.vmmc)) {
856 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
858 * Attention: empiric value. With a b43 WiFi SDIO card this
859 * delay proved necessary for reliable card-insertion probing.
860 * 100us were not enough. Is this the same 140us delay, as in
861 * tmio_mmc_set_ios()?
863 usleep_range(200, 300);
866 * It seems, VccQ should be switched on after Vcc, this is also what the
867 * omap_hsmmc.c driver does.
869 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
870 ret = regulator_enable(mmc->supply.vqmmc);
871 usleep_range(200, 300);
875 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
879 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
881 struct mmc_host *mmc = host->mmc;
883 if (!IS_ERR(mmc->supply.vqmmc))
884 regulator_disable(mmc->supply.vqmmc);
886 if (!IS_ERR(mmc->supply.vmmc))
887 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
890 host->set_pwr(host->pdev, 0);
893 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
894 unsigned char bus_width)
896 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
897 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
899 /* reg now applies to MMC_BUS_WIDTH_4 */
900 if (bus_width == MMC_BUS_WIDTH_1)
901 reg |= CARD_OPT_WIDTH;
902 else if (bus_width == MMC_BUS_WIDTH_8)
903 reg |= CARD_OPT_WIDTH8;
905 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
908 /* Set MMC clock / power.
909 * Note: This controller uses a simple divider scheme therefore it cannot
910 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
911 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
914 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
916 struct tmio_mmc_host *host = mmc_priv(mmc);
917 struct device *dev = &host->pdev->dev;
920 mutex_lock(&host->ios_lock);
922 spin_lock_irqsave(&host->lock, flags);
924 if (IS_ERR(host->mrq)) {
926 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
927 current->comm, task_pid_nr(current),
928 ios->clock, ios->power_mode);
929 host->mrq = ERR_PTR(-EINTR);
932 "%s.%d: CMD%u active since %lu, now %lu!\n",
933 current->comm, task_pid_nr(current),
934 host->mrq->cmd->opcode, host->last_req_ts,
937 spin_unlock_irqrestore(&host->lock, flags);
939 mutex_unlock(&host->ios_lock);
943 host->mrq = ERR_PTR(-EBUSY);
945 spin_unlock_irqrestore(&host->lock, flags);
947 switch (ios->power_mode) {
949 tmio_mmc_power_off(host);
950 host->set_clock(host, 0);
953 tmio_mmc_power_on(host, ios->vdd);
954 host->set_clock(host, ios->clock);
955 tmio_mmc_set_bus_width(host, ios->bus_width);
958 host->set_clock(host, ios->clock);
959 tmio_mmc_set_bus_width(host, ios->bus_width);
963 /* Let things settle. delay taken from winCE driver */
964 usleep_range(140, 200);
965 if (PTR_ERR(host->mrq) == -EINTR)
966 dev_dbg(&host->pdev->dev,
967 "%s.%d: IOS interrupted: clk %u, mode %u",
968 current->comm, task_pid_nr(current),
969 ios->clock, ios->power_mode);
972 host->clk_cache = ios->clock;
974 mutex_unlock(&host->ios_lock);
977 static int tmio_mmc_get_ro(struct mmc_host *mmc)
979 struct tmio_mmc_host *host = mmc_priv(mmc);
981 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
982 TMIO_STAT_WRPROTECT);
985 static int tmio_mmc_get_cd(struct mmc_host *mmc)
987 struct tmio_mmc_host *host = mmc_priv(mmc);
989 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
993 static int tmio_multi_io_quirk(struct mmc_card *card,
994 unsigned int direction, int blk_size)
996 struct tmio_mmc_host *host = mmc_priv(card->host);
998 if (host->multi_io_quirk)
999 return host->multi_io_quirk(card, direction, blk_size);
1004 static struct mmc_host_ops tmio_mmc_ops = {
1005 .request = tmio_mmc_request,
1006 .set_ios = tmio_mmc_set_ios,
1007 .get_ro = tmio_mmc_get_ro,
1008 .get_cd = tmio_mmc_get_cd,
1009 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1010 .multi_io_quirk = tmio_multi_io_quirk,
1011 .hw_reset = tmio_mmc_hw_reset,
1012 .execute_tuning = tmio_mmc_execute_tuning,
1015 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1017 struct tmio_mmc_data *pdata = host->pdata;
1018 struct mmc_host *mmc = host->mmc;
1021 err = mmc_regulator_get_supply(mmc);
1025 /* use ocr_mask if no regulator */
1026 if (!mmc->ocr_avail)
1027 mmc->ocr_avail = pdata->ocr_mask;
1031 * There is possibility that regulator has not been probed
1033 if (!mmc->ocr_avail)
1034 return -EPROBE_DEFER;
1039 static void tmio_mmc_of_parse(struct platform_device *pdev,
1040 struct mmc_host *mmc)
1042 const struct device_node *np = pdev->dev.of_node;
1049 * For new platforms, please use "disable-wp" instead of
1050 * "toshiba,mmc-wrprotect-disable"
1052 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1053 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1056 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1057 struct tmio_mmc_data *pdata)
1059 struct tmio_mmc_host *host;
1060 struct mmc_host *mmc;
1064 ctl = devm_platform_ioremap_resource(pdev, 0);
1066 return ERR_CAST(ctl);
1068 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1070 return ERR_PTR(-ENOMEM);
1072 host = mmc_priv(mmc);
1076 host->pdata = pdata;
1077 host->ops = tmio_mmc_ops;
1078 mmc->ops = &host->ops;
1080 ret = mmc_of_parse(host->mmc);
1082 host = ERR_PTR(ret);
1086 tmio_mmc_of_parse(pdev, mmc);
1088 platform_set_drvdata(pdev, host);
1096 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1098 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1100 mmc_free_host(host->mmc);
1102 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1104 int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1106 struct platform_device *pdev = _host->pdev;
1107 struct tmio_mmc_data *pdata = _host->pdata;
1108 struct mmc_host *mmc = _host->mmc;
1112 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1113 * looping forever...
1115 if (mmc->f_min == 0)
1118 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1119 _host->write16_hook = NULL;
1121 _host->set_pwr = pdata->set_pwr;
1123 ret = tmio_mmc_init_ocr(_host);
1128 * Look for a card detect GPIO, if it fails with anything
1129 * else than a probe deferral, just live without it.
1131 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);
1132 if (ret == -EPROBE_DEFER)
1135 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1136 mmc->caps2 |= pdata->capabilities2;
1137 mmc->max_segs = pdata->max_segs ? : 32;
1138 mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1139 mmc->max_blk_count = pdata->max_blk_count ? :
1140 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1141 mmc->max_req_size = min_t(size_t,
1142 mmc->max_blk_size * mmc->max_blk_count,
1143 dma_max_mapping_size(&pdev->dev));
1144 mmc->max_seg_size = mmc->max_req_size;
1146 if (mmc_can_gpio_ro(mmc))
1147 _host->ops.get_ro = mmc_gpio_get_ro;
1149 if (mmc_can_gpio_cd(mmc))
1150 _host->ops.get_cd = mmc_gpio_get_cd;
1152 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1153 mmc->caps & MMC_CAP_NEEDS_POLL ||
1154 !mmc_card_is_removable(mmc));
1157 _host->reset = tmio_mmc_reset;
1160 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1161 * hotplug gets disabled. It seems RuntimePM related yet we need further
1162 * research. Since we are planning a PM overhaul anyway, let's enforce
1163 * for now the device being active by enabling native hotplug always.
1165 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1166 _host->native_hotplug = true;
1169 * While using internal tmio hardware logic for card detection, we need
1170 * to ensure it stays powered for it to work.
1172 if (_host->native_hotplug)
1173 pm_runtime_get_noresume(&pdev->dev);
1175 _host->sdio_irq_enabled = false;
1176 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1177 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1179 _host->set_clock(_host, 0);
1180 _host->reset(_host);
1182 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1183 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1185 if (_host->native_hotplug)
1186 tmio_mmc_enable_mmc_irqs(_host,
1187 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1189 spin_lock_init(&_host->lock);
1190 mutex_init(&_host->ios_lock);
1192 /* Init delayed work for request timeouts */
1193 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1194 INIT_WORK(&_host->done, tmio_mmc_done_work);
1196 /* See if we also get DMA */
1197 tmio_mmc_request_dma(_host, pdata);
1199 pm_runtime_get_noresume(&pdev->dev);
1200 pm_runtime_set_active(&pdev->dev);
1201 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1202 pm_runtime_use_autosuspend(&pdev->dev);
1203 pm_runtime_enable(&pdev->dev);
1205 ret = mmc_add_host(mmc);
1209 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1210 pm_runtime_put(&pdev->dev);
1215 pm_runtime_put_noidle(&pdev->dev);
1216 tmio_mmc_host_remove(_host);
1219 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1221 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1223 struct platform_device *pdev = host->pdev;
1224 struct mmc_host *mmc = host->mmc;
1226 pm_runtime_get_sync(&pdev->dev);
1228 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1229 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1231 dev_pm_qos_hide_latency_limit(&pdev->dev);
1233 mmc_remove_host(mmc);
1234 cancel_work_sync(&host->done);
1235 cancel_delayed_work_sync(&host->delayed_reset_work);
1236 tmio_mmc_release_dma(host);
1237 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1239 if (host->native_hotplug)
1240 pm_runtime_put_noidle(&pdev->dev);
1242 pm_runtime_disable(&pdev->dev);
1243 pm_runtime_dont_use_autosuspend(&pdev->dev);
1244 pm_runtime_put_noidle(&pdev->dev);
1246 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1249 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1251 if (!host->clk_enable)
1254 return host->clk_enable(host);
1257 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1259 if (host->clk_disable)
1260 host->clk_disable(host);
1263 int tmio_mmc_host_runtime_suspend(struct device *dev)
1265 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1267 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1269 if (host->clk_cache)
1270 host->set_clock(host, 0);
1272 tmio_mmc_clk_disable(host);
1276 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1278 int tmio_mmc_host_runtime_resume(struct device *dev)
1280 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1282 tmio_mmc_clk_enable(host);
1285 if (host->clk_cache)
1286 host->set_clock(host, host->clk_cache);
1288 if (host->native_hotplug)
1289 tmio_mmc_enable_mmc_irqs(host,
1290 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1292 tmio_mmc_enable_dma(host, true);
1294 mmc_retune_needed(host->mmc);
1298 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1301 MODULE_LICENSE("GPL v2");