1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the MMC / SD / SDIO IP found in:
5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
7 * Copyright (C) 2015-19 Renesas Electronics Corporation
8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
9 * Copyright (C) 2017 Horms Solutions, Simon Horman
10 * Copyright (C) 2011 Guennadi Liakhovetski
11 * Copyright (C) 2007 Ian Molton
12 * Copyright (C) 2004 Ian Molton
14 * This driver draws mainly on scattered spec sheets, Reverse engineering
15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16 * support). (Further 4 bit support from a later datasheet).
19 * Investigate using a workqueue for PIO transfers
21 * Better Power management
22 * Handle MMC errors better
23 * double buffer support
27 #include <linux/delay.h>
28 #include <linux/device.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/highmem.h>
31 #include <linux/interrupt.h>
33 #include <linux/irq.h>
34 #include <linux/mfd/tmio.h>
35 #include <linux/mmc/card.h>
36 #include <linux/mmc/host.h>
37 #include <linux/mmc/mmc.h>
38 #include <linux/mmc/slot-gpio.h>
39 #include <linux/module.h>
40 #include <linux/pagemap.h>
41 #include <linux/platform_device.h>
42 #include <linux/pm_qos.h>
43 #include <linux/pm_runtime.h>
44 #include <linux/regulator/consumer.h>
45 #include <linux/mmc/sdio.h>
46 #include <linux/scatterlist.h>
47 #include <linux/sizes.h>
48 #include <linux/spinlock.h>
49 #include <linux/workqueue.h>
53 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
54 struct mmc_data *data)
57 host->dma_ops->start(host, data);
60 static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host)
62 if (host->dma_ops && host->dma_ops->end)
63 host->dma_ops->end(host);
66 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
69 host->dma_ops->enable(host, enable);
72 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
73 struct tmio_mmc_data *pdata)
76 host->dma_ops->request(host, pdata);
83 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
86 host->dma_ops->release(host);
89 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
92 host->dma_ops->abort(host);
95 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
98 host->dma_ops->dataend(host);
101 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
103 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
104 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
106 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
108 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
110 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
111 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
113 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
115 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
117 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
120 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
122 host->sg_len = data->sg_len;
123 host->sg_ptr = data->sg;
124 host->sg_orig = data->sg;
128 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
130 host->sg_ptr = sg_next(host->sg_ptr);
132 return --host->sg_len;
135 #define CMDREQ_TIMEOUT 5000
137 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
139 struct tmio_mmc_host *host = mmc_priv(mmc);
141 if (enable && !host->sdio_irq_enabled) {
144 /* Keep device active while SDIO irq is enabled */
145 pm_runtime_get_sync(mmc_dev(mmc));
147 host->sdio_irq_enabled = true;
148 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
150 /* Clear obsolete interrupts before enabling */
151 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
152 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
153 sdio_status |= TMIO_SDIO_SETBITS_MASK;
154 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
156 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
157 } else if (!enable && host->sdio_irq_enabled) {
158 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
159 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
161 host->sdio_irq_enabled = false;
162 pm_runtime_mark_last_busy(mmc_dev(mmc));
163 pm_runtime_put_autosuspend(mmc_dev(mmc));
167 static void tmio_mmc_reset(struct tmio_mmc_host *host)
169 /* FIXME - should we set stop clock reg here */
170 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
171 usleep_range(10000, 11000);
172 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
173 usleep_range(10000, 11000);
175 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
176 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
177 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
181 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
183 struct tmio_mmc_host *host = mmc_priv(mmc);
187 tmio_mmc_abort_dma(host);
190 host->hw_reset(host);
193 static void tmio_mmc_reset_work(struct work_struct *work)
195 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
196 delayed_reset_work.work);
197 struct mmc_request *mrq;
200 spin_lock_irqsave(&host->lock, flags);
204 * is request already finished? Since we use a non-blocking
205 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
206 * us, so, have to check for IS_ERR(host->mrq)
208 if (IS_ERR_OR_NULL(mrq) ||
209 time_is_after_jiffies(host->last_req_ts +
210 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
211 spin_unlock_irqrestore(&host->lock, flags);
215 dev_warn(&host->pdev->dev,
216 "timeout waiting for hardware interrupt (CMD%u)\n",
220 host->data->error = -ETIMEDOUT;
222 host->cmd->error = -ETIMEDOUT;
224 mrq->cmd->error = -ETIMEDOUT;
229 spin_unlock_irqrestore(&host->lock, flags);
231 tmio_mmc_hw_reset(host->mmc);
233 /* Ready for new calls */
236 mmc_request_done(host->mmc, mrq);
239 /* These are the bitmasks the tmio chip requires to implement the MMC response
240 * types. Note that R1 and R6 are the same in this scheme. */
241 #define APP_CMD 0x0040
242 #define RESP_NONE 0x0300
243 #define RESP_R1 0x0400
244 #define RESP_R1B 0x0500
245 #define RESP_R2 0x0600
246 #define RESP_R3 0x0700
247 #define DATA_PRESENT 0x0800
248 #define TRANSFER_READ 0x1000
249 #define TRANSFER_MULTI 0x2000
250 #define SECURITY_CMD 0x4000
251 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
253 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
254 struct mmc_command *cmd)
256 struct mmc_data *data = host->data;
259 switch (mmc_resp_type(cmd)) {
260 case MMC_RSP_NONE: c |= RESP_NONE; break;
262 case MMC_RSP_R1_NO_CRC:
264 case MMC_RSP_R1B: c |= RESP_R1B; break;
265 case MMC_RSP_R2: c |= RESP_R2; break;
266 case MMC_RSP_R3: c |= RESP_R3; break;
268 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
274 /* FIXME - this seems to be ok commented out but the spec suggest this bit
275 * should be set when issuing app commands.
276 * if(cmd->flags & MMC_FLAG_ACMD)
281 if (data->blocks > 1) {
282 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
286 * Disable auto CMD12 at IO_RW_EXTENDED and
287 * SET_BLOCK_COUNT when doing multiple block transfer
289 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
290 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
293 if (data->flags & MMC_DATA_READ)
297 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
299 /* Fire off the command */
300 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
301 sd_ctrl_write16(host, CTL_SD_CMD, c);
306 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
310 int is_read = host->data->flags & MMC_DATA_READ;
316 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
318 u32 *buf32 = (u32 *)buf;
321 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
324 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
327 /* if count was multiple of 4 */
335 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
336 memcpy(buf32, &data, count);
338 memcpy(&data, buf32, count);
339 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
346 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
348 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
350 /* if count was even number */
354 /* if count was odd number */
355 buf8 = (u8 *)(buf + (count >> 1));
360 * driver and this function are assuming that
361 * it is used as little endian
364 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
366 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
370 * This chip always returns (at least?) as much data as you ask for.
371 * I'm unsure what happens if you ask for less than a block. This should be
372 * looked into to ensure that a funny length read doesn't hose the controller.
374 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
376 struct mmc_data *data = host->data;
383 pr_err("PIO IRQ in DMA mode!\n");
386 pr_debug("Spurious PIO IRQ\n");
390 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
391 buf = (unsigned short *)(sg_virt + host->sg_off);
393 count = host->sg_ptr->length - host->sg_off;
394 if (count > data->blksz)
397 pr_debug("count: %08x offset: %08x flags %08x\n",
398 count, host->sg_off, data->flags);
400 /* Transfer the data */
401 tmio_mmc_transfer_data(host, buf, count);
403 host->sg_off += count;
405 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
407 if (host->sg_off == host->sg_ptr->length)
408 tmio_mmc_next_sg(host);
411 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
413 if (host->sg_ptr == &host->bounce_sg) {
415 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
417 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
418 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
422 /* needs to be called with host->lock held */
423 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
425 struct mmc_data *data = host->data;
426 struct mmc_command *stop;
431 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
436 /* FIXME - return correct transfer count on errors */
438 data->bytes_xfered = data->blocks * data->blksz;
440 data->bytes_xfered = 0;
442 pr_debug("Completed data request\n");
445 * FIXME: other drivers allow an optional stop command of any given type
446 * which we dont do, as the chip can auto generate them.
447 * Perhaps we can be smarter about when to use auto CMD12 and
448 * only issue the auto request when we know this is the desired
449 * stop command, allowing fallback to the stop command the
450 * upper layers expect. For now, we do what works.
453 if (data->flags & MMC_DATA_READ) {
455 tmio_mmc_check_bounce_buffer(host);
456 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
459 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
463 if (stop && !host->mrq->sbc) {
464 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
465 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
466 stop->opcode, stop->arg);
468 /* fill in response from auto CMD12 */
469 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
471 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
474 schedule_work(&host->done);
476 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
478 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
480 struct mmc_data *data;
482 spin_lock(&host->lock);
488 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
489 stat & TMIO_STAT_TXUNDERRUN)
490 data->error = -EILSEQ;
491 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
492 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
496 * Has all data been written out yet? Testing on SuperH showed,
497 * that in most cases the first interrupt comes already with the
498 * BUSY status bit clear, but on some operations, like mount or
499 * in the beginning of a write / sync / umount, there is one
500 * DATAEND interrupt with the BUSY bit set, in this cases
501 * waiting for one more interrupt fixes the problem.
503 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
504 if (status & TMIO_STAT_SCLKDIVEN)
507 if (!(status & TMIO_STAT_CMD_BUSY))
512 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
513 tmio_mmc_dataend_dma(host);
515 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
516 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
517 tmio_mmc_dataend_dma(host);
519 tmio_mmc_do_data_irq(host);
520 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
523 spin_unlock(&host->lock);
526 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
528 struct mmc_command *cmd = host->cmd;
531 spin_lock(&host->lock);
534 pr_debug("Spurious CMD irq\n");
538 /* This controller is sicker than the PXA one. Not only do we need to
539 * drop the top 8 bits of the first response word, we also need to
540 * modify the order of the response for short response command types.
543 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
544 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
546 if (cmd->flags & MMC_RSP_136) {
547 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
548 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
549 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
551 } else if (cmd->flags & MMC_RSP_R3) {
552 cmd->resp[0] = cmd->resp[3];
555 if (stat & TMIO_STAT_CMDTIMEOUT)
556 cmd->error = -ETIMEDOUT;
557 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
558 stat & TMIO_STAT_STOPBIT_ERR ||
559 stat & TMIO_STAT_CMD_IDX_ERR)
560 cmd->error = -EILSEQ;
562 /* If there is data to handle we enable data IRQs here, and
563 * we will ultimatley finish the request in the data_end handler.
564 * If theres no data or we encountered an error, finish now.
566 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
567 if (host->data->flags & MMC_DATA_READ) {
569 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
571 tmio_mmc_disable_mmc_irqs(host,
573 tasklet_schedule(&host->dma_issue);
577 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
579 tmio_mmc_disable_mmc_irqs(host,
581 tasklet_schedule(&host->dma_issue);
585 schedule_work(&host->done);
589 spin_unlock(&host->lock);
592 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
593 int ireg, int status)
595 struct mmc_host *mmc = host->mmc;
597 /* Card insert / remove attempts */
598 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
599 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
600 TMIO_STAT_CARD_REMOVE);
601 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
602 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
603 !work_pending(&mmc->detect.work))
604 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
611 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
614 /* Command completion */
615 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
616 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
617 TMIO_STAT_CMDTIMEOUT);
618 tmio_mmc_cmd_irq(host, status);
623 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
624 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
625 tmio_mmc_pio_irq(host);
629 /* Data transfer completion */
630 if (ireg & TMIO_STAT_DATAEND) {
631 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
632 tmio_mmc_data_irq(host, status);
639 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
641 struct mmc_host *mmc = host->mmc;
642 struct tmio_mmc_data *pdata = host->pdata;
643 unsigned int ireg, status;
644 unsigned int sdio_status;
646 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
649 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
650 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
652 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
653 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
654 sdio_status |= TMIO_SDIO_SETBITS_MASK;
656 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
658 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
659 mmc_signal_sdio_irq(mmc);
664 irqreturn_t tmio_mmc_irq(int irq, void *devid)
666 struct tmio_mmc_host *host = devid;
667 unsigned int ireg, status;
669 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
670 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
672 /* Clear the status except the interrupt status */
673 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
675 if (__tmio_mmc_card_detect_irq(host, ireg, status))
677 if (__tmio_mmc_sdcard_irq(host, ireg, status))
680 if (__tmio_mmc_sdio_irq(host))
685 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
687 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
688 struct mmc_data *data)
690 struct tmio_mmc_data *pdata = host->pdata;
692 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
693 data->blksz, data->blocks);
695 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
696 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
697 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
698 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
700 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
701 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
702 mmc_hostname(host->mmc), data->blksz);
707 tmio_mmc_init_sg(host, data);
709 host->dma_on = false;
711 /* Set transfer length / blocksize */
712 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
713 if (host->mmc->max_blk_count >= SZ_64K)
714 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
716 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
718 tmio_mmc_start_dma(host, data);
723 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
725 struct tmio_mmc_host *host = mmc_priv(mmc);
728 if (!host->execute_tuning)
731 ret = host->execute_tuning(host, opcode);
734 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
735 tmio_mmc_hw_reset(mmc);
741 static void tmio_process_mrq(struct tmio_mmc_host *host,
742 struct mmc_request *mrq)
744 struct mmc_command *cmd;
747 if (mrq->sbc && host->cmd != mrq->sbc) {
752 ret = tmio_mmc_start_data(host, mrq->data);
758 ret = tmio_mmc_start_command(host, cmd);
762 schedule_delayed_work(&host->delayed_reset_work,
763 msecs_to_jiffies(CMDREQ_TIMEOUT));
768 mrq->cmd->error = ret;
769 mmc_request_done(host->mmc, mrq);
772 /* Process requests from the MMC layer */
773 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
775 struct tmio_mmc_host *host = mmc_priv(mmc);
778 spin_lock_irqsave(&host->lock, flags);
781 pr_debug("request not null\n");
782 if (IS_ERR(host->mrq)) {
783 spin_unlock_irqrestore(&host->lock, flags);
784 mrq->cmd->error = -EAGAIN;
785 mmc_request_done(mmc, mrq);
790 host->last_req_ts = jiffies;
794 spin_unlock_irqrestore(&host->lock, flags);
796 tmio_process_mrq(host, mrq);
799 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
801 struct mmc_request *mrq;
804 spin_lock_irqsave(&host->lock, flags);
806 tmio_mmc_end_dma(host);
809 if (IS_ERR_OR_NULL(mrq)) {
810 spin_unlock_irqrestore(&host->lock, flags);
814 /* If not SET_BLOCK_COUNT, clear old data */
815 if (host->cmd != mrq->sbc) {
821 cancel_delayed_work(&host->delayed_reset_work);
823 spin_unlock_irqrestore(&host->lock, flags);
825 if (mrq->cmd->error || (mrq->data && mrq->data->error))
826 tmio_mmc_abort_dma(host);
828 /* Error means retune, but executed command was still successful */
829 if (host->check_retune && host->check_retune(host))
830 mmc_retune_needed(host->mmc);
832 /* If SET_BLOCK_COUNT, continue with main command */
833 if (host->mrq && !mrq->cmd->error) {
834 tmio_process_mrq(host, mrq);
838 mmc_request_done(host->mmc, mrq);
841 static void tmio_mmc_done_work(struct work_struct *work)
843 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
845 tmio_mmc_finish_request(host);
848 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
850 struct mmc_host *mmc = host->mmc;
853 /* .set_ios() is returning void, so, no chance to report an error */
856 host->set_pwr(host->pdev, 1);
858 if (!IS_ERR(mmc->supply.vmmc)) {
859 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
861 * Attention: empiric value. With a b43 WiFi SDIO card this
862 * delay proved necessary for reliable card-insertion probing.
863 * 100us were not enough. Is this the same 140us delay, as in
864 * tmio_mmc_set_ios()?
866 usleep_range(200, 300);
869 * It seems, VccQ should be switched on after Vcc, this is also what the
870 * omap_hsmmc.c driver does.
872 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
873 ret = regulator_enable(mmc->supply.vqmmc);
874 usleep_range(200, 300);
878 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
882 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
884 struct mmc_host *mmc = host->mmc;
886 if (!IS_ERR(mmc->supply.vqmmc))
887 regulator_disable(mmc->supply.vqmmc);
889 if (!IS_ERR(mmc->supply.vmmc))
890 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
893 host->set_pwr(host->pdev, 0);
896 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
897 unsigned char bus_width)
899 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
900 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
902 /* reg now applies to MMC_BUS_WIDTH_4 */
903 if (bus_width == MMC_BUS_WIDTH_1)
904 reg |= CARD_OPT_WIDTH;
905 else if (bus_width == MMC_BUS_WIDTH_8)
906 reg |= CARD_OPT_WIDTH8;
908 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
911 /* Set MMC clock / power.
912 * Note: This controller uses a simple divider scheme therefore it cannot
913 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
914 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
917 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
919 struct tmio_mmc_host *host = mmc_priv(mmc);
920 struct device *dev = &host->pdev->dev;
923 mutex_lock(&host->ios_lock);
925 spin_lock_irqsave(&host->lock, flags);
927 if (IS_ERR(host->mrq)) {
929 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
930 current->comm, task_pid_nr(current),
931 ios->clock, ios->power_mode);
932 host->mrq = ERR_PTR(-EINTR);
935 "%s.%d: CMD%u active since %lu, now %lu!\n",
936 current->comm, task_pid_nr(current),
937 host->mrq->cmd->opcode, host->last_req_ts,
940 spin_unlock_irqrestore(&host->lock, flags);
942 mutex_unlock(&host->ios_lock);
946 host->mrq = ERR_PTR(-EBUSY);
948 spin_unlock_irqrestore(&host->lock, flags);
950 switch (ios->power_mode) {
952 tmio_mmc_power_off(host);
953 host->set_clock(host, 0);
956 tmio_mmc_power_on(host, ios->vdd);
957 host->set_clock(host, ios->clock);
958 tmio_mmc_set_bus_width(host, ios->bus_width);
961 host->set_clock(host, ios->clock);
962 tmio_mmc_set_bus_width(host, ios->bus_width);
966 /* Let things settle. delay taken from winCE driver */
967 usleep_range(140, 200);
968 if (PTR_ERR(host->mrq) == -EINTR)
969 dev_dbg(&host->pdev->dev,
970 "%s.%d: IOS interrupted: clk %u, mode %u",
971 current->comm, task_pid_nr(current),
972 ios->clock, ios->power_mode);
975 host->clk_cache = ios->clock;
977 mutex_unlock(&host->ios_lock);
980 static int tmio_mmc_get_ro(struct mmc_host *mmc)
982 struct tmio_mmc_host *host = mmc_priv(mmc);
984 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
985 TMIO_STAT_WRPROTECT);
988 static int tmio_mmc_get_cd(struct mmc_host *mmc)
990 struct tmio_mmc_host *host = mmc_priv(mmc);
992 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
996 static int tmio_multi_io_quirk(struct mmc_card *card,
997 unsigned int direction, int blk_size)
999 struct tmio_mmc_host *host = mmc_priv(card->host);
1001 if (host->multi_io_quirk)
1002 return host->multi_io_quirk(card, direction, blk_size);
1007 static struct mmc_host_ops tmio_mmc_ops = {
1008 .request = tmio_mmc_request,
1009 .set_ios = tmio_mmc_set_ios,
1010 .get_ro = tmio_mmc_get_ro,
1011 .get_cd = tmio_mmc_get_cd,
1012 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1013 .multi_io_quirk = tmio_multi_io_quirk,
1014 .hw_reset = tmio_mmc_hw_reset,
1015 .execute_tuning = tmio_mmc_execute_tuning,
1018 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1020 struct tmio_mmc_data *pdata = host->pdata;
1021 struct mmc_host *mmc = host->mmc;
1024 err = mmc_regulator_get_supply(mmc);
1028 /* use ocr_mask if no regulator */
1029 if (!mmc->ocr_avail)
1030 mmc->ocr_avail = pdata->ocr_mask;
1034 * There is possibility that regulator has not been probed
1036 if (!mmc->ocr_avail)
1037 return -EPROBE_DEFER;
1042 static void tmio_mmc_of_parse(struct platform_device *pdev,
1043 struct mmc_host *mmc)
1045 const struct device_node *np = pdev->dev.of_node;
1052 * For new platforms, please use "disable-wp" instead of
1053 * "toshiba,mmc-wrprotect-disable"
1055 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1056 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1059 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1060 struct tmio_mmc_data *pdata)
1062 struct tmio_mmc_host *host;
1063 struct mmc_host *mmc;
1067 ctl = devm_platform_ioremap_resource(pdev, 0);
1069 return ERR_CAST(ctl);
1071 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1073 return ERR_PTR(-ENOMEM);
1075 host = mmc_priv(mmc);
1079 host->pdata = pdata;
1080 host->ops = tmio_mmc_ops;
1081 mmc->ops = &host->ops;
1083 ret = mmc_of_parse(host->mmc);
1085 host = ERR_PTR(ret);
1089 tmio_mmc_of_parse(pdev, mmc);
1091 platform_set_drvdata(pdev, host);
1099 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1101 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1103 mmc_free_host(host->mmc);
1105 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1107 int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1109 struct platform_device *pdev = _host->pdev;
1110 struct tmio_mmc_data *pdata = _host->pdata;
1111 struct mmc_host *mmc = _host->mmc;
1115 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1116 * looping forever...
1118 if (mmc->f_min == 0)
1121 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1122 _host->write16_hook = NULL;
1124 _host->set_pwr = pdata->set_pwr;
1126 ret = tmio_mmc_init_ocr(_host);
1131 * Look for a card detect GPIO, if it fails with anything
1132 * else than a probe deferral, just live without it.
1134 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);
1135 if (ret == -EPROBE_DEFER)
1138 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1139 mmc->caps2 |= pdata->capabilities2;
1140 mmc->max_segs = pdata->max_segs ? : 32;
1141 mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1142 mmc->max_blk_count = pdata->max_blk_count ? :
1143 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1144 mmc->max_req_size = min_t(size_t,
1145 mmc->max_blk_size * mmc->max_blk_count,
1146 dma_max_mapping_size(&pdev->dev));
1147 mmc->max_seg_size = mmc->max_req_size;
1149 if (mmc_can_gpio_ro(mmc))
1150 _host->ops.get_ro = mmc_gpio_get_ro;
1152 if (mmc_can_gpio_cd(mmc))
1153 _host->ops.get_cd = mmc_gpio_get_cd;
1155 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1156 mmc->caps & MMC_CAP_NEEDS_POLL ||
1157 !mmc_card_is_removable(mmc));
1160 _host->reset = tmio_mmc_reset;
1163 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1164 * hotplug gets disabled. It seems RuntimePM related yet we need further
1165 * research. Since we are planning a PM overhaul anyway, let's enforce
1166 * for now the device being active by enabling native hotplug always.
1168 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1169 _host->native_hotplug = true;
1172 * While using internal tmio hardware logic for card detection, we need
1173 * to ensure it stays powered for it to work.
1175 if (_host->native_hotplug)
1176 pm_runtime_get_noresume(&pdev->dev);
1178 _host->sdio_irq_enabled = false;
1179 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1180 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1182 _host->set_clock(_host, 0);
1183 tmio_mmc_hw_reset(mmc);
1185 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1186 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1188 if (_host->native_hotplug)
1189 tmio_mmc_enable_mmc_irqs(_host,
1190 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1192 spin_lock_init(&_host->lock);
1193 mutex_init(&_host->ios_lock);
1195 /* Init delayed work for request timeouts */
1196 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1197 INIT_WORK(&_host->done, tmio_mmc_done_work);
1199 /* See if we also get DMA */
1200 tmio_mmc_request_dma(_host, pdata);
1202 pm_runtime_get_noresume(&pdev->dev);
1203 pm_runtime_set_active(&pdev->dev);
1204 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1205 pm_runtime_use_autosuspend(&pdev->dev);
1206 pm_runtime_enable(&pdev->dev);
1208 ret = mmc_add_host(mmc);
1212 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1213 pm_runtime_put(&pdev->dev);
1218 pm_runtime_put_noidle(&pdev->dev);
1219 tmio_mmc_host_remove(_host);
1222 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1224 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1226 struct platform_device *pdev = host->pdev;
1227 struct mmc_host *mmc = host->mmc;
1229 pm_runtime_get_sync(&pdev->dev);
1231 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1232 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1234 dev_pm_qos_hide_latency_limit(&pdev->dev);
1236 mmc_remove_host(mmc);
1237 cancel_work_sync(&host->done);
1238 cancel_delayed_work_sync(&host->delayed_reset_work);
1239 tmio_mmc_release_dma(host);
1240 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1242 if (host->native_hotplug)
1243 pm_runtime_put_noidle(&pdev->dev);
1245 pm_runtime_disable(&pdev->dev);
1246 pm_runtime_dont_use_autosuspend(&pdev->dev);
1247 pm_runtime_put_noidle(&pdev->dev);
1249 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1252 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1254 if (!host->clk_enable)
1257 return host->clk_enable(host);
1260 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1262 if (host->clk_disable)
1263 host->clk_disable(host);
1266 int tmio_mmc_host_runtime_suspend(struct device *dev)
1268 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1270 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1272 if (host->clk_cache)
1273 host->set_clock(host, 0);
1275 tmio_mmc_clk_disable(host);
1279 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1281 int tmio_mmc_host_runtime_resume(struct device *dev)
1283 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1285 tmio_mmc_clk_enable(host);
1286 tmio_mmc_hw_reset(host->mmc);
1288 if (host->clk_cache)
1289 host->set_clock(host, host->clk_cache);
1291 if (host->native_hotplug)
1292 tmio_mmc_enable_mmc_irqs(host,
1293 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1295 tmio_mmc_enable_dma(host, true);
1297 mmc_retune_needed(host->mmc);
1301 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1304 MODULE_LICENSE("GPL v2");