drivers/media/video/cx25840/cx25840-core.c

   1 /* cx25840 - Conexant CX25840 audio/video decoder driver
   2  *
   3  * Copyright (C) 2004 Ulf Eklund
   4  *
   5  * Based on the saa7115 driver and on the first verison of Chris Kennedy's
   6  * cx25840 driver.
   7  *
   8  * Changes by Tyler Trafford <tatrafford@comcast.net>
   9  *    - cleanup/rewrite for V4L2 API (2005)
  10  *
  11  * VBI support by Hans Verkuil <hverkuil@xs4all.nl>.
  12  *
  13  * NTSC sliced VBI support by Christopher Neufeld <television@cneufeld.ca>
  14  * with additional fixes by Hans Verkuil <hverkuil@xs4all.nl>.
  15  *
  16  * CX23885 support by Steven Toth <stoth@linuxtv.org>.
  17  *
  18  * This program is free software; you can redistribute it and/or
  19  * modify it under the terms of the GNU General Public License
  20  * as published by the Free Software Foundation; either version 2
  21  * of the License, or (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  31  */
  32
  33
  34 #include <linux/kernel.h>
  35 #include <linux/module.h>
  36 #include <linux/slab.h>
  37 #include <linux/videodev2.h>
  38 #include <linux/i2c.h>
  39 #include <linux/delay.h>
  40 #include <media/v4l2-common.h>
  41 #include <media/v4l2-chip-ident.h>
  42 #include <media/v4l2-i2c-drv.h>
  43 #include <media/cx25840.h>
  44
  45 #include "cx25840-core.h"
  46
  47 MODULE_DESCRIPTION("Conexant CX25840 audio/video decoder driver");
  48 MODULE_AUTHOR("Ulf Eklund, Chris Kennedy, Hans Verkuil, Tyler Trafford");
  49 MODULE_LICENSE("GPL");
  50
  51 static int cx25840_debug;
  52
  53 module_param_named(debug,cx25840_debug, int, 0644);
  54
  55 MODULE_PARM_DESC(debug, "Debugging messages [0=Off (default) 1=On]");
  56
  57
  58 /* ----------------------------------------------------------------------- */
  59
  60 int cx25840_write(struct i2c_client *client, u16 addr, u8 value)
  61 {
  62         u8 buffer[3];
  63         buffer[0] = addr >> 8;
  64         buffer[1] = addr & 0xff;
  65         buffer[2] = value;
  66         return i2c_master_send(client, buffer, 3);
  67 }
  68
  69 int cx25840_write4(struct i2c_client *client, u16 addr, u32 value)
  70 {
  71         u8 buffer[6];
  72         buffer[0] = addr >> 8;
  73         buffer[1] = addr & 0xff;
  74         buffer[2] = value & 0xff;
  75         buffer[3] = (value >> 8) & 0xff;
  76         buffer[4] = (value >> 16) & 0xff;
  77         buffer[5] = value >> 24;
  78         return i2c_master_send(client, buffer, 6);
  79 }
  80
  81 u8 cx25840_read(struct i2c_client * client, u16 addr)
  82 {
  83         u8 buffer[2];
  84         buffer[0] = addr >> 8;
  85         buffer[1] = addr & 0xff;
  86
  87         if (i2c_master_send(client, buffer, 2) < 2)
  88                 return 0;
  89
  90         if (i2c_master_recv(client, buffer, 1) < 1)
  91                 return 0;
  92
  93         return buffer[0];
  94 }
  95
  96 u32 cx25840_read4(struct i2c_client * client, u16 addr)
  97 {
  98         u8 buffer[4];
  99         buffer[0] = addr >> 8;
 100         buffer[1] = addr & 0xff;
 101
 102         if (i2c_master_send(client, buffer, 2) < 2)
 103                 return 0;
 104
 105         if (i2c_master_recv(client, buffer, 4) < 4)
 106                 return 0;
 107
 108         return (buffer[3] << 24) | (buffer[2] << 16) |
 109             (buffer[1] << 8) | buffer[0];
 110 }
 111
 112 int cx25840_and_or(struct i2c_client *client, u16 addr, unsigned and_mask,
 113                    u8 or_value)
 114 {
 115         return cx25840_write(client, addr,
 116                              (cx25840_read(client, addr) & and_mask) |
 117                              or_value);
 118 }
 119
 120 /* ----------------------------------------------------------------------- */
 121
 122 static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
 123                                                 enum cx25840_audio_input aud_input);
 124
 125 /* ----------------------------------------------------------------------- */
 126
 127 static void init_dll1(struct i2c_client *client)
 128 {
 129         /* This is the Hauppauge sequence used to
 130          * initialize the Delay Lock Loop 1 (ADC DLL). */
 131         cx25840_write(client, 0x159, 0x23);
 132         cx25840_write(client, 0x15a, 0x87);
 133         cx25840_write(client, 0x15b, 0x06);
 134         udelay(10);
 135         cx25840_write(client, 0x159, 0xe1);
 136         udelay(10);
 137         cx25840_write(client, 0x15a, 0x86);
 138         cx25840_write(client, 0x159, 0xe0);
 139         cx25840_write(client, 0x159, 0xe1);
 140         cx25840_write(client, 0x15b, 0x10);
 141 }
 142
 143 static void init_dll2(struct i2c_client *client)
 144 {
 145         /* This is the Hauppauge sequence used to
 146          * initialize the Delay Lock Loop 2 (ADC DLL). */
 147         cx25840_write(client, 0x15d, 0xe3);
 148         cx25840_write(client, 0x15e, 0x86);
 149         cx25840_write(client, 0x15f, 0x06);
 150         udelay(10);
 151         cx25840_write(client, 0x15d, 0xe1);
 152         cx25840_write(client, 0x15d, 0xe0);
 153         cx25840_write(client, 0x15d, 0xe1);
 154 }
 155
 156 static void cx25836_initialize(struct i2c_client *client)
 157 {
 158         /* reset configuration is described on page 3-77 of the CX25836 datasheet */
 159         /* 2. */
 160         cx25840_and_or(client, 0x000, ~0x01, 0x01);
 161         cx25840_and_or(client, 0x000, ~0x01, 0x00);
 162         /* 3a. */
 163         cx25840_and_or(client, 0x15a, ~0x70, 0x00);
 164         /* 3b. */
 165         cx25840_and_or(client, 0x15b, ~0x1e, 0x06);
 166         /* 3c. */
 167         cx25840_and_or(client, 0x159, ~0x02, 0x02);
 168         /* 3d. */
 169         udelay(10);
 170         /* 3e. */
 171         cx25840_and_or(client, 0x159, ~0x02, 0x00);
 172         /* 3f. */
 173         cx25840_and_or(client, 0x159, ~0xc0, 0xc0);
 174         /* 3g. */
 175         cx25840_and_or(client, 0x159, ~0x01, 0x00);
 176         cx25840_and_or(client, 0x159, ~0x01, 0x01);
 177         /* 3h. */
 178         cx25840_and_or(client, 0x15b, ~0x1e, 0x10);
 179 }
 180
 181 static void cx25840_work_handler(struct work_struct *work)
 182 {
 183         struct cx25840_state *state = container_of(work, struct cx25840_state, fw_work);
 184         cx25840_loadfw(state->c);
 185         wake_up(&state->fw_wait);
 186 }
 187
 188 static void cx25840_initialize(struct i2c_client *client)
 189 {
 190         DEFINE_WAIT(wait);
 191         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 192         struct workqueue_struct *q;
 193
 194         /* datasheet startup in numbered steps, refer to page 3-77 */
 195         /* 2. */
 196         cx25840_and_or(client, 0x803, ~0x10, 0x00);
 197         /* The default of this register should be 4, but I get 0 instead.
 198          * Set this register to 4 manually. */
 199         cx25840_write(client, 0x000, 0x04);
 200         /* 3. */
 201         init_dll1(client);
 202         init_dll2(client);
 203         cx25840_write(client, 0x136, 0x0a);
 204         /* 4. */
 205         cx25840_write(client, 0x13c, 0x01);
 206         cx25840_write(client, 0x13c, 0x00);
 207         /* 5. */
 208         /* Do the firmware load in a work handler to prevent.
 209            Otherwise the kernel is blocked waiting for the
 210            bit-banging i2c interface to finish uploading the
 211            firmware. */
 212         INIT_WORK(&state->fw_work, cx25840_work_handler);
 213         init_waitqueue_head(&state->fw_wait);
 214         q = create_singlethread_workqueue("cx25840_fw");
 215         prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
 216         queue_work(q, &state->fw_work);
 217         schedule();
 218         finish_wait(&state->fw_wait, &wait);
 219         destroy_workqueue(q);
 220
 221         /* 6. */
 222         cx25840_write(client, 0x115, 0x8c);
 223         cx25840_write(client, 0x116, 0x07);
 224         cx25840_write(client, 0x118, 0x02);
 225         /* 7. */
 226         cx25840_write(client, 0x4a5, 0x80);
 227         cx25840_write(client, 0x4a5, 0x00);
 228         cx25840_write(client, 0x402, 0x00);
 229         /* 8. */
 230         cx25840_and_or(client, 0x401, ~0x18, 0);
 231         cx25840_and_or(client, 0x4a2, ~0x10, 0x10);
 232         /* steps 8c and 8d are done in change_input() */
 233         /* 10. */
 234         cx25840_write(client, 0x8d3, 0x1f);
 235         cx25840_write(client, 0x8e3, 0x03);
 236
 237         cx25840_std_setup(client);
 238
 239         /* trial and error says these are needed to get audio */
 240         cx25840_write(client, 0x914, 0xa0);
 241         cx25840_write(client, 0x918, 0xa0);
 242         cx25840_write(client, 0x919, 0x01);
 243
 244         /* stereo prefered */
 245         cx25840_write(client, 0x809, 0x04);
 246         /* AC97 shift */
 247         cx25840_write(client, 0x8cf, 0x0f);
 248
 249         /* (re)set input */
 250         set_input(client, state->vid_input, state->aud_input);
 251
 252         /* start microcontroller */
 253         cx25840_and_or(client, 0x803, ~0x10, 0x10);
 254 }
 255
 256 static void cx23885_initialize(struct i2c_client *client)
 257 {
 258         DEFINE_WAIT(wait);
 259         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 260         struct workqueue_struct *q;
 261
 262         /*
 263          * Come out of digital power down
 264          * The CX23888, at least, needs this, otherwise registers aside from
 265          * 0x0-0x2 can't be read or written.
 266          */
 267         cx25840_write(client, 0x000, 0);
 268
 269         /* Internal Reset */
 270         cx25840_and_or(client, 0x102, ~0x01, 0x01);
 271         cx25840_and_or(client, 0x102, ~0x01, 0x00);
 272
 273         /* Stop microcontroller */
 274         cx25840_and_or(client, 0x803, ~0x10, 0x00);
 275
 276         /* DIF in reset? */
 277         cx25840_write(client, 0x398, 0);
 278
 279         /*
 280          * Trust the default xtal, no division
 281          * '885: 28.636363... MHz
 282          * '887: 25.000000 MHz
 283          * '888: 50.000000 MHz
 284          */
 285         cx25840_write(client, 0x2, 0x76);
 286
 287         /* Power up all the PLL's and DLL */
 288         cx25840_write(client, 0x1, 0x40);
 289
 290         /* Sys PLL */
 291         switch (state->id) {
 292         case V4L2_IDENT_CX23888_AV:
 293                 /*
 294                  * 50.0 MHz * (0xb + 0xe8ba26/0x2000000)/4 = 5 * 28.636363 MHz
 295                  * 572.73 MHz before post divide
 296                  */
 297                 cx25840_write4(client, 0x11c, 0x00e8ba26);
 298                 cx25840_write4(client, 0x118, 0x0000040b);
 299                 break;
 300         case V4L2_IDENT_CX23887_AV:
 301                 /*
 302                  * 25.0 MHz * (0x16 + 0x1d1744c/0x2000000)/4 = 5 * 28.636363 MHz
 303                  * 572.73 MHz before post divide
 304                  */
 305                 cx25840_write4(client, 0x11c, 0x01d1744c);
 306                 cx25840_write4(client, 0x118, 0x00000416);
 307                 break;
 308         case V4L2_IDENT_CX23885_AV:
 309         default:
 310                 /*
 311                  * 28.636363 MHz * (0x14 + 0x0/0x2000000)/4 = 5 * 28.636363 MHz
 312                  * 572.73 MHz before post divide
 313                  */
 314                 cx25840_write4(client, 0x11c, 0x00000000);
 315                 cx25840_write4(client, 0x118, 0x00000414);
 316                 break;
 317         }
 318
 319         /* Disable DIF bypass */
 320         cx25840_write4(client, 0x33c, 0x00000001);
 321
 322         /* DIF Src phase inc */
 323         cx25840_write4(client, 0x340, 0x0df7df83);
 324
 325         /*
 326          * Vid PLL
 327          * Setup for a BT.656 pixel clock of 13.5 Mpixels/second
 328          *
 329          * 28.636363 MHz * (0xf + 0x02be2c9/0x2000000)/4 = 8 * 13.5 MHz
 330          * 432.0 MHz before post divide
 331          */
 332         cx25840_write4(client, 0x10c, 0x002be2c9);
 333         cx25840_write4(client, 0x108, 0x0000040f);
 334
 335         /* Luma */
 336         cx25840_write4(client, 0x414, 0x00107d12);
 337
 338         /* Chroma */
 339         cx25840_write4(client, 0x420, 0x3d008282);
 340
 341         /*
 342          * Aux PLL
 343          * Initial setup for audio sample clock:
 344          * 48 ksps, 16 bits/sample, x160 multiplier = 122.88 MHz
 345          * Intial I2S output/master clock(?):
 346          * 48 ksps, 16 bits/sample, x16 multiplier = 12.288 MHz
 347          */
 348         switch (state->id) {
 349         case V4L2_IDENT_CX23888_AV:
 350                 /*
 351                  * 50.0 MHz * (0x7 + 0x0bedfa4/0x2000000)/3 = 122.88 MHz
 352                  * 368.64 MHz before post divide
 353                  * 122.88 MHz / 0xa = 12.288 MHz
 354                  */
 355                 cx25840_write4(client, 0x114, 0x00bedfa4);
 356                 cx25840_write4(client, 0x110, 0x000a0307);
 357                 break;
 358         case V4L2_IDENT_CX23887_AV:
 359                 /*
 360                  * 25.0 MHz * (0xe + 0x17dbf48/0x2000000)/3 = 122.88 MHz
 361                  * 368.64 MHz before post divide
 362                  * 122.88 MHz / 0xa = 12.288 MHz
 363                  */
 364                 cx25840_write4(client, 0x114, 0x017dbf48);
 365                 cx25840_write4(client, 0x110, 0x000a030e);
 366                 break;
 367         case V4L2_IDENT_CX23885_AV:
 368         default:
 369                 /*
 370                  * 28.636363 MHz * (0xc + 0x1bf0c9e/0x2000000)/3 = 122.88 MHz
 371                  * 368.64 MHz before post divide
 372                  * 122.88 MHz / 0xa = 12.288 MHz
 373                  */
 374                 cx25840_write4(client, 0x114, 0x01bf0c9e);
 375                 cx25840_write4(client, 0x110, 0x000a030c);
 376                 break;
 377         };
 378
 379         /* ADC2 input select */
 380         cx25840_write(client, 0x102, 0x10);
 381
 382         /* VIN1 & VIN5 */
 383         cx25840_write(client, 0x103, 0x11);
 384
 385         /* Enable format auto detect */
 386         cx25840_write(client, 0x400, 0);
 387         /* Fast subchroma lock */
 388         /* White crush, Chroma AGC & Chroma Killer enabled */
 389         cx25840_write(client, 0x401, 0xe8);
 390
 391         /* Select AFE clock pad output source */
 392         cx25840_write(client, 0x144, 0x05);
 393
 394         /* Drive GPIO2 direction and values for HVR1700
 395          * where an onboard mux selects the output of demodulator
 396          * vs the 417. Failure to set this results in no DTV.
 397          * It's safe to set this across all Hauppauge boards
 398          * currently, regardless of the board type.
 399          */
 400         cx25840_write(client, 0x160, 0x1d);
 401         cx25840_write(client, 0x164, 0x00);
 402
 403         /* Do the firmware load in a work handler to prevent.
 404            Otherwise the kernel is blocked waiting for the
 405            bit-banging i2c interface to finish uploading the
 406            firmware. */
 407         INIT_WORK(&state->fw_work, cx25840_work_handler);
 408         init_waitqueue_head(&state->fw_wait);
 409         q = create_singlethread_workqueue("cx25840_fw");
 410         prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
 411         queue_work(q, &state->fw_work);
 412         schedule();
 413         finish_wait(&state->fw_wait, &wait);
 414         destroy_workqueue(q);
 415
 416         cx25840_std_setup(client);
 417
 418         /* (re)set input */
 419         set_input(client, state->vid_input, state->aud_input);
 420
 421         /* start microcontroller */
 422         cx25840_and_or(client, 0x803, ~0x10, 0x10);
 423 }
 424
 425 /* ----------------------------------------------------------------------- */
 426
 427 static void cx231xx_initialize(struct i2c_client *client)
 428 {
 429         DEFINE_WAIT(wait);
 430         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 431         struct workqueue_struct *q;
 432
 433         /* Internal Reset */
 434         cx25840_and_or(client, 0x102, ~0x01, 0x01);
 435         cx25840_and_or(client, 0x102, ~0x01, 0x00);
 436
 437         /* Stop microcontroller */
 438         cx25840_and_or(client, 0x803, ~0x10, 0x00);
 439
 440         /* DIF in reset? */
 441         cx25840_write(client, 0x398, 0);
 442
 443         /* Trust the default xtal, no division */
 444         /* This changes for the cx23888 products */
 445         cx25840_write(client, 0x2, 0x76);
 446
 447         /* Bring down the regulator for AUX clk */
 448         cx25840_write(client, 0x1, 0x40);
 449
 450         /* Disable DIF bypass */
 451         cx25840_write4(client, 0x33c, 0x00000001);
 452
 453         /* DIF Src phase inc */
 454         cx25840_write4(client, 0x340, 0x0df7df83);
 455
 456         /* Luma */
 457         cx25840_write4(client, 0x414, 0x00107d12);
 458
 459         /* Chroma */
 460         cx25840_write4(client, 0x420, 0x3d008282);
 461
 462         /* ADC2 input select */
 463         cx25840_write(client, 0x102, 0x10);
 464
 465         /* VIN1 & VIN5 */
 466         cx25840_write(client, 0x103, 0x11);
 467
 468         /* Enable format auto detect */
 469         cx25840_write(client, 0x400, 0);
 470         /* Fast subchroma lock */
 471         /* White crush, Chroma AGC & Chroma Killer enabled */
 472         cx25840_write(client, 0x401, 0xe8);
 473
 474         /* Do the firmware load in a work handler to prevent.
 475            Otherwise the kernel is blocked waiting for the
 476            bit-banging i2c interface to finish uploading the
 477            firmware. */
 478         INIT_WORK(&state->fw_work, cx25840_work_handler);
 479         init_waitqueue_head(&state->fw_wait);
 480         q = create_singlethread_workqueue("cx25840_fw");
 481         prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
 482         queue_work(q, &state->fw_work);
 483         schedule();
 484         finish_wait(&state->fw_wait, &wait);
 485         destroy_workqueue(q);
 486
 487         cx25840_std_setup(client);
 488
 489         /* (re)set input */
 490         set_input(client, state->vid_input, state->aud_input);
 491
 492         /* start microcontroller */
 493         cx25840_and_or(client, 0x803, ~0x10, 0x10);
 494 }
 495
 496 /* ----------------------------------------------------------------------- */
 497
 498 void cx25840_std_setup(struct i2c_client *client)
 499 {
 500         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 501         v4l2_std_id std = state->std;
 502         int hblank, hactive, burst, vblank, vactive, sc;
 503         int vblank656, src_decimation;
 504         int luma_lpf, uv_lpf, comb;
 505         u32 pll_int, pll_frac, pll_post;
 506
 507         /* datasheet startup, step 8d */
 508         if (std & ~V4L2_STD_NTSC)
 509                 cx25840_write(client, 0x49f, 0x11);
 510         else
 511                 cx25840_write(client, 0x49f, 0x14);
 512
 513         if (std & V4L2_STD_625_50) {
 514                 hblank = 132;
 515                 hactive = 720;
 516                 burst = 93;
 517                 vblank = 36;
 518                 vactive = 580;
 519                 vblank656 = 40;
 520                 src_decimation = 0x21f;
 521                 luma_lpf = 2;
 522
 523                 if (std & V4L2_STD_SECAM) {
 524                         uv_lpf = 0;
 525                         comb = 0;
 526                         sc = 0x0a425f;
 527                 } else if (std == V4L2_STD_PAL_Nc) {
 528                         uv_lpf = 1;
 529                         comb = 0x20;
 530                         sc = 556453;
 531                 } else {
 532                         uv_lpf = 1;
 533                         comb = 0x20;
 534                         sc = 688739;
 535                 }
 536         } else {
 537                 hactive = 720;
 538                 hblank = 122;
 539                 vactive = 487;
 540                 luma_lpf = 1;
 541                 uv_lpf = 1;
 542
 543                 src_decimation = 0x21f;
 544                 if (std == V4L2_STD_PAL_60) {
 545                         vblank = 26;
 546                         vblank656 = 26;
 547                         burst = 0x5b;
 548                         luma_lpf = 2;
 549                         comb = 0x20;
 550                         sc = 688739;
 551                 } else if (std == V4L2_STD_PAL_M) {
 552                         vblank = 20;
 553                         vblank656 = 24;
 554                         burst = 0x61;
 555                         comb = 0x20;
 556                         sc = 555452;
 557                 } else {
 558                         vblank = 26;
 559                         vblank656 = 26;
 560                         burst = 0x5b;
 561                         comb = 0x66;
 562                         sc = 556063;
 563                 }
 564         }
 565
 566         /* DEBUG: Displays configured PLL frequency */
 567         if (!is_cx231xx(state)) {
 568                 pll_int = cx25840_read(client, 0x108);
 569                 pll_frac = cx25840_read4(client, 0x10c) & 0x1ffffff;
 570                 pll_post = cx25840_read(client, 0x109);
 571                 v4l_dbg(1, cx25840_debug, client,
 572                         "PLL regs = int: %u, frac: %u, post: %u\n",
 573                         pll_int, pll_frac, pll_post);
 574
 575                 if (pll_post) {
 576                         int fin, fsc;
 577                         int pll = (28636363L * ((((u64)pll_int) << 25L) + pll_frac)) >> 25L;
 578
 579                         pll /= pll_post;
 580                         v4l_dbg(1, cx25840_debug, client, "PLL = %d.%06d MHz\n",
 581                                         pll / 1000000, pll % 1000000);
 582                         v4l_dbg(1, cx25840_debug, client, "PLL/8 = %d.%06d MHz\n",
 583                                         pll / 8000000, (pll / 8) % 1000000);
 584
 585                         fin = ((u64)src_decimation * pll) >> 12;
 586                         v4l_dbg(1, cx25840_debug, client,
 587                                         "ADC Sampling freq = %d.%06d MHz\n",
 588                                         fin / 1000000, fin % 1000000);
 589
 590                         fsc = (((u64)sc) * pll) >> 24L;
 591                         v4l_dbg(1, cx25840_debug, client,
 592                                         "Chroma sub-carrier freq = %d.%06d MHz\n",
 593                                         fsc / 1000000, fsc % 1000000);
 594
 595                         v4l_dbg(1, cx25840_debug, client, "hblank %i, hactive %i, "
 596                                 "vblank %i, vactive %i, vblank656 %i, src_dec %i, "
 597                                 "burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x, "
 598                                 "sc 0x%06x\n",
 599                                 hblank, hactive, vblank, vactive, vblank656,
 600                                 src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
 601                 }
 602         }
 603
 604         /* Sets horizontal blanking delay and active lines */
 605         cx25840_write(client, 0x470, hblank);
 606         cx25840_write(client, 0x471,
 607                         0xff & (((hblank >> 8) & 0x3) | (hactive << 4)));
 608         cx25840_write(client, 0x472, hactive >> 4);
 609
 610         /* Sets burst gate delay */
 611         cx25840_write(client, 0x473, burst);
 612
 613         /* Sets vertical blanking delay and active duration */
 614         cx25840_write(client, 0x474, vblank);
 615         cx25840_write(client, 0x475,
 616                         0xff & (((vblank >> 8) & 0x3) | (vactive << 4)));
 617         cx25840_write(client, 0x476, vactive >> 4);
 618         cx25840_write(client, 0x477, vblank656);
 619
 620         /* Sets src decimation rate */
 621         cx25840_write(client, 0x478, 0xff & src_decimation);
 622         cx25840_write(client, 0x479, 0xff & (src_decimation >> 8));
 623
 624         /* Sets Luma and UV Low pass filters */
 625         cx25840_write(client, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
 626
 627         /* Enables comb filters */
 628         cx25840_write(client, 0x47b, comb);
 629
 630         /* Sets SC Step*/
 631         cx25840_write(client, 0x47c, sc);
 632         cx25840_write(client, 0x47d, 0xff & sc >> 8);
 633         cx25840_write(client, 0x47e, 0xff & sc >> 16);
 634
 635         /* Sets VBI parameters */
 636         if (std & V4L2_STD_625_50) {
 637                 cx25840_write(client, 0x47f, 0x01);
 638                 state->vbi_line_offset = 5;
 639         } else {
 640                 cx25840_write(client, 0x47f, 0x00);
 641                 state->vbi_line_offset = 8;
 642         }
 643 }
 644
 645 /* ----------------------------------------------------------------------- */
 646
 647 static void input_change(struct i2c_client *client)
 648 {
 649         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 650         v4l2_std_id std = state->std;
 651
 652         /* Follow step 8c and 8d of section 3.16 in the cx25840 datasheet */
 653         if (std & V4L2_STD_SECAM) {
 654                 cx25840_write(client, 0x402, 0);
 655         }
 656         else {
 657                 cx25840_write(client, 0x402, 0x04);
 658                 cx25840_write(client, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);
 659         }
 660         cx25840_and_or(client, 0x401, ~0x60, 0);
 661         cx25840_and_or(client, 0x401, ~0x60, 0x60);
 662         cx25840_and_or(client, 0x810, ~0x01, 1);
 663
 664         if (state->radio) {
 665                 cx25840_write(client, 0x808, 0xf9);
 666                 cx25840_write(client, 0x80b, 0x00);
 667         }
 668         else if (std & V4L2_STD_525_60) {
 669                 /* Certain Hauppauge PVR150 models have a hardware bug
 670                    that causes audio to drop out. For these models the
 671                    audio standard must be set explicitly.
 672                    To be precise: it affects cards with tuner models
 673                    85, 99 and 112 (model numbers from tveeprom). */
 674                 int hw_fix = state->pvr150_workaround;
 675
 676                 if (std == V4L2_STD_NTSC_M_JP) {
 677                         /* Japan uses EIAJ audio standard */
 678                         cx25840_write(client, 0x808, hw_fix ? 0x2f : 0xf7);
 679                 } else if (std == V4L2_STD_NTSC_M_KR) {
 680                         /* South Korea uses A2 audio standard */
 681                         cx25840_write(client, 0x808, hw_fix ? 0x3f : 0xf8);
 682                 } else {
 683                         /* Others use the BTSC audio standard */
 684                         cx25840_write(client, 0x808, hw_fix ? 0x1f : 0xf6);
 685                 }
 686                 cx25840_write(client, 0x80b, 0x00);
 687         } else if (std & V4L2_STD_PAL) {
 688                 /* Autodetect audio standard and audio system */
 689                 cx25840_write(client, 0x808, 0xff);
 690                 /* Since system PAL-L is pretty much non-existant and
 691                    not used by any public broadcast network, force
 692                    6.5 MHz carrier to be interpreted as System DK,
 693                    this avoids DK audio detection instability */
 694                cx25840_write(client, 0x80b, 0x00);
 695         } else if (std & V4L2_STD_SECAM) {
 696                 /* Autodetect audio standard and audio system */
 697                 cx25840_write(client, 0x808, 0xff);
 698                 /* If only one of SECAM-DK / SECAM-L is required, then force
 699                   6.5MHz carrier, else autodetect it */
 700                 if ((std & V4L2_STD_SECAM_DK) &&
 701                     !(std & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC))) {
 702                         /* 6.5 MHz carrier to be interpreted as System DK */
 703                         cx25840_write(client, 0x80b, 0x00);
 704                } else if (!(std & V4L2_STD_SECAM_DK) &&
 705                           (std & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC))) {
 706                         /* 6.5 MHz carrier to be interpreted as System L */
 707                         cx25840_write(client, 0x80b, 0x08);
 708                } else {
 709                         /* 6.5 MHz carrier to be autodetected */
 710                         cx25840_write(client, 0x80b, 0x10);
 711                }
 712         }
 713
 714         cx25840_and_or(client, 0x810, ~0x01, 0);
 715 }
 716
 717 static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
 718                                                 enum cx25840_audio_input aud_input)
 719 {
 720         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 721         u8 is_composite = (vid_input >= CX25840_COMPOSITE1 &&
 722                            vid_input <= CX25840_COMPOSITE8);
 723         u8 is_component = (vid_input & CX25840_COMPONENT_ON) ==
 724                         CX25840_COMPONENT_ON;
 725         int luma = vid_input & 0xf0;
 726         int chroma = vid_input & 0xf00;
 727         u8 reg;
 728
 729         v4l_dbg(1, cx25840_debug, client,
 730                 "decoder set video input %d, audio input %d\n",
 731                 vid_input, aud_input);
 732
 733         if (vid_input >= CX25840_VIN1_CH1) {
 734                 v4l_dbg(1, cx25840_debug, client, "vid_input 0x%x\n",
 735                         vid_input);
 736                 reg = vid_input & 0xff;
 737                 if ((vid_input & CX25840_SVIDEO_ON) == CX25840_SVIDEO_ON)
 738                         is_composite = 0;
 739                 else if ((vid_input & CX25840_COMPONENT_ON) == 0)
 740                         is_composite = 1;
 741
 742                 v4l_dbg(1, cx25840_debug, client, "mux cfg 0x%x comp=%d\n",
 743                         reg, is_composite);
 744         } else if (is_composite) {
 745                 reg = 0xf0 + (vid_input - CX25840_COMPOSITE1);
 746         } else {
 747                 if ((vid_input & ~0xff0) ||
 748                     luma < CX25840_SVIDEO_LUMA1 || luma > CX25840_SVIDEO_LUMA8 ||
 749                     chroma < CX25840_SVIDEO_CHROMA4 || chroma > CX25840_SVIDEO_CHROMA8) {
 750                         v4l_err(client, "0x%04x is not a valid video input!\n",
 751                                 vid_input);
 752                         return -EINVAL;
 753                 }
 754                 reg = 0xf0 + ((luma - CX25840_SVIDEO_LUMA1) >> 4);
 755                 if (chroma >= CX25840_SVIDEO_CHROMA7) {
 756                         reg &= 0x3f;
 757                         reg |= (chroma - CX25840_SVIDEO_CHROMA7) >> 2;
 758                 } else {
 759                         reg &= 0xcf;
 760                         reg |= (chroma - CX25840_SVIDEO_CHROMA4) >> 4;
 761                 }
 762         }
 763
 764         /* The caller has previously prepared the correct routing
 765          * configuration in reg (for the cx23885) so we have no
 766          * need to attempt to flip bits for earlier av decoders.
 767          */
 768         if (!is_cx2388x(state) && !is_cx231xx(state)) {
 769                 switch (aud_input) {
 770                 case CX25840_AUDIO_SERIAL:
 771                         /* do nothing, use serial audio input */
 772                         break;
 773                 case CX25840_AUDIO4: reg &= ~0x30; break;
 774                 case CX25840_AUDIO5: reg &= ~0x30; reg |= 0x10; break;
 775                 case CX25840_AUDIO6: reg &= ~0x30; reg |= 0x20; break;
 776                 case CX25840_AUDIO7: reg &= ~0xc0; break;
 777                 case CX25840_AUDIO8: reg &= ~0xc0; reg |= 0x40; break;
 778
 779                 default:
 780                         v4l_err(client, "0x%04x is not a valid audio input!\n",
 781                                 aud_input);
 782                         return -EINVAL;
 783                 }
 784         }
 785
 786         cx25840_write(client, 0x103, reg);
 787
 788         /* Set INPUT_MODE to Composite, S-Video or Component */
 789         if (is_component)
 790                 cx25840_and_or(client, 0x401, ~0x6, 0x6);
 791         else
 792                 cx25840_and_or(client, 0x401, ~0x6, is_composite ? 0 : 0x02);
 793
 794         if (!is_cx2388x(state) && !is_cx231xx(state)) {
 795                 /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
 796                 cx25840_and_or(client, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
 797                 /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2&CH3 */
 798                 if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30)
 799                         cx25840_and_or(client, 0x102, ~0x4, 4);
 800                 else
 801                         cx25840_and_or(client, 0x102, ~0x4, 0);
 802         } else {
 803                 /* Set DUAL_MODE_ADC2 to 1 if component*/
 804                 cx25840_and_or(client, 0x102, ~0x4, is_component ? 0x4 : 0x0);
 805                 if (is_composite) {
 806                         /* ADC2 input select channel 2 */
 807                         cx25840_and_or(client, 0x102, ~0x2, 0);
 808                 } else if (!is_component) {
 809                         /* S-Video */
 810                         if (chroma >= CX25840_SVIDEO_CHROMA7) {
 811                                 /* ADC2 input select channel 3 */
 812                                 cx25840_and_or(client, 0x102, ~0x2, 2);
 813                         } else {
 814                                 /* ADC2 input select channel 2 */
 815                                 cx25840_and_or(client, 0x102, ~0x2, 0);
 816                         }
 817                 }
 818         }
 819
 820         state->vid_input = vid_input;
 821         state->aud_input = aud_input;
 822         if (!is_cx2583x(state)) {
 823                 cx25840_audio_set_path(client);
 824                 input_change(client);
 825         }
 826
 827         if (is_cx2388x(state)) {
 828                 /* Audio channel 1 src : Parallel 1 */
 829                 cx25840_write(client, 0x124, 0x03);
 830
 831                 /* Select AFE clock pad output source */
 832                 cx25840_write(client, 0x144, 0x05);
 833
 834                 /* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
 835                 cx25840_write(client, 0x914, 0xa0);
 836
 837                 /* I2S_OUT_CTL:
 838                  * I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
 839                  * I2S_OUT_MASTER_MODE = Master
 840                  */
 841                 cx25840_write(client, 0x918, 0xa0);
 842                 cx25840_write(client, 0x919, 0x01);
 843         } else if (is_cx231xx(state)) {
 844                 /* Audio channel 1 src : Parallel 1 */
 845                 cx25840_write(client, 0x124, 0x03);
 846
 847                 /* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
 848                 cx25840_write(client, 0x914, 0xa0);
 849
 850                 /* I2S_OUT_CTL:
 851                  * I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
 852                  * I2S_OUT_MASTER_MODE = Master
 853                  */
 854                 cx25840_write(client, 0x918, 0xa0);
 855                 cx25840_write(client, 0x919, 0x01);
 856         }
 857
 858         return 0;
 859 }
 860
 861 /* ----------------------------------------------------------------------- */
 862
 863 static int set_v4lstd(struct i2c_client *client)
 864 {
 865         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 866         u8 fmt = 0;     /* zero is autodetect */
 867         u8 pal_m = 0;
 868
 869         /* First tests should be against specific std */
 870         if (state->std == V4L2_STD_NTSC_M_JP) {
 871                 fmt = 0x2;
 872         } else if (state->std == V4L2_STD_NTSC_443) {
 873                 fmt = 0x3;
 874         } else if (state->std == V4L2_STD_PAL_M) {
 875                 pal_m = 1;
 876                 fmt = 0x5;
 877         } else if (state->std == V4L2_STD_PAL_N) {
 878                 fmt = 0x6;
 879         } else if (state->std == V4L2_STD_PAL_Nc) {
 880                 fmt = 0x7;
 881         } else if (state->std == V4L2_STD_PAL_60) {
 882                 fmt = 0x8;
 883         } else {
 884                 /* Then, test against generic ones */
 885                 if (state->std & V4L2_STD_NTSC)
 886                         fmt = 0x1;
 887                 else if (state->std & V4L2_STD_PAL)
 888                         fmt = 0x4;
 889                 else if (state->std & V4L2_STD_SECAM)
 890                         fmt = 0xc;
 891         }
 892
 893         v4l_dbg(1, cx25840_debug, client, "changing video std to fmt %i\n",fmt);
 894
 895         /* Follow step 9 of section 3.16 in the cx25840 datasheet.
 896            Without this PAL may display a vertical ghosting effect.
 897            This happens for example with the Yuan MPC622. */
 898         if (fmt >= 4 && fmt < 8) {
 899                 /* Set format to NTSC-M */
 900                 cx25840_and_or(client, 0x400, ~0xf, 1);
 901                 /* Turn off LCOMB */
 902                 cx25840_and_or(client, 0x47b, ~6, 0);
 903         }
 904         cx25840_and_or(client, 0x400, ~0xf, fmt);
 905         cx25840_and_or(client, 0x403, ~0x3, pal_m);
 906         cx25840_std_setup(client);
 907         if (!is_cx2583x(state))
 908                 input_change(client);
 909         return 0;
 910 }
 911
 912 /* ----------------------------------------------------------------------- */
 913
 914 static int cx25840_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
 915 {
 916         struct cx25840_state *state = to_state(sd);
 917         struct i2c_client *client = v4l2_get_subdevdata(sd);
 918
 919         switch (ctrl->id) {
 920         case CX25840_CID_ENABLE_PVR150_WORKAROUND:
 921                 state->pvr150_workaround = ctrl->value;
 922                 set_input(client, state->vid_input, state->aud_input);
 923                 break;
 924
 925         case V4L2_CID_BRIGHTNESS:
 926                 if (ctrl->value < 0 || ctrl->value > 255) {
 927                         v4l_err(client, "invalid brightness setting %d\n",
 928                                     ctrl->value);
 929                         return -ERANGE;
 930                 }
 931
 932                 cx25840_write(client, 0x414, ctrl->value - 128);
 933                 break;
 934
 935         case V4L2_CID_CONTRAST:
 936                 if (ctrl->value < 0 || ctrl->value > 127) {
 937                         v4l_err(client, "invalid contrast setting %d\n",
 938                                     ctrl->value);
 939                         return -ERANGE;
 940                 }
 941
 942                 cx25840_write(client, 0x415, ctrl->value << 1);
 943                 break;
 944
 945         case V4L2_CID_SATURATION:
 946                 if (ctrl->value < 0 || ctrl->value > 127) {
 947                         v4l_err(client, "invalid saturation setting %d\n",
 948                                     ctrl->value);
 949                         return -ERANGE;
 950                 }
 951
 952                 cx25840_write(client, 0x420, ctrl->value << 1);
 953                 cx25840_write(client, 0x421, ctrl->value << 1);
 954                 break;
 955
 956         case V4L2_CID_HUE:
 957                 if (ctrl->value < -128 || ctrl->value > 127) {
 958                         v4l_err(client, "invalid hue setting %d\n", ctrl->value);
 959                         return -ERANGE;
 960                 }
 961
 962                 cx25840_write(client, 0x422, ctrl->value);
 963                 break;
 964
 965         case V4L2_CID_AUDIO_VOLUME:
 966         case V4L2_CID_AUDIO_BASS:
 967         case V4L2_CID_AUDIO_TREBLE:
 968         case V4L2_CID_AUDIO_BALANCE:
 969         case V4L2_CID_AUDIO_MUTE:
 970                 if (is_cx2583x(state))
 971                         return -EINVAL;
 972                 return cx25840_audio_s_ctrl(sd, ctrl);
 973
 974         default:
 975                 return -EINVAL;
 976         }
 977
 978         return 0;
 979 }
 980
 981 static int cx25840_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
 982 {
 983         struct cx25840_state *state = to_state(sd);
 984         struct i2c_client *client = v4l2_get_subdevdata(sd);
 985
 986         switch (ctrl->id) {
 987         case CX25840_CID_ENABLE_PVR150_WORKAROUND:
 988                 ctrl->value = state->pvr150_workaround;
 989                 break;
 990         case V4L2_CID_BRIGHTNESS:
 991                 ctrl->value = (s8)cx25840_read(client, 0x414) + 128;
 992                 break;
 993         case V4L2_CID_CONTRAST:
 994                 ctrl->value = cx25840_read(client, 0x415) >> 1;
 995                 break;
 996         case V4L2_CID_SATURATION:
 997                 ctrl->value = cx25840_read(client, 0x420) >> 1;
 998                 break;
 999         case V4L2_CID_HUE:
1000                 ctrl->value = (s8)cx25840_read(client, 0x422);
1001                 break;
1002         case V4L2_CID_AUDIO_VOLUME:
1003         case V4L2_CID_AUDIO_BASS:
1004         case V4L2_CID_AUDIO_TREBLE:
1005         case V4L2_CID_AUDIO_BALANCE:
1006         case V4L2_CID_AUDIO_MUTE:
1007                 if (is_cx2583x(state))
1008                         return -EINVAL;
1009                 return cx25840_audio_g_ctrl(sd, ctrl);
1010         default:
1011                 return -EINVAL;
1012         }
1013
1014         return 0;
1015 }
1016
1017 /* ----------------------------------------------------------------------- */
1018
1019 static int cx25840_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
1020 {
1021         switch (fmt->type) {
1022         case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
1023                 return cx25840_vbi_g_fmt(sd, fmt);
1024         default:
1025                 return -EINVAL;
1026         }
1027         return 0;
1028 }
1029
1030 static int cx25840_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
1031 {
1032         struct cx25840_state *state = to_state(sd);
1033         struct i2c_client *client = v4l2_get_subdevdata(sd);
1034         struct v4l2_pix_format *pix;
1035         int HSC, VSC, Vsrc, Hsrc, filter, Vlines;
1036         int is_50Hz = !(state->std & V4L2_STD_525_60);
1037
1038         switch (fmt->type) {
1039         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1040                 pix = &(fmt->fmt.pix);
1041
1042                 Vsrc = (cx25840_read(client, 0x476) & 0x3f) << 4;
1043                 Vsrc |= (cx25840_read(client, 0x475) & 0xf0) >> 4;
1044
1045                 Hsrc = (cx25840_read(client, 0x472) & 0x3f) << 4;
1046                 Hsrc |= (cx25840_read(client, 0x471) & 0xf0) >> 4;
1047
1048                 Vlines = pix->height + (is_50Hz ? 4 : 7);
1049
1050                 if ((pix->width * 16 < Hsrc) || (Hsrc < pix->width) ||
1051                     (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) {
1052                         v4l_err(client, "%dx%d is not a valid size!\n",
1053                                     pix->width, pix->height);
1054                         return -ERANGE;
1055                 }
1056
1057                 HSC = (Hsrc * (1 << 20)) / pix->width - (1 << 20);
1058                 VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9));
1059                 VSC &= 0x1fff;
1060
1061                 if (pix->width >= 385)
1062                         filter = 0;
1063                 else if (pix->width > 192)
1064                         filter = 1;
1065                 else if (pix->width > 96)
1066                         filter = 2;
1067                 else
1068                         filter = 3;
1069
1070                 v4l_dbg(1, cx25840_debug, client, "decoder set size %dx%d -> scale  %ux%u\n",
1071                             pix->width, pix->height, HSC, VSC);
1072
1073                 /* HSCALE=HSC */
1074                 cx25840_write(client, 0x418, HSC & 0xff);
1075                 cx25840_write(client, 0x419, (HSC >> 8) & 0xff);
1076                 cx25840_write(client, 0x41a, HSC >> 16);
1077                 /* VSCALE=VSC */
1078                 cx25840_write(client, 0x41c, VSC & 0xff);
1079                 cx25840_write(client, 0x41d, VSC >> 8);
1080                 /* VS_INTRLACE=1 VFILT=filter */
1081                 cx25840_write(client, 0x41e, 0x8 | filter);
1082                 break;
1083
1084         case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
1085                 return cx25840_vbi_s_fmt(sd, fmt);
1086
1087         case V4L2_BUF_TYPE_VBI_CAPTURE:
1088                 return cx25840_vbi_s_fmt(sd, fmt);
1089
1090         default:
1091                 return -EINVAL;
1092         }
1093
1094         return 0;
1095 }
1096
1097 /* ----------------------------------------------------------------------- */
1098
1099 static void log_video_status(struct i2c_client *client)
1100 {
1101         static const char *const fmt_strs[] = {
1102                 "0x0",
1103                 "NTSC-M", "NTSC-J", "NTSC-4.43",
1104                 "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60",
1105                 "0x9", "0xA", "0xB",
1106                 "SECAM",
1107                 "0xD", "0xE", "0xF"
1108         };
1109
1110         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
1111         u8 vidfmt_sel = cx25840_read(client, 0x400) & 0xf;
1112         u8 gen_stat1 = cx25840_read(client, 0x40d);
1113         u8 gen_stat2 = cx25840_read(client, 0x40e);
1114         int vid_input = state->vid_input;
1115
1116         v4l_info(client, "Video signal:              %spresent\n",
1117                     (gen_stat2 & 0x20) ? "" : "not ");
1118         v4l_info(client, "Detected format:           %s\n",
1119                     fmt_strs[gen_stat1 & 0xf]);
1120
1121         v4l_info(client, "Specified standard:        %s\n",
1122                     vidfmt_sel ? fmt_strs[vidfmt_sel] : "automatic detection");
1123
1124         if (vid_input >= CX25840_COMPOSITE1 &&
1125             vid_input <= CX25840_COMPOSITE8) {
1126                 v4l_info(client, "Specified video input:     Composite %d\n",
1127                         vid_input - CX25840_COMPOSITE1 + 1);
1128         } else {
1129                 v4l_info(client, "Specified video input:     S-Video (Luma In%d, Chroma In%d)\n",
1130                         (vid_input & 0xf0) >> 4, (vid_input & 0xf00) >> 8);
1131         }
1132
1133         v4l_info(client, "Specified audioclock freq: %d Hz\n", state->audclk_freq);
1134 }
1135
1136 /* ----------------------------------------------------------------------- */
1137
1138 static void log_audio_status(struct i2c_client *client)
1139 {
1140         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
1141         u8 download_ctl = cx25840_read(client, 0x803);
1142         u8 mod_det_stat0 = cx25840_read(client, 0x804);
1143         u8 mod_det_stat1 = cx25840_read(client, 0x805);
1144         u8 audio_config = cx25840_read(client, 0x808);
1145         u8 pref_mode = cx25840_read(client, 0x809);
1146         u8 afc0 = cx25840_read(client, 0x80b);
1147         u8 mute_ctl = cx25840_read(client, 0x8d3);
1148         int aud_input = state->aud_input;
1149         char *p;
1150
1151         switch (mod_det_stat0) {
1152         case 0x00: p = "mono"; break;
1153         case 0x01: p = "stereo"; break;
1154         case 0x02: p = "dual"; break;
1155         case 0x04: p = "tri"; break;
1156         case 0x10: p = "mono with SAP"; break;
1157         case 0x11: p = "stereo with SAP"; break;
1158         case 0x12: p = "dual with SAP"; break;
1159         case 0x14: p = "tri with SAP"; break;
1160         case 0xfe: p = "forced mode"; break;
1161         default: p = "not defined";
1162         }
1163         v4l_info(client, "Detected audio mode:       %s\n", p);
1164
1165         switch (mod_det_stat1) {
1166         case 0x00: p = "not defined"; break;
1167         case 0x01: p = "EIAJ"; break;
1168         case 0x02: p = "A2-M"; break;
1169         case 0x03: p = "A2-BG"; break;
1170         case 0x04: p = "A2-DK1"; break;
1171         case 0x05: p = "A2-DK2"; break;
1172         case 0x06: p = "A2-DK3"; break;
1173         case 0x07: p = "A1 (6.0 MHz FM Mono)"; break;
1174         case 0x08: p = "AM-L"; break;
1175         case 0x09: p = "NICAM-BG"; break;
1176         case 0x0a: p = "NICAM-DK"; break;
1177         case 0x0b: p = "NICAM-I"; break;
1178         case 0x0c: p = "NICAM-L"; break;
1179         case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break;
1180         case 0x0e: p = "IF FM Radio"; break;
1181         case 0x0f: p = "BTSC"; break;
1182         case 0x10: p = "high-deviation FM"; break;
1183         case 0x11: p = "very high-deviation FM"; break;
1184         case 0xfd: p = "unknown audio standard"; break;
1185         case 0xfe: p = "forced audio standard"; break;
1186         case 0xff: p = "no detected audio standard"; break;
1187         default: p = "not defined";
1188         }
1189         v4l_info(client, "Detected audio standard:   %s\n", p);
1190         v4l_info(client, "Audio muted:               %s\n",
1191                     (state->unmute_volume >= 0) ? "yes" : "no");
1192         v4l_info(client, "Audio microcontroller:     %s\n",
1193                     (download_ctl & 0x10) ?
1194                                 ((mute_ctl & 0x2) ? "detecting" : "running") : "stopped");
1195
1196         switch (audio_config >> 4) {
1197         case 0x00: p = "undefined"; break;
1198         case 0x01: p = "BTSC"; break;
1199         case 0x02: p = "EIAJ"; break;
1200         case 0x03: p = "A2-M"; break;
1201         case 0x04: p = "A2-BG"; break;
1202         case 0x05: p = "A2-DK1"; break;
1203         case 0x06: p = "A2-DK2"; break;
1204         case 0x07: p = "A2-DK3"; break;
1205         case 0x08: p = "A1 (6.0 MHz FM Mono)"; break;
1206         case 0x09: p = "AM-L"; break;
1207         case 0x0a: p = "NICAM-BG"; break;
1208         case 0x0b: p = "NICAM-DK"; break;
1209         case 0x0c: p = "NICAM-I"; break;
1210         case 0x0d: p = "NICAM-L"; break;
1211         case 0x0e: p = "FM radio"; break;
1212         case 0x0f: p = "automatic detection"; break;
1213         default: p = "undefined";
1214         }
1215         v4l_info(client, "Configured audio standard: %s\n", p);
1216
1217         if ((audio_config >> 4) < 0xF) {
1218                 switch (audio_config & 0xF) {
1219                 case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break;
1220                 case 0x01: p = "MONO2 (LANGUAGE B)"; break;
1221                 case 0x02: p = "MONO3 (STEREO forced MONO)"; break;
1222                 case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break;
1223                 case 0x04: p = "STEREO"; break;
1224                 case 0x05: p = "DUAL1 (AB)"; break;
1225                 case 0x06: p = "DUAL2 (AC) (FM)"; break;
1226                 case 0x07: p = "DUAL3 (BC) (FM)"; break;
1227                 case 0x08: p = "DUAL4 (AC) (AM)"; break;
1228                 case 0x09: p = "DUAL5 (BC) (AM)"; break;
1229                 case 0x0a: p = "SAP"; break;
1230                 default: p = "undefined";
1231                 }
1232                 v4l_info(client, "Configured audio mode:     %s\n", p);
1233         } else {
1234                 switch (audio_config & 0xF) {
1235                 case 0x00: p = "BG"; break;
1236                 case 0x01: p = "DK1"; break;
1237                 case 0x02: p = "DK2"; break;
1238                 case 0x03: p = "DK3"; break;
1239                 case 0x04: p = "I"; break;
1240                 case 0x05: p = "L"; break;
1241                 case 0x06: p = "BTSC"; break;
1242                 case 0x07: p = "EIAJ"; break;
1243                 case 0x08: p = "A2-M"; break;
1244                 case 0x09: p = "FM Radio"; break;
1245                 case 0x0f: p = "automatic standard and mode detection"; break;
1246                 default: p = "undefined";
1247                 }
1248                 v4l_info(client, "Configured audio system:   %s\n", p);
1249         }
1250
1251         if (aud_input) {
1252                 v4l_info(client, "Specified audio input:     Tuner (In%d)\n", aud_input);
1253         } else {
1254                 v4l_info(client, "Specified audio input:     External\n");
1255         }
1256
1257         switch (pref_mode & 0xf) {
1258         case 0: p = "mono/language A"; break;
1259         case 1: p = "language B"; break;
1260         case 2: p = "language C"; break;
1261         case 3: p = "analog fallback"; break;
1262         case 4: p = "stereo"; break;
1263         case 5: p = "language AC"; break;
1264         case 6: p = "language BC"; break;
1265         case 7: p = "language AB"; break;
1266         default: p = "undefined";
1267         }
1268         v4l_info(client, "Preferred audio mode:      %s\n", p);
1269
1270         if ((audio_config & 0xf) == 0xf) {
1271                 switch ((afc0 >> 3) & 0x3) {
1272                 case 0: p = "system DK"; break;
1273                 case 1: p = "system L"; break;
1274                 case 2: p = "autodetect"; break;
1275                 default: p = "undefined";
1276                 }
1277                 v4l_info(client, "Selected 65 MHz format:    %s\n", p);
1278
1279                 switch (afc0 & 0x7) {
1280                 case 0: p = "chroma"; break;
1281                 case 1: p = "BTSC"; break;
1282                 case 2: p = "EIAJ"; break;
1283                 case 3: p = "A2-M"; break;
1284                 case 4: p = "autodetect"; break;
1285                 default: p = "undefined";
1286                 }
1287                 v4l_info(client, "Selected 45 MHz format:    %s\n", p);
1288         }
1289 }
1290
1291 /* ----------------------------------------------------------------------- */
1292
1293 /* This load_fw operation must be called to load the driver's firmware.
1294    Without this the audio standard detection will fail and you will
1295    only get mono.
1296
1297    Since loading the firmware is often problematic when the driver is
1298    compiled into the kernel I recommend postponing calling this function
1299    until the first open of the video device. Another reason for
1300    postponing it is that loading this firmware takes a long time (seconds)
1301    due to the slow i2c bus speed. So it will speed up the boot process if
1302    you can avoid loading the fw as long as the video device isn't used.  */
1303 static int cx25840_load_fw(struct v4l2_subdev *sd)
1304 {
1305         struct cx25840_state *state = to_state(sd);
1306         struct i2c_client *client = v4l2_get_subdevdata(sd);
1307
1308         if (!state->is_initialized) {
1309                 /* initialize and load firmware */
1310                 state->is_initialized = 1;
1311                 if (is_cx2583x(state))
1312                         cx25836_initialize(client);
1313                 else if (is_cx2388x(state))
1314                         cx23885_initialize(client);
1315                 else if (is_cx231xx(state))
1316                         cx231xx_initialize(client);
1317                 else
1318                         cx25840_initialize(client);
1319         }
1320         return 0;
1321 }
1322
1323 #ifdef CONFIG_VIDEO_ADV_DEBUG
1324 static int cx25840_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
1325 {
1326         struct i2c_client *client = v4l2_get_subdevdata(sd);
1327
1328         if (!v4l2_chip_match_i2c_client(client, &reg->match))
1329                 return -EINVAL;
1330         if (!capable(CAP_SYS_ADMIN))
1331                 return -EPERM;
1332         reg->size = 1;
1333         reg->val = cx25840_read(client, reg->reg & 0x0fff);
1334         return 0;
1335 }
1336
1337 static int cx25840_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
1338 {
1339         struct i2c_client *client = v4l2_get_subdevdata(sd);
1340
1341         if (!v4l2_chip_match_i2c_client(client, &reg->match))
1342                 return -EINVAL;
1343         if (!capable(CAP_SYS_ADMIN))
1344                 return -EPERM;
1345         cx25840_write(client, reg->reg & 0x0fff, reg->val & 0xff);
1346         return 0;
1347 }
1348 #endif
1349
1350 static int cx25840_s_stream(struct v4l2_subdev *sd, int enable)
1351 {
1352         struct cx25840_state *state = to_state(sd);
1353         struct i2c_client *client = v4l2_get_subdevdata(sd);
1354
1355         v4l_dbg(1, cx25840_debug, client, "%s output\n",
1356                         enable ? "enable" : "disable");
1357         if (enable) {
1358                 if (is_cx2388x(state) || is_cx231xx(state)) {
1359                         u8 v = (cx25840_read(client, 0x421) | 0x0b);
1360                         cx25840_write(client, 0x421, v);
1361                 } else {
1362                         cx25840_write(client, 0x115,
1363                                         is_cx2583x(state) ? 0x0c : 0x8c);
1364                         cx25840_write(client, 0x116,
1365                                         is_cx2583x(state) ? 0x04 : 0x07);
1366                 }
1367         } else {
1368                 if (is_cx2388x(state) || is_cx231xx(state)) {
1369                         u8 v = cx25840_read(client, 0x421) & ~(0x0b);
1370                         cx25840_write(client, 0x421, v);
1371                 } else {
1372                         cx25840_write(client, 0x115, 0x00);
1373                         cx25840_write(client, 0x116, 0x00);
1374                 }
1375         }
1376         return 0;
1377 }
1378
1379 static int cx25840_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1380 {
1381         struct cx25840_state *state = to_state(sd);
1382
1383         switch (qc->id) {
1384         case V4L2_CID_BRIGHTNESS:
1385                 return v4l2_ctrl_query_fill(qc, 0, 255, 1, 128);
1386         case V4L2_CID_CONTRAST:
1387         case V4L2_CID_SATURATION:
1388                 return v4l2_ctrl_query_fill(qc, 0, 127, 1, 64);
1389         case V4L2_CID_HUE:
1390                 return v4l2_ctrl_query_fill(qc, -128, 127, 1, 0);
1391         default:
1392                 break;
1393         }
1394         if (is_cx2583x(state))
1395                 return -EINVAL;
1396
1397         switch (qc->id) {
1398         case V4L2_CID_AUDIO_VOLUME:
1399                 return v4l2_ctrl_query_fill(qc, 0, 65535,
1400                                 65535 / 100, state->default_volume);
1401         case V4L2_CID_AUDIO_MUTE:
1402                 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
1403         case V4L2_CID_AUDIO_BALANCE:
1404         case V4L2_CID_AUDIO_BASS:
1405         case V4L2_CID_AUDIO_TREBLE:
1406                 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1407         default:
1408                 return -EINVAL;
1409         }
1410         return -EINVAL;
1411 }
1412
1413 static int cx25840_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1414 {
1415         struct cx25840_state *state = to_state(sd);
1416         struct i2c_client *client = v4l2_get_subdevdata(sd);
1417
1418         if (state->radio == 0 && state->std == std)
1419                 return 0;
1420         state->radio = 0;
1421         state->std = std;
1422         return set_v4lstd(client);
1423 }
1424
1425 static int cx25840_s_radio(struct v4l2_subdev *sd)
1426 {
1427         struct cx25840_state *state = to_state(sd);
1428
1429         state->radio = 1;
1430         return 0;
1431 }
1432
1433 static int cx25840_s_video_routing(struct v4l2_subdev *sd,
1434                                    u32 input, u32 output, u32 config)
1435 {
1436         struct cx25840_state *state = to_state(sd);
1437         struct i2c_client *client = v4l2_get_subdevdata(sd);
1438
1439         return set_input(client, input, state->aud_input);
1440 }
1441
1442 static int cx25840_s_audio_routing(struct v4l2_subdev *sd,
1443                                    u32 input, u32 output, u32 config)
1444 {
1445         struct cx25840_state *state = to_state(sd);
1446         struct i2c_client *client = v4l2_get_subdevdata(sd);
1447
1448         if (is_cx2583x(state))
1449                 return -EINVAL;
1450         return set_input(client, state->vid_input, input);
1451 }
1452
1453 static int cx25840_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1454 {
1455         struct cx25840_state *state = to_state(sd);
1456         struct i2c_client *client = v4l2_get_subdevdata(sd);
1457
1458         if (!is_cx2583x(state))
1459                 input_change(client);
1460         return 0;
1461 }
1462
1463 static int cx25840_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1464 {
1465         struct cx25840_state *state = to_state(sd);
1466         struct i2c_client *client = v4l2_get_subdevdata(sd);
1467         u8 vpres = cx25840_read(client, 0x40e) & 0x20;
1468         u8 mode;
1469         int val = 0;
1470
1471         if (state->radio)
1472                 return 0;
1473
1474         vt->signal = vpres ? 0xffff : 0x0;
1475         if (is_cx2583x(state))
1476                 return 0;
1477
1478         vt->capability |=
1479                 V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 |
1480                 V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP;
1481
1482         mode = cx25840_read(client, 0x804);
1483
1484         /* get rxsubchans and audmode */
1485         if ((mode & 0xf) == 1)
1486                 val |= V4L2_TUNER_SUB_STEREO;
1487         else
1488                 val |= V4L2_TUNER_SUB_MONO;
1489
1490         if (mode == 2 || mode == 4)
1491                 val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
1492
1493         if (mode & 0x10)
1494                 val |= V4L2_TUNER_SUB_SAP;
1495
1496         vt->rxsubchans = val;
1497         vt->audmode = state->audmode;
1498         return 0;
1499 }
1500
1501 static int cx25840_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1502 {
1503         struct cx25840_state *state = to_state(sd);
1504         struct i2c_client *client = v4l2_get_subdevdata(sd);
1505
1506         if (state->radio || is_cx2583x(state))
1507                 return 0;
1508
1509         switch (vt->audmode) {
1510                 case V4L2_TUNER_MODE_MONO:
1511                         /* mono      -> mono
1512                            stereo    -> mono
1513                            bilingual -> lang1 */
1514                         cx25840_and_or(client, 0x809, ~0xf, 0x00);
1515                         break;
1516                 case V4L2_TUNER_MODE_STEREO:
1517                 case V4L2_TUNER_MODE_LANG1:
1518                         /* mono      -> mono
1519                            stereo    -> stereo
1520                            bilingual -> lang1 */
1521                         cx25840_and_or(client, 0x809, ~0xf, 0x04);
1522                         break;
1523                 case V4L2_TUNER_MODE_LANG1_LANG2:
1524                         /* mono      -> mono
1525                            stereo    -> stereo
1526                            bilingual -> lang1/lang2 */
1527                         cx25840_and_or(client, 0x809, ~0xf, 0x07);
1528                         break;
1529                 case V4L2_TUNER_MODE_LANG2:
1530                         /* mono      -> mono
1531                            stereo    -> stereo
1532                            bilingual -> lang2 */
1533                         cx25840_and_or(client, 0x809, ~0xf, 0x01);
1534                         break;
1535                 default:
1536                         return -EINVAL;
1537         }
1538         state->audmode = vt->audmode;
1539         return 0;
1540 }
1541
1542 static int cx25840_reset(struct v4l2_subdev *sd, u32 val)
1543 {
1544         struct cx25840_state *state = to_state(sd);
1545         struct i2c_client *client = v4l2_get_subdevdata(sd);
1546
1547         if (is_cx2583x(state))
1548                 cx25836_initialize(client);
1549         else if (is_cx2388x(state))
1550                 cx23885_initialize(client);
1551         else if (is_cx231xx(state))
1552                 cx231xx_initialize(client);
1553         else
1554                 cx25840_initialize(client);
1555         return 0;
1556 }
1557
1558 static int cx25840_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1559 {
1560         struct cx25840_state *state = to_state(sd);
1561         struct i2c_client *client = v4l2_get_subdevdata(sd);
1562
1563         return v4l2_chip_ident_i2c_client(client, chip, state->id, state->rev);
1564 }
1565
1566 static int cx25840_log_status(struct v4l2_subdev *sd)
1567 {
1568         struct cx25840_state *state = to_state(sd);
1569         struct i2c_client *client = v4l2_get_subdevdata(sd);
1570
1571         log_video_status(client);
1572         if (!is_cx2583x(state))
1573                 log_audio_status(client);
1574         return 0;
1575 }
1576
1577 /* ----------------------------------------------------------------------- */
1578
1579 static const struct v4l2_subdev_core_ops cx25840_core_ops = {
1580         .log_status = cx25840_log_status,
1581         .g_chip_ident = cx25840_g_chip_ident,
1582         .g_ctrl = cx25840_g_ctrl,
1583         .s_ctrl = cx25840_s_ctrl,
1584         .queryctrl = cx25840_queryctrl,
1585         .s_std = cx25840_s_std,
1586         .reset = cx25840_reset,
1587         .load_fw = cx25840_load_fw,
1588 #ifdef CONFIG_VIDEO_ADV_DEBUG
1589         .g_register = cx25840_g_register,
1590         .s_register = cx25840_s_register,
1591 #endif
1592 };
1593
1594 static const struct v4l2_subdev_tuner_ops cx25840_tuner_ops = {
1595         .s_frequency = cx25840_s_frequency,
1596         .s_radio = cx25840_s_radio,
1597         .g_tuner = cx25840_g_tuner,
1598         .s_tuner = cx25840_s_tuner,
1599 };
1600
1601 static const struct v4l2_subdev_audio_ops cx25840_audio_ops = {
1602         .s_clock_freq = cx25840_s_clock_freq,
1603         .s_routing = cx25840_s_audio_routing,
1604 };
1605
1606 static const struct v4l2_subdev_video_ops cx25840_video_ops = {
1607         .s_routing = cx25840_s_video_routing,
1608         .g_fmt = cx25840_g_fmt,
1609         .s_fmt = cx25840_s_fmt,
1610         .decode_vbi_line = cx25840_decode_vbi_line,
1611         .s_stream = cx25840_s_stream,
1612 };
1613
1614 static const struct v4l2_subdev_ops cx25840_ops = {
1615         .core = &cx25840_core_ops,
1616         .tuner = &cx25840_tuner_ops,
1617         .audio = &cx25840_audio_ops,
1618         .video = &cx25840_video_ops,
1619 };
1620
1621 /* ----------------------------------------------------------------------- */
1622
1623 static u32 get_cx2388x_ident(struct i2c_client *client)
1624 {
1625         u32 ret;
1626
1627         /* Come out of digital power down */
1628         cx25840_write(client, 0x000, 0);
1629
1630         /* Detecting whether the part is cx23885/7/8 is more
1631          * difficult than it needs to be. No ID register. Instead we
1632          * probe certain registers indicated in the datasheets to look
1633          * for specific defaults that differ between the silicon designs. */
1634
1635         /* It's either 885/7 if the IR Tx Clk Divider register exists */
1636         if (cx25840_read4(client, 0x204) & 0xffff) {
1637                 /* CX23885 returns bogus repetitive byte values for the DIF,
1638                  * which doesn't exist for it. (Ex. 8a8a8a8a or 31313131) */
1639                 ret = cx25840_read4(client, 0x300);
1640                 if (((ret & 0xffff0000) >> 16) == (ret & 0xffff)) {
1641                         /* No DIF */
1642                         ret = V4L2_IDENT_CX23885_AV;
1643                 } else {
1644                         /* CX23887 has a broken DIF, but the registers
1645                          * appear valid (but unsed), good enough to detect. */
1646                         ret = V4L2_IDENT_CX23887_AV;
1647                 }
1648         } else if (cx25840_read4(client, 0x300) & 0x0fffffff) {
1649                 /* DIF PLL Freq Word reg exists; chip must be a CX23888 */
1650                 ret = V4L2_IDENT_CX23888_AV;
1651         } else {
1652                 v4l_err(client, "Unable to detect h/w, assuming cx23887\n");
1653                 ret = V4L2_IDENT_CX23887_AV;
1654         }
1655
1656         /* Back into digital power down */
1657         cx25840_write(client, 0x000, 2);
1658         return ret;
1659 }
1660
1661 static int cx25840_probe(struct i2c_client *client,
1662                          const struct i2c_device_id *did)
1663 {
1664         struct cx25840_state *state;
1665         struct v4l2_subdev *sd;
1666         u32 id = V4L2_IDENT_NONE;
1667         u16 device_id;
1668
1669         /* Check if the adapter supports the needed features */
1670         if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1671                 return -EIO;
1672
1673         v4l_dbg(1, cx25840_debug, client, "detecting cx25840 client on address 0x%x\n", client->addr << 1);
1674
1675         device_id = cx25840_read(client, 0x101) << 8;
1676         device_id |= cx25840_read(client, 0x100);
1677         v4l_dbg(1, cx25840_debug, client, "device_id = 0x%04x\n", device_id);
1678
1679         /* The high byte of the device ID should be
1680          * 0x83 for the cx2583x and 0x84 for the cx2584x */
1681         if ((device_id & 0xff00) == 0x8300) {
1682                 id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
1683         } else if ((device_id & 0xff00) == 0x8400) {
1684                 id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf);
1685         } else if (device_id == 0x0000) {
1686                 id = get_cx2388x_ident(client);
1687         } else if ((device_id & 0xfff0) == 0x5A30) {
1688                 /* The CX23100 (0x5A3C = 23100) doesn't have an A/V decoder */
1689                 id = V4L2_IDENT_CX2310X_AV;
1690         } else if ((device_id & 0xff) == (device_id >> 8)) {
1691                 v4l_err(client,
1692                         "likely a confused/unresponsive cx2388[578] A/V decoder"
1693                         " found @ 0x%x (%s)\n",
1694                         client->addr << 1, client->adapter->name);
1695                 v4l_err(client, "A method to reset it from the cx25840 driver"
1696                         " software is not known at this time\n");
1697                 return -ENODEV;
1698         } else {
1699                 v4l_dbg(1, cx25840_debug, client, "cx25840 not found\n");
1700                 return -ENODEV;
1701         }
1702
1703         state = kzalloc(sizeof(struct cx25840_state), GFP_KERNEL);
1704         if (state == NULL)
1705                 return -ENOMEM;
1706
1707         sd = &state->sd;
1708         v4l2_i2c_subdev_init(sd, client, &cx25840_ops);
1709         switch (id) {
1710         case V4L2_IDENT_CX23885_AV:
1711                 v4l_info(client, "cx23885 A/V decoder found @ 0x%x (%s)\n",
1712                          client->addr << 1, client->adapter->name);
1713                 break;
1714         case V4L2_IDENT_CX23887_AV:
1715                 v4l_info(client, "cx23887 A/V decoder found @ 0x%x (%s)\n",
1716                          client->addr << 1, client->adapter->name);
1717                 break;
1718         case V4L2_IDENT_CX23888_AV:
1719                 v4l_info(client, "cx23888 A/V decoder found @ 0x%x (%s)\n",
1720                          client->addr << 1, client->adapter->name);
1721                 break;
1722         case V4L2_IDENT_CX2310X_AV:
1723                 v4l_info(client, "cx%d A/V decoder found @ 0x%x (%s)\n",
1724                          device_id, client->addr << 1, client->adapter->name);
1725                 break;
1726         case V4L2_IDENT_CX25840:
1727         case V4L2_IDENT_CX25841:
1728         case V4L2_IDENT_CX25842:
1729         case V4L2_IDENT_CX25843:
1730                 /* Note: revision '(device_id & 0x0f) == 2' was never built. The
1731                    marking skips from 0x1 == 22 to 0x3 == 23. */
1732                 v4l_info(client, "cx25%3x-2%x found @ 0x%x (%s)\n",
1733                          (device_id & 0xfff0) >> 4,
1734                          (device_id & 0x0f) < 3 ? (device_id & 0x0f) + 1
1735                                                 : (device_id & 0x0f),
1736                          client->addr << 1, client->adapter->name);
1737                 break;
1738         case V4L2_IDENT_CX25836:
1739         case V4L2_IDENT_CX25837:
1740         default:
1741                 v4l_info(client, "cx25%3x-%x found @ 0x%x (%s)\n",
1742                          (device_id & 0xfff0) >> 4, device_id & 0x0f,
1743                          client->addr << 1, client->adapter->name);
1744                 break;
1745         }
1746
1747         state->c = client;
1748         state->vid_input = CX25840_COMPOSITE7;
1749         state->aud_input = CX25840_AUDIO8;
1750         state->audclk_freq = 48000;
1751         state->pvr150_workaround = 0;
1752         state->audmode = V4L2_TUNER_MODE_LANG1;
1753         state->unmute_volume = -1;
1754         state->default_volume = 228 - cx25840_read(client, 0x8d4);
1755         state->default_volume = ((state->default_volume / 2) + 23) << 9;
1756         state->vbi_line_offset = 8;
1757         state->id = id;
1758         state->rev = device_id;
1759
1760         return 0;
1761 }
1762
1763 static int cx25840_remove(struct i2c_client *client)
1764 {
1765         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1766
1767         v4l2_device_unregister_subdev(sd);
1768         kfree(to_state(sd));
1769         return 0;
1770 }
1771
1772 static const struct i2c_device_id cx25840_id[] = {
1773         { "cx25840", 0 },
1774         { }
1775 };
1776 MODULE_DEVICE_TABLE(i2c, cx25840_id);
1777
1778 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1779         .name = "cx25840",
1780         .probe = cx25840_probe,
1781         .remove = cx25840_remove,
1782         .id_table = cx25840_id,
1783 };