drivers/media/dvb-frontends/m88ds3103.c

   1 /*
   2  * Montage Technology M88DS3103/M88RS6000 demodulator driver
   3  *
   4  * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; either version 2 of the License, or
   9  *    (at your option) any later version.
  10  *
  11  *    This program is distributed in the hope that it will be useful,
  12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *    GNU General Public License for more details.
  15  */
  16
  17 #include "m88ds3103_priv.h"
  18
  19 static const struct dvb_frontend_ops m88ds3103_ops;
  20
  21 /* write single register with mask */
  22 static int m88ds3103_update_bits(struct m88ds3103_dev *dev,
  23                                 u8 reg, u8 mask, u8 val)
  24 {
  25         int ret;
  26         u8 tmp;
  27
  28         /* no need for read if whole reg is written */
  29         if (mask != 0xff) {
  30                 ret = regmap_bulk_read(dev->regmap, reg, &tmp, 1);
  31                 if (ret)
  32                         return ret;
  33
  34                 val &= mask;
  35                 tmp &= ~mask;
  36                 val |= tmp;
  37         }
  38
  39         return regmap_bulk_write(dev->regmap, reg, &val, 1);
  40 }
  41
  42 /* write reg val table using reg addr auto increment */
  43 static int m88ds3103_wr_reg_val_tab(struct m88ds3103_dev *dev,
  44                 const struct m88ds3103_reg_val *tab, int tab_len)
  45 {
  46         struct i2c_client *client = dev->client;
  47         int ret, i, j;
  48         u8 buf[83];
  49
  50         dev_dbg(&client->dev, "tab_len=%d\n", tab_len);
  51
  52         if (tab_len > 86) {
  53                 ret = -EINVAL;
  54                 goto err;
  55         }
  56
  57         for (i = 0, j = 0; i < tab_len; i++, j++) {
  58                 buf[j] = tab[i].val;
  59
  60                 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1 ||
  61                                 !((j + 1) % (dev->cfg->i2c_wr_max - 1))) {
  62                         ret = regmap_bulk_write(dev->regmap, tab[i].reg - j, buf, j + 1);
  63                         if (ret)
  64                                 goto err;
  65
  66                         j = -1;
  67                 }
  68         }
  69
  70         return 0;
  71 err:
  72         dev_dbg(&client->dev, "failed=%d\n", ret);
  73         return ret;
  74 }
  75
  76 /*
  77  * Get the demodulator AGC PWM voltage setting supplied to the tuner.
  78  */
  79 int m88ds3103_get_agc_pwm(struct dvb_frontend *fe, u8 *_agc_pwm)
  80 {
  81         struct m88ds3103_dev *dev = fe->demodulator_priv;
  82         unsigned tmp;
  83         int ret;
  84
  85         ret = regmap_read(dev->regmap, 0x3f, &tmp);
  86         if (ret == 0)
  87                 *_agc_pwm = tmp;
  88         return ret;
  89 }
  90 EXPORT_SYMBOL(m88ds3103_get_agc_pwm);
  91
  92 static int m88ds3103_read_status(struct dvb_frontend *fe,
  93                                  enum fe_status *status)
  94 {
  95         struct m88ds3103_dev *dev = fe->demodulator_priv;
  96         struct i2c_client *client = dev->client;
  97         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  98         int ret, i, itmp;
  99         unsigned int utmp;
 100         u8 buf[3];
 101
 102         *status = 0;
 103
 104         if (!dev->warm) {
 105                 ret = -EAGAIN;
 106                 goto err;
 107         }
 108
 109         switch (c->delivery_system) {
 110         case SYS_DVBS:
 111                 ret = regmap_read(dev->regmap, 0xd1, &utmp);
 112                 if (ret)
 113                         goto err;
 114
 115                 if ((utmp & 0x07) == 0x07)
 116                         *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
 117                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 118                                         FE_HAS_LOCK;
 119                 break;
 120         case SYS_DVBS2:
 121                 ret = regmap_read(dev->regmap, 0x0d, &utmp);
 122                 if (ret)
 123                         goto err;
 124
 125                 if ((utmp & 0x8f) == 0x8f)
 126                         *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
 127                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 128                                         FE_HAS_LOCK;
 129                 break;
 130         default:
 131                 dev_dbg(&client->dev, "invalid delivery_system\n");
 132                 ret = -EINVAL;
 133                 goto err;
 134         }
 135
 136         dev->fe_status = *status;
 137         dev_dbg(&client->dev, "lock=%02x status=%02x\n", utmp, *status);
 138
 139         /* CNR */
 140         if (dev->fe_status & FE_HAS_VITERBI) {
 141                 unsigned int cnr, noise, signal, noise_tot, signal_tot;
 142
 143                 cnr = 0;
 144                 /* more iterations for more accurate estimation */
 145                 #define M88DS3103_SNR_ITERATIONS 3
 146
 147                 switch (c->delivery_system) {
 148                 case SYS_DVBS:
 149                         itmp = 0;
 150
 151                         for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {
 152                                 ret = regmap_read(dev->regmap, 0xff, &utmp);
 153                                 if (ret)
 154                                         goto err;
 155
 156                                 itmp += utmp;
 157                         }
 158
 159                         /* use of single register limits max value to 15 dB */
 160                         /* SNR(X) dB = 10 * ln(X) / ln(10) dB */
 161                         itmp = DIV_ROUND_CLOSEST(itmp, 8 * M88DS3103_SNR_ITERATIONS);
 162                         if (itmp)
 163                                 cnr = div_u64((u64) 10000 * intlog2(itmp), intlog2(10));
 164                         break;
 165                 case SYS_DVBS2:
 166                         noise_tot = 0;
 167                         signal_tot = 0;
 168
 169                         for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {
 170                                 ret = regmap_bulk_read(dev->regmap, 0x8c, buf, 3);
 171                                 if (ret)
 172                                         goto err;
 173
 174                                 noise = buf[1] << 6;    /* [13:6] */
 175                                 noise |= buf[0] & 0x3f; /*  [5:0] */
 176                                 noise >>= 2;
 177                                 signal = buf[2] * buf[2];
 178                                 signal >>= 1;
 179
 180                                 noise_tot += noise;
 181                                 signal_tot += signal;
 182                         }
 183
 184                         noise = noise_tot / M88DS3103_SNR_ITERATIONS;
 185                         signal = signal_tot / M88DS3103_SNR_ITERATIONS;
 186
 187                         /* SNR(X) dB = 10 * log10(X) dB */
 188                         if (signal > noise) {
 189                                 itmp = signal / noise;
 190                                 cnr = div_u64((u64) 10000 * intlog10(itmp), (1 << 24));
 191                         }
 192                         break;
 193                 default:
 194                         dev_dbg(&client->dev, "invalid delivery_system\n");
 195                         ret = -EINVAL;
 196                         goto err;
 197                 }
 198
 199                 if (cnr) {
 200                         c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
 201                         c->cnr.stat[0].svalue = cnr;
 202                 } else {
 203                         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 204                 }
 205         } else {
 206                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 207         }
 208
 209         /* BER */
 210         if (dev->fe_status & FE_HAS_LOCK) {
 211                 unsigned int utmp, post_bit_error, post_bit_count;
 212
 213                 switch (c->delivery_system) {
 214                 case SYS_DVBS:
 215                         ret = regmap_write(dev->regmap, 0xf9, 0x04);
 216                         if (ret)
 217                                 goto err;
 218
 219                         ret = regmap_read(dev->regmap, 0xf8, &utmp);
 220                         if (ret)
 221                                 goto err;
 222
 223                         /* measurement ready? */
 224                         if (!(utmp & 0x10)) {
 225                                 ret = regmap_bulk_read(dev->regmap, 0xf6, buf, 2);
 226                                 if (ret)
 227                                         goto err;
 228
 229                                 post_bit_error = buf[1] << 8 | buf[0] << 0;
 230                                 post_bit_count = 0x800000;
 231                                 dev->post_bit_error += post_bit_error;
 232                                 dev->post_bit_count += post_bit_count;
 233                                 dev->dvbv3_ber = post_bit_error;
 234
 235                                 /* restart measurement */
 236                                 utmp |= 0x10;
 237                                 ret = regmap_write(dev->regmap, 0xf8, utmp);
 238                                 if (ret)
 239                                         goto err;
 240                         }
 241                         break;
 242                 case SYS_DVBS2:
 243                         ret = regmap_bulk_read(dev->regmap, 0xd5, buf, 3);
 244                         if (ret)
 245                                 goto err;
 246
 247                         utmp = buf[2] << 16 | buf[1] << 8 | buf[0] << 0;
 248
 249                         /* enough data? */
 250                         if (utmp > 4000) {
 251                                 ret = regmap_bulk_read(dev->regmap, 0xf7, buf, 2);
 252                                 if (ret)
 253                                         goto err;
 254
 255                                 post_bit_error = buf[1] << 8 | buf[0] << 0;
 256                                 post_bit_count = 32 * utmp; /* TODO: FEC */
 257                                 dev->post_bit_error += post_bit_error;
 258                                 dev->post_bit_count += post_bit_count;
 259                                 dev->dvbv3_ber = post_bit_error;
 260
 261                                 /* restart measurement */
 262                                 ret = regmap_write(dev->regmap, 0xd1, 0x01);
 263                                 if (ret)
 264                                         goto err;
 265
 266                                 ret = regmap_write(dev->regmap, 0xf9, 0x01);
 267                                 if (ret)
 268                                         goto err;
 269
 270                                 ret = regmap_write(dev->regmap, 0xf9, 0x00);
 271                                 if (ret)
 272                                         goto err;
 273
 274                                 ret = regmap_write(dev->regmap, 0xd1, 0x00);
 275                                 if (ret)
 276                                         goto err;
 277                         }
 278                         break;
 279                 default:
 280                         dev_dbg(&client->dev, "invalid delivery_system\n");
 281                         ret = -EINVAL;
 282                         goto err;
 283                 }
 284
 285                 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
 286                 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
 287                 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
 288                 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
 289         } else {
 290                 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 291                 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 292         }
 293
 294         return 0;
 295 err:
 296         dev_dbg(&client->dev, "failed=%d\n", ret);
 297         return ret;
 298 }
 299
 300 static int m88ds3103_set_frontend(struct dvb_frontend *fe)
 301 {
 302         struct m88ds3103_dev *dev = fe->demodulator_priv;
 303         struct i2c_client *client = dev->client;
 304         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 305         int ret, len;
 306         const struct m88ds3103_reg_val *init;
 307         u8 u8tmp, u8tmp1 = 0, u8tmp2 = 0; /* silence compiler warning */
 308         u8 buf[3];
 309         u16 u16tmp;
 310         u32 tuner_frequency_khz, target_mclk;
 311         s32 s32tmp;
 312
 313         dev_dbg(&client->dev,
 314                 "delivery_system=%d modulation=%d frequency=%u symbol_rate=%d inversion=%d pilot=%d rolloff=%d\n",
 315                 c->delivery_system, c->modulation, c->frequency, c->symbol_rate,
 316                 c->inversion, c->pilot, c->rolloff);
 317
 318         if (!dev->warm) {
 319                 ret = -EAGAIN;
 320                 goto err;
 321         }
 322
 323         /* reset */
 324         ret = regmap_write(dev->regmap, 0x07, 0x80);
 325         if (ret)
 326                 goto err;
 327
 328         ret = regmap_write(dev->regmap, 0x07, 0x00);
 329         if (ret)
 330                 goto err;
 331
 332         /* Disable demod clock path */
 333         if (dev->chip_id == M88RS6000_CHIP_ID) {
 334                 ret = regmap_write(dev->regmap, 0x06, 0xe0);
 335                 if (ret)
 336                         goto err;
 337         }
 338
 339         /* program tuner */
 340         if (fe->ops.tuner_ops.set_params) {
 341                 ret = fe->ops.tuner_ops.set_params(fe);
 342                 if (ret)
 343                         goto err;
 344         }
 345
 346         if (fe->ops.tuner_ops.get_frequency) {
 347                 ret = fe->ops.tuner_ops.get_frequency(fe, &tuner_frequency_khz);
 348                 if (ret)
 349                         goto err;
 350         } else {
 351                 /*
 352                  * Use nominal target frequency as tuner driver does not provide
 353                  * actual frequency used. Carrier offset calculation is not
 354                  * valid.
 355                  */
 356                 tuner_frequency_khz = c->frequency;
 357         }
 358
 359         /* select M88RS6000 demod main mclk and ts mclk from tuner die. */
 360         if (dev->chip_id == M88RS6000_CHIP_ID) {
 361                 if (c->symbol_rate > 45010000)
 362                         dev->mclk = 110250000;
 363                 else
 364                         dev->mclk = 96000000;
 365
 366                 if (c->delivery_system == SYS_DVBS)
 367                         target_mclk = 96000000;
 368                 else
 369                         target_mclk = 144000000;
 370
 371                 /* Enable demod clock path */
 372                 ret = regmap_write(dev->regmap, 0x06, 0x00);
 373                 if (ret)
 374                         goto err;
 375                 usleep_range(10000, 20000);
 376         } else {
 377         /* set M88DS3103 mclk and ts mclk. */
 378                 dev->mclk = 96000000;
 379
 380                 switch (dev->cfg->ts_mode) {
 381                 case M88DS3103_TS_SERIAL:
 382                 case M88DS3103_TS_SERIAL_D7:
 383                         target_mclk = dev->cfg->ts_clk;
 384                         break;
 385                 case M88DS3103_TS_PARALLEL:
 386                 case M88DS3103_TS_CI:
 387                         if (c->delivery_system == SYS_DVBS)
 388                                 target_mclk = 96000000;
 389                         else {
 390                                 if (c->symbol_rate < 18000000)
 391                                         target_mclk = 96000000;
 392                                 else if (c->symbol_rate < 28000000)
 393                                         target_mclk = 144000000;
 394                                 else
 395                                         target_mclk = 192000000;
 396                         }
 397                         break;
 398                 default:
 399                         dev_dbg(&client->dev, "invalid ts_mode\n");
 400                         ret = -EINVAL;
 401                         goto err;
 402                 }
 403
 404                 switch (target_mclk) {
 405                 case 96000000:
 406                         u8tmp1 = 0x02; /* 0b10 */
 407                         u8tmp2 = 0x01; /* 0b01 */
 408                         break;
 409                 case 144000000:
 410                         u8tmp1 = 0x00; /* 0b00 */
 411                         u8tmp2 = 0x01; /* 0b01 */
 412                         break;
 413                 case 192000000:
 414                         u8tmp1 = 0x03; /* 0b11 */
 415                         u8tmp2 = 0x00; /* 0b00 */
 416                         break;
 417                 }
 418                 ret = m88ds3103_update_bits(dev, 0x22, 0xc0, u8tmp1 << 6);
 419                 if (ret)
 420                         goto err;
 421                 ret = m88ds3103_update_bits(dev, 0x24, 0xc0, u8tmp2 << 6);
 422                 if (ret)
 423                         goto err;
 424         }
 425
 426         ret = regmap_write(dev->regmap, 0xb2, 0x01);
 427         if (ret)
 428                 goto err;
 429
 430         ret = regmap_write(dev->regmap, 0x00, 0x01);
 431         if (ret)
 432                 goto err;
 433
 434         switch (c->delivery_system) {
 435         case SYS_DVBS:
 436                 if (dev->chip_id == M88RS6000_CHIP_ID) {
 437                         len = ARRAY_SIZE(m88rs6000_dvbs_init_reg_vals);
 438                         init = m88rs6000_dvbs_init_reg_vals;
 439                 } else {
 440                         len = ARRAY_SIZE(m88ds3103_dvbs_init_reg_vals);
 441                         init = m88ds3103_dvbs_init_reg_vals;
 442                 }
 443                 break;
 444         case SYS_DVBS2:
 445                 if (dev->chip_id == M88RS6000_CHIP_ID) {
 446                         len = ARRAY_SIZE(m88rs6000_dvbs2_init_reg_vals);
 447                         init = m88rs6000_dvbs2_init_reg_vals;
 448                 } else {
 449                         len = ARRAY_SIZE(m88ds3103_dvbs2_init_reg_vals);
 450                         init = m88ds3103_dvbs2_init_reg_vals;
 451                 }
 452                 break;
 453         default:
 454                 dev_dbg(&client->dev, "invalid delivery_system\n");
 455                 ret = -EINVAL;
 456                 goto err;
 457         }
 458
 459         /* program init table */
 460         if (c->delivery_system != dev->delivery_system) {
 461                 ret = m88ds3103_wr_reg_val_tab(dev, init, len);
 462                 if (ret)
 463                         goto err;
 464         }
 465
 466         if (dev->chip_id == M88RS6000_CHIP_ID) {
 467                 if (c->delivery_system == SYS_DVBS2 &&
 468                     c->symbol_rate <= 5000000) {
 469                         ret = regmap_write(dev->regmap, 0xc0, 0x04);
 470                         if (ret)
 471                                 goto err;
 472                         buf[0] = 0x09;
 473                         buf[1] = 0x22;
 474                         buf[2] = 0x88;
 475                         ret = regmap_bulk_write(dev->regmap, 0x8a, buf, 3);
 476                         if (ret)
 477                                 goto err;
 478                 }
 479                 ret = m88ds3103_update_bits(dev, 0x9d, 0x08, 0x08);
 480                 if (ret)
 481                         goto err;
 482                 ret = regmap_write(dev->regmap, 0xf1, 0x01);
 483                 if (ret)
 484                         goto err;
 485                 ret = m88ds3103_update_bits(dev, 0x30, 0x80, 0x80);
 486                 if (ret)
 487                         goto err;
 488         }
 489
 490         switch (dev->cfg->ts_mode) {
 491         case M88DS3103_TS_SERIAL:
 492                 u8tmp1 = 0x00;
 493                 u8tmp = 0x06;
 494                 break;
 495         case M88DS3103_TS_SERIAL_D7:
 496                 u8tmp1 = 0x20;
 497                 u8tmp = 0x06;
 498                 break;
 499         case M88DS3103_TS_PARALLEL:
 500                 u8tmp = 0x02;
 501                 break;
 502         case M88DS3103_TS_CI:
 503                 u8tmp = 0x03;
 504                 break;
 505         default:
 506                 dev_dbg(&client->dev, "invalid ts_mode\n");
 507                 ret = -EINVAL;
 508                 goto err;
 509         }
 510
 511         if (dev->cfg->ts_clk_pol)
 512                 u8tmp |= 0x40;
 513
 514         /* TS mode */
 515         ret = regmap_write(dev->regmap, 0xfd, u8tmp);
 516         if (ret)
 517                 goto err;
 518
 519         switch (dev->cfg->ts_mode) {
 520         case M88DS3103_TS_SERIAL:
 521         case M88DS3103_TS_SERIAL_D7:
 522                 ret = m88ds3103_update_bits(dev, 0x29, 0x20, u8tmp1);
 523                 if (ret)
 524                         goto err;
 525                 u16tmp = 0;
 526                 u8tmp1 = 0x3f;
 527                 u8tmp2 = 0x3f;
 528                 break;
 529         default:
 530                 u16tmp = DIV_ROUND_UP(target_mclk, dev->cfg->ts_clk);
 531                 u8tmp1 = u16tmp / 2 - 1;
 532                 u8tmp2 = DIV_ROUND_UP(u16tmp, 2) - 1;
 533         }
 534
 535         dev_dbg(&client->dev, "target_mclk=%u ts_clk=%u ts_clk_divide_ratio=%u\n",
 536                 target_mclk, dev->cfg->ts_clk, u16tmp);
 537
 538         /* u8tmp1[5:2] => fe[3:0], u8tmp1[1:0] => ea[7:6] */
 539         /* u8tmp2[5:0] => ea[5:0] */
 540         u8tmp = (u8tmp1 >> 2) & 0x0f;
 541         ret = regmap_update_bits(dev->regmap, 0xfe, 0x0f, u8tmp);
 542         if (ret)
 543                 goto err;
 544         u8tmp = ((u8tmp1 & 0x03) << 6) | u8tmp2 >> 0;
 545         ret = regmap_write(dev->regmap, 0xea, u8tmp);
 546         if (ret)
 547                 goto err;
 548
 549         if (c->symbol_rate <= 3000000)
 550                 u8tmp = 0x20;
 551         else if (c->symbol_rate <= 10000000)
 552                 u8tmp = 0x10;
 553         else
 554                 u8tmp = 0x06;
 555
 556         ret = regmap_write(dev->regmap, 0xc3, 0x08);
 557         if (ret)
 558                 goto err;
 559
 560         ret = regmap_write(dev->regmap, 0xc8, u8tmp);
 561         if (ret)
 562                 goto err;
 563
 564         ret = regmap_write(dev->regmap, 0xc4, 0x08);
 565         if (ret)
 566                 goto err;
 567
 568         ret = regmap_write(dev->regmap, 0xc7, 0x00);
 569         if (ret)
 570                 goto err;
 571
 572         u16tmp = DIV_ROUND_CLOSEST_ULL((u64)c->symbol_rate * 0x10000, dev->mclk);
 573         buf[0] = (u16tmp >> 0) & 0xff;
 574         buf[1] = (u16tmp >> 8) & 0xff;
 575         ret = regmap_bulk_write(dev->regmap, 0x61, buf, 2);
 576         if (ret)
 577                 goto err;
 578
 579         ret = m88ds3103_update_bits(dev, 0x4d, 0x02, dev->cfg->spec_inv << 1);
 580         if (ret)
 581                 goto err;
 582
 583         ret = m88ds3103_update_bits(dev, 0x30, 0x10, dev->cfg->agc_inv << 4);
 584         if (ret)
 585                 goto err;
 586
 587         ret = regmap_write(dev->regmap, 0x33, dev->cfg->agc);
 588         if (ret)
 589                 goto err;
 590
 591         dev_dbg(&client->dev, "carrier offset=%d\n",
 592                 (tuner_frequency_khz - c->frequency));
 593
 594         /* Use 32-bit calc as there is no s64 version of DIV_ROUND_CLOSEST() */
 595         s32tmp = 0x10000 * (tuner_frequency_khz - c->frequency);
 596         s32tmp = DIV_ROUND_CLOSEST(s32tmp, dev->mclk / 1000);
 597         buf[0] = (s32tmp >> 0) & 0xff;
 598         buf[1] = (s32tmp >> 8) & 0xff;
 599         ret = regmap_bulk_write(dev->regmap, 0x5e, buf, 2);
 600         if (ret)
 601                 goto err;
 602
 603         ret = regmap_write(dev->regmap, 0x00, 0x00);
 604         if (ret)
 605                 goto err;
 606
 607         ret = regmap_write(dev->regmap, 0xb2, 0x00);
 608         if (ret)
 609                 goto err;
 610
 611         dev->delivery_system = c->delivery_system;
 612
 613         return 0;
 614 err:
 615         dev_dbg(&client->dev, "failed=%d\n", ret);
 616         return ret;
 617 }
 618
 619 static int m88ds3103_init(struct dvb_frontend *fe)
 620 {
 621         struct m88ds3103_dev *dev = fe->demodulator_priv;
 622         struct i2c_client *client = dev->client;
 623         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 624         int ret, len, rem;
 625         unsigned int utmp;
 626         const struct firmware *firmware;
 627         const char *name;
 628
 629         dev_dbg(&client->dev, "\n");
 630
 631         /* set cold state by default */
 632         dev->warm = false;
 633
 634         /* wake up device from sleep */
 635         ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x01);
 636         if (ret)
 637                 goto err;
 638         ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x00);
 639         if (ret)
 640                 goto err;
 641         ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x00);
 642         if (ret)
 643                 goto err;
 644
 645         /* firmware status */
 646         ret = regmap_read(dev->regmap, 0xb9, &utmp);
 647         if (ret)
 648                 goto err;
 649
 650         dev_dbg(&client->dev, "firmware=%02x\n", utmp);
 651
 652         if (utmp)
 653                 goto warm;
 654
 655         /* global reset, global diseqc reset, golbal fec reset */
 656         ret = regmap_write(dev->regmap, 0x07, 0xe0);
 657         if (ret)
 658                 goto err;
 659         ret = regmap_write(dev->regmap, 0x07, 0x00);
 660         if (ret)
 661                 goto err;
 662
 663         /* cold state - try to download firmware */
 664         dev_info(&client->dev, "found a '%s' in cold state\n",
 665                  m88ds3103_ops.info.name);
 666
 667         if (dev->chip_id == M88RS6000_CHIP_ID)
 668                 name = M88RS6000_FIRMWARE;
 669         else
 670                 name = M88DS3103_FIRMWARE;
 671         /* request the firmware, this will block and timeout */
 672         ret = request_firmware(&firmware, name, &client->dev);
 673         if (ret) {
 674                 dev_err(&client->dev, "firmware file '%s' not found\n", name);
 675                 goto err;
 676         }
 677
 678         dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
 679
 680         ret = regmap_write(dev->regmap, 0xb2, 0x01);
 681         if (ret)
 682                 goto err_release_firmware;
 683
 684         for (rem = firmware->size; rem > 0; rem -= (dev->cfg->i2c_wr_max - 1)) {
 685                 len = min(dev->cfg->i2c_wr_max - 1, rem);
 686                 ret = regmap_bulk_write(dev->regmap, 0xb0,
 687                                         &firmware->data[firmware->size - rem],
 688                                         len);
 689                 if (ret) {
 690                         dev_err(&client->dev, "firmware download failed %d\n",
 691                                 ret);
 692                         goto err_release_firmware;
 693                 }
 694         }
 695
 696         ret = regmap_write(dev->regmap, 0xb2, 0x00);
 697         if (ret)
 698                 goto err_release_firmware;
 699
 700         release_firmware(firmware);
 701
 702         ret = regmap_read(dev->regmap, 0xb9, &utmp);
 703         if (ret)
 704                 goto err;
 705
 706         if (!utmp) {
 707                 ret = -EINVAL;
 708                 dev_info(&client->dev, "firmware did not run\n");
 709                 goto err;
 710         }
 711
 712         dev_info(&client->dev, "found a '%s' in warm state\n",
 713                  m88ds3103_ops.info.name);
 714         dev_info(&client->dev, "firmware version: %X.%X\n",
 715                  (utmp >> 4) & 0xf, (utmp >> 0 & 0xf));
 716
 717 warm:
 718         /* warm state */
 719         dev->warm = true;
 720
 721         /* init stats here in order signal app which stats are supported */
 722         c->cnr.len = 1;
 723         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 724         c->post_bit_error.len = 1;
 725         c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 726         c->post_bit_count.len = 1;
 727         c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 728
 729         return 0;
 730 err_release_firmware:
 731         release_firmware(firmware);
 732 err:
 733         dev_dbg(&client->dev, "failed=%d\n", ret);
 734         return ret;
 735 }
 736
 737 static int m88ds3103_sleep(struct dvb_frontend *fe)
 738 {
 739         struct m88ds3103_dev *dev = fe->demodulator_priv;
 740         struct i2c_client *client = dev->client;
 741         int ret;
 742         unsigned int utmp;
 743
 744         dev_dbg(&client->dev, "\n");
 745
 746         dev->fe_status = 0;
 747         dev->delivery_system = SYS_UNDEFINED;
 748
 749         /* TS Hi-Z */
 750         if (dev->chip_id == M88RS6000_CHIP_ID)
 751                 utmp = 0x29;
 752         else
 753                 utmp = 0x27;
 754         ret = m88ds3103_update_bits(dev, utmp, 0x01, 0x00);
 755         if (ret)
 756                 goto err;
 757
 758         /* sleep */
 759         ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00);
 760         if (ret)
 761                 goto err;
 762         ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01);
 763         if (ret)
 764                 goto err;
 765         ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10);
 766         if (ret)
 767                 goto err;
 768
 769         return 0;
 770 err:
 771         dev_dbg(&client->dev, "failed=%d\n", ret);
 772         return ret;
 773 }
 774
 775 static int m88ds3103_get_frontend(struct dvb_frontend *fe,
 776                                   struct dtv_frontend_properties *c)
 777 {
 778         struct m88ds3103_dev *dev = fe->demodulator_priv;
 779         struct i2c_client *client = dev->client;
 780         int ret;
 781         u8 buf[3];
 782
 783         dev_dbg(&client->dev, "\n");
 784
 785         if (!dev->warm || !(dev->fe_status & FE_HAS_LOCK)) {
 786                 ret = 0;
 787                 goto err;
 788         }
 789
 790         switch (c->delivery_system) {
 791         case SYS_DVBS:
 792                 ret = regmap_bulk_read(dev->regmap, 0xe0, &buf[0], 1);
 793                 if (ret)
 794                         goto err;
 795
 796                 ret = regmap_bulk_read(dev->regmap, 0xe6, &buf[1], 1);
 797                 if (ret)
 798                         goto err;
 799
 800                 switch ((buf[0] >> 2) & 0x01) {
 801                 case 0:
 802                         c->inversion = INVERSION_OFF;
 803                         break;
 804                 case 1:
 805                         c->inversion = INVERSION_ON;
 806                         break;
 807                 }
 808
 809                 switch ((buf[1] >> 5) & 0x07) {
 810                 case 0:
 811                         c->fec_inner = FEC_7_8;
 812                         break;
 813                 case 1:
 814                         c->fec_inner = FEC_5_6;
 815                         break;
 816                 case 2:
 817                         c->fec_inner = FEC_3_4;
 818                         break;
 819                 case 3:
 820                         c->fec_inner = FEC_2_3;
 821                         break;
 822                 case 4:
 823                         c->fec_inner = FEC_1_2;
 824                         break;
 825                 default:
 826                         dev_dbg(&client->dev, "invalid fec_inner\n");
 827                 }
 828
 829                 c->modulation = QPSK;
 830
 831                 break;
 832         case SYS_DVBS2:
 833                 ret = regmap_bulk_read(dev->regmap, 0x7e, &buf[0], 1);
 834                 if (ret)
 835                         goto err;
 836
 837                 ret = regmap_bulk_read(dev->regmap, 0x89, &buf[1], 1);
 838                 if (ret)
 839                         goto err;
 840
 841                 ret = regmap_bulk_read(dev->regmap, 0xf2, &buf[2], 1);
 842                 if (ret)
 843                         goto err;
 844
 845                 switch ((buf[0] >> 0) & 0x0f) {
 846                 case 2:
 847                         c->fec_inner = FEC_2_5;
 848                         break;
 849                 case 3:
 850                         c->fec_inner = FEC_1_2;
 851                         break;
 852                 case 4:
 853                         c->fec_inner = FEC_3_5;
 854                         break;
 855                 case 5:
 856                         c->fec_inner = FEC_2_3;
 857                         break;
 858                 case 6:
 859                         c->fec_inner = FEC_3_4;
 860                         break;
 861                 case 7:
 862                         c->fec_inner = FEC_4_5;
 863                         break;
 864                 case 8:
 865                         c->fec_inner = FEC_5_6;
 866                         break;
 867                 case 9:
 868                         c->fec_inner = FEC_8_9;
 869                         break;
 870                 case 10:
 871                         c->fec_inner = FEC_9_10;
 872                         break;
 873                 default:
 874                         dev_dbg(&client->dev, "invalid fec_inner\n");
 875                 }
 876
 877                 switch ((buf[0] >> 5) & 0x01) {
 878                 case 0:
 879                         c->pilot = PILOT_OFF;
 880                         break;
 881                 case 1:
 882                         c->pilot = PILOT_ON;
 883                         break;
 884                 }
 885
 886                 switch ((buf[0] >> 6) & 0x07) {
 887                 case 0:
 888                         c->modulation = QPSK;
 889                         break;
 890                 case 1:
 891                         c->modulation = PSK_8;
 892                         break;
 893                 case 2:
 894                         c->modulation = APSK_16;
 895                         break;
 896                 case 3:
 897                         c->modulation = APSK_32;
 898                         break;
 899                 default:
 900                         dev_dbg(&client->dev, "invalid modulation\n");
 901                 }
 902
 903                 switch ((buf[1] >> 7) & 0x01) {
 904                 case 0:
 905                         c->inversion = INVERSION_OFF;
 906                         break;
 907                 case 1:
 908                         c->inversion = INVERSION_ON;
 909                         break;
 910                 }
 911
 912                 switch ((buf[2] >> 0) & 0x03) {
 913                 case 0:
 914                         c->rolloff = ROLLOFF_35;
 915                         break;
 916                 case 1:
 917                         c->rolloff = ROLLOFF_25;
 918                         break;
 919                 case 2:
 920                         c->rolloff = ROLLOFF_20;
 921                         break;
 922                 default:
 923                         dev_dbg(&client->dev, "invalid rolloff\n");
 924                 }
 925                 break;
 926         default:
 927                 dev_dbg(&client->dev, "invalid delivery_system\n");
 928                 ret = -EINVAL;
 929                 goto err;
 930         }
 931
 932         ret = regmap_bulk_read(dev->regmap, 0x6d, buf, 2);
 933         if (ret)
 934                 goto err;
 935
 936         c->symbol_rate = DIV_ROUND_CLOSEST_ULL((u64)(buf[1] << 8 | buf[0] << 0) * dev->mclk, 0x10000);
 937
 938         return 0;
 939 err:
 940         dev_dbg(&client->dev, "failed=%d\n", ret);
 941         return ret;
 942 }
 943
 944 static int m88ds3103_read_snr(struct dvb_frontend *fe, u16 *snr)
 945 {
 946         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 947
 948         if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
 949                 *snr = div_s64(c->cnr.stat[0].svalue, 100);
 950         else
 951                 *snr = 0;
 952
 953         return 0;
 954 }
 955
 956 static int m88ds3103_read_ber(struct dvb_frontend *fe, u32 *ber)
 957 {
 958         struct m88ds3103_dev *dev = fe->demodulator_priv;
 959
 960         *ber = dev->dvbv3_ber;
 961
 962         return 0;
 963 }
 964
 965 static int m88ds3103_set_tone(struct dvb_frontend *fe,
 966         enum fe_sec_tone_mode fe_sec_tone_mode)
 967 {
 968         struct m88ds3103_dev *dev = fe->demodulator_priv;
 969         struct i2c_client *client = dev->client;
 970         int ret;
 971         unsigned int utmp, tone, reg_a1_mask;
 972
 973         dev_dbg(&client->dev, "fe_sec_tone_mode=%d\n", fe_sec_tone_mode);
 974
 975         if (!dev->warm) {
 976                 ret = -EAGAIN;
 977                 goto err;
 978         }
 979
 980         switch (fe_sec_tone_mode) {
 981         case SEC_TONE_ON:
 982                 tone = 0;
 983                 reg_a1_mask = 0x47;
 984                 break;
 985         case SEC_TONE_OFF:
 986                 tone = 1;
 987                 reg_a1_mask = 0x00;
 988                 break;
 989         default:
 990                 dev_dbg(&client->dev, "invalid fe_sec_tone_mode\n");
 991                 ret = -EINVAL;
 992                 goto err;
 993         }
 994
 995         utmp = tone << 7 | dev->cfg->envelope_mode << 5;
 996         ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
 997         if (ret)
 998                 goto err;
 999
1000         utmp = 1 << 2;
1001         ret = m88ds3103_update_bits(dev, 0xa1, reg_a1_mask, utmp);
1002         if (ret)
1003                 goto err;
1004
1005         return 0;
1006 err:
1007         dev_dbg(&client->dev, "failed=%d\n", ret);
1008         return ret;
1009 }
1010
1011 static int m88ds3103_set_voltage(struct dvb_frontend *fe,
1012         enum fe_sec_voltage fe_sec_voltage)
1013 {
1014         struct m88ds3103_dev *dev = fe->demodulator_priv;
1015         struct i2c_client *client = dev->client;
1016         int ret;
1017         unsigned int utmp;
1018         bool voltage_sel, voltage_dis;
1019
1020         dev_dbg(&client->dev, "fe_sec_voltage=%d\n", fe_sec_voltage);
1021
1022         if (!dev->warm) {
1023                 ret = -EAGAIN;
1024                 goto err;
1025         }
1026
1027         switch (fe_sec_voltage) {
1028         case SEC_VOLTAGE_18:
1029                 voltage_sel = true;
1030                 voltage_dis = false;
1031                 break;
1032         case SEC_VOLTAGE_13:
1033                 voltage_sel = false;
1034                 voltage_dis = false;
1035                 break;
1036         case SEC_VOLTAGE_OFF:
1037                 voltage_sel = false;
1038                 voltage_dis = true;
1039                 break;
1040         default:
1041                 dev_dbg(&client->dev, "invalid fe_sec_voltage\n");
1042                 ret = -EINVAL;
1043                 goto err;
1044         }
1045
1046         /* output pin polarity */
1047         voltage_sel ^= dev->cfg->lnb_hv_pol;
1048         voltage_dis ^= dev->cfg->lnb_en_pol;
1049
1050         utmp = voltage_dis << 1 | voltage_sel << 0;
1051         ret = m88ds3103_update_bits(dev, 0xa2, 0x03, utmp);
1052         if (ret)
1053                 goto err;
1054
1055         return 0;
1056 err:
1057         dev_dbg(&client->dev, "failed=%d\n", ret);
1058         return ret;
1059 }
1060
1061 static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe,
1062                 struct dvb_diseqc_master_cmd *diseqc_cmd)
1063 {
1064         struct m88ds3103_dev *dev = fe->demodulator_priv;
1065         struct i2c_client *client = dev->client;
1066         int ret;
1067         unsigned int utmp;
1068         unsigned long timeout;
1069
1070         dev_dbg(&client->dev, "msg=%*ph\n",
1071                 diseqc_cmd->msg_len, diseqc_cmd->msg);
1072
1073         if (!dev->warm) {
1074                 ret = -EAGAIN;
1075                 goto err;
1076         }
1077
1078         if (diseqc_cmd->msg_len < 3 || diseqc_cmd->msg_len > 6) {
1079                 ret = -EINVAL;
1080                 goto err;
1081         }
1082
1083         utmp = dev->cfg->envelope_mode << 5;
1084         ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
1085         if (ret)
1086                 goto err;
1087
1088         ret = regmap_bulk_write(dev->regmap, 0xa3, diseqc_cmd->msg,
1089                         diseqc_cmd->msg_len);
1090         if (ret)
1091                 goto err;
1092
1093         ret = regmap_write(dev->regmap, 0xa1,
1094                         (diseqc_cmd->msg_len - 1) << 3 | 0x07);
1095         if (ret)
1096                 goto err;
1097
1098         /* wait DiSEqC TX ready */
1099         #define SEND_MASTER_CMD_TIMEOUT 120
1100         timeout = jiffies + msecs_to_jiffies(SEND_MASTER_CMD_TIMEOUT);
1101
1102         /* DiSEqC message period is 13.5 ms per byte */
1103         utmp = diseqc_cmd->msg_len * 13500;
1104         usleep_range(utmp - 4000, utmp);
1105
1106         for (utmp = 1; !time_after(jiffies, timeout) && utmp;) {
1107                 ret = regmap_read(dev->regmap, 0xa1, &utmp);
1108                 if (ret)
1109                         goto err;
1110                 utmp = (utmp >> 6) & 0x1;
1111         }
1112
1113         if (utmp == 0) {
1114                 dev_dbg(&client->dev, "diseqc tx took %u ms\n",
1115                         jiffies_to_msecs(jiffies) -
1116                         (jiffies_to_msecs(timeout) - SEND_MASTER_CMD_TIMEOUT));
1117         } else {
1118                 dev_dbg(&client->dev, "diseqc tx timeout\n");
1119
1120                 ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40);
1121                 if (ret)
1122                         goto err;
1123         }
1124
1125         ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80);
1126         if (ret)
1127                 goto err;
1128
1129         if (utmp == 1) {
1130                 ret = -ETIMEDOUT;
1131                 goto err;
1132         }
1133
1134         return 0;
1135 err:
1136         dev_dbg(&client->dev, "failed=%d\n", ret);
1137         return ret;
1138 }
1139
1140 static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe,
1141         enum fe_sec_mini_cmd fe_sec_mini_cmd)
1142 {
1143         struct m88ds3103_dev *dev = fe->demodulator_priv;
1144         struct i2c_client *client = dev->client;
1145         int ret;
1146         unsigned int utmp, burst;
1147         unsigned long timeout;
1148
1149         dev_dbg(&client->dev, "fe_sec_mini_cmd=%d\n", fe_sec_mini_cmd);
1150
1151         if (!dev->warm) {
1152                 ret = -EAGAIN;
1153                 goto err;
1154         }
1155
1156         utmp = dev->cfg->envelope_mode << 5;
1157         ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
1158         if (ret)
1159                 goto err;
1160
1161         switch (fe_sec_mini_cmd) {
1162         case SEC_MINI_A:
1163                 burst = 0x02;
1164                 break;
1165         case SEC_MINI_B:
1166                 burst = 0x01;
1167                 break;
1168         default:
1169                 dev_dbg(&client->dev, "invalid fe_sec_mini_cmd\n");
1170                 ret = -EINVAL;
1171                 goto err;
1172         }
1173
1174         ret = regmap_write(dev->regmap, 0xa1, burst);
1175         if (ret)
1176                 goto err;
1177
1178         /* wait DiSEqC TX ready */
1179         #define SEND_BURST_TIMEOUT 40
1180         timeout = jiffies + msecs_to_jiffies(SEND_BURST_TIMEOUT);
1181
1182         /* DiSEqC ToneBurst period is 12.5 ms */
1183         usleep_range(8500, 12500);
1184
1185         for (utmp = 1; !time_after(jiffies, timeout) && utmp;) {
1186                 ret = regmap_read(dev->regmap, 0xa1, &utmp);
1187                 if (ret)
1188                         goto err;
1189                 utmp = (utmp >> 6) & 0x1;
1190         }
1191
1192         if (utmp == 0) {
1193                 dev_dbg(&client->dev, "diseqc tx took %u ms\n",
1194                         jiffies_to_msecs(jiffies) -
1195                         (jiffies_to_msecs(timeout) - SEND_BURST_TIMEOUT));
1196         } else {
1197                 dev_dbg(&client->dev, "diseqc tx timeout\n");
1198
1199                 ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40);
1200                 if (ret)
1201                         goto err;
1202         }
1203
1204         ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80);
1205         if (ret)
1206                 goto err;
1207
1208         if (utmp == 1) {
1209                 ret = -ETIMEDOUT;
1210                 goto err;
1211         }
1212
1213         return 0;
1214 err:
1215         dev_dbg(&client->dev, "failed=%d\n", ret);
1216         return ret;
1217 }
1218
1219 static int m88ds3103_get_tune_settings(struct dvb_frontend *fe,
1220         struct dvb_frontend_tune_settings *s)
1221 {
1222         s->min_delay_ms = 3000;
1223
1224         return 0;
1225 }
1226
1227 static void m88ds3103_release(struct dvb_frontend *fe)
1228 {
1229         struct m88ds3103_dev *dev = fe->demodulator_priv;
1230         struct i2c_client *client = dev->client;
1231
1232         i2c_unregister_device(client);
1233 }
1234
1235 static int m88ds3103_select(struct i2c_mux_core *muxc, u32 chan)
1236 {
1237         struct m88ds3103_dev *dev = i2c_mux_priv(muxc);
1238         struct i2c_client *client = dev->client;
1239         int ret;
1240         struct i2c_msg msg = {
1241                 .addr = client->addr,
1242                 .flags = 0,
1243                 .len = 2,
1244                 .buf = "\x03\x11",
1245         };
1246
1247         /* Open tuner I2C repeater for 1 xfer, closes automatically */
1248         ret = __i2c_transfer(client->adapter, &msg, 1);
1249         if (ret != 1) {
1250                 dev_warn(&client->dev, "i2c wr failed=%d\n", ret);
1251                 if (ret >= 0)
1252                         ret = -EREMOTEIO;
1253                 return ret;
1254         }
1255
1256         return 0;
1257 }
1258
1259 /*
1260  * XXX: That is wrapper to m88ds3103_probe() via driver core in order to provide
1261  * proper I2C client for legacy media attach binding.
1262  * New users must use I2C client binding directly!
1263  */
1264 struct dvb_frontend *m88ds3103_attach(const struct m88ds3103_config *cfg,
1265                 struct i2c_adapter *i2c, struct i2c_adapter **tuner_i2c_adapter)
1266 {
1267         struct i2c_client *client;
1268         struct i2c_board_info board_info;
1269         struct m88ds3103_platform_data pdata;
1270
1271         pdata.clk = cfg->clock;
1272         pdata.i2c_wr_max = cfg->i2c_wr_max;
1273         pdata.ts_mode = cfg->ts_mode;
1274         pdata.ts_clk = cfg->ts_clk;
1275         pdata.ts_clk_pol = cfg->ts_clk_pol;
1276         pdata.spec_inv = cfg->spec_inv;
1277         pdata.agc = cfg->agc;
1278         pdata.agc_inv = cfg->agc_inv;
1279         pdata.clk_out = cfg->clock_out;
1280         pdata.envelope_mode = cfg->envelope_mode;
1281         pdata.lnb_hv_pol = cfg->lnb_hv_pol;
1282         pdata.lnb_en_pol = cfg->lnb_en_pol;
1283         pdata.attach_in_use = true;
1284
1285         memset(&board_info, 0, sizeof(board_info));
1286         strlcpy(board_info.type, "m88ds3103", I2C_NAME_SIZE);
1287         board_info.addr = cfg->i2c_addr;
1288         board_info.platform_data = &pdata;
1289         client = i2c_new_device(i2c, &board_info);
1290         if (!client || !client->dev.driver)
1291                 return NULL;
1292
1293         *tuner_i2c_adapter = pdata.get_i2c_adapter(client);
1294         return pdata.get_dvb_frontend(client);
1295 }
1296 EXPORT_SYMBOL(m88ds3103_attach);
1297
1298 static const struct dvb_frontend_ops m88ds3103_ops = {
1299         .delsys = {SYS_DVBS, SYS_DVBS2},
1300         .info = {
1301                 .name = "Montage Technology M88DS3103",
1302                 .frequency_min =  950000,
1303                 .frequency_max = 2150000,
1304                 .frequency_tolerance = 5000,
1305                 .symbol_rate_min =  1000000,
1306                 .symbol_rate_max = 45000000,
1307                 .caps = FE_CAN_INVERSION_AUTO |
1308                         FE_CAN_FEC_1_2 |
1309                         FE_CAN_FEC_2_3 |
1310                         FE_CAN_FEC_3_4 |
1311                         FE_CAN_FEC_4_5 |
1312                         FE_CAN_FEC_5_6 |
1313                         FE_CAN_FEC_6_7 |
1314                         FE_CAN_FEC_7_8 |
1315                         FE_CAN_FEC_8_9 |
1316                         FE_CAN_FEC_AUTO |
1317                         FE_CAN_QPSK |
1318                         FE_CAN_RECOVER |
1319                         FE_CAN_2G_MODULATION
1320         },
1321
1322         .release = m88ds3103_release,
1323
1324         .get_tune_settings = m88ds3103_get_tune_settings,
1325
1326         .init = m88ds3103_init,
1327         .sleep = m88ds3103_sleep,
1328
1329         .set_frontend = m88ds3103_set_frontend,
1330         .get_frontend = m88ds3103_get_frontend,
1331
1332         .read_status = m88ds3103_read_status,
1333         .read_snr = m88ds3103_read_snr,
1334         .read_ber = m88ds3103_read_ber,
1335
1336         .diseqc_send_master_cmd = m88ds3103_diseqc_send_master_cmd,
1337         .diseqc_send_burst = m88ds3103_diseqc_send_burst,
1338
1339         .set_tone = m88ds3103_set_tone,
1340         .set_voltage = m88ds3103_set_voltage,
1341 };
1342
1343 static struct dvb_frontend *m88ds3103_get_dvb_frontend(struct i2c_client *client)
1344 {
1345         struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1346
1347         dev_dbg(&client->dev, "\n");
1348
1349         return &dev->fe;
1350 }
1351
1352 static struct i2c_adapter *m88ds3103_get_i2c_adapter(struct i2c_client *client)
1353 {
1354         struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1355
1356         dev_dbg(&client->dev, "\n");
1357
1358         return dev->muxc->adapter[0];
1359 }
1360
1361 static int m88ds3103_probe(struct i2c_client *client,
1362                         const struct i2c_device_id *id)
1363 {
1364         struct m88ds3103_dev *dev;
1365         struct m88ds3103_platform_data *pdata = client->dev.platform_data;
1366         int ret;
1367         unsigned int utmp;
1368
1369         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1370         if (!dev) {
1371                 ret = -ENOMEM;
1372                 goto err;
1373         }
1374
1375         dev->client = client;
1376         dev->config.clock = pdata->clk;
1377         dev->config.i2c_wr_max = pdata->i2c_wr_max;
1378         dev->config.ts_mode = pdata->ts_mode;
1379         dev->config.ts_clk = pdata->ts_clk * 1000;
1380         dev->config.ts_clk_pol = pdata->ts_clk_pol;
1381         dev->config.spec_inv = pdata->spec_inv;
1382         dev->config.agc_inv = pdata->agc_inv;
1383         dev->config.clock_out = pdata->clk_out;
1384         dev->config.envelope_mode = pdata->envelope_mode;
1385         dev->config.agc = pdata->agc;
1386         dev->config.lnb_hv_pol = pdata->lnb_hv_pol;
1387         dev->config.lnb_en_pol = pdata->lnb_en_pol;
1388         dev->cfg = &dev->config;
1389         /* create regmap */
1390         dev->regmap_config.reg_bits = 8,
1391         dev->regmap_config.val_bits = 8,
1392         dev->regmap_config.lock_arg = dev,
1393         dev->regmap = devm_regmap_init_i2c(client, &dev->regmap_config);
1394         if (IS_ERR(dev->regmap)) {
1395                 ret = PTR_ERR(dev->regmap);
1396                 goto err_kfree;
1397         }
1398
1399         /* 0x00: chip id[6:0], 0x01: chip ver[7:0], 0x02: chip ver[15:8] */
1400         ret = regmap_read(dev->regmap, 0x00, &utmp);
1401         if (ret)
1402                 goto err_kfree;
1403
1404         dev->chip_id = utmp >> 1;
1405         dev_dbg(&client->dev, "chip_id=%02x\n", dev->chip_id);
1406
1407         switch (dev->chip_id) {
1408         case M88RS6000_CHIP_ID:
1409         case M88DS3103_CHIP_ID:
1410                 break;
1411         default:
1412                 goto err_kfree;
1413         }
1414
1415         switch (dev->cfg->clock_out) {
1416         case M88DS3103_CLOCK_OUT_DISABLED:
1417                 utmp = 0x80;
1418                 break;
1419         case M88DS3103_CLOCK_OUT_ENABLED:
1420                 utmp = 0x00;
1421                 break;
1422         case M88DS3103_CLOCK_OUT_ENABLED_DIV2:
1423                 utmp = 0x10;
1424                 break;
1425         default:
1426                 ret = -EINVAL;
1427                 goto err_kfree;
1428         }
1429
1430         if (!pdata->ts_clk) {
1431                 ret = -EINVAL;
1432                 goto err_kfree;
1433         }
1434
1435         /* 0x29 register is defined differently for m88rs6000. */
1436         /* set internal tuner address to 0x21 */
1437         if (dev->chip_id == M88RS6000_CHIP_ID)
1438                 utmp = 0x00;
1439
1440         ret = regmap_write(dev->regmap, 0x29, utmp);
1441         if (ret)
1442                 goto err_kfree;
1443
1444         /* sleep */
1445         ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00);
1446         if (ret)
1447                 goto err_kfree;
1448         ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01);
1449         if (ret)
1450                 goto err_kfree;
1451         ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10);
1452         if (ret)
1453                 goto err_kfree;
1454
1455         /* create mux i2c adapter for tuner */
1456         dev->muxc = i2c_mux_alloc(client->adapter, &client->dev, 1, 0, 0,
1457                                   m88ds3103_select, NULL);
1458         if (!dev->muxc) {
1459                 ret = -ENOMEM;
1460                 goto err_kfree;
1461         }
1462         dev->muxc->priv = dev;
1463         ret = i2c_mux_add_adapter(dev->muxc, 0, 0, 0);
1464         if (ret)
1465                 goto err_kfree;
1466
1467         /* create dvb_frontend */
1468         memcpy(&dev->fe.ops, &m88ds3103_ops, sizeof(struct dvb_frontend_ops));
1469         if (dev->chip_id == M88RS6000_CHIP_ID)
1470                 strncpy(dev->fe.ops.info.name, "Montage Technology M88RS6000",
1471                         sizeof(dev->fe.ops.info.name));
1472         if (!pdata->attach_in_use)
1473                 dev->fe.ops.release = NULL;
1474         dev->fe.demodulator_priv = dev;
1475         i2c_set_clientdata(client, dev);
1476
1477         /* setup callbacks */
1478         pdata->get_dvb_frontend = m88ds3103_get_dvb_frontend;
1479         pdata->get_i2c_adapter = m88ds3103_get_i2c_adapter;
1480         return 0;
1481 err_kfree:
1482         kfree(dev);
1483 err:
1484         dev_dbg(&client->dev, "failed=%d\n", ret);
1485         return ret;
1486 }
1487
1488 static int m88ds3103_remove(struct i2c_client *client)
1489 {
1490         struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1491
1492         dev_dbg(&client->dev, "\n");
1493
1494         i2c_mux_del_adapters(dev->muxc);
1495
1496         kfree(dev);
1497         return 0;
1498 }
1499
1500 static const struct i2c_device_id m88ds3103_id_table[] = {
1501         {"m88ds3103", 0},
1502         {}
1503 };
1504 MODULE_DEVICE_TABLE(i2c, m88ds3103_id_table);
1505
1506 static struct i2c_driver m88ds3103_driver = {
1507         .driver = {
1508                 .name   = "m88ds3103",
1509                 .suppress_bind_attrs = true,
1510         },
1511         .probe          = m88ds3103_probe,
1512         .remove         = m88ds3103_remove,
1513         .id_table       = m88ds3103_id_table,
1514 };
1515
1516 module_i2c_driver(m88ds3103_driver);
1517
1518 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1519 MODULE_DESCRIPTION("Montage Technology M88DS3103 DVB-S/S2 demodulator driver");
1520 MODULE_LICENSE("GPL");
1521 MODULE_FIRMWARE(M88DS3103_FIRMWARE);
1522 MODULE_FIRMWARE(M88RS6000_FIRMWARE);