1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "IRQ chip support"
10 select IRQ_DOMAIN_HIERARCHY
11 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
21 default 2 if ARCH_REALVIEW
35 select IRQ_DOMAIN_HIERARCHY
36 select PARTITION_PERCPU
37 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
41 select GENERIC_MSI_IRQ_DOMAIN
44 config ARM_GIC_V3_ITS_PCI
46 depends on ARM_GIC_V3_ITS
49 default ARM_GIC_V3_ITS
51 config ARM_GIC_V3_ITS_FSL_MC
53 depends on ARM_GIC_V3_ITS
55 default ARM_GIC_V3_ITS
59 select IRQ_DOMAIN_HIERARCHY
60 select GENERIC_IRQ_CHIP
68 default 4 if ARCH_S5PV210
72 The maximum number of VICs available in the system, for
75 config ARMADA_370_XP_IRQ
77 select GENERIC_IRQ_CHIP
79 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
85 select GENERIC_IRQ_CHIP
88 bool "Amazon's Annapurna Labs Fabric Interrupt Controller"
89 depends on OF || COMPILE_TEST
90 select GENERIC_IRQ_CHIP
93 Support Amazon's Annapurna Labs Fabric Interrupt Controller.
97 select GENERIC_IRQ_CHIP
101 config ATMEL_AIC5_IRQ
103 select GENERIC_IRQ_CHIP
111 config BCM6345_L1_IRQ
113 select GENERIC_IRQ_CHIP
115 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
117 config BCM7038_L1_IRQ
118 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
119 depends on ARCH_BRCMSTB || BMIPS_GENERIC
120 default ARCH_BRCMSTB || BMIPS_GENERIC
121 select GENERIC_IRQ_CHIP
123 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
125 config BCM7120_L2_IRQ
126 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
127 depends on ARCH_BRCMSTB || BMIPS_GENERIC
128 default ARCH_BRCMSTB || BMIPS_GENERIC
129 select GENERIC_IRQ_CHIP
132 config BRCMSTB_L2_IRQ
133 tristate "Broadcom STB generic L2 interrupt controller driver"
134 depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC
135 default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC
136 select GENERIC_IRQ_CHIP
141 select GENERIC_IRQ_CHIP
144 config DAVINCI_CP_INTC
146 select GENERIC_IRQ_CHIP
151 select GENERIC_IRQ_CHIP
152 select IRQ_DOMAIN_HIERARCHY
154 config FARADAY_FTINTC010
159 config HISILICON_IRQ_MBIGEN
162 select ARM_GIC_V3_ITS
166 select GENERIC_IRQ_CHIP
179 select GENERIC_IRQ_CHIP
180 select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING
182 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
184 config CLPS711X_IRQCHIP
186 depends on ARCH_CLPS711X
200 select GENERIC_IRQ_CHIP
209 select GENERIC_IRQ_CHIP
213 bool "J-Core integrated AIC" if COMPILE_TEST
217 Support for the J-Core integrated AIC.
223 config RENESAS_INTC_IRQPIN
224 bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
227 Enable support for the Renesas Interrupt Controller for external
228 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
231 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
232 select GENERIC_IRQ_CHIP
235 Enable support for the Renesas Interrupt Controller for external
236 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
238 config RENESAS_RZA1_IRQC
239 bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST
240 select IRQ_DOMAIN_HIERARCHY
242 Enable support for the Renesas RZ/A1 Interrupt Controller, to use up
243 to 8 external interrupts with configurable sense select.
245 config RENESAS_RZG2L_IRQC
246 bool "Renesas RZ/G2L (and alike SoC) IRQC support" if COMPILE_TEST
247 select GENERIC_IRQ_CHIP
248 select IRQ_DOMAIN_HIERARCHY
250 Enable support for the Renesas RZ/G2L (and alike SoC) Interrupt Controller
251 for external devices.
254 bool "Kontron sl28cpld IRQ controller"
255 depends on MFD_SL28CPLD=y || COMPILE_TEST
258 Interrupt controller driver for the board management controller
259 found on the Kontron sl28 CPLD.
266 Enables SysCfg Controlled IRQs on STi based platforms.
273 select IRQ_DOMAIN_HIERARCHY
274 select IRQ_FASTEOI_HIERARCHY_HANDLERS
276 config SUNXI_NMI_INTC
278 select GENERIC_IRQ_CHIP
283 select GENERIC_IRQ_CHIP
286 tristate "TS-4800 IRQ controller"
289 depends on SOC_IMX51 || COMPILE_TEST
291 Support for the TS-4800 FPGA IRQ controller
293 config VERSATILE_FPGA_IRQ
297 config VERSATILE_FPGA_IRQ_NR
300 depends on VERSATILE_FPGA_IRQ
305 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
308 bool "Xilinx Interrupt Controller IP"
309 depends on OF_ADDRESS
312 Support for the Xilinx Interrupt Controller IP core.
313 This is used as a primary controller with MicroBlaze and can also
314 be used as a secondary chained controller on other platforms.
319 Support for a CROSSBAR ip that precedes the main interrupt controller.
320 The primary irqchip invokes the crossbar's callback which inturn allocates
321 a free irq and configures the IP. Thus the peripheral interrupts are
322 routed to one of the free irqchip interrupt lines.
325 tristate "Keystone 2 IRQ controller IP"
326 depends on ARCH_KEYSTONE
328 Support for Texas Instruments Keystone 2 IRQ controller IP which
329 is part of the Keystone 2 IPC mechanism
333 select GENERIC_IRQ_IPI if SMP
334 select IRQ_DOMAIN_HIERARCHY
339 depends on MACH_INGENIC
342 config INGENIC_TCU_IRQ
343 bool "Ingenic JZ47xx TCU interrupt controller"
345 depends on MIPS || COMPILE_TEST
347 select GENERIC_IRQ_CHIP
349 Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic
358 Enables the wakeup IRQs for IMX platforms with GPCv2 block
361 def_bool y if MACH_ASM9260 || ARCH_MXS
365 config MSCC_OCELOT_IRQ
368 select GENERIC_IRQ_CHIP
378 select GENERIC_MSI_IRQ_DOMAIN
387 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
391 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
392 depends on PCI && PCI_MSI
394 config PARTITION_PERCPU
400 select GENERIC_IRQ_CHIP
402 config QCOM_IRQ_COMBINER
403 bool "QCOM IRQ combiner support"
404 depends on ARCH_QCOM && ACPI
405 select IRQ_DOMAIN_HIERARCHY
407 Say yes here to add support for the IRQ combiner devices embedded
408 in Qualcomm Technologies chips.
410 config IRQ_UNIPHIER_AIDET
411 bool "UniPhier AIDET support" if COMPILE_TEST
412 depends on ARCH_UNIPHIER || COMPILE_TEST
413 default ARCH_UNIPHIER
414 select IRQ_DOMAIN_HIERARCHY
416 Support for the UniPhier AIDET (ARM Interrupt Detector).
418 config MESON_IRQ_GPIO
419 tristate "Meson GPIO Interrupt Multiplexer"
420 depends on ARCH_MESON || COMPILE_TEST
422 select IRQ_DOMAIN_HIERARCHY
424 Support Meson SoC Family GPIO Interrupt Multiplexer
427 bool "Goldfish programmable interrupt controller"
428 depends on MIPS && (GOLDFISH || COMPILE_TEST)
429 select GENERIC_IRQ_CHIP
432 Say yes here to enable Goldfish interrupt controller driver used
433 for Goldfish based virtual platforms.
438 select IRQ_DOMAIN_HIERARCHY
440 Power Domain Controller driver to manage and configure wakeup
441 IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
447 select IRQ_DOMAIN_HIERARCHY
449 MSM Power Manager driver to manage and configure wakeup
450 IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
456 Say yes here to enable C-SKY SMP interrupt controller driver used
457 for C-SKY SMP system.
458 In fact it's not mmio map in hardware and it uses ld/st to visit the
459 controller's register inside CPU.
462 bool "C-SKY APB Interrupt Controller"
465 Say yes here to enable C-SKY APB interrupt controller driver used
466 by C-SKY single core SOC system. It uses mmio map apb-bus to visit
467 the controller's register.
470 bool "i.MX IRQSTEER support"
471 depends on ARCH_MXC || COMPILE_TEST
475 Support for the i.MX IRQSTEER interrupt multiplexer/remapper.
478 bool "i.MX INTMUX support" if COMPILE_TEST
479 default y if ARCH_MXC
482 Support for the i.MX INTMUX interrupt multiplexer.
485 bool "Loongson-1 Interrupt Controller"
486 depends on MACH_LOONGSON32
489 select GENERIC_IRQ_CHIP
491 Support for the Loongson-1 platform Interrupt Controller.
493 config TI_SCI_INTR_IRQCHIP
495 depends on TI_SCI_PROTOCOL
496 select IRQ_DOMAIN_HIERARCHY
498 This enables the irqchip driver support for K3 Interrupt router
499 over TI System Control Interface available on some new TI's SoCs.
500 If you wish to use interrupt router irq resources managed by the
501 TI System Controller, say Y here. Otherwise, say N.
503 config TI_SCI_INTA_IRQCHIP
505 depends on TI_SCI_PROTOCOL
506 select IRQ_DOMAIN_HIERARCHY
507 select TI_SCI_INTA_MSI_DOMAIN
509 This enables the irqchip driver support for K3 Interrupt aggregator
510 over TI System Control Interface available on some new TI's SoCs.
511 If you wish to use interrupt aggregator irq resources managed by the
512 TI System Controller, say Y here. Otherwise, say N.
520 This enables support for the PRU-ICSS Local Interrupt Controller
521 present within a PRU-ICSS subsystem present on various TI SoCs.
522 The PRUSS INTC enables various interrupts to be routed to multiple
523 different processors within the SoC.
526 bool "RISC-V Local Interrupt Controller"
530 This enables support for the per-HART local interrupt controller
531 found in standard RISC-V systems. The per-HART local interrupt
532 controller handles timer interrupts, software interrupts, and
533 hardware interrupts. Without a per-HART local interrupt controller,
534 a RISC-V system will be unable to handle any interrupts.
536 If you don't know what to do here, say Y.
539 bool "SiFive Platform-Level Interrupt Controller"
541 select IRQ_DOMAIN_HIERARCHY
542 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
544 This enables support for the PLIC chip found in SiFive (and
545 potentially other) RISC-V systems. The PLIC controls devices
546 interrupts and connects them to each core's local interrupt
547 controller. Aside from timer and software interrupts, all other
548 interrupt sources are subordinate to the PLIC.
550 If you don't know what to do here, say Y.
552 config EXYNOS_IRQ_COMBINER
553 bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST
554 depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST
556 Say yes here to add support for the IRQ combiner devices embedded
557 in Samsung Exynos chips.
559 config IRQ_LOONGARCH_CPU
561 select GENERIC_IRQ_CHIP
563 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
565 Support for the LoongArch CPU Interrupt Controller. For details of
566 irq chip hierarchy on LoongArch platforms please read the document
567 Documentation/loongarch/irq-chip-model.rst.
569 config LOONGSON_LIOINTC
570 bool "Loongson Local I/O Interrupt Controller"
571 depends on MACH_LOONGSON64
574 select GENERIC_IRQ_CHIP
576 Support for the Loongson Local I/O Interrupt Controller.
578 config LOONGSON_EIOINTC
579 bool "Loongson Extend I/O Interrupt Controller"
581 depends on MACH_LOONGSON64
582 default MACH_LOONGSON64
583 select IRQ_DOMAIN_HIERARCHY
584 select GENERIC_IRQ_CHIP
586 Support for the Loongson3 Extend I/O Interrupt Vector Controller.
588 config LOONGSON_HTPIC
589 bool "Loongson3 HyperTransport PIC Controller"
590 depends on MACH_LOONGSON64 && MIPS
593 select GENERIC_IRQ_CHIP
595 Support for the Loongson-3 HyperTransport PIC Controller.
597 config LOONGSON_HTVEC
598 bool "Loongson HyperTransport Interrupt Vector Controller"
599 depends on MACH_LOONGSON64
600 default MACH_LOONGSON64
601 select IRQ_DOMAIN_HIERARCHY
603 Support for the Loongson HyperTransport Interrupt Vector Controller.
605 config LOONGSON_PCH_PIC
606 bool "Loongson PCH PIC Controller"
607 depends on MACH_LOONGSON64
608 default MACH_LOONGSON64
609 select IRQ_DOMAIN_HIERARCHY
610 select IRQ_FASTEOI_HIERARCHY_HANDLERS
612 Support for the Loongson PCH PIC Controller.
614 config LOONGSON_PCH_MSI
615 bool "Loongson PCH MSI Controller"
616 depends on MACH_LOONGSON64
618 default MACH_LOONGSON64
619 select IRQ_DOMAIN_HIERARCHY
622 Support for the Loongson PCH MSI Controller.
624 config LOONGSON_PCH_LPC
625 bool "Loongson PCH LPC Controller"
626 depends on MACH_LOONGSON64
627 default (MACH_LOONGSON64 && LOONGARCH)
628 select IRQ_DOMAIN_HIERARCHY
630 Support for the Loongson PCH LPC Controller.
633 bool "MStar Interrupt Controller"
634 depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST
635 default ARCH_MEDIATEK
637 select IRQ_DOMAIN_HIERARCHY
639 Support MStar Interrupt Controller.
642 bool "Nuvoton WPCM450 Advanced Interrupt Controller"
643 depends on ARCH_WPCM450
645 Support for the interrupt controller in the Nuvoton WPCM450 BMC SoC.
649 select GENERIC_IRQ_CHIP
653 bool "Apple Interrupt Controller (AIC)"
655 depends on ARCH_APPLE || COMPILE_TEST
657 Support for the Apple Interrupt Controller found on Apple Silicon SoCs,
661 bool "Microchip External Interrupt Controller"
662 depends on ARCH_AT91 || COMPILE_TEST
664 select IRQ_DOMAIN_HIERARCHY
666 Support for Microchip External Interrupt Controller.
668 config SUNPLUS_SP7021_INTC
669 bool "Sunplus SP7021 interrupt controller" if COMPILE_TEST
672 Support for the Sunplus SP7021 Interrupt Controller IP core.
673 SP7021 SoC has 2 Chips: C-Chip & P-Chip. This is used as a
674 chained controller, routing all interrupt source in P-Chip to
675 the primary controller on C-Chip.