2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/types.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
19 #include <linux/ioport.h>
20 #include <linux/init.h>
21 #include <linux/serio.h>
22 #include <linux/err.h>
23 #include <linux/rcupdate.h>
24 #include <linux/platform_device.h>
25 #include <linux/i8042.h>
26 #include <linux/slab.h>
27 #include <linux/suspend.h>
31 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
32 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
33 MODULE_LICENSE("GPL");
35 static bool i8042_nokbd;
36 module_param_named(nokbd, i8042_nokbd, bool, 0);
37 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
39 static bool i8042_noaux;
40 module_param_named(noaux, i8042_noaux, bool, 0);
41 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
43 static bool i8042_nomux;
44 module_param_named(nomux, i8042_nomux, bool, 0);
45 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
47 static bool i8042_unlock;
48 module_param_named(unlock, i8042_unlock, bool, 0);
49 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
51 enum i8042_controller_reset_mode {
55 #define I8042_RESET_DEFAULT I8042_RESET_ON_S2RAM
57 static enum i8042_controller_reset_mode i8042_reset = I8042_RESET_DEFAULT;
58 static int i8042_set_reset(const char *val, const struct kernel_param *kp)
60 enum i8042_controller_reset_mode *arg = kp->arg;
65 error = kstrtobool(val, &reset);
72 *arg = reset ? I8042_RESET_ALWAYS : I8042_RESET_NEVER;
76 static const struct kernel_param_ops param_ops_reset_param = {
77 .flags = KERNEL_PARAM_OPS_FL_NOARG,
78 .set = i8042_set_reset,
80 #define param_check_reset_param(name, p) \
81 __param_check(name, p, enum i8042_controller_reset_mode)
82 module_param_named(reset, i8042_reset, reset_param, 0);
83 MODULE_PARM_DESC(reset, "Reset controller on resume, cleanup or both");
85 static bool i8042_direct;
86 module_param_named(direct, i8042_direct, bool, 0);
87 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
89 static bool i8042_dumbkbd;
90 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
91 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
93 static bool i8042_noloop;
94 module_param_named(noloop, i8042_noloop, bool, 0);
95 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
97 static bool i8042_notimeout;
98 module_param_named(notimeout, i8042_notimeout, bool, 0);
99 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
101 static bool i8042_kbdreset;
102 module_param_named(kbdreset, i8042_kbdreset, bool, 0);
103 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port");
106 static bool i8042_dritek;
107 module_param_named(dritek, i8042_dritek, bool, 0);
108 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
112 static bool i8042_nopnp;
113 module_param_named(nopnp, i8042_nopnp, bool, 0);
114 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
119 static bool i8042_debug;
120 module_param_named(debug, i8042_debug, bool, 0600);
121 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
123 static bool i8042_unmask_kbd_data;
124 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600);
125 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]");
128 static bool i8042_bypass_aux_irq_test;
129 static char i8042_kbd_firmware_id[128];
130 static char i8042_aux_firmware_id[128];
135 * i8042_lock protects serialization between i8042_command and
136 * the interrupt handler.
138 static DEFINE_SPINLOCK(i8042_lock);
141 * Writers to AUX and KBD ports as well as users issuing i8042_command
142 * directly should acquire i8042_mutex (by means of calling
143 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
144 * they do not disturb each other (unfortunately in many i8042
145 * implementations write to one of the ports will immediately abort
146 * command that is being processed by another port).
148 static DEFINE_MUTEX(i8042_mutex);
158 #define I8042_KBD_PORT_NO 0
159 #define I8042_AUX_PORT_NO 1
160 #define I8042_MUX_PORT_NO 2
161 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
163 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
165 static unsigned char i8042_initial_ctr;
166 static unsigned char i8042_ctr;
167 static bool i8042_mux_present;
168 static bool i8042_kbd_irq_registered;
169 static bool i8042_aux_irq_registered;
170 static unsigned char i8042_suppress_kbd_ack;
171 static struct platform_device *i8042_platform_device;
172 static struct notifier_block i8042_kbd_bind_notifier_block;
174 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
175 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
176 struct serio *serio);
178 void i8042_lock_chip(void)
180 mutex_lock(&i8042_mutex);
182 EXPORT_SYMBOL(i8042_lock_chip);
184 void i8042_unlock_chip(void)
186 mutex_unlock(&i8042_mutex);
188 EXPORT_SYMBOL(i8042_unlock_chip);
190 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
191 struct serio *serio))
196 spin_lock_irqsave(&i8042_lock, flags);
198 if (i8042_platform_filter) {
203 i8042_platform_filter = filter;
206 spin_unlock_irqrestore(&i8042_lock, flags);
209 EXPORT_SYMBOL(i8042_install_filter);
211 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
217 spin_lock_irqsave(&i8042_lock, flags);
219 if (i8042_platform_filter != filter) {
224 i8042_platform_filter = NULL;
227 spin_unlock_irqrestore(&i8042_lock, flags);
230 EXPORT_SYMBOL(i8042_remove_filter);
233 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
234 * be ready for reading values from it / writing values to it.
235 * Called always with i8042_lock held.
238 static int i8042_wait_read(void)
242 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
246 return -(i == I8042_CTL_TIMEOUT);
249 static int i8042_wait_write(void)
253 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
257 return -(i == I8042_CTL_TIMEOUT);
261 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
262 * of the i8042 down the toilet.
265 static int i8042_flush(void)
268 unsigned char data, str;
272 spin_lock_irqsave(&i8042_lock, flags);
274 while ((str = i8042_read_status()) & I8042_STR_OBF) {
275 if (count++ < I8042_BUFFER_SIZE) {
277 data = i8042_read_data();
278 dbg("%02x <- i8042 (flush, %s)\n",
279 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
286 spin_unlock_irqrestore(&i8042_lock, flags);
292 * i8042_command() executes a command on the i8042. It also sends the input
293 * parameter(s) of the commands to it, and receives the output value(s). The
294 * parameters are to be stored in the param array, and the output is placed
295 * into the same array. The number of the parameters and output values is
296 * encoded in bits 8-11 of the command number.
299 static int __i8042_command(unsigned char *param, int command)
303 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
306 error = i8042_wait_write();
310 dbg("%02x -> i8042 (command)\n", command & 0xff);
311 i8042_write_command(command & 0xff);
313 for (i = 0; i < ((command >> 12) & 0xf); i++) {
314 error = i8042_wait_write();
316 dbg(" -- i8042 (wait write timeout)\n");
319 dbg("%02x -> i8042 (parameter)\n", param[i]);
320 i8042_write_data(param[i]);
323 for (i = 0; i < ((command >> 8) & 0xf); i++) {
324 error = i8042_wait_read();
326 dbg(" -- i8042 (wait read timeout)\n");
330 if (command == I8042_CMD_AUX_LOOP &&
331 !(i8042_read_status() & I8042_STR_AUXDATA)) {
332 dbg(" -- i8042 (auxerr)\n");
336 param[i] = i8042_read_data();
337 dbg("%02x <- i8042 (return)\n", param[i]);
343 int i8042_command(unsigned char *param, int command)
348 spin_lock_irqsave(&i8042_lock, flags);
349 retval = __i8042_command(param, command);
350 spin_unlock_irqrestore(&i8042_lock, flags);
354 EXPORT_SYMBOL(i8042_command);
357 * i8042_kbd_write() sends a byte out through the keyboard interface.
360 static int i8042_kbd_write(struct serio *port, unsigned char c)
365 spin_lock_irqsave(&i8042_lock, flags);
367 if (!(retval = i8042_wait_write())) {
368 dbg("%02x -> i8042 (kbd-data)\n", c);
372 spin_unlock_irqrestore(&i8042_lock, flags);
378 * i8042_aux_write() sends a byte out through the aux interface.
381 static int i8042_aux_write(struct serio *serio, unsigned char c)
383 struct i8042_port *port = serio->port_data;
385 return i8042_command(&c, port->mux == -1 ?
387 I8042_CMD_MUX_SEND + port->mux);
392 * i8042_port_close attempts to clear AUX or KBD port state by disabling
393 * and then re-enabling it.
396 static void i8042_port_close(struct serio *serio)
400 const char *port_name;
402 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
403 irq_bit = I8042_CTR_AUXINT;
404 disable_bit = I8042_CTR_AUXDIS;
407 irq_bit = I8042_CTR_KBDINT;
408 disable_bit = I8042_CTR_KBDDIS;
412 i8042_ctr &= ~irq_bit;
413 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
414 pr_warn("Can't write CTR while closing %s port\n", port_name);
418 i8042_ctr &= ~disable_bit;
419 i8042_ctr |= irq_bit;
420 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
421 pr_err("Can't reactivate %s port\n", port_name);
424 * See if there is any data appeared while we were messing with
427 i8042_interrupt(0, NULL);
431 * i8042_start() is called by serio core when port is about to finish
432 * registering. It will mark port as existing so i8042_interrupt can
433 * start sending data through it.
435 static int i8042_start(struct serio *serio)
437 struct i8042_port *port = serio->port_data;
439 spin_lock_irq(&i8042_lock);
441 spin_unlock_irq(&i8042_lock);
447 * i8042_stop() marks serio port as non-existing so i8042_interrupt
448 * will not try to send data to the port that is about to go away.
449 * The function is called by serio core as part of unregister procedure.
451 static void i8042_stop(struct serio *serio)
453 struct i8042_port *port = serio->port_data;
455 spin_lock_irq(&i8042_lock);
456 port->exists = false;
458 spin_unlock_irq(&i8042_lock);
461 * We need to make sure that interrupt handler finishes using
462 * our serio port before we return from this function.
463 * We synchronize with both AUX and KBD IRQs because there is
464 * a (very unlikely) chance that AUX IRQ is raised for KBD port
467 synchronize_irq(I8042_AUX_IRQ);
468 synchronize_irq(I8042_KBD_IRQ);
472 * i8042_filter() filters out unwanted bytes from the input data stream.
473 * It is called from i8042_interrupt and thus is running with interrupts
474 * off and i8042_lock held.
476 static bool i8042_filter(unsigned char data, unsigned char str,
479 if (unlikely(i8042_suppress_kbd_ack)) {
480 if ((~str & I8042_STR_AUXDATA) &&
481 (data == 0xfa || data == 0xfe)) {
482 i8042_suppress_kbd_ack--;
483 dbg("Extra keyboard ACK - filtered out\n");
488 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
489 dbg("Filtered out by platform filter\n");
497 * i8042_interrupt() is the most important function in this driver -
498 * it handles the interrupts from the i8042, and sends incoming bytes
499 * to the upper layers.
502 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
504 struct i8042_port *port;
507 unsigned char str, data;
509 unsigned int port_no;
513 spin_lock_irqsave(&i8042_lock, flags);
515 str = i8042_read_status();
516 if (unlikely(~str & I8042_STR_OBF)) {
517 spin_unlock_irqrestore(&i8042_lock, flags);
519 dbg("Interrupt %d, without any data\n", irq);
524 data = i8042_read_data();
526 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
527 static unsigned long last_transmit;
528 static unsigned char last_str;
531 if (str & I8042_STR_MUXERR) {
532 dbg("MUX error, status is %02x, data is %02x\n",
535 * When MUXERR condition is signalled the data register can only contain
536 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
537 * it is not always the case. Some KBCs also report 0xfc when there is
538 * nothing connected to the port while others sometimes get confused which
539 * port the data came from and signal error leaving the data intact. They
540 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
541 * to legacy mode yet, when we see one we'll add proper handling).
542 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
543 * rest assume that the data came from the same serio last byte
544 * was transmitted (if transmission happened not too long ago).
549 if (time_before(jiffies, last_transmit + HZ/10)) {
553 /* fall through - report timeout */
556 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
557 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
561 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
563 last_transmit = jiffies;
566 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
567 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
569 port_no = (str & I8042_STR_AUXDATA) ?
570 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
573 port = &i8042_ports[port_no];
574 serio = port->exists ? port->serio : NULL;
576 filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n",
578 dfl & SERIO_PARITY ? ", bad parity" : "",
579 dfl & SERIO_TIMEOUT ? ", timeout" : "");
581 filtered = i8042_filter(data, str, serio);
583 spin_unlock_irqrestore(&i8042_lock, flags);
585 if (likely(serio && !filtered))
586 serio_interrupt(serio, data, dfl);
589 return IRQ_RETVAL(ret);
593 * i8042_enable_kbd_port enables keyboard port on chip
596 static int i8042_enable_kbd_port(void)
598 i8042_ctr &= ~I8042_CTR_KBDDIS;
599 i8042_ctr |= I8042_CTR_KBDINT;
601 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
602 i8042_ctr &= ~I8042_CTR_KBDINT;
603 i8042_ctr |= I8042_CTR_KBDDIS;
604 pr_err("Failed to enable KBD port\n");
612 * i8042_enable_aux_port enables AUX (mouse) port on chip
615 static int i8042_enable_aux_port(void)
617 i8042_ctr &= ~I8042_CTR_AUXDIS;
618 i8042_ctr |= I8042_CTR_AUXINT;
620 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
621 i8042_ctr &= ~I8042_CTR_AUXINT;
622 i8042_ctr |= I8042_CTR_AUXDIS;
623 pr_err("Failed to enable AUX port\n");
631 * i8042_enable_mux_ports enables 4 individual AUX ports after
632 * the controller has been switched into Multiplexed mode
635 static int i8042_enable_mux_ports(void)
640 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
641 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
642 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
645 return i8042_enable_aux_port();
649 * i8042_set_mux_mode checks whether the controller has an
650 * active multiplexor and puts the chip into Multiplexed (true)
651 * or Legacy (false) mode.
654 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
657 unsigned char param, val;
659 * Get rid of bytes in the queue.
665 * Internal loopback test - send three bytes, they should come back from the
666 * mouse interface, the last should be version.
670 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
672 param = val = multiplex ? 0x56 : 0xf6;
673 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
675 param = val = multiplex ? 0xa4 : 0xa5;
676 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val)
680 * Workaround for interference with USB Legacy emulation
681 * that causes a v10.12 MUX to be found.
687 *mux_version = param;
693 * i8042_check_mux() checks whether the controller supports the PS/2 Active
694 * Multiplexing specification by Synaptics, Phoenix, Insyde and
698 static int __init i8042_check_mux(void)
700 unsigned char mux_version;
702 if (i8042_set_mux_mode(true, &mux_version))
705 pr_info("Detected active multiplexing controller, rev %d.%d\n",
706 (mux_version >> 4) & 0xf, mux_version & 0xf);
709 * Disable all muxed ports by disabling AUX.
711 i8042_ctr |= I8042_CTR_AUXDIS;
712 i8042_ctr &= ~I8042_CTR_AUXINT;
714 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
715 pr_err("Failed to disable AUX port, can't use MUX\n");
719 i8042_mux_present = true;
725 * The following is used to test AUX IRQ delivery.
727 static struct completion i8042_aux_irq_delivered __initdata;
728 static bool i8042_irq_being_tested __initdata;
730 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
733 unsigned char str, data;
736 spin_lock_irqsave(&i8042_lock, flags);
737 str = i8042_read_status();
738 if (str & I8042_STR_OBF) {
739 data = i8042_read_data();
740 dbg("%02x <- i8042 (aux_test_irq, %s)\n",
741 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
742 if (i8042_irq_being_tested &&
743 data == 0xa5 && (str & I8042_STR_AUXDATA))
744 complete(&i8042_aux_irq_delivered);
747 spin_unlock_irqrestore(&i8042_lock, flags);
749 return IRQ_RETVAL(ret);
753 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
754 * verifies success by readinng CTR. Used when testing for presence of AUX
757 static int __init i8042_toggle_aux(bool on)
762 if (i8042_command(¶m,
763 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
766 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
767 for (i = 0; i < 100; i++) {
770 if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
773 if (!(param & I8042_CTR_AUXDIS) == on)
781 * i8042_check_aux() applies as much paranoia as it can at detecting
782 * the presence of an AUX interface.
785 static int __init i8042_check_aux(void)
788 bool irq_registered = false;
789 bool aux_loop_broken = false;
794 * Get rid of bytes in the queue.
800 * Internal loopback test - filters out AT-type i8042's. Unfortunately
801 * SiS screwed up and their 5597 doesn't support the LOOP command even
802 * though it has an AUX port.
806 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
807 if (retval || param != 0x5a) {
810 * External connection test - filters out AT-soldered PS/2 i8042's
811 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
812 * 0xfa - no error on some notebooks which ignore the spec
813 * Because it's common for chipsets to return error on perfectly functioning
814 * AUX ports, we test for this only when the LOOP command failed.
817 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
818 (param && param != 0xfa && param != 0xff))
822 * If AUX_LOOP completed without error but returned unexpected data
826 aux_loop_broken = true;
830 * Bit assignment test - filters out PS/2 i8042's in AT mode
833 if (i8042_toggle_aux(false)) {
834 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
835 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
838 if (i8042_toggle_aux(true))
842 * Reset keyboard (needed on some laptops to successfully detect
843 * touchpad, e.g., some Gigabyte laptop models with Elantech
846 if (i8042_kbdreset) {
847 pr_warn("Attempting to reset device connected to KBD port\n");
848 i8042_kbd_write(NULL, (unsigned char) 0xff);
852 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
853 * used it for a PCI card or somethig else.
856 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
858 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
859 * is working and hope we are right.
865 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
866 "i8042", i8042_platform_device))
869 irq_registered = true;
871 if (i8042_enable_aux_port())
874 spin_lock_irqsave(&i8042_lock, flags);
876 init_completion(&i8042_aux_irq_delivered);
877 i8042_irq_being_tested = true;
880 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
882 spin_unlock_irqrestore(&i8042_lock, flags);
887 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
888 msecs_to_jiffies(250)) == 0) {
890 * AUX IRQ was never delivered so we need to flush the controller to
891 * get rid of the byte we put there; otherwise keyboard may not work.
893 dbg(" -- i8042 (aux irq test timeout)\n");
901 * Disable the interface.
904 i8042_ctr |= I8042_CTR_AUXDIS;
905 i8042_ctr &= ~I8042_CTR_AUXINT;
907 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
911 free_irq(I8042_AUX_IRQ, i8042_platform_device);
916 static int i8042_controller_check(void)
919 pr_info("No controller found\n");
926 static int i8042_controller_selftest(void)
932 * We try this 5 times; on some really fragile systems this does not
933 * take the first time...
937 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
938 pr_err("i8042 controller selftest timeout\n");
942 if (param == I8042_RET_CTL_TEST)
945 dbg("i8042 controller selftest: %#x != %#x\n",
946 param, I8042_RET_CTL_TEST);
952 * On x86, we don't fail entire i8042 initialization if controller
953 * reset fails in hopes that keyboard port will still be functional
954 * and user will still get a working keyboard. This is especially
955 * important on netbooks. On other arches we trust hardware more.
957 pr_info("giving up on controller selftest, continuing anyway...\n");
960 pr_err("i8042 controller selftest failed\n");
966 * i8042_controller init initializes the i8042 controller, and,
967 * most importantly, sets it into non-xlated mode if that's
971 static int i8042_controller_init(void)
975 unsigned char ctr[2];
978 * Save the CTR for restore on unload / reboot.
983 pr_err("Unable to get stable CTR read\n");
990 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
991 pr_err("Can't read CTR while initializing i8042\n");
995 } while (n < 2 || ctr[0] != ctr[1]);
997 i8042_initial_ctr = i8042_ctr = ctr[0];
1000 * Disable the keyboard interface and interrupt.
1003 i8042_ctr |= I8042_CTR_KBDDIS;
1004 i8042_ctr &= ~I8042_CTR_KBDINT;
1010 spin_lock_irqsave(&i8042_lock, flags);
1011 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
1013 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
1015 pr_warn("Warning: Keylock active\n");
1017 spin_unlock_irqrestore(&i8042_lock, flags);
1020 * If the chip is configured into nontranslated mode by the BIOS, don't
1021 * bother enabling translating and be happy.
1024 if (~i8042_ctr & I8042_CTR_XLATE)
1025 i8042_direct = true;
1028 * Set nontranslated mode for the kbd interface if requested by an option.
1029 * After this the kbd interface becomes a simple serial in/out, like the aux
1030 * interface is. We don't do this by default, since it can confuse notebook
1035 i8042_ctr &= ~I8042_CTR_XLATE;
1041 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1042 pr_err("Can't write CTR while initializing i8042\n");
1047 * Flush whatever accumulated while we were disabling keyboard port.
1057 * Reset the controller and reset CRT to the original value set by BIOS.
1060 static void i8042_controller_reset(bool s2r_wants_reset)
1065 * Disable both KBD and AUX interfaces so they don't get in the way
1068 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
1069 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
1071 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
1072 pr_warn("Can't write CTR while resetting\n");
1075 * Disable MUX mode if present.
1078 if (i8042_mux_present)
1079 i8042_set_mux_mode(false, NULL);
1082 * Reset the controller if requested.
1085 if (i8042_reset == I8042_RESET_ALWAYS ||
1086 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1087 i8042_controller_selftest();
1091 * Restore the original control register setting.
1094 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1095 pr_warn("Can't restore CTR\n");
1100 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1101 * when kernel panics. Flashing LEDs is useful for users running X who may
1102 * not see the console and will help distinguishing panics from "real"
1105 * Note that DELAY has a limit of 10ms so we will not get stuck here
1106 * waiting for KBC to free up even if KBD interrupt is off
1109 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1111 static long i8042_panic_blink(int state)
1116 led = (state) ? 0x01 | 0x04 : 0;
1117 while (i8042_read_status() & I8042_STR_IBF)
1119 dbg("%02x -> i8042 (panic blink)\n", 0xed);
1120 i8042_suppress_kbd_ack = 2;
1121 i8042_write_data(0xed); /* set leds */
1123 while (i8042_read_status() & I8042_STR_IBF)
1126 dbg("%02x -> i8042 (panic blink)\n", led);
1127 i8042_write_data(led);
1135 static void i8042_dritek_enable(void)
1137 unsigned char param = 0x90;
1140 error = i8042_command(¶m, 0x1059);
1142 pr_warn("Failed to enable DRITEK extension: %d\n", error);
1149 * Here we try to reset everything back to a state we had
1150 * before suspending.
1153 static int i8042_controller_resume(bool s2r_wants_reset)
1157 error = i8042_controller_check();
1161 if (i8042_reset == I8042_RESET_ALWAYS ||
1162 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1163 error = i8042_controller_selftest();
1169 * Restore original CTR value and disable all ports
1172 i8042_ctr = i8042_initial_ctr;
1174 i8042_ctr &= ~I8042_CTR_XLATE;
1175 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1176 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1177 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1178 pr_warn("Can't write CTR to resume, retrying...\n");
1180 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1181 pr_err("CTR write retry failed\n");
1189 i8042_dritek_enable();
1192 if (i8042_mux_present) {
1193 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1194 pr_warn("failed to resume active multiplexor, mouse won't work\n");
1195 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1196 i8042_enable_aux_port();
1198 if (i8042_ports[I8042_KBD_PORT_NO].serio)
1199 i8042_enable_kbd_port();
1201 i8042_interrupt(0, NULL);
1207 * Here we try to restore the original BIOS settings to avoid
1211 static int i8042_pm_suspend(struct device *dev)
1215 if (pm_suspend_via_firmware())
1216 i8042_controller_reset(true);
1218 /* Set up serio interrupts for system wakeup. */
1219 for (i = 0; i < I8042_NUM_PORTS; i++) {
1220 struct serio *serio = i8042_ports[i].serio;
1222 if (serio && device_may_wakeup(&serio->dev))
1223 enable_irq_wake(i8042_ports[i].irq);
1229 static int i8042_pm_resume_noirq(struct device *dev)
1231 if (!pm_resume_via_firmware())
1232 i8042_interrupt(0, NULL);
1237 static int i8042_pm_resume(struct device *dev)
1242 for (i = 0; i < I8042_NUM_PORTS; i++) {
1243 struct serio *serio = i8042_ports[i].serio;
1245 if (serio && device_may_wakeup(&serio->dev))
1246 disable_irq_wake(i8042_ports[i].irq);
1250 * If platform firmware was not going to be involved in suspend, we did
1251 * not restore the controller state to whatever it had been at boot
1252 * time, so we do not need to do anything.
1254 if (!pm_suspend_via_firmware())
1258 * We only need to reset the controller if we are resuming after handing
1259 * off control to the platform firmware, otherwise we can simply restore
1262 want_reset = pm_resume_via_firmware();
1264 return i8042_controller_resume(want_reset);
1267 static int i8042_pm_thaw(struct device *dev)
1269 i8042_interrupt(0, NULL);
1274 static int i8042_pm_reset(struct device *dev)
1276 i8042_controller_reset(false);
1281 static int i8042_pm_restore(struct device *dev)
1283 return i8042_controller_resume(false);
1286 static const struct dev_pm_ops i8042_pm_ops = {
1287 .suspend = i8042_pm_suspend,
1288 .resume_noirq = i8042_pm_resume_noirq,
1289 .resume = i8042_pm_resume,
1290 .thaw = i8042_pm_thaw,
1291 .poweroff = i8042_pm_reset,
1292 .restore = i8042_pm_restore,
1295 #endif /* CONFIG_PM */
1298 * We need to reset the 8042 back to original mode on system shutdown,
1299 * because otherwise BIOSes will be confused.
1302 static void i8042_shutdown(struct platform_device *dev)
1304 i8042_controller_reset(false);
1307 static int __init i8042_create_kbd_port(void)
1309 struct serio *serio;
1310 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1312 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1316 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1317 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
1318 serio->start = i8042_start;
1319 serio->stop = i8042_stop;
1320 serio->close = i8042_port_close;
1321 serio->ps2_cmd_mutex = &i8042_mutex;
1322 serio->port_data = port;
1323 serio->dev.parent = &i8042_platform_device->dev;
1324 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1325 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1326 strlcpy(serio->firmware_id, i8042_kbd_firmware_id,
1327 sizeof(serio->firmware_id));
1329 port->serio = serio;
1330 port->irq = I8042_KBD_IRQ;
1335 static int __init i8042_create_aux_port(int idx)
1337 struct serio *serio;
1338 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1339 struct i8042_port *port = &i8042_ports[port_no];
1341 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1345 serio->id.type = SERIO_8042;
1346 serio->write = i8042_aux_write;
1347 serio->start = i8042_start;
1348 serio->stop = i8042_stop;
1349 serio->ps2_cmd_mutex = &i8042_mutex;
1350 serio->port_data = port;
1351 serio->dev.parent = &i8042_platform_device->dev;
1353 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1354 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1355 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1356 sizeof(serio->firmware_id));
1357 serio->close = i8042_port_close;
1359 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1360 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1361 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1362 sizeof(serio->firmware_id));
1365 port->serio = serio;
1367 port->irq = I8042_AUX_IRQ;
1372 static void __init i8042_free_kbd_port(void)
1374 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1375 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1378 static void __init i8042_free_aux_ports(void)
1382 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1383 kfree(i8042_ports[i].serio);
1384 i8042_ports[i].serio = NULL;
1388 static void __init i8042_register_ports(void)
1392 for (i = 0; i < I8042_NUM_PORTS; i++) {
1393 struct serio *serio = i8042_ports[i].serio;
1398 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1400 (unsigned long) I8042_DATA_REG,
1401 (unsigned long) I8042_COMMAND_REG,
1402 i8042_ports[i].irq);
1403 serio_register_port(serio);
1404 device_set_wakeup_capable(&serio->dev, true);
1407 * On platforms using suspend-to-idle, allow the keyboard to
1408 * wake up the system from sleep by enabling keyboard wakeups
1409 * by default. This is consistent with keyboard wakeup
1410 * behavior on many platforms using suspend-to-RAM (ACPI S3)
1413 if (pm_suspend_via_s2idle() && i == I8042_KBD_PORT_NO)
1414 device_set_wakeup_enable(&serio->dev, true);
1418 static void i8042_unregister_ports(void)
1422 for (i = 0; i < I8042_NUM_PORTS; i++) {
1423 if (i8042_ports[i].serio) {
1424 serio_unregister_port(i8042_ports[i].serio);
1425 i8042_ports[i].serio = NULL;
1430 static void i8042_free_irqs(void)
1432 if (i8042_aux_irq_registered)
1433 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1434 if (i8042_kbd_irq_registered)
1435 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1437 i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1440 static int __init i8042_setup_aux(void)
1442 int (*aux_enable)(void);
1446 if (i8042_check_aux())
1449 if (i8042_nomux || i8042_check_mux()) {
1450 error = i8042_create_aux_port(-1);
1452 goto err_free_ports;
1453 aux_enable = i8042_enable_aux_port;
1455 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1456 error = i8042_create_aux_port(i);
1458 goto err_free_ports;
1460 aux_enable = i8042_enable_mux_ports;
1463 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1464 "i8042", i8042_platform_device);
1466 goto err_free_ports;
1471 i8042_aux_irq_registered = true;
1475 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1477 i8042_free_aux_ports();
1481 static int __init i8042_setup_kbd(void)
1485 error = i8042_create_kbd_port();
1489 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1490 "i8042", i8042_platform_device);
1494 error = i8042_enable_kbd_port();
1498 i8042_kbd_irq_registered = true;
1502 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1504 i8042_free_kbd_port();
1508 static int i8042_kbd_bind_notifier(struct notifier_block *nb,
1509 unsigned long action, void *data)
1511 struct device *dev = data;
1512 struct serio *serio = to_serio_port(dev);
1513 struct i8042_port *port = serio->port_data;
1515 if (serio != i8042_ports[I8042_KBD_PORT_NO].serio)
1519 case BUS_NOTIFY_BOUND_DRIVER:
1520 port->driver_bound = true;
1523 case BUS_NOTIFY_UNBIND_DRIVER:
1524 port->driver_bound = false;
1531 static int __init i8042_probe(struct platform_device *dev)
1535 i8042_platform_device = dev;
1537 if (i8042_reset == I8042_RESET_ALWAYS) {
1538 error = i8042_controller_selftest();
1543 error = i8042_controller_init();
1549 i8042_dritek_enable();
1553 error = i8042_setup_aux();
1554 if (error && error != -ENODEV && error != -EBUSY)
1559 error = i8042_setup_kbd();
1564 * Ok, everything is ready, let's register all serio ports
1566 i8042_register_ports();
1571 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1573 i8042_controller_reset(false);
1574 i8042_platform_device = NULL;
1579 static int i8042_remove(struct platform_device *dev)
1581 i8042_unregister_ports();
1583 i8042_controller_reset(false);
1584 i8042_platform_device = NULL;
1589 static struct platform_driver i8042_driver = {
1593 .pm = &i8042_pm_ops,
1596 .remove = i8042_remove,
1597 .shutdown = i8042_shutdown,
1600 static struct notifier_block i8042_kbd_bind_notifier_block = {
1601 .notifier_call = i8042_kbd_bind_notifier,
1604 static int __init i8042_init(void)
1606 struct platform_device *pdev;
1611 err = i8042_platform_init();
1615 err = i8042_controller_check();
1617 goto err_platform_exit;
1619 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
1621 err = PTR_ERR(pdev);
1622 goto err_platform_exit;
1625 bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1626 panic_blink = i8042_panic_blink;
1631 i8042_platform_exit();
1635 static void __exit i8042_exit(void)
1637 platform_device_unregister(i8042_platform_device);
1638 platform_driver_unregister(&i8042_driver);
1639 i8042_platform_exit();
1641 bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1645 module_init(i8042_init);
1646 module_exit(i8042_exit);