1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
3 * Copyright (c) 2018, Mellanox Technologies inc. All rights reserved.
6 #include <rdma/ib_user_verbs.h>
7 #include <rdma/ib_verbs.h>
8 #include <rdma/uverbs_types.h>
9 #include <rdma/uverbs_ioctl.h>
10 #include <rdma/mlx5_user_ioctl_cmds.h>
11 #include <rdma/mlx5_user_ioctl_verbs.h>
12 #include <rdma/ib_umem.h>
13 #include <rdma/uverbs_std_types.h>
14 #include <linux/mlx5/driver.h>
15 #include <linux/mlx5/fs.h>
19 #include <linux/xarray.h>
21 #define UVERBS_MODULE_NAME mlx5_ib
22 #include <rdma/uverbs_named_ioctl.h>
24 static void dispatch_event_fd(struct list_head *fd_list, const void *data);
27 DEVX_OBJ_FLAGS_INDIRECT_MKEY = 1 << 0,
28 DEVX_OBJ_FLAGS_DCT = 1 << 1,
29 DEVX_OBJ_FLAGS_CQ = 1 << 2,
32 struct devx_async_data {
33 struct mlx5_ib_dev *mdev;
34 struct list_head list;
35 struct devx_async_cmd_event_file *ev_file;
36 struct mlx5_async_work cb_work;
38 /* must be last field in this structure */
39 struct mlx5_ib_uapi_devx_async_cmd_hdr hdr;
42 struct devx_async_event_data {
43 struct list_head list; /* headed in ev_file->event_list */
44 struct mlx5_ib_uapi_devx_async_event_hdr hdr;
47 /* first level XA value data structure */
49 struct xarray object_ids; /* second XA level, Key = object id */
50 struct list_head unaffiliated_list;
53 /* second level XA value data structure */
54 struct devx_obj_event {
56 struct list_head obj_sub_list;
59 struct devx_event_subscription {
60 struct list_head file_list; /* headed in ev_file->
61 * subscribed_events_list
63 struct list_head xa_list; /* headed in devx_event->unaffiliated_list or
64 * devx_obj_event->obj_sub_list
66 struct list_head obj_list; /* headed in devx_object */
67 struct list_head event_list; /* headed in ev_file->event_list or in
68 * temp list via subscription
76 struct devx_async_event_file *ev_file;
77 struct eventfd_ctx *eventfd;
80 struct devx_async_event_file {
81 struct ib_uobject uobj;
82 /* Head of events that are subscribed to this FD */
83 struct list_head subscribed_events_list;
85 wait_queue_head_t poll_wait;
86 struct list_head event_list;
87 struct mlx5_ib_dev *dev;
94 struct mlx5_core_dev *mdev;
97 u32 dinbox[MLX5_ST_SZ_DW(destroy_umem_in)];
100 struct devx_umem_reg_cmd {
103 u32 out[MLX5_ST_SZ_DW(create_umem_out)];
106 static struct mlx5_ib_ucontext *
107 devx_ufile2uctx(const struct uverbs_attr_bundle *attrs)
109 return to_mucontext(ib_uverbs_get_ucontext(attrs));
112 int mlx5_ib_devx_create(struct mlx5_ib_dev *dev, bool is_user)
114 u32 in[MLX5_ST_SZ_DW(create_uctx_in)] = {};
115 u32 out[MLX5_ST_SZ_DW(create_uctx_out)] = {};
121 /* 0 means not supported */
122 if (!MLX5_CAP_GEN(dev->mdev, log_max_uctx))
125 uctx = MLX5_ADDR_OF(create_uctx_in, in, uctx);
126 if (is_user && capable(CAP_NET_RAW) &&
127 (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RAW_TX))
128 cap |= MLX5_UCTX_CAP_RAW_TX;
129 if (is_user && capable(CAP_SYS_RAWIO) &&
130 (MLX5_CAP_GEN(dev->mdev, uctx_cap) &
131 MLX5_UCTX_CAP_INTERNAL_DEV_RES))
132 cap |= MLX5_UCTX_CAP_INTERNAL_DEV_RES;
134 MLX5_SET(create_uctx_in, in, opcode, MLX5_CMD_OP_CREATE_UCTX);
135 MLX5_SET(uctx, uctx, cap, cap);
137 err = mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
141 uid = MLX5_GET(create_uctx_out, out, uid);
145 void mlx5_ib_devx_destroy(struct mlx5_ib_dev *dev, u16 uid)
147 u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {};
148 u32 out[MLX5_ST_SZ_DW(destroy_uctx_out)] = {};
150 MLX5_SET(destroy_uctx_in, in, opcode, MLX5_CMD_OP_DESTROY_UCTX);
151 MLX5_SET(destroy_uctx_in, in, uid, uid);
153 mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
156 static bool is_legacy_unaffiliated_event_num(u16 event_num)
159 case MLX5_EVENT_TYPE_PORT_CHANGE:
166 static bool is_legacy_obj_event_num(u16 event_num)
169 case MLX5_EVENT_TYPE_PATH_MIG:
170 case MLX5_EVENT_TYPE_COMM_EST:
171 case MLX5_EVENT_TYPE_SQ_DRAINED:
172 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
173 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
174 case MLX5_EVENT_TYPE_CQ_ERROR:
175 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
176 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
177 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
178 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
179 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
180 case MLX5_EVENT_TYPE_DCT_DRAINED:
181 case MLX5_EVENT_TYPE_COMP:
182 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
183 case MLX5_EVENT_TYPE_XRQ_ERROR:
190 static u16 get_legacy_obj_type(u16 opcode)
193 case MLX5_CMD_OP_CREATE_RQ:
194 return MLX5_EVENT_QUEUE_TYPE_RQ;
195 case MLX5_CMD_OP_CREATE_QP:
196 return MLX5_EVENT_QUEUE_TYPE_QP;
197 case MLX5_CMD_OP_CREATE_SQ:
198 return MLX5_EVENT_QUEUE_TYPE_SQ;
199 case MLX5_CMD_OP_CREATE_DCT:
200 return MLX5_EVENT_QUEUE_TYPE_DCT;
206 static u16 get_dec_obj_type(struct devx_obj *obj, u16 event_num)
210 opcode = (obj->obj_id >> 32) & 0xffff;
212 if (is_legacy_obj_event_num(event_num))
213 return get_legacy_obj_type(opcode);
216 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
217 return (obj->obj_id >> 48);
218 case MLX5_CMD_OP_CREATE_RQ:
219 return MLX5_OBJ_TYPE_RQ;
220 case MLX5_CMD_OP_CREATE_QP:
221 return MLX5_OBJ_TYPE_QP;
222 case MLX5_CMD_OP_CREATE_SQ:
223 return MLX5_OBJ_TYPE_SQ;
224 case MLX5_CMD_OP_CREATE_DCT:
225 return MLX5_OBJ_TYPE_DCT;
226 case MLX5_CMD_OP_CREATE_TIR:
227 return MLX5_OBJ_TYPE_TIR;
228 case MLX5_CMD_OP_CREATE_TIS:
229 return MLX5_OBJ_TYPE_TIS;
230 case MLX5_CMD_OP_CREATE_PSV:
231 return MLX5_OBJ_TYPE_PSV;
232 case MLX5_OBJ_TYPE_MKEY:
233 return MLX5_OBJ_TYPE_MKEY;
234 case MLX5_CMD_OP_CREATE_RMP:
235 return MLX5_OBJ_TYPE_RMP;
236 case MLX5_CMD_OP_CREATE_XRC_SRQ:
237 return MLX5_OBJ_TYPE_XRC_SRQ;
238 case MLX5_CMD_OP_CREATE_XRQ:
239 return MLX5_OBJ_TYPE_XRQ;
240 case MLX5_CMD_OP_CREATE_RQT:
241 return MLX5_OBJ_TYPE_RQT;
242 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
243 return MLX5_OBJ_TYPE_FLOW_COUNTER;
244 case MLX5_CMD_OP_CREATE_CQ:
245 return MLX5_OBJ_TYPE_CQ;
251 static u16 get_event_obj_type(unsigned long event_type, struct mlx5_eqe *eqe)
253 switch (event_type) {
254 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
255 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
256 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
257 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
258 case MLX5_EVENT_TYPE_PATH_MIG:
259 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
260 case MLX5_EVENT_TYPE_COMM_EST:
261 case MLX5_EVENT_TYPE_SQ_DRAINED:
262 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
263 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
264 return eqe->data.qp_srq.type;
265 case MLX5_EVENT_TYPE_CQ_ERROR:
266 case MLX5_EVENT_TYPE_XRQ_ERROR:
268 case MLX5_EVENT_TYPE_DCT_DRAINED:
269 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
270 return MLX5_EVENT_QUEUE_TYPE_DCT;
272 return MLX5_GET(affiliated_event_header, &eqe->data, obj_type);
276 static u32 get_dec_obj_id(u64 obj_id)
278 return (obj_id & 0xffffffff);
282 * As the obj_id in the firmware is not globally unique the object type
283 * must be considered upon checking for a valid object id.
284 * For that the opcode of the creator command is encoded as part of the obj_id.
286 static u64 get_enc_obj_id(u32 opcode, u32 obj_id)
288 return ((u64)opcode << 32) | obj_id;
291 static u32 devx_get_created_obj_id(const void *in, const void *out, u16 opcode)
294 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
295 return MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
296 case MLX5_CMD_OP_CREATE_UMEM:
297 return MLX5_GET(create_umem_out, out, umem_id);
298 case MLX5_CMD_OP_CREATE_MKEY:
299 return MLX5_GET(create_mkey_out, out, mkey_index);
300 case MLX5_CMD_OP_CREATE_CQ:
301 return MLX5_GET(create_cq_out, out, cqn);
302 case MLX5_CMD_OP_ALLOC_PD:
303 return MLX5_GET(alloc_pd_out, out, pd);
304 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
305 return MLX5_GET(alloc_transport_domain_out, out,
307 case MLX5_CMD_OP_CREATE_RMP:
308 return MLX5_GET(create_rmp_out, out, rmpn);
309 case MLX5_CMD_OP_CREATE_SQ:
310 return MLX5_GET(create_sq_out, out, sqn);
311 case MLX5_CMD_OP_CREATE_RQ:
312 return MLX5_GET(create_rq_out, out, rqn);
313 case MLX5_CMD_OP_CREATE_RQT:
314 return MLX5_GET(create_rqt_out, out, rqtn);
315 case MLX5_CMD_OP_CREATE_TIR:
316 return MLX5_GET(create_tir_out, out, tirn);
317 case MLX5_CMD_OP_CREATE_TIS:
318 return MLX5_GET(create_tis_out, out, tisn);
319 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
320 return MLX5_GET(alloc_q_counter_out, out, counter_set_id);
321 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
322 return MLX5_GET(create_flow_table_out, out, table_id);
323 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
324 return MLX5_GET(create_flow_group_out, out, group_id);
325 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
326 return MLX5_GET(set_fte_in, in, flow_index);
327 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
328 return MLX5_GET(alloc_flow_counter_out, out, flow_counter_id);
329 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
330 return MLX5_GET(alloc_packet_reformat_context_out, out,
332 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
333 return MLX5_GET(alloc_modify_header_context_out, out,
335 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
336 return MLX5_GET(create_scheduling_element_out, out,
337 scheduling_element_id);
338 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
339 return MLX5_GET(add_vxlan_udp_dport_in, in, vxlan_udp_port);
340 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
341 return MLX5_GET(set_l2_table_entry_in, in, table_index);
342 case MLX5_CMD_OP_CREATE_QP:
343 return MLX5_GET(create_qp_out, out, qpn);
344 case MLX5_CMD_OP_CREATE_SRQ:
345 return MLX5_GET(create_srq_out, out, srqn);
346 case MLX5_CMD_OP_CREATE_XRC_SRQ:
347 return MLX5_GET(create_xrc_srq_out, out, xrc_srqn);
348 case MLX5_CMD_OP_CREATE_DCT:
349 return MLX5_GET(create_dct_out, out, dctn);
350 case MLX5_CMD_OP_CREATE_XRQ:
351 return MLX5_GET(create_xrq_out, out, xrqn);
352 case MLX5_CMD_OP_ATTACH_TO_MCG:
353 return MLX5_GET(attach_to_mcg_in, in, qpn);
354 case MLX5_CMD_OP_ALLOC_XRCD:
355 return MLX5_GET(alloc_xrcd_out, out, xrcd);
356 case MLX5_CMD_OP_CREATE_PSV:
357 return MLX5_GET(create_psv_out, out, psv0_index);
359 /* The entry must match to one of the devx_is_obj_create_cmd */
365 static u64 devx_get_obj_id(const void *in)
367 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
371 case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
372 case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
373 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_GENERAL_OBJECT |
374 MLX5_GET(general_obj_in_cmd_hdr, in,
376 MLX5_GET(general_obj_in_cmd_hdr, in,
379 case MLX5_CMD_OP_QUERY_MKEY:
380 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_MKEY,
381 MLX5_GET(query_mkey_in, in,
384 case MLX5_CMD_OP_QUERY_CQ:
385 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
386 MLX5_GET(query_cq_in, in, cqn));
388 case MLX5_CMD_OP_MODIFY_CQ:
389 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
390 MLX5_GET(modify_cq_in, in, cqn));
392 case MLX5_CMD_OP_QUERY_SQ:
393 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
394 MLX5_GET(query_sq_in, in, sqn));
396 case MLX5_CMD_OP_MODIFY_SQ:
397 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
398 MLX5_GET(modify_sq_in, in, sqn));
400 case MLX5_CMD_OP_QUERY_RQ:
401 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
402 MLX5_GET(query_rq_in, in, rqn));
404 case MLX5_CMD_OP_MODIFY_RQ:
405 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
406 MLX5_GET(modify_rq_in, in, rqn));
408 case MLX5_CMD_OP_QUERY_RMP:
409 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
410 MLX5_GET(query_rmp_in, in, rmpn));
412 case MLX5_CMD_OP_MODIFY_RMP:
413 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
414 MLX5_GET(modify_rmp_in, in, rmpn));
416 case MLX5_CMD_OP_QUERY_RQT:
417 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
418 MLX5_GET(query_rqt_in, in, rqtn));
420 case MLX5_CMD_OP_MODIFY_RQT:
421 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
422 MLX5_GET(modify_rqt_in, in, rqtn));
424 case MLX5_CMD_OP_QUERY_TIR:
425 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
426 MLX5_GET(query_tir_in, in, tirn));
428 case MLX5_CMD_OP_MODIFY_TIR:
429 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
430 MLX5_GET(modify_tir_in, in, tirn));
432 case MLX5_CMD_OP_QUERY_TIS:
433 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
434 MLX5_GET(query_tis_in, in, tisn));
436 case MLX5_CMD_OP_MODIFY_TIS:
437 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
438 MLX5_GET(modify_tis_in, in, tisn));
440 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
441 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
442 MLX5_GET(query_flow_table_in, in,
445 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
446 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
447 MLX5_GET(modify_flow_table_in, in,
450 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
451 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_GROUP,
452 MLX5_GET(query_flow_group_in, in,
455 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
456 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
457 MLX5_GET(query_fte_in, in,
460 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
461 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
462 MLX5_GET(set_fte_in, in, flow_index));
464 case MLX5_CMD_OP_QUERY_Q_COUNTER:
465 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_Q_COUNTER,
466 MLX5_GET(query_q_counter_in, in,
469 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
470 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_FLOW_COUNTER,
471 MLX5_GET(query_flow_counter_in, in,
474 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
475 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT,
476 MLX5_GET(query_modify_header_context_in,
477 in, modify_header_id));
479 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
480 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
481 MLX5_GET(query_scheduling_element_in,
482 in, scheduling_element_id));
484 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
485 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
486 MLX5_GET(modify_scheduling_element_in,
487 in, scheduling_element_id));
489 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
490 obj_id = get_enc_obj_id(MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT,
491 MLX5_GET(add_vxlan_udp_dport_in, in,
494 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
495 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
496 MLX5_GET(query_l2_table_entry_in, in,
499 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
500 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
501 MLX5_GET(set_l2_table_entry_in, in,
504 case MLX5_CMD_OP_QUERY_QP:
505 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
506 MLX5_GET(query_qp_in, in, qpn));
508 case MLX5_CMD_OP_RST2INIT_QP:
509 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
510 MLX5_GET(rst2init_qp_in, in, qpn));
512 case MLX5_CMD_OP_INIT2INIT_QP:
513 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
514 MLX5_GET(init2init_qp_in, in, qpn));
516 case MLX5_CMD_OP_INIT2RTR_QP:
517 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
518 MLX5_GET(init2rtr_qp_in, in, qpn));
520 case MLX5_CMD_OP_RTR2RTS_QP:
521 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
522 MLX5_GET(rtr2rts_qp_in, in, qpn));
524 case MLX5_CMD_OP_RTS2RTS_QP:
525 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
526 MLX5_GET(rts2rts_qp_in, in, qpn));
528 case MLX5_CMD_OP_SQERR2RTS_QP:
529 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
530 MLX5_GET(sqerr2rts_qp_in, in, qpn));
532 case MLX5_CMD_OP_2ERR_QP:
533 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
534 MLX5_GET(qp_2err_in, in, qpn));
536 case MLX5_CMD_OP_2RST_QP:
537 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
538 MLX5_GET(qp_2rst_in, in, qpn));
540 case MLX5_CMD_OP_QUERY_DCT:
541 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
542 MLX5_GET(query_dct_in, in, dctn));
544 case MLX5_CMD_OP_QUERY_XRQ:
545 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
546 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
547 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
548 MLX5_GET(query_xrq_in, in, xrqn));
550 case MLX5_CMD_OP_QUERY_XRC_SRQ:
551 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
552 MLX5_GET(query_xrc_srq_in, in,
555 case MLX5_CMD_OP_ARM_XRC_SRQ:
556 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
557 MLX5_GET(arm_xrc_srq_in, in, xrc_srqn));
559 case MLX5_CMD_OP_QUERY_SRQ:
560 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SRQ,
561 MLX5_GET(query_srq_in, in, srqn));
563 case MLX5_CMD_OP_ARM_RQ:
564 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
565 MLX5_GET(arm_rq_in, in, srq_number));
567 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
568 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
569 MLX5_GET(drain_dct_in, in, dctn));
571 case MLX5_CMD_OP_ARM_XRQ:
572 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
573 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
574 case MLX5_CMD_OP_MODIFY_XRQ:
575 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
576 MLX5_GET(arm_xrq_in, in, xrqn));
578 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
579 obj_id = get_enc_obj_id
580 (MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT,
581 MLX5_GET(query_packet_reformat_context_in,
582 in, packet_reformat_id));
591 static bool devx_is_valid_obj_id(struct uverbs_attr_bundle *attrs,
592 struct ib_uobject *uobj, const void *in)
594 struct mlx5_ib_dev *dev = mlx5_udata_to_mdev(&attrs->driver_udata);
595 u64 obj_id = devx_get_obj_id(in);
600 switch (uobj_get_object_id(uobj)) {
601 case UVERBS_OBJECT_CQ:
602 return get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
603 to_mcq(uobj->object)->mcq.cqn) ==
606 case UVERBS_OBJECT_SRQ:
608 struct mlx5_core_srq *srq = &(to_msrq(uobj->object)->msrq);
611 switch (srq->common.res) {
613 opcode = MLX5_CMD_OP_CREATE_XRC_SRQ;
616 opcode = MLX5_CMD_OP_CREATE_XRQ;
619 if (!dev->mdev->issi)
620 opcode = MLX5_CMD_OP_CREATE_SRQ;
622 opcode = MLX5_CMD_OP_CREATE_RMP;
625 return get_enc_obj_id(opcode,
626 to_msrq(uobj->object)->msrq.srqn) ==
630 case UVERBS_OBJECT_QP:
632 struct mlx5_ib_qp *qp = to_mqp(uobj->object);
633 enum ib_qp_type qp_type = qp->ibqp.qp_type;
635 if (qp_type == IB_QPT_RAW_PACKET ||
636 (qp->flags & IB_QP_CREATE_SOURCE_QPN)) {
637 struct mlx5_ib_raw_packet_qp *raw_packet_qp =
639 struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
640 struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
642 return (get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
643 rq->base.mqp.qpn) == obj_id ||
644 get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
645 sq->base.mqp.qpn) == obj_id ||
646 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
647 rq->tirn) == obj_id ||
648 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
649 sq->tisn) == obj_id);
652 if (qp_type == MLX5_IB_QPT_DCT)
653 return get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
654 qp->dct.mdct.mqp.qpn) == obj_id;
656 return get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
657 qp->ibqp.qp_num) == obj_id;
660 case UVERBS_OBJECT_WQ:
661 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
662 to_mrwq(uobj->object)->core_qp.qpn) ==
665 case UVERBS_OBJECT_RWQ_IND_TBL:
666 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
667 to_mrwq_ind_table(uobj->object)->rqtn) ==
670 case MLX5_IB_OBJECT_DEVX_OBJ:
671 return ((struct devx_obj *)uobj->object)->obj_id == obj_id;
678 static void devx_set_umem_valid(const void *in)
680 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
683 case MLX5_CMD_OP_CREATE_MKEY:
684 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
686 case MLX5_CMD_OP_CREATE_CQ:
690 MLX5_SET(create_cq_in, in, cq_umem_valid, 1);
691 cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context);
692 MLX5_SET(cqc, cqc, dbr_umem_valid, 1);
695 case MLX5_CMD_OP_CREATE_QP:
699 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
700 MLX5_SET(qpc, qpc, dbr_umem_valid, 1);
701 MLX5_SET(create_qp_in, in, wq_umem_valid, 1);
705 case MLX5_CMD_OP_CREATE_RQ:
709 rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
710 wq = MLX5_ADDR_OF(rqc, rqc, wq);
711 MLX5_SET(wq, wq, dbr_umem_valid, 1);
712 MLX5_SET(wq, wq, wq_umem_valid, 1);
716 case MLX5_CMD_OP_CREATE_SQ:
720 sqc = MLX5_ADDR_OF(create_sq_in, in, ctx);
721 wq = MLX5_ADDR_OF(sqc, sqc, wq);
722 MLX5_SET(wq, wq, dbr_umem_valid, 1);
723 MLX5_SET(wq, wq, wq_umem_valid, 1);
727 case MLX5_CMD_OP_MODIFY_CQ:
728 MLX5_SET(modify_cq_in, in, cq_umem_valid, 1);
731 case MLX5_CMD_OP_CREATE_RMP:
735 rmpc = MLX5_ADDR_OF(create_rmp_in, in, ctx);
736 wq = MLX5_ADDR_OF(rmpc, rmpc, wq);
737 MLX5_SET(wq, wq, dbr_umem_valid, 1);
738 MLX5_SET(wq, wq, wq_umem_valid, 1);
742 case MLX5_CMD_OP_CREATE_XRQ:
746 xrqc = MLX5_ADDR_OF(create_xrq_in, in, xrq_context);
747 wq = MLX5_ADDR_OF(xrqc, xrqc, wq);
748 MLX5_SET(wq, wq, dbr_umem_valid, 1);
749 MLX5_SET(wq, wq, wq_umem_valid, 1);
753 case MLX5_CMD_OP_CREATE_XRC_SRQ:
757 MLX5_SET(create_xrc_srq_in, in, xrc_srq_umem_valid, 1);
758 xrc_srqc = MLX5_ADDR_OF(create_xrc_srq_in, in,
759 xrc_srq_context_entry);
760 MLX5_SET(xrc_srqc, xrc_srqc, dbr_umem_valid, 1);
769 static bool devx_is_obj_create_cmd(const void *in, u16 *opcode)
771 *opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
774 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
775 case MLX5_CMD_OP_CREATE_MKEY:
776 case MLX5_CMD_OP_CREATE_CQ:
777 case MLX5_CMD_OP_ALLOC_PD:
778 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
779 case MLX5_CMD_OP_CREATE_RMP:
780 case MLX5_CMD_OP_CREATE_SQ:
781 case MLX5_CMD_OP_CREATE_RQ:
782 case MLX5_CMD_OP_CREATE_RQT:
783 case MLX5_CMD_OP_CREATE_TIR:
784 case MLX5_CMD_OP_CREATE_TIS:
785 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
786 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
787 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
788 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
789 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
790 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
791 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
792 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
793 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
794 case MLX5_CMD_OP_CREATE_QP:
795 case MLX5_CMD_OP_CREATE_SRQ:
796 case MLX5_CMD_OP_CREATE_XRC_SRQ:
797 case MLX5_CMD_OP_CREATE_DCT:
798 case MLX5_CMD_OP_CREATE_XRQ:
799 case MLX5_CMD_OP_ATTACH_TO_MCG:
800 case MLX5_CMD_OP_ALLOC_XRCD:
802 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
804 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
809 case MLX5_CMD_OP_CREATE_PSV:
811 u8 num_psv = MLX5_GET(create_psv_in, in, num_psv);
822 static bool devx_is_obj_modify_cmd(const void *in)
824 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
827 case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
828 case MLX5_CMD_OP_MODIFY_CQ:
829 case MLX5_CMD_OP_MODIFY_RMP:
830 case MLX5_CMD_OP_MODIFY_SQ:
831 case MLX5_CMD_OP_MODIFY_RQ:
832 case MLX5_CMD_OP_MODIFY_RQT:
833 case MLX5_CMD_OP_MODIFY_TIR:
834 case MLX5_CMD_OP_MODIFY_TIS:
835 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
836 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
837 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
838 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
839 case MLX5_CMD_OP_RST2INIT_QP:
840 case MLX5_CMD_OP_INIT2RTR_QP:
841 case MLX5_CMD_OP_INIT2INIT_QP:
842 case MLX5_CMD_OP_RTR2RTS_QP:
843 case MLX5_CMD_OP_RTS2RTS_QP:
844 case MLX5_CMD_OP_SQERR2RTS_QP:
845 case MLX5_CMD_OP_2ERR_QP:
846 case MLX5_CMD_OP_2RST_QP:
847 case MLX5_CMD_OP_ARM_XRC_SRQ:
848 case MLX5_CMD_OP_ARM_RQ:
849 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
850 case MLX5_CMD_OP_ARM_XRQ:
851 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
852 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
853 case MLX5_CMD_OP_MODIFY_XRQ:
855 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
857 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
868 static bool devx_is_obj_query_cmd(const void *in)
870 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
873 case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
874 case MLX5_CMD_OP_QUERY_MKEY:
875 case MLX5_CMD_OP_QUERY_CQ:
876 case MLX5_CMD_OP_QUERY_RMP:
877 case MLX5_CMD_OP_QUERY_SQ:
878 case MLX5_CMD_OP_QUERY_RQ:
879 case MLX5_CMD_OP_QUERY_RQT:
880 case MLX5_CMD_OP_QUERY_TIR:
881 case MLX5_CMD_OP_QUERY_TIS:
882 case MLX5_CMD_OP_QUERY_Q_COUNTER:
883 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
884 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
885 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
886 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
887 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
888 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
889 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
890 case MLX5_CMD_OP_QUERY_QP:
891 case MLX5_CMD_OP_QUERY_SRQ:
892 case MLX5_CMD_OP_QUERY_XRC_SRQ:
893 case MLX5_CMD_OP_QUERY_DCT:
894 case MLX5_CMD_OP_QUERY_XRQ:
895 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
896 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
897 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
904 static bool devx_is_whitelist_cmd(void *in)
906 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
909 case MLX5_CMD_OP_QUERY_HCA_CAP:
910 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
911 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
918 static int devx_get_uid(struct mlx5_ib_ucontext *c, void *cmd_in)
920 if (devx_is_whitelist_cmd(cmd_in)) {
921 struct mlx5_ib_dev *dev;
926 dev = to_mdev(c->ibucontext.device);
927 if (dev->devx_whitelist_uid)
928 return dev->devx_whitelist_uid;
939 static bool devx_is_general_cmd(void *in, struct mlx5_ib_dev *dev)
941 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
943 /* Pass all cmds for vhca_tunnel as general, tracking is done in FW */
944 if ((MLX5_CAP_GEN_64(dev->mdev, vhca_tunnel_commands) &&
945 MLX5_GET(general_obj_in_cmd_hdr, in, vhca_tunnel_id)) ||
946 (opcode >= MLX5_CMD_OP_GENERAL_START &&
947 opcode < MLX5_CMD_OP_GENERAL_END))
951 case MLX5_CMD_OP_QUERY_HCA_CAP:
952 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
953 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
954 case MLX5_CMD_OP_QUERY_VPORT_STATE:
955 case MLX5_CMD_OP_QUERY_ADAPTER:
956 case MLX5_CMD_OP_QUERY_ISSI:
957 case MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT:
958 case MLX5_CMD_OP_QUERY_ROCE_ADDRESS:
959 case MLX5_CMD_OP_QUERY_VNIC_ENV:
960 case MLX5_CMD_OP_QUERY_VPORT_COUNTER:
961 case MLX5_CMD_OP_GET_DROPPED_PACKET_LOG:
962 case MLX5_CMD_OP_NOP:
963 case MLX5_CMD_OP_QUERY_CONG_STATUS:
964 case MLX5_CMD_OP_QUERY_CONG_PARAMS:
965 case MLX5_CMD_OP_QUERY_CONG_STATISTICS:
966 case MLX5_CMD_OP_QUERY_LAG:
973 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)(
974 struct uverbs_attr_bundle *attrs)
976 struct mlx5_ib_ucontext *c;
977 struct mlx5_ib_dev *dev;
983 if (uverbs_copy_from(&user_vector, attrs,
984 MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC))
987 c = devx_ufile2uctx(attrs);
990 dev = to_mdev(c->ibucontext.device);
992 err = mlx5_vector2eqn(dev->mdev, user_vector, &dev_eqn, &irqn);
996 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
997 &dev_eqn, sizeof(dev_eqn)))
1005 * The hardware protection mechanism works like this: Each device object that
1006 * is subject to UAR doorbells (QP/SQ/CQ) gets a UAR ID (called uar_page in
1007 * the device specification manual) upon its creation. Then upon doorbell,
1008 * hardware fetches the object context for which the doorbell was rang, and
1009 * validates that the UAR through which the DB was rang matches the UAR ID
1011 * If no match the doorbell is silently ignored by the hardware. Of course,
1012 * the user cannot ring a doorbell on a UAR that was not mapped to it.
1013 * Now in devx, as the devx kernel does not manipulate the QP/SQ/CQ command
1014 * mailboxes (except tagging them with UID), we expose to the user its UAR
1015 * ID, so it can embed it in these objects in the expected specification
1016 * format. So the only thing the user can do is hurt itself by creating a
1017 * QP/SQ/CQ with a UAR ID other than his, and then in this case other users
1018 * may ring a doorbell on its objects.
1019 * The consequence of that will be that another user can schedule a QP/SQ
1020 * of the buggy user for execution (just insert it to the hardware schedule
1021 * queue or arm its CQ for event generation), no further harm is expected.
1023 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)(
1024 struct uverbs_attr_bundle *attrs)
1026 struct mlx5_ib_ucontext *c;
1027 struct mlx5_ib_dev *dev;
1031 c = devx_ufile2uctx(attrs);
1034 dev = to_mdev(c->ibucontext.device);
1036 if (uverbs_copy_from(&user_idx, attrs,
1037 MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX))
1040 dev_idx = bfregn_to_uar_index(dev, &c->bfregi, user_idx, true);
1044 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
1045 &dev_idx, sizeof(dev_idx)))
1051 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)(
1052 struct uverbs_attr_bundle *attrs)
1054 struct mlx5_ib_ucontext *c;
1055 struct mlx5_ib_dev *dev;
1056 void *cmd_in = uverbs_attr_get_alloced_ptr(
1057 attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN);
1058 int cmd_out_len = uverbs_attr_get_len(attrs,
1059 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT);
1064 c = devx_ufile2uctx(attrs);
1067 dev = to_mdev(c->ibucontext.device);
1069 uid = devx_get_uid(c, cmd_in);
1073 /* Only white list of some general HCA commands are allowed for this method. */
1074 if (!devx_is_general_cmd(cmd_in, dev))
1077 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1078 if (IS_ERR(cmd_out))
1079 return PTR_ERR(cmd_out);
1081 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1082 err = mlx5_cmd_exec(dev->mdev, cmd_in,
1083 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN),
1084 cmd_out, cmd_out_len);
1088 return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT, cmd_out,
1092 static void devx_obj_build_destroy_cmd(void *in, void *out, void *din,
1096 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
1097 u16 uid = MLX5_GET(general_obj_in_cmd_hdr, in, uid);
1099 *obj_id = devx_get_created_obj_id(in, out, opcode);
1100 *dinlen = MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr);
1101 MLX5_SET(general_obj_in_cmd_hdr, din, uid, uid);
1104 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
1105 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_GENERAL_OBJECT);
1106 MLX5_SET(general_obj_in_cmd_hdr, din, obj_id, *obj_id);
1107 MLX5_SET(general_obj_in_cmd_hdr, din, obj_type,
1108 MLX5_GET(general_obj_in_cmd_hdr, in, obj_type));
1111 case MLX5_CMD_OP_CREATE_UMEM:
1112 MLX5_SET(destroy_umem_in, din, opcode,
1113 MLX5_CMD_OP_DESTROY_UMEM);
1114 MLX5_SET(destroy_umem_in, din, umem_id, *obj_id);
1116 case MLX5_CMD_OP_CREATE_MKEY:
1117 MLX5_SET(destroy_mkey_in, din, opcode,
1118 MLX5_CMD_OP_DESTROY_MKEY);
1119 MLX5_SET(destroy_mkey_in, in, mkey_index, *obj_id);
1121 case MLX5_CMD_OP_CREATE_CQ:
1122 MLX5_SET(destroy_cq_in, din, opcode, MLX5_CMD_OP_DESTROY_CQ);
1123 MLX5_SET(destroy_cq_in, din, cqn, *obj_id);
1125 case MLX5_CMD_OP_ALLOC_PD:
1126 MLX5_SET(dealloc_pd_in, din, opcode, MLX5_CMD_OP_DEALLOC_PD);
1127 MLX5_SET(dealloc_pd_in, din, pd, *obj_id);
1129 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
1130 MLX5_SET(dealloc_transport_domain_in, din, opcode,
1131 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
1132 MLX5_SET(dealloc_transport_domain_in, din, transport_domain,
1135 case MLX5_CMD_OP_CREATE_RMP:
1136 MLX5_SET(destroy_rmp_in, din, opcode, MLX5_CMD_OP_DESTROY_RMP);
1137 MLX5_SET(destroy_rmp_in, din, rmpn, *obj_id);
1139 case MLX5_CMD_OP_CREATE_SQ:
1140 MLX5_SET(destroy_sq_in, din, opcode, MLX5_CMD_OP_DESTROY_SQ);
1141 MLX5_SET(destroy_sq_in, din, sqn, *obj_id);
1143 case MLX5_CMD_OP_CREATE_RQ:
1144 MLX5_SET(destroy_rq_in, din, opcode, MLX5_CMD_OP_DESTROY_RQ);
1145 MLX5_SET(destroy_rq_in, din, rqn, *obj_id);
1147 case MLX5_CMD_OP_CREATE_RQT:
1148 MLX5_SET(destroy_rqt_in, din, opcode, MLX5_CMD_OP_DESTROY_RQT);
1149 MLX5_SET(destroy_rqt_in, din, rqtn, *obj_id);
1151 case MLX5_CMD_OP_CREATE_TIR:
1152 MLX5_SET(destroy_tir_in, din, opcode, MLX5_CMD_OP_DESTROY_TIR);
1153 MLX5_SET(destroy_tir_in, din, tirn, *obj_id);
1155 case MLX5_CMD_OP_CREATE_TIS:
1156 MLX5_SET(destroy_tis_in, din, opcode, MLX5_CMD_OP_DESTROY_TIS);
1157 MLX5_SET(destroy_tis_in, din, tisn, *obj_id);
1159 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
1160 MLX5_SET(dealloc_q_counter_in, din, opcode,
1161 MLX5_CMD_OP_DEALLOC_Q_COUNTER);
1162 MLX5_SET(dealloc_q_counter_in, din, counter_set_id, *obj_id);
1164 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
1165 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_table_in);
1166 MLX5_SET(destroy_flow_table_in, din, other_vport,
1167 MLX5_GET(create_flow_table_in, in, other_vport));
1168 MLX5_SET(destroy_flow_table_in, din, vport_number,
1169 MLX5_GET(create_flow_table_in, in, vport_number));
1170 MLX5_SET(destroy_flow_table_in, din, table_type,
1171 MLX5_GET(create_flow_table_in, in, table_type));
1172 MLX5_SET(destroy_flow_table_in, din, table_id, *obj_id);
1173 MLX5_SET(destroy_flow_table_in, din, opcode,
1174 MLX5_CMD_OP_DESTROY_FLOW_TABLE);
1176 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
1177 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_group_in);
1178 MLX5_SET(destroy_flow_group_in, din, other_vport,
1179 MLX5_GET(create_flow_group_in, in, other_vport));
1180 MLX5_SET(destroy_flow_group_in, din, vport_number,
1181 MLX5_GET(create_flow_group_in, in, vport_number));
1182 MLX5_SET(destroy_flow_group_in, din, table_type,
1183 MLX5_GET(create_flow_group_in, in, table_type));
1184 MLX5_SET(destroy_flow_group_in, din, table_id,
1185 MLX5_GET(create_flow_group_in, in, table_id));
1186 MLX5_SET(destroy_flow_group_in, din, group_id, *obj_id);
1187 MLX5_SET(destroy_flow_group_in, din, opcode,
1188 MLX5_CMD_OP_DESTROY_FLOW_GROUP);
1190 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
1191 *dinlen = MLX5_ST_SZ_BYTES(delete_fte_in);
1192 MLX5_SET(delete_fte_in, din, other_vport,
1193 MLX5_GET(set_fte_in, in, other_vport));
1194 MLX5_SET(delete_fte_in, din, vport_number,
1195 MLX5_GET(set_fte_in, in, vport_number));
1196 MLX5_SET(delete_fte_in, din, table_type,
1197 MLX5_GET(set_fte_in, in, table_type));
1198 MLX5_SET(delete_fte_in, din, table_id,
1199 MLX5_GET(set_fte_in, in, table_id));
1200 MLX5_SET(delete_fte_in, din, flow_index, *obj_id);
1201 MLX5_SET(delete_fte_in, din, opcode,
1202 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY);
1204 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
1205 MLX5_SET(dealloc_flow_counter_in, din, opcode,
1206 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER);
1207 MLX5_SET(dealloc_flow_counter_in, din, flow_counter_id,
1210 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
1211 MLX5_SET(dealloc_packet_reformat_context_in, din, opcode,
1212 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);
1213 MLX5_SET(dealloc_packet_reformat_context_in, din,
1214 packet_reformat_id, *obj_id);
1216 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
1217 MLX5_SET(dealloc_modify_header_context_in, din, opcode,
1218 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT);
1219 MLX5_SET(dealloc_modify_header_context_in, din,
1220 modify_header_id, *obj_id);
1222 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
1223 *dinlen = MLX5_ST_SZ_BYTES(destroy_scheduling_element_in);
1224 MLX5_SET(destroy_scheduling_element_in, din,
1225 scheduling_hierarchy,
1226 MLX5_GET(create_scheduling_element_in, in,
1227 scheduling_hierarchy));
1228 MLX5_SET(destroy_scheduling_element_in, din,
1229 scheduling_element_id, *obj_id);
1230 MLX5_SET(destroy_scheduling_element_in, din, opcode,
1231 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT);
1233 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
1234 *dinlen = MLX5_ST_SZ_BYTES(delete_vxlan_udp_dport_in);
1235 MLX5_SET(delete_vxlan_udp_dport_in, din, vxlan_udp_port, *obj_id);
1236 MLX5_SET(delete_vxlan_udp_dport_in, din, opcode,
1237 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT);
1239 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
1240 *dinlen = MLX5_ST_SZ_BYTES(delete_l2_table_entry_in);
1241 MLX5_SET(delete_l2_table_entry_in, din, table_index, *obj_id);
1242 MLX5_SET(delete_l2_table_entry_in, din, opcode,
1243 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
1245 case MLX5_CMD_OP_CREATE_QP:
1246 MLX5_SET(destroy_qp_in, din, opcode, MLX5_CMD_OP_DESTROY_QP);
1247 MLX5_SET(destroy_qp_in, din, qpn, *obj_id);
1249 case MLX5_CMD_OP_CREATE_SRQ:
1250 MLX5_SET(destroy_srq_in, din, opcode, MLX5_CMD_OP_DESTROY_SRQ);
1251 MLX5_SET(destroy_srq_in, din, srqn, *obj_id);
1253 case MLX5_CMD_OP_CREATE_XRC_SRQ:
1254 MLX5_SET(destroy_xrc_srq_in, din, opcode,
1255 MLX5_CMD_OP_DESTROY_XRC_SRQ);
1256 MLX5_SET(destroy_xrc_srq_in, din, xrc_srqn, *obj_id);
1258 case MLX5_CMD_OP_CREATE_DCT:
1259 MLX5_SET(destroy_dct_in, din, opcode, MLX5_CMD_OP_DESTROY_DCT);
1260 MLX5_SET(destroy_dct_in, din, dctn, *obj_id);
1262 case MLX5_CMD_OP_CREATE_XRQ:
1263 MLX5_SET(destroy_xrq_in, din, opcode, MLX5_CMD_OP_DESTROY_XRQ);
1264 MLX5_SET(destroy_xrq_in, din, xrqn, *obj_id);
1266 case MLX5_CMD_OP_ATTACH_TO_MCG:
1267 *dinlen = MLX5_ST_SZ_BYTES(detach_from_mcg_in);
1268 MLX5_SET(detach_from_mcg_in, din, qpn,
1269 MLX5_GET(attach_to_mcg_in, in, qpn));
1270 memcpy(MLX5_ADDR_OF(detach_from_mcg_in, din, multicast_gid),
1271 MLX5_ADDR_OF(attach_to_mcg_in, in, multicast_gid),
1272 MLX5_FLD_SZ_BYTES(attach_to_mcg_in, multicast_gid));
1273 MLX5_SET(detach_from_mcg_in, din, opcode,
1274 MLX5_CMD_OP_DETACH_FROM_MCG);
1275 MLX5_SET(detach_from_mcg_in, din, qpn, *obj_id);
1277 case MLX5_CMD_OP_ALLOC_XRCD:
1278 MLX5_SET(dealloc_xrcd_in, din, opcode,
1279 MLX5_CMD_OP_DEALLOC_XRCD);
1280 MLX5_SET(dealloc_xrcd_in, din, xrcd, *obj_id);
1282 case MLX5_CMD_OP_CREATE_PSV:
1283 MLX5_SET(destroy_psv_in, din, opcode,
1284 MLX5_CMD_OP_DESTROY_PSV);
1285 MLX5_SET(destroy_psv_in, din, psvn, *obj_id);
1288 /* The entry must match to one of the devx_is_obj_create_cmd */
1294 static int devx_handle_mkey_indirect(struct devx_obj *obj,
1295 struct mlx5_ib_dev *dev,
1296 void *in, void *out)
1298 struct mlx5_ib_devx_mr *devx_mr = &obj->devx_mr;
1299 struct mlx5_core_mkey *mkey;
1303 mkey = &devx_mr->mmkey;
1304 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1305 key = MLX5_GET(mkc, mkc, mkey_7_0);
1306 mkey->key = mlx5_idx_to_mkey(
1307 MLX5_GET(create_mkey_out, out, mkey_index)) | key;
1308 mkey->type = MLX5_MKEY_INDIRECT_DEVX;
1309 mkey->iova = MLX5_GET64(mkc, mkc, start_addr);
1310 mkey->size = MLX5_GET64(mkc, mkc, len);
1311 mkey->pd = MLX5_GET(mkc, mkc, pd);
1312 devx_mr->ndescs = MLX5_GET(mkc, mkc, translations_octword_size);
1313 init_waitqueue_head(&mkey->wait);
1315 return mlx5r_store_odp_mkey(dev, mkey);
1318 static int devx_handle_mkey_create(struct mlx5_ib_dev *dev,
1319 struct devx_obj *obj,
1320 void *in, int in_len)
1322 int min_len = MLX5_BYTE_OFF(create_mkey_in, memory_key_mkey_entry) +
1323 MLX5_FLD_SZ_BYTES(create_mkey_in,
1324 memory_key_mkey_entry);
1328 if (in_len < min_len)
1331 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1333 access_mode = MLX5_GET(mkc, mkc, access_mode_1_0);
1334 access_mode |= MLX5_GET(mkc, mkc, access_mode_4_2) << 2;
1336 if (access_mode == MLX5_MKC_ACCESS_MODE_KLMS ||
1337 access_mode == MLX5_MKC_ACCESS_MODE_KSM) {
1338 if (IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING))
1339 obj->flags |= DEVX_OBJ_FLAGS_INDIRECT_MKEY;
1343 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
1347 static void devx_cleanup_subscription(struct mlx5_ib_dev *dev,
1348 struct devx_event_subscription *sub)
1350 struct devx_event *event;
1351 struct devx_obj_event *xa_val_level2;
1353 if (sub->is_cleaned)
1356 sub->is_cleaned = 1;
1357 list_del_rcu(&sub->xa_list);
1359 if (list_empty(&sub->obj_list))
1362 list_del_rcu(&sub->obj_list);
1363 /* check whether key level 1 for this obj_sub_list is empty */
1364 event = xa_load(&dev->devx_event_table.event_xa,
1365 sub->xa_key_level1);
1368 xa_val_level2 = xa_load(&event->object_ids, sub->xa_key_level2);
1369 if (list_empty(&xa_val_level2->obj_sub_list)) {
1370 xa_erase(&event->object_ids,
1371 sub->xa_key_level2);
1372 kfree_rcu(xa_val_level2, rcu);
1376 static int devx_obj_cleanup(struct ib_uobject *uobject,
1377 enum rdma_remove_reason why,
1378 struct uverbs_attr_bundle *attrs)
1380 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1381 struct mlx5_devx_event_table *devx_event_table;
1382 struct devx_obj *obj = uobject->object;
1383 struct devx_event_subscription *sub_entry, *tmp;
1384 struct mlx5_ib_dev *dev;
1387 dev = mlx5_udata_to_mdev(&attrs->driver_udata);
1388 if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY &&
1389 xa_erase(&obj->ib_dev->odp_mkeys,
1390 mlx5_base_mkey(obj->devx_mr.mmkey.key)))
1392 * The pagefault_single_data_segment() does commands against
1393 * the mmkey, we must wait for that to stop before freeing the
1394 * mkey, as another allocation could get the same mkey #.
1396 mlx5r_deref_wait_odp_mkey(&obj->devx_mr.mmkey);
1398 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1399 ret = mlx5_core_destroy_dct(obj->ib_dev, &obj->core_dct);
1400 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1401 ret = mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1403 ret = mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox,
1404 obj->dinlen, out, sizeof(out));
1408 devx_event_table = &dev->devx_event_table;
1410 mutex_lock(&devx_event_table->event_xa_lock);
1411 list_for_each_entry_safe(sub_entry, tmp, &obj->event_sub, obj_list)
1412 devx_cleanup_subscription(dev, sub_entry);
1413 mutex_unlock(&devx_event_table->event_xa_lock);
1419 static void devx_cq_comp(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
1421 struct devx_obj *obj = container_of(mcq, struct devx_obj, core_cq);
1422 struct mlx5_devx_event_table *table;
1423 struct devx_event *event;
1424 struct devx_obj_event *obj_event;
1425 u32 obj_id = mcq->cqn;
1427 table = &obj->ib_dev->devx_event_table;
1429 event = xa_load(&table->event_xa, MLX5_EVENT_TYPE_COMP);
1433 obj_event = xa_load(&event->object_ids, obj_id);
1437 dispatch_event_fd(&obj_event->obj_sub_list, eqe);
1442 static bool is_apu_thread_cq(struct mlx5_ib_dev *dev, const void *in)
1444 if (!MLX5_CAP_GEN(dev->mdev, apu) ||
1445 !MLX5_GET(cqc, MLX5_ADDR_OF(create_cq_in, in, cq_context),
1452 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)(
1453 struct uverbs_attr_bundle *attrs)
1455 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1456 int cmd_out_len = uverbs_attr_get_len(attrs,
1457 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT);
1458 int cmd_in_len = uverbs_attr_get_len(attrs,
1459 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1461 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1462 attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE);
1463 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1464 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1465 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1466 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1467 struct devx_obj *obj;
1474 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1477 uid = devx_get_uid(c, cmd_in);
1481 if (!devx_is_obj_create_cmd(cmd_in, &opcode))
1484 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1485 if (IS_ERR(cmd_out))
1486 return PTR_ERR(cmd_out);
1488 obj = kzalloc(sizeof(struct devx_obj), GFP_KERNEL);
1492 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1493 if (opcode == MLX5_CMD_OP_CREATE_MKEY) {
1494 err = devx_handle_mkey_create(dev, obj, cmd_in, cmd_in_len);
1498 devx_set_umem_valid(cmd_in);
1501 if (opcode == MLX5_CMD_OP_CREATE_DCT) {
1502 obj->flags |= DEVX_OBJ_FLAGS_DCT;
1503 err = mlx5_core_create_dct(dev, &obj->core_dct, cmd_in,
1504 cmd_in_len, cmd_out, cmd_out_len);
1505 } else if (opcode == MLX5_CMD_OP_CREATE_CQ &&
1506 !is_apu_thread_cq(dev, cmd_in)) {
1507 obj->flags |= DEVX_OBJ_FLAGS_CQ;
1508 obj->core_cq.comp = devx_cq_comp;
1509 err = mlx5_core_create_cq(dev->mdev, &obj->core_cq,
1510 cmd_in, cmd_in_len, cmd_out,
1513 err = mlx5_cmd_exec(dev->mdev, cmd_in,
1515 cmd_out, cmd_out_len);
1521 if (opcode == MLX5_CMD_OP_ALLOC_FLOW_COUNTER) {
1522 u8 bulk = MLX5_GET(alloc_flow_counter_in,
1525 obj->flow_counter_bulk_size = 128UL * bulk;
1529 INIT_LIST_HEAD(&obj->event_sub);
1531 devx_obj_build_destroy_cmd(cmd_in, cmd_out, obj->dinbox, &obj->dinlen,
1533 WARN_ON(obj->dinlen > MLX5_MAX_DESTROY_INBOX_SIZE_DW * sizeof(u32));
1535 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, cmd_out, cmd_out_len);
1539 if (opcode == MLX5_CMD_OP_CREATE_GENERAL_OBJECT)
1540 obj_type = MLX5_GET(general_obj_in_cmd_hdr, cmd_in, obj_type);
1541 obj->obj_id = get_enc_obj_id(opcode | obj_type << 16, obj_id);
1543 if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) {
1544 err = devx_handle_mkey_indirect(obj, dev, cmd_in, cmd_out);
1551 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1552 mlx5_core_destroy_dct(obj->ib_dev, &obj->core_dct);
1553 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1554 mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1556 mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox, obj->dinlen, out,
1563 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)(
1564 struct uverbs_attr_bundle *attrs)
1566 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN);
1567 int cmd_out_len = uverbs_attr_get_len(attrs,
1568 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT);
1569 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1570 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE);
1571 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1572 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1573 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1578 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1581 uid = devx_get_uid(c, cmd_in);
1585 if (!devx_is_obj_modify_cmd(cmd_in))
1588 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1591 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1592 if (IS_ERR(cmd_out))
1593 return PTR_ERR(cmd_out);
1595 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1596 devx_set_umem_valid(cmd_in);
1598 err = mlx5_cmd_exec(mdev->mdev, cmd_in,
1599 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN),
1600 cmd_out, cmd_out_len);
1604 return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
1605 cmd_out, cmd_out_len);
1608 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)(
1609 struct uverbs_attr_bundle *attrs)
1611 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN);
1612 int cmd_out_len = uverbs_attr_get_len(attrs,
1613 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT);
1614 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1615 MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE);
1616 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1617 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1621 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1623 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1626 uid = devx_get_uid(c, cmd_in);
1630 if (!devx_is_obj_query_cmd(cmd_in))
1633 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1636 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1637 if (IS_ERR(cmd_out))
1638 return PTR_ERR(cmd_out);
1640 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1641 err = mlx5_cmd_exec(mdev->mdev, cmd_in,
1642 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN),
1643 cmd_out, cmd_out_len);
1647 return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
1648 cmd_out, cmd_out_len);
1651 struct devx_async_event_queue {
1653 wait_queue_head_t poll_wait;
1654 struct list_head event_list;
1655 atomic_t bytes_in_use;
1659 struct devx_async_cmd_event_file {
1660 struct ib_uobject uobj;
1661 struct devx_async_event_queue ev_queue;
1662 struct mlx5_async_ctx async_ctx;
1665 static void devx_init_event_queue(struct devx_async_event_queue *ev_queue)
1667 spin_lock_init(&ev_queue->lock);
1668 INIT_LIST_HEAD(&ev_queue->event_list);
1669 init_waitqueue_head(&ev_queue->poll_wait);
1670 atomic_set(&ev_queue->bytes_in_use, 0);
1671 ev_queue->is_destroyed = 0;
1674 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)(
1675 struct uverbs_attr_bundle *attrs)
1677 struct devx_async_cmd_event_file *ev_file;
1679 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1680 attrs, MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE);
1681 struct mlx5_ib_dev *mdev = mlx5_udata_to_mdev(&attrs->driver_udata);
1683 ev_file = container_of(uobj, struct devx_async_cmd_event_file,
1685 devx_init_event_queue(&ev_file->ev_queue);
1686 mlx5_cmd_init_async_ctx(mdev->mdev, &ev_file->async_ctx);
1690 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)(
1691 struct uverbs_attr_bundle *attrs)
1693 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1694 attrs, MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE);
1695 struct devx_async_event_file *ev_file;
1696 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1697 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1698 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1702 err = uverbs_get_flags32(&flags, attrs,
1703 MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
1704 MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA);
1709 ev_file = container_of(uobj, struct devx_async_event_file,
1711 spin_lock_init(&ev_file->lock);
1712 INIT_LIST_HEAD(&ev_file->event_list);
1713 init_waitqueue_head(&ev_file->poll_wait);
1714 if (flags & MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA)
1715 ev_file->omit_data = 1;
1716 INIT_LIST_HEAD(&ev_file->subscribed_events_list);
1718 get_device(&dev->ib_dev.dev);
1722 static void devx_query_callback(int status, struct mlx5_async_work *context)
1724 struct devx_async_data *async_data =
1725 container_of(context, struct devx_async_data, cb_work);
1726 struct devx_async_cmd_event_file *ev_file = async_data->ev_file;
1727 struct devx_async_event_queue *ev_queue = &ev_file->ev_queue;
1728 unsigned long flags;
1731 * Note that if the struct devx_async_cmd_event_file uobj begins to be
1732 * destroyed it will block at mlx5_cmd_cleanup_async_ctx() until this
1733 * routine returns, ensuring that it always remains valid here.
1735 spin_lock_irqsave(&ev_queue->lock, flags);
1736 list_add_tail(&async_data->list, &ev_queue->event_list);
1737 spin_unlock_irqrestore(&ev_queue->lock, flags);
1739 wake_up_interruptible(&ev_queue->poll_wait);
1742 #define MAX_ASYNC_BYTES_IN_USE (1024 * 1024) /* 1MB */
1744 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)(
1745 struct uverbs_attr_bundle *attrs)
1747 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs,
1748 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN);
1749 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1751 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_HANDLE);
1753 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1754 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1755 struct ib_uobject *fd_uobj;
1758 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1759 struct devx_async_cmd_event_file *ev_file;
1760 struct devx_async_data *async_data;
1762 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1765 uid = devx_get_uid(c, cmd_in);
1769 if (!devx_is_obj_query_cmd(cmd_in))
1772 err = uverbs_get_const(&cmd_out_len, attrs,
1773 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN);
1777 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1780 fd_uobj = uverbs_attr_get_uobject(attrs,
1781 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD);
1782 if (IS_ERR(fd_uobj))
1783 return PTR_ERR(fd_uobj);
1785 ev_file = container_of(fd_uobj, struct devx_async_cmd_event_file,
1788 if (atomic_add_return(cmd_out_len, &ev_file->ev_queue.bytes_in_use) >
1789 MAX_ASYNC_BYTES_IN_USE) {
1790 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1794 async_data = kvzalloc(struct_size(async_data, hdr.out_data,
1795 cmd_out_len), GFP_KERNEL);
1801 err = uverbs_copy_from(&async_data->hdr.wr_id, attrs,
1802 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID);
1806 async_data->cmd_out_len = cmd_out_len;
1807 async_data->mdev = mdev;
1808 async_data->ev_file = ev_file;
1810 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1811 err = mlx5_cmd_exec_cb(&ev_file->async_ctx, cmd_in,
1812 uverbs_attr_get_len(attrs,
1813 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN),
1814 async_data->hdr.out_data,
1815 async_data->cmd_out_len,
1816 devx_query_callback, &async_data->cb_work);
1826 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1831 subscribe_event_xa_dealloc(struct mlx5_devx_event_table *devx_event_table,
1836 struct devx_event *event;
1837 struct devx_obj_event *xa_val_level2;
1839 /* Level 1 is valid for future use, no need to free */
1843 event = xa_load(&devx_event_table->event_xa, key_level1);
1846 xa_val_level2 = xa_load(&event->object_ids,
1848 if (list_empty(&xa_val_level2->obj_sub_list)) {
1849 xa_erase(&event->object_ids,
1851 kfree_rcu(xa_val_level2, rcu);
1856 subscribe_event_xa_alloc(struct mlx5_devx_event_table *devx_event_table,
1861 struct devx_obj_event *obj_event;
1862 struct devx_event *event;
1865 event = xa_load(&devx_event_table->event_xa, key_level1);
1867 event = kzalloc(sizeof(*event), GFP_KERNEL);
1871 INIT_LIST_HEAD(&event->unaffiliated_list);
1872 xa_init(&event->object_ids);
1874 err = xa_insert(&devx_event_table->event_xa,
1887 obj_event = xa_load(&event->object_ids, key_level2);
1889 obj_event = kzalloc(sizeof(*obj_event), GFP_KERNEL);
1891 /* Level1 is valid for future use, no need to free */
1894 err = xa_insert(&event->object_ids,
1900 INIT_LIST_HEAD(&obj_event->obj_sub_list);
1906 static bool is_valid_events_legacy(int num_events, u16 *event_type_num_list,
1907 struct devx_obj *obj)
1911 for (i = 0; i < num_events; i++) {
1913 if (!is_legacy_obj_event_num(event_type_num_list[i]))
1915 } else if (!is_legacy_unaffiliated_event_num(
1916 event_type_num_list[i])) {
1924 #define MAX_SUPP_EVENT_NUM 255
1925 static bool is_valid_events(struct mlx5_core_dev *dev,
1926 int num_events, u16 *event_type_num_list,
1927 struct devx_obj *obj)
1930 __be64 *unaff_events;
1935 if (MLX5_CAP_GEN(dev, event_cap)) {
1936 aff_events = MLX5_CAP_DEV_EVENT(dev,
1937 user_affiliated_events);
1938 unaff_events = MLX5_CAP_DEV_EVENT(dev,
1939 user_unaffiliated_events);
1941 return is_valid_events_legacy(num_events, event_type_num_list,
1945 for (i = 0; i < num_events; i++) {
1946 if (event_type_num_list[i] > MAX_SUPP_EVENT_NUM)
1949 mask_entry = event_type_num_list[i] / 64;
1950 mask_bit = event_type_num_list[i] % 64;
1954 if (event_type_num_list[i] == 0)
1957 if (!(be64_to_cpu(aff_events[mask_entry]) &
1958 (1ull << mask_bit)))
1964 if (!(be64_to_cpu(unaff_events[mask_entry]) &
1965 (1ull << mask_bit)))
1972 #define MAX_NUM_EVENTS 16
1973 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)(
1974 struct uverbs_attr_bundle *attrs)
1976 struct ib_uobject *devx_uobj = uverbs_attr_get_uobject(
1978 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE);
1979 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1980 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1981 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1982 struct ib_uobject *fd_uobj;
1983 struct devx_obj *obj = NULL;
1984 struct devx_async_event_file *ev_file;
1985 struct mlx5_devx_event_table *devx_event_table = &dev->devx_event_table;
1986 u16 *event_type_num_list;
1987 struct devx_event_subscription *event_sub, *tmp_sub;
1988 struct list_head sub_list;
1990 bool use_eventfd = false;
1992 int num_alloc_xa_entries = 0;
2002 if (!IS_ERR(devx_uobj)) {
2003 obj = (struct devx_obj *)devx_uobj->object;
2005 obj_id = get_dec_obj_id(obj->obj_id);
2008 fd_uobj = uverbs_attr_get_uobject(attrs,
2009 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE);
2010 if (IS_ERR(fd_uobj))
2011 return PTR_ERR(fd_uobj);
2013 ev_file = container_of(fd_uobj, struct devx_async_event_file,
2016 if (uverbs_attr_is_valid(attrs,
2017 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM)) {
2018 err = uverbs_copy_from(&redirect_fd, attrs,
2019 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM);
2026 if (uverbs_attr_is_valid(attrs,
2027 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE)) {
2031 err = uverbs_copy_from(&cookie, attrs,
2032 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE);
2037 num_events = uverbs_attr_ptr_get_array_size(
2038 attrs, MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
2044 if (num_events > MAX_NUM_EVENTS)
2047 event_type_num_list = uverbs_attr_get_alloced_ptr(attrs,
2048 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST);
2050 if (!is_valid_events(dev->mdev, num_events, event_type_num_list, obj))
2053 INIT_LIST_HEAD(&sub_list);
2055 /* Protect from concurrent subscriptions to same XA entries to allow
2058 mutex_lock(&devx_event_table->event_xa_lock);
2059 for (i = 0; i < num_events; i++) {
2063 obj_type = get_dec_obj_type(obj,
2064 event_type_num_list[i]);
2065 key_level1 = event_type_num_list[i] | obj_type << 16;
2067 err = subscribe_event_xa_alloc(devx_event_table,
2074 num_alloc_xa_entries++;
2075 event_sub = kzalloc(sizeof(*event_sub), GFP_KERNEL);
2081 list_add_tail(&event_sub->event_list, &sub_list);
2082 uverbs_uobject_get(&ev_file->uobj);
2084 event_sub->eventfd =
2085 eventfd_ctx_fdget(redirect_fd);
2087 if (IS_ERR(event_sub->eventfd)) {
2088 err = PTR_ERR(event_sub->eventfd);
2089 event_sub->eventfd = NULL;
2094 event_sub->cookie = cookie;
2095 event_sub->ev_file = ev_file;
2096 /* May be needed upon cleanup the devx object/subscription */
2097 event_sub->xa_key_level1 = key_level1;
2098 event_sub->xa_key_level2 = obj_id;
2099 INIT_LIST_HEAD(&event_sub->obj_list);
2102 /* Once all the allocations and the XA data insertions were done we
2103 * can go ahead and add all the subscriptions to the relevant lists
2104 * without concern of a failure.
2106 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2107 struct devx_event *event;
2108 struct devx_obj_event *obj_event;
2110 list_del_init(&event_sub->event_list);
2112 spin_lock_irq(&ev_file->lock);
2113 list_add_tail_rcu(&event_sub->file_list,
2114 &ev_file->subscribed_events_list);
2115 spin_unlock_irq(&ev_file->lock);
2117 event = xa_load(&devx_event_table->event_xa,
2118 event_sub->xa_key_level1);
2122 list_add_tail_rcu(&event_sub->xa_list,
2123 &event->unaffiliated_list);
2127 obj_event = xa_load(&event->object_ids, obj_id);
2128 WARN_ON(!obj_event);
2129 list_add_tail_rcu(&event_sub->xa_list,
2130 &obj_event->obj_sub_list);
2131 list_add_tail_rcu(&event_sub->obj_list,
2135 mutex_unlock(&devx_event_table->event_xa_lock);
2139 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2140 list_del(&event_sub->event_list);
2142 subscribe_event_xa_dealloc(devx_event_table,
2143 event_sub->xa_key_level1,
2147 if (event_sub->eventfd)
2148 eventfd_ctx_put(event_sub->eventfd);
2149 uverbs_uobject_put(&event_sub->ev_file->uobj);
2153 mutex_unlock(&devx_event_table->event_xa_lock);
2157 static int devx_umem_get(struct mlx5_ib_dev *dev, struct ib_ucontext *ucontext,
2158 struct uverbs_attr_bundle *attrs,
2159 struct devx_umem *obj)
2166 if (uverbs_copy_from(&addr, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR) ||
2167 uverbs_copy_from(&size, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_LEN))
2170 err = uverbs_get_flags32(&access, attrs,
2171 MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2172 IB_ACCESS_LOCAL_WRITE |
2173 IB_ACCESS_REMOTE_WRITE |
2174 IB_ACCESS_REMOTE_READ);
2178 err = ib_check_mr_access(&dev->ib_dev, access);
2182 obj->umem = ib_umem_get(&dev->ib_dev, addr, size, access);
2183 if (IS_ERR(obj->umem))
2184 return PTR_ERR(obj->umem);
2188 static int devx_umem_reg_cmd_alloc(struct mlx5_ib_dev *dev,
2189 struct uverbs_attr_bundle *attrs,
2190 struct devx_umem *obj,
2191 struct devx_umem_reg_cmd *cmd)
2193 unsigned int page_size;
2198 * We don't know what the user intends to use this umem for, but the HW
2199 * restrictions must be met. MR, doorbell records, QP, WQ and CQ all
2200 * have different requirements. Since we have no idea how to sort this
2201 * out, only support PAGE_SIZE with the expectation that userspace will
2202 * provide the necessary alignments inside the known PAGE_SIZE and that
2203 * FW will check everything.
2205 page_size = ib_umem_find_best_pgoff(
2206 obj->umem, PAGE_SIZE,
2207 __mlx5_page_offset_to_bitmask(__mlx5_bit_sz(umem, page_offset),
2212 cmd->inlen = MLX5_ST_SZ_BYTES(create_umem_in) +
2213 (MLX5_ST_SZ_BYTES(mtt) *
2214 ib_umem_num_dma_blocks(obj->umem, page_size));
2215 cmd->in = uverbs_zalloc(attrs, cmd->inlen);
2216 if (IS_ERR(cmd->in))
2217 return PTR_ERR(cmd->in);
2219 umem = MLX5_ADDR_OF(create_umem_in, cmd->in, umem);
2220 mtt = (__be64 *)MLX5_ADDR_OF(umem, umem, mtt);
2222 MLX5_SET(create_umem_in, cmd->in, opcode, MLX5_CMD_OP_CREATE_UMEM);
2223 MLX5_SET64(umem, umem, num_of_mtt,
2224 ib_umem_num_dma_blocks(obj->umem, page_size));
2225 MLX5_SET(umem, umem, log_page_size,
2226 order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);
2227 MLX5_SET(umem, umem, page_offset,
2228 ib_umem_dma_offset(obj->umem, page_size));
2230 mlx5_ib_populate_pas(obj->umem, page_size, mtt,
2231 (obj->umem->writable ? MLX5_IB_MTT_WRITE : 0) |
2236 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)(
2237 struct uverbs_attr_bundle *attrs)
2239 struct devx_umem_reg_cmd cmd;
2240 struct devx_umem *obj;
2241 struct ib_uobject *uobj = uverbs_attr_get_uobject(
2242 attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2244 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
2245 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
2246 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
2252 obj = kzalloc(sizeof(struct devx_umem), GFP_KERNEL);
2256 err = devx_umem_get(dev, &c->ibucontext, attrs, obj);
2260 err = devx_umem_reg_cmd_alloc(dev, attrs, obj, &cmd);
2262 goto err_umem_release;
2264 MLX5_SET(create_umem_in, cmd.in, uid, c->devx_uid);
2265 err = mlx5_cmd_exec(dev->mdev, cmd.in, cmd.inlen, cmd.out,
2268 goto err_umem_release;
2270 obj->mdev = dev->mdev;
2272 devx_obj_build_destroy_cmd(cmd.in, cmd.out, obj->dinbox, &obj->dinlen, &obj_id);
2273 uverbs_finalize_uobj_create(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2275 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID, &obj_id,
2280 ib_umem_release(obj->umem);
2286 static int devx_umem_cleanup(struct ib_uobject *uobject,
2287 enum rdma_remove_reason why,
2288 struct uverbs_attr_bundle *attrs)
2290 struct devx_umem *obj = uobject->object;
2291 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
2294 err = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
2298 ib_umem_release(obj->umem);
2303 static bool is_unaffiliated_event(struct mlx5_core_dev *dev,
2304 unsigned long event_type)
2306 __be64 *unaff_events;
2310 if (!MLX5_CAP_GEN(dev, event_cap))
2311 return is_legacy_unaffiliated_event_num(event_type);
2313 unaff_events = MLX5_CAP_DEV_EVENT(dev,
2314 user_unaffiliated_events);
2315 WARN_ON(event_type > MAX_SUPP_EVENT_NUM);
2317 mask_entry = event_type / 64;
2318 mask_bit = event_type % 64;
2320 if (!(be64_to_cpu(unaff_events[mask_entry]) & (1ull << mask_bit)))
2326 static u32 devx_get_obj_id_from_event(unsigned long event_type, void *data)
2328 struct mlx5_eqe *eqe = data;
2331 switch (event_type) {
2332 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
2333 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
2334 case MLX5_EVENT_TYPE_PATH_MIG:
2335 case MLX5_EVENT_TYPE_COMM_EST:
2336 case MLX5_EVENT_TYPE_SQ_DRAINED:
2337 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
2338 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
2339 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
2340 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
2341 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
2342 obj_id = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff;
2344 case MLX5_EVENT_TYPE_XRQ_ERROR:
2345 obj_id = be32_to_cpu(eqe->data.xrq_err.type_xrqn) & 0xffffff;
2347 case MLX5_EVENT_TYPE_DCT_DRAINED:
2348 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
2349 obj_id = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff;
2351 case MLX5_EVENT_TYPE_CQ_ERROR:
2352 obj_id = be32_to_cpu(eqe->data.cq_err.cqn) & 0xffffff;
2355 obj_id = MLX5_GET(affiliated_event_header, &eqe->data, obj_id);
2362 static int deliver_event(struct devx_event_subscription *event_sub,
2365 struct devx_async_event_file *ev_file;
2366 struct devx_async_event_data *event_data;
2367 unsigned long flags;
2369 ev_file = event_sub->ev_file;
2371 if (ev_file->omit_data) {
2372 spin_lock_irqsave(&ev_file->lock, flags);
2373 if (!list_empty(&event_sub->event_list) ||
2374 ev_file->is_destroyed) {
2375 spin_unlock_irqrestore(&ev_file->lock, flags);
2379 list_add_tail(&event_sub->event_list, &ev_file->event_list);
2380 spin_unlock_irqrestore(&ev_file->lock, flags);
2381 wake_up_interruptible(&ev_file->poll_wait);
2385 event_data = kzalloc(sizeof(*event_data) + sizeof(struct mlx5_eqe),
2388 spin_lock_irqsave(&ev_file->lock, flags);
2389 ev_file->is_overflow_err = 1;
2390 spin_unlock_irqrestore(&ev_file->lock, flags);
2394 event_data->hdr.cookie = event_sub->cookie;
2395 memcpy(event_data->hdr.out_data, data, sizeof(struct mlx5_eqe));
2397 spin_lock_irqsave(&ev_file->lock, flags);
2398 if (!ev_file->is_destroyed)
2399 list_add_tail(&event_data->list, &ev_file->event_list);
2402 spin_unlock_irqrestore(&ev_file->lock, flags);
2403 wake_up_interruptible(&ev_file->poll_wait);
2408 static void dispatch_event_fd(struct list_head *fd_list,
2411 struct devx_event_subscription *item;
2413 list_for_each_entry_rcu(item, fd_list, xa_list) {
2415 eventfd_signal(item->eventfd, 1);
2417 deliver_event(item, data);
2421 static int devx_event_notifier(struct notifier_block *nb,
2422 unsigned long event_type, void *data)
2424 struct mlx5_devx_event_table *table;
2425 struct mlx5_ib_dev *dev;
2426 struct devx_event *event;
2427 struct devx_obj_event *obj_event;
2429 bool is_unaffiliated;
2432 /* Explicit filtering to kernel events which may occur frequently */
2433 if (event_type == MLX5_EVENT_TYPE_CMD ||
2434 event_type == MLX5_EVENT_TYPE_PAGE_REQUEST)
2437 table = container_of(nb, struct mlx5_devx_event_table, devx_nb.nb);
2438 dev = container_of(table, struct mlx5_ib_dev, devx_event_table);
2439 is_unaffiliated = is_unaffiliated_event(dev->mdev, event_type);
2441 if (!is_unaffiliated)
2442 obj_type = get_event_obj_type(event_type, data);
2445 event = xa_load(&table->event_xa, event_type | (obj_type << 16));
2451 if (is_unaffiliated) {
2452 dispatch_event_fd(&event->unaffiliated_list, data);
2457 obj_id = devx_get_obj_id_from_event(event_type, data);
2458 obj_event = xa_load(&event->object_ids, obj_id);
2464 dispatch_event_fd(&obj_event->obj_sub_list, data);
2470 int mlx5_ib_devx_init(struct mlx5_ib_dev *dev)
2472 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2475 uid = mlx5_ib_devx_create(dev, false);
2477 dev->devx_whitelist_uid = uid;
2478 xa_init(&table->event_xa);
2479 mutex_init(&table->event_xa_lock);
2480 MLX5_NB_INIT(&table->devx_nb, devx_event_notifier, NOTIFY_ANY);
2481 mlx5_eq_notifier_register(dev->mdev, &table->devx_nb);
2487 void mlx5_ib_devx_cleanup(struct mlx5_ib_dev *dev)
2489 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2490 struct devx_event_subscription *sub, *tmp;
2491 struct devx_event *event;
2495 if (dev->devx_whitelist_uid) {
2496 mlx5_eq_notifier_unregister(dev->mdev, &table->devx_nb);
2497 mutex_lock(&dev->devx_event_table.event_xa_lock);
2498 xa_for_each(&table->event_xa, id, entry) {
2500 list_for_each_entry_safe(
2501 sub, tmp, &event->unaffiliated_list, xa_list)
2502 devx_cleanup_subscription(dev, sub);
2505 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2506 xa_destroy(&table->event_xa);
2508 mlx5_ib_devx_destroy(dev, dev->devx_whitelist_uid);
2512 static ssize_t devx_async_cmd_event_read(struct file *filp, char __user *buf,
2513 size_t count, loff_t *pos)
2515 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2516 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2517 struct devx_async_data *event;
2521 spin_lock_irq(&ev_queue->lock);
2523 while (list_empty(&ev_queue->event_list)) {
2524 spin_unlock_irq(&ev_queue->lock);
2526 if (filp->f_flags & O_NONBLOCK)
2529 if (wait_event_interruptible(
2530 ev_queue->poll_wait,
2531 (!list_empty(&ev_queue->event_list) ||
2532 ev_queue->is_destroyed))) {
2533 return -ERESTARTSYS;
2536 spin_lock_irq(&ev_queue->lock);
2537 if (ev_queue->is_destroyed) {
2538 spin_unlock_irq(&ev_queue->lock);
2543 event = list_entry(ev_queue->event_list.next,
2544 struct devx_async_data, list);
2545 eventsz = event->cmd_out_len +
2546 sizeof(struct mlx5_ib_uapi_devx_async_cmd_hdr);
2548 if (eventsz > count) {
2549 spin_unlock_irq(&ev_queue->lock);
2553 list_del(ev_queue->event_list.next);
2554 spin_unlock_irq(&ev_queue->lock);
2556 if (copy_to_user(buf, &event->hdr, eventsz))
2561 atomic_sub(event->cmd_out_len, &ev_queue->bytes_in_use);
2566 static __poll_t devx_async_cmd_event_poll(struct file *filp,
2567 struct poll_table_struct *wait)
2569 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2570 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2571 __poll_t pollflags = 0;
2573 poll_wait(filp, &ev_queue->poll_wait, wait);
2575 spin_lock_irq(&ev_queue->lock);
2576 if (ev_queue->is_destroyed)
2577 pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2578 else if (!list_empty(&ev_queue->event_list))
2579 pollflags = EPOLLIN | EPOLLRDNORM;
2580 spin_unlock_irq(&ev_queue->lock);
2585 static const struct file_operations devx_async_cmd_event_fops = {
2586 .owner = THIS_MODULE,
2587 .read = devx_async_cmd_event_read,
2588 .poll = devx_async_cmd_event_poll,
2589 .release = uverbs_uobject_fd_release,
2590 .llseek = no_llseek,
2593 static ssize_t devx_async_event_read(struct file *filp, char __user *buf,
2594 size_t count, loff_t *pos)
2596 struct devx_async_event_file *ev_file = filp->private_data;
2597 struct devx_event_subscription *event_sub;
2598 struct devx_async_event_data *event;
2604 omit_data = ev_file->omit_data;
2606 spin_lock_irq(&ev_file->lock);
2608 if (ev_file->is_overflow_err) {
2609 ev_file->is_overflow_err = 0;
2610 spin_unlock_irq(&ev_file->lock);
2615 while (list_empty(&ev_file->event_list)) {
2616 spin_unlock_irq(&ev_file->lock);
2618 if (filp->f_flags & O_NONBLOCK)
2621 if (wait_event_interruptible(ev_file->poll_wait,
2622 (!list_empty(&ev_file->event_list) ||
2623 ev_file->is_destroyed))) {
2624 return -ERESTARTSYS;
2627 spin_lock_irq(&ev_file->lock);
2628 if (ev_file->is_destroyed) {
2629 spin_unlock_irq(&ev_file->lock);
2635 event_sub = list_first_entry(&ev_file->event_list,
2636 struct devx_event_subscription,
2638 eventsz = sizeof(event_sub->cookie);
2639 event_data = &event_sub->cookie;
2641 event = list_first_entry(&ev_file->event_list,
2642 struct devx_async_event_data, list);
2643 eventsz = sizeof(struct mlx5_eqe) +
2644 sizeof(struct mlx5_ib_uapi_devx_async_event_hdr);
2645 event_data = &event->hdr;
2648 if (eventsz > count) {
2649 spin_unlock_irq(&ev_file->lock);
2654 list_del_init(&event_sub->event_list);
2656 list_del(&event->list);
2658 spin_unlock_irq(&ev_file->lock);
2660 if (copy_to_user(buf, event_data, eventsz))
2661 /* This points to an application issue, not a kernel concern */
2671 static __poll_t devx_async_event_poll(struct file *filp,
2672 struct poll_table_struct *wait)
2674 struct devx_async_event_file *ev_file = filp->private_data;
2675 __poll_t pollflags = 0;
2677 poll_wait(filp, &ev_file->poll_wait, wait);
2679 spin_lock_irq(&ev_file->lock);
2680 if (ev_file->is_destroyed)
2681 pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2682 else if (!list_empty(&ev_file->event_list))
2683 pollflags = EPOLLIN | EPOLLRDNORM;
2684 spin_unlock_irq(&ev_file->lock);
2689 static void devx_free_subscription(struct rcu_head *rcu)
2691 struct devx_event_subscription *event_sub =
2692 container_of(rcu, struct devx_event_subscription, rcu);
2694 if (event_sub->eventfd)
2695 eventfd_ctx_put(event_sub->eventfd);
2696 uverbs_uobject_put(&event_sub->ev_file->uobj);
2700 static const struct file_operations devx_async_event_fops = {
2701 .owner = THIS_MODULE,
2702 .read = devx_async_event_read,
2703 .poll = devx_async_event_poll,
2704 .release = uverbs_uobject_fd_release,
2705 .llseek = no_llseek,
2708 static void devx_async_cmd_event_destroy_uobj(struct ib_uobject *uobj,
2709 enum rdma_remove_reason why)
2711 struct devx_async_cmd_event_file *comp_ev_file =
2712 container_of(uobj, struct devx_async_cmd_event_file,
2714 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2715 struct devx_async_data *entry, *tmp;
2717 spin_lock_irq(&ev_queue->lock);
2718 ev_queue->is_destroyed = 1;
2719 spin_unlock_irq(&ev_queue->lock);
2720 wake_up_interruptible(&ev_queue->poll_wait);
2722 mlx5_cmd_cleanup_async_ctx(&comp_ev_file->async_ctx);
2724 spin_lock_irq(&comp_ev_file->ev_queue.lock);
2725 list_for_each_entry_safe(entry, tmp,
2726 &comp_ev_file->ev_queue.event_list, list) {
2727 list_del(&entry->list);
2730 spin_unlock_irq(&comp_ev_file->ev_queue.lock);
2733 static void devx_async_event_destroy_uobj(struct ib_uobject *uobj,
2734 enum rdma_remove_reason why)
2736 struct devx_async_event_file *ev_file =
2737 container_of(uobj, struct devx_async_event_file,
2739 struct devx_event_subscription *event_sub, *event_sub_tmp;
2740 struct mlx5_ib_dev *dev = ev_file->dev;
2742 spin_lock_irq(&ev_file->lock);
2743 ev_file->is_destroyed = 1;
2745 /* free the pending events allocation */
2746 if (ev_file->omit_data) {
2747 struct devx_event_subscription *event_sub, *tmp;
2749 list_for_each_entry_safe(event_sub, tmp, &ev_file->event_list,
2751 list_del_init(&event_sub->event_list);
2754 struct devx_async_event_data *entry, *tmp;
2756 list_for_each_entry_safe(entry, tmp, &ev_file->event_list,
2758 list_del(&entry->list);
2763 spin_unlock_irq(&ev_file->lock);
2764 wake_up_interruptible(&ev_file->poll_wait);
2766 mutex_lock(&dev->devx_event_table.event_xa_lock);
2767 /* delete the subscriptions which are related to this FD */
2768 list_for_each_entry_safe(event_sub, event_sub_tmp,
2769 &ev_file->subscribed_events_list, file_list) {
2770 devx_cleanup_subscription(dev, event_sub);
2771 list_del_rcu(&event_sub->file_list);
2772 /* subscription may not be used by the read API any more */
2773 call_rcu(&event_sub->rcu, devx_free_subscription);
2775 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2777 put_device(&dev->ib_dev.dev);
2780 DECLARE_UVERBS_NAMED_METHOD(
2781 MLX5_IB_METHOD_DEVX_UMEM_REG,
2782 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE,
2783 MLX5_IB_OBJECT_DEVX_UMEM,
2786 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR,
2787 UVERBS_ATTR_TYPE(u64),
2789 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_LEN,
2790 UVERBS_ATTR_TYPE(u64),
2792 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2793 enum ib_access_flags),
2794 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID,
2795 UVERBS_ATTR_TYPE(u32),
2798 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2799 MLX5_IB_METHOD_DEVX_UMEM_DEREG,
2800 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_DEREG_HANDLE,
2801 MLX5_IB_OBJECT_DEVX_UMEM,
2802 UVERBS_ACCESS_DESTROY,
2805 DECLARE_UVERBS_NAMED_METHOD(
2806 MLX5_IB_METHOD_DEVX_QUERY_EQN,
2807 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC,
2808 UVERBS_ATTR_TYPE(u32),
2810 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
2811 UVERBS_ATTR_TYPE(u32),
2814 DECLARE_UVERBS_NAMED_METHOD(
2815 MLX5_IB_METHOD_DEVX_QUERY_UAR,
2816 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX,
2817 UVERBS_ATTR_TYPE(u32),
2819 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
2820 UVERBS_ATTR_TYPE(u32),
2823 DECLARE_UVERBS_NAMED_METHOD(
2824 MLX5_IB_METHOD_DEVX_OTHER,
2826 MLX5_IB_ATTR_DEVX_OTHER_CMD_IN,
2827 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2830 UVERBS_ATTR_PTR_OUT(
2831 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT,
2832 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2835 DECLARE_UVERBS_NAMED_METHOD(
2836 MLX5_IB_METHOD_DEVX_OBJ_CREATE,
2837 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE,
2838 MLX5_IB_OBJECT_DEVX_OBJ,
2842 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN,
2843 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2846 UVERBS_ATTR_PTR_OUT(
2847 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT,
2848 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2851 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2852 MLX5_IB_METHOD_DEVX_OBJ_DESTROY,
2853 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_DESTROY_HANDLE,
2854 MLX5_IB_OBJECT_DEVX_OBJ,
2855 UVERBS_ACCESS_DESTROY,
2858 DECLARE_UVERBS_NAMED_METHOD(
2859 MLX5_IB_METHOD_DEVX_OBJ_MODIFY,
2860 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE,
2861 UVERBS_IDR_ANY_OBJECT,
2862 UVERBS_ACCESS_WRITE,
2865 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN,
2866 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2869 UVERBS_ATTR_PTR_OUT(
2870 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
2871 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2874 DECLARE_UVERBS_NAMED_METHOD(
2875 MLX5_IB_METHOD_DEVX_OBJ_QUERY,
2876 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2877 UVERBS_IDR_ANY_OBJECT,
2881 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2882 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2885 UVERBS_ATTR_PTR_OUT(
2886 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
2887 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2890 DECLARE_UVERBS_NAMED_METHOD(
2891 MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY,
2892 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2893 UVERBS_IDR_ANY_OBJECT,
2897 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2898 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2901 UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN,
2903 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD,
2904 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2907 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID,
2908 UVERBS_ATTR_TYPE(u64),
2911 DECLARE_UVERBS_NAMED_METHOD(
2912 MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT,
2913 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE,
2914 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2917 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE,
2918 MLX5_IB_OBJECT_DEVX_OBJ,
2921 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
2922 UVERBS_ATTR_MIN_SIZE(sizeof(u16)),
2925 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE,
2926 UVERBS_ATTR_TYPE(u64),
2928 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM,
2929 UVERBS_ATTR_TYPE(u32),
2932 DECLARE_UVERBS_GLOBAL_METHODS(MLX5_IB_OBJECT_DEVX,
2933 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OTHER),
2934 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_UAR),
2935 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_EQN),
2936 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT));
2938 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_OBJ,
2939 UVERBS_TYPE_ALLOC_IDR(devx_obj_cleanup),
2940 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_CREATE),
2941 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_DESTROY),
2942 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_MODIFY),
2943 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_QUERY),
2944 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY));
2946 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_UMEM,
2947 UVERBS_TYPE_ALLOC_IDR(devx_umem_cleanup),
2948 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_REG),
2949 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_DEREG));
2952 DECLARE_UVERBS_NAMED_METHOD(
2953 MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC,
2954 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE,
2955 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2959 DECLARE_UVERBS_NAMED_OBJECT(
2960 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2961 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_cmd_event_file),
2962 devx_async_cmd_event_destroy_uobj,
2963 &devx_async_cmd_event_fops, "[devx_async_cmd]",
2965 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC));
2967 DECLARE_UVERBS_NAMED_METHOD(
2968 MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC,
2969 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE,
2970 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2973 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
2974 enum mlx5_ib_uapi_devx_create_event_channel_flags,
2977 DECLARE_UVERBS_NAMED_OBJECT(
2978 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2979 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_event_file),
2980 devx_async_event_destroy_uobj,
2981 &devx_async_event_fops, "[devx_async_event]",
2983 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC));
2985 static bool devx_is_supported(struct ib_device *device)
2987 struct mlx5_ib_dev *dev = to_mdev(device);
2989 return MLX5_CAP_GEN(dev->mdev, log_max_uctx);
2992 const struct uapi_definition mlx5_ib_devx_defs[] = {
2993 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2994 MLX5_IB_OBJECT_DEVX,
2995 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2996 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2997 MLX5_IB_OBJECT_DEVX_OBJ,
2998 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2999 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3000 MLX5_IB_OBJECT_DEVX_UMEM,
3001 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3002 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3003 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3004 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3005 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3006 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3007 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),