2 * Broadcom NetXtreme-E RoCE driver.
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * Description: Main component of the bnxt_re driver
39 #include <linux/module.h>
40 #include <linux/netdevice.h>
41 #include <linux/ethtool.h>
42 #include <linux/mutex.h>
43 #include <linux/list.h>
44 #include <linux/rculist.h>
45 #include <linux/spinlock.h>
46 #include <linux/pci.h>
47 #include <net/dcbnl.h>
49 #include <net/addrconf.h>
50 #include <linux/if_ether.h>
51 #include <linux/auxiliary_bus.h>
53 #include <rdma/ib_verbs.h>
54 #include <rdma/ib_user_verbs.h>
55 #include <rdma/ib_umem.h>
56 #include <rdma/ib_addr.h>
60 #include "qplib_res.h"
63 #include "qplib_rcfw.h"
66 #include <rdma/bnxt_re-abi.h>
68 #include "hw_counters.h"
70 static char version[] =
73 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
74 MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
75 MODULE_LICENSE("Dual BSD/GPL");
78 static DEFINE_MUTEX(bnxt_re_mutex);
80 static void bnxt_re_stop_irq(void *handle);
81 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev);
82 static int bnxt_re_netdev_event(struct notifier_block *notifier,
83 unsigned long event, void *ptr);
84 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev);
85 static void bnxt_re_dev_uninit(struct bnxt_re_dev *rdev);
86 static int bnxt_re_hwrm_qcaps(struct bnxt_re_dev *rdev);
88 static int bnxt_re_hwrm_qcfg(struct bnxt_re_dev *rdev, u32 *db_len,
90 static void bnxt_re_set_db_offset(struct bnxt_re_dev *rdev)
92 struct bnxt_qplib_chip_ctx *cctx;
93 struct bnxt_en_dev *en_dev;
94 struct bnxt_qplib_res *res;
100 res = &rdev->qplib_res;
101 en_dev = rdev->en_dev;
102 cctx = rdev->chip_ctx;
105 rc = bnxt_re_hwrm_qcfg(rdev, &l2db_len, &offset);
107 dev_info(rdev_to_dev(rdev),
108 "Couldn't get DB bar size, Low latency framework is disabled\n");
109 /* set register offsets for both UC and WC */
110 res->dpi_tbl.ucreg.offset = res->is_vf ? BNXT_QPLIB_DBR_VF_DB_OFFSET :
111 BNXT_QPLIB_DBR_PF_DB_OFFSET;
112 res->dpi_tbl.wcreg.offset = res->dpi_tbl.ucreg.offset;
114 /* If WC mapping is disabled by L2 driver then en_dev->l2_db_size
115 * is equal to the DB-Bar actual size. This indicates that L2
116 * is mapping entire bar as UC-. RoCE driver can't enable WC mapping
117 * in such cases and DB-push will be disabled.
119 barlen = pci_resource_len(res->pdev, RCFW_DBR_PCI_BAR_REGION);
120 if (cctx->modes.db_push && l2db_len && en_dev->l2_db_size != barlen) {
121 res->dpi_tbl.wcreg.offset = en_dev->l2_db_size;
122 dev_info(rdev_to_dev(rdev), "Low latency framework is enabled\n");
126 static void bnxt_re_set_drv_mode(struct bnxt_re_dev *rdev, u8 mode)
128 struct bnxt_qplib_chip_ctx *cctx;
130 cctx = rdev->chip_ctx;
131 cctx->modes.wqe_mode = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
132 mode : BNXT_QPLIB_WQE_MODE_STATIC;
133 if (bnxt_re_hwrm_qcaps(rdev))
134 dev_err(rdev_to_dev(rdev),
135 "Failed to query hwrm qcaps\n");
138 static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev)
140 struct bnxt_qplib_chip_ctx *chip_ctx;
144 chip_ctx = rdev->chip_ctx;
145 rdev->chip_ctx = NULL;
146 rdev->rcfw.res = NULL;
147 rdev->qplib_res.cctx = NULL;
148 rdev->qplib_res.pdev = NULL;
149 rdev->qplib_res.netdev = NULL;
153 static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev, u8 wqe_mode)
155 struct bnxt_qplib_chip_ctx *chip_ctx;
156 struct bnxt_en_dev *en_dev;
159 en_dev = rdev->en_dev;
161 chip_ctx = kzalloc(sizeof(*chip_ctx), GFP_KERNEL);
164 chip_ctx->chip_num = en_dev->chip_num;
165 chip_ctx->hw_stats_size = en_dev->hw_ring_stats_size;
167 rdev->chip_ctx = chip_ctx;
168 /* rest members to follow eventually */
170 rdev->qplib_res.cctx = rdev->chip_ctx;
171 rdev->rcfw.res = &rdev->qplib_res;
172 rdev->qplib_res.dattr = &rdev->dev_attr;
173 rdev->qplib_res.is_vf = BNXT_EN_VF(en_dev);
175 bnxt_re_set_drv_mode(rdev, wqe_mode);
177 bnxt_re_set_db_offset(rdev);
178 rc = bnxt_qplib_map_db_bar(&rdev->qplib_res);
182 if (bnxt_qplib_determine_atomics(en_dev->pdev))
183 ibdev_info(&rdev->ibdev,
184 "platform doesn't support global atomics.");
188 /* SR-IOV helper functions */
190 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev)
192 if (BNXT_EN_VF(rdev->en_dev))
196 /* Set the maximum number of each resource that the driver actually wants
197 * to allocate. This may be up to the maximum number the firmware has
198 * reserved for the function. The driver may choose to allocate fewer
199 * resources than the firmware maximum.
201 static void bnxt_re_limit_pf_res(struct bnxt_re_dev *rdev)
203 struct bnxt_qplib_dev_attr *attr;
204 struct bnxt_qplib_ctx *ctx;
207 attr = &rdev->dev_attr;
208 ctx = &rdev->qplib_ctx;
210 ctx->qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT,
212 ctx->mrw_count = BNXT_RE_MAX_MRW_COUNT_256K;
213 /* Use max_mr from fw since max_mrw does not get set */
214 ctx->mrw_count = min_t(u32, ctx->mrw_count, attr->max_mr);
215 ctx->srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT,
217 ctx->cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, attr->max_cq);
218 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))
219 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)
220 rdev->qplib_ctx.tqm_ctx.qcount[i] =
221 rdev->dev_attr.tqm_alloc_reqs[i];
224 static void bnxt_re_limit_vf_res(struct bnxt_qplib_ctx *qplib_ctx, u32 num_vf)
226 struct bnxt_qplib_vf_res *vf_res;
231 vf_res = &qplib_ctx->vf_res;
233 * Reserve a set of resources for the PF. Divide the remaining
234 * resources among the VFs
236 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF;
238 num_vf = 100 * num_vf;
239 vf_res->max_qp_per_vf = (qplib_ctx->qpc_count * vf_pct) / num_vf;
240 vf_res->max_srq_per_vf = (qplib_ctx->srqc_count * vf_pct) / num_vf;
241 vf_res->max_cq_per_vf = (qplib_ctx->cq_count * vf_pct) / num_vf;
243 * The driver allows many more MRs than other resources. If the
244 * firmware does also, then reserve a fixed amount for the PF and
245 * divide the rest among VFs. VFs may use many MRs for NFS
246 * mounts, ISER, NVME applications, etc. If the firmware severely
247 * restricts the number of MRs, then let PF have half and divide
248 * the rest among VFs, as for the other resource types.
250 if (qplib_ctx->mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) {
251 mrws = qplib_ctx->mrw_count * vf_pct;
254 mrws = qplib_ctx->mrw_count - BNXT_RE_RESVD_MR_FOR_PF;
256 vf_res->max_mrw_per_vf = (mrws / nvfs);
257 vf_res->max_gid_per_vf = BNXT_RE_MAX_GID_PER_VF;
260 static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev)
264 memset(&rdev->qplib_ctx.vf_res, 0, sizeof(struct bnxt_qplib_vf_res));
265 bnxt_re_limit_pf_res(rdev);
267 num_vfs = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
268 BNXT_RE_GEN_P5_MAX_VF : rdev->num_vfs;
270 bnxt_re_limit_vf_res(&rdev->qplib_ctx, num_vfs);
273 static void bnxt_re_vf_res_config(struct bnxt_re_dev *rdev)
276 if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))
278 rdev->num_vfs = pci_sriov_get_totalvfs(rdev->en_dev->pdev);
279 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) {
280 bnxt_re_set_resource_limits(rdev);
281 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw,
286 static void bnxt_re_shutdown(struct auxiliary_device *adev)
288 struct bnxt_re_dev *rdev = auxiliary_get_drvdata(adev);
292 ib_unregister_device(&rdev->ibdev);
293 bnxt_re_dev_uninit(rdev);
296 static void bnxt_re_stop_irq(void *handle)
298 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
299 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
300 struct bnxt_qplib_nq *nq;
303 for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) {
304 nq = &rdev->nq[indx - 1];
305 bnxt_qplib_nq_stop_irq(nq, false);
308 bnxt_qplib_rcfw_stop_irq(rcfw, false);
311 static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent)
313 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
314 struct bnxt_msix_entry *msix_ent = rdev->en_dev->msix_entries;
315 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
316 struct bnxt_qplib_nq *nq;
320 /* Not setting the f/w timeout bit in rcfw.
321 * During the driver unload the first command
322 * to f/w will timeout and that will set the
325 ibdev_err(&rdev->ibdev, "Failed to re-start IRQs\n");
329 /* Vectors may change after restart, so update with new vectors
330 * in device sctructure.
332 for (indx = 0; indx < rdev->num_msix; indx++)
333 rdev->en_dev->msix_entries[indx].vector = ent[indx].vector;
335 rc = bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector,
338 ibdev_warn(&rdev->ibdev, "Failed to reinit CREQ\n");
341 for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) {
342 nq = &rdev->nq[indx - 1];
343 rc = bnxt_qplib_nq_start_irq(nq, indx - 1,
344 msix_ent[indx].vector, false);
346 ibdev_warn(&rdev->ibdev, "Failed to reinit NQ index %d\n",
353 static struct bnxt_ulp_ops bnxt_re_ulp_ops = {
354 .ulp_irq_stop = bnxt_re_stop_irq,
355 .ulp_irq_restart = bnxt_re_start_irq
358 /* RoCE -> Net driver */
360 static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
362 struct bnxt_en_dev *en_dev;
365 en_dev = rdev->en_dev;
367 rc = bnxt_register_dev(en_dev, &bnxt_re_ulp_ops, rdev);
369 rdev->qplib_res.pdev = rdev->en_dev->pdev;
373 static void bnxt_re_init_hwrm_hdr(struct input *hdr, u16 opcd)
375 hdr->req_type = cpu_to_le16(opcd);
376 hdr->cmpl_ring = cpu_to_le16(-1);
377 hdr->target_id = cpu_to_le16(-1);
380 static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg,
381 int msg_len, void *resp, int resp_max_len,
385 fw_msg->msg_len = msg_len;
387 fw_msg->resp_max_len = resp_max_len;
388 fw_msg->timeout = timeout;
391 /* Query device config using common hwrm */
392 static int bnxt_re_hwrm_qcfg(struct bnxt_re_dev *rdev, u32 *db_len,
395 struct bnxt_en_dev *en_dev = rdev->en_dev;
396 struct hwrm_func_qcfg_output resp = {0};
397 struct hwrm_func_qcfg_input req = {0};
398 struct bnxt_fw_msg fw_msg;
401 memset(&fw_msg, 0, sizeof(fw_msg));
402 bnxt_re_init_hwrm_hdr((void *)&req, HWRM_FUNC_QCFG);
403 req.fid = cpu_to_le16(0xffff);
404 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
405 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
406 rc = bnxt_send_msg(en_dev, &fw_msg);
408 *db_len = PAGE_ALIGN(le16_to_cpu(resp.l2_doorbell_bar_size_kb) * 1024);
409 *offset = PAGE_ALIGN(le16_to_cpu(resp.legacy_l2_db_size_kb) * 1024);
414 /* Query function capabilities using common hwrm */
415 int bnxt_re_hwrm_qcaps(struct bnxt_re_dev *rdev)
417 struct bnxt_en_dev *en_dev = rdev->en_dev;
418 struct hwrm_func_qcaps_output resp = {};
419 struct hwrm_func_qcaps_input req = {};
420 struct bnxt_qplib_chip_ctx *cctx;
421 struct bnxt_fw_msg fw_msg = {};
424 cctx = rdev->chip_ctx;
425 bnxt_re_init_hwrm_hdr((void *)&req, HWRM_FUNC_QCAPS);
426 req.fid = cpu_to_le16(0xffff);
427 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
428 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
430 rc = bnxt_send_msg(en_dev, &fw_msg);
433 cctx->modes.db_push = le32_to_cpu(resp.flags) & FUNC_QCAPS_RESP_FLAGS_WCB_PUSH_MODE;
438 static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev,
439 u16 fw_ring_id, int type)
441 struct bnxt_en_dev *en_dev;
442 struct hwrm_ring_free_input req = {};
443 struct hwrm_ring_free_output resp;
444 struct bnxt_fw_msg fw_msg = {};
450 en_dev = rdev->en_dev;
455 if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))
458 bnxt_re_init_hwrm_hdr((void *)&req, HWRM_RING_FREE);
459 req.ring_type = type;
460 req.ring_id = cpu_to_le16(fw_ring_id);
461 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
462 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
463 rc = bnxt_send_msg(en_dev, &fw_msg);
465 ibdev_err(&rdev->ibdev, "Failed to free HW ring:%d :%#x",
470 static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev,
471 struct bnxt_re_ring_attr *ring_attr,
474 struct bnxt_en_dev *en_dev = rdev->en_dev;
475 struct hwrm_ring_alloc_input req = {};
476 struct hwrm_ring_alloc_output resp;
477 struct bnxt_fw_msg fw_msg = {};
483 bnxt_re_init_hwrm_hdr((void *)&req, HWRM_RING_ALLOC);
485 req.page_tbl_addr = cpu_to_le64(ring_attr->dma_arr[0]);
486 if (ring_attr->pages > 1) {
487 /* Page size is in log2 units */
488 req.page_size = BNXT_PAGE_SHIFT;
489 req.page_tbl_depth = 1;
492 /* Association of ring index with doorbell index and MSIX number */
493 req.logical_id = cpu_to_le16(ring_attr->lrid);
494 req.length = cpu_to_le32(ring_attr->depth + 1);
495 req.ring_type = ring_attr->type;
496 req.int_mode = ring_attr->mode;
497 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
498 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
499 rc = bnxt_send_msg(en_dev, &fw_msg);
501 *fw_ring_id = le16_to_cpu(resp.ring_id);
506 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev,
509 struct bnxt_en_dev *en_dev = rdev->en_dev;
510 struct hwrm_stat_ctx_free_input req = {};
511 struct hwrm_stat_ctx_free_output resp = {};
512 struct bnxt_fw_msg fw_msg = {};
518 if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))
521 bnxt_re_init_hwrm_hdr((void *)&req, HWRM_STAT_CTX_FREE);
522 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id);
523 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
524 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
525 rc = bnxt_send_msg(en_dev, &fw_msg);
527 ibdev_err(&rdev->ibdev, "Failed to free HW stats context %#x",
533 static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev,
535 u32 *fw_stats_ctx_id)
537 struct bnxt_qplib_chip_ctx *chip_ctx = rdev->chip_ctx;
538 struct hwrm_stat_ctx_alloc_output resp = {};
539 struct hwrm_stat_ctx_alloc_input req = {};
540 struct bnxt_en_dev *en_dev = rdev->en_dev;
541 struct bnxt_fw_msg fw_msg = {};
544 *fw_stats_ctx_id = INVALID_STATS_CTX_ID;
549 bnxt_re_init_hwrm_hdr((void *)&req, HWRM_STAT_CTX_ALLOC);
550 req.update_period_ms = cpu_to_le32(1000);
551 req.stats_dma_addr = cpu_to_le64(dma_map);
552 req.stats_dma_length = cpu_to_le16(chip_ctx->hw_stats_size);
553 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE;
554 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
555 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
556 rc = bnxt_send_msg(en_dev, &fw_msg);
558 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id);
563 static void bnxt_re_disassociate_ucontext(struct ib_ucontext *ibcontext)
569 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev)
571 struct ib_device *ibdev =
572 ib_device_get_by_netdev(netdev, RDMA_DRIVER_BNXT_RE);
576 return container_of(ibdev, struct bnxt_re_dev, ibdev);
579 static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr,
582 struct bnxt_re_dev *rdev =
583 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
585 return sysfs_emit(buf, "0x%x\n", rdev->en_dev->pdev->vendor);
587 static DEVICE_ATTR_RO(hw_rev);
589 static ssize_t hca_type_show(struct device *device,
590 struct device_attribute *attr, char *buf)
592 struct bnxt_re_dev *rdev =
593 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
595 return sysfs_emit(buf, "%s\n", rdev->ibdev.node_desc);
597 static DEVICE_ATTR_RO(hca_type);
599 static struct attribute *bnxt_re_attributes[] = {
600 &dev_attr_hw_rev.attr,
601 &dev_attr_hca_type.attr,
605 static const struct attribute_group bnxt_re_dev_attr_group = {
606 .attrs = bnxt_re_attributes,
609 static const struct ib_device_ops bnxt_re_dev_ops = {
610 .owner = THIS_MODULE,
611 .driver_id = RDMA_DRIVER_BNXT_RE,
612 .uverbs_abi_ver = BNXT_RE_ABI_VERSION,
614 .add_gid = bnxt_re_add_gid,
615 .alloc_hw_port_stats = bnxt_re_ib_alloc_hw_port_stats,
616 .alloc_mr = bnxt_re_alloc_mr,
617 .alloc_pd = bnxt_re_alloc_pd,
618 .alloc_ucontext = bnxt_re_alloc_ucontext,
619 .create_ah = bnxt_re_create_ah,
620 .create_cq = bnxt_re_create_cq,
621 .create_qp = bnxt_re_create_qp,
622 .create_srq = bnxt_re_create_srq,
623 .create_user_ah = bnxt_re_create_ah,
624 .dealloc_pd = bnxt_re_dealloc_pd,
625 .dealloc_ucontext = bnxt_re_dealloc_ucontext,
626 .del_gid = bnxt_re_del_gid,
627 .dereg_mr = bnxt_re_dereg_mr,
628 .destroy_ah = bnxt_re_destroy_ah,
629 .destroy_cq = bnxt_re_destroy_cq,
630 .destroy_qp = bnxt_re_destroy_qp,
631 .destroy_srq = bnxt_re_destroy_srq,
632 .device_group = &bnxt_re_dev_attr_group,
633 .disassociate_ucontext = bnxt_re_disassociate_ucontext,
634 .get_dev_fw_str = bnxt_re_query_fw_str,
635 .get_dma_mr = bnxt_re_get_dma_mr,
636 .get_hw_stats = bnxt_re_ib_get_hw_stats,
637 .get_link_layer = bnxt_re_get_link_layer,
638 .get_port_immutable = bnxt_re_get_port_immutable,
639 .map_mr_sg = bnxt_re_map_mr_sg,
640 .mmap = bnxt_re_mmap,
641 .mmap_free = bnxt_re_mmap_free,
642 .modify_qp = bnxt_re_modify_qp,
643 .modify_srq = bnxt_re_modify_srq,
644 .poll_cq = bnxt_re_poll_cq,
645 .post_recv = bnxt_re_post_recv,
646 .post_send = bnxt_re_post_send,
647 .post_srq_recv = bnxt_re_post_srq_recv,
648 .query_ah = bnxt_re_query_ah,
649 .query_device = bnxt_re_query_device,
650 .query_pkey = bnxt_re_query_pkey,
651 .query_port = bnxt_re_query_port,
652 .query_qp = bnxt_re_query_qp,
653 .query_srq = bnxt_re_query_srq,
654 .reg_user_mr = bnxt_re_reg_user_mr,
655 .req_notify_cq = bnxt_re_req_notify_cq,
656 .resize_cq = bnxt_re_resize_cq,
657 INIT_RDMA_OBJ_SIZE(ib_ah, bnxt_re_ah, ib_ah),
658 INIT_RDMA_OBJ_SIZE(ib_cq, bnxt_re_cq, ib_cq),
659 INIT_RDMA_OBJ_SIZE(ib_pd, bnxt_re_pd, ib_pd),
660 INIT_RDMA_OBJ_SIZE(ib_qp, bnxt_re_qp, ib_qp),
661 INIT_RDMA_OBJ_SIZE(ib_srq, bnxt_re_srq, ib_srq),
662 INIT_RDMA_OBJ_SIZE(ib_ucontext, bnxt_re_ucontext, ib_uctx),
665 static int bnxt_re_register_ib(struct bnxt_re_dev *rdev)
667 struct ib_device *ibdev = &rdev->ibdev;
671 ibdev->node_type = RDMA_NODE_IB_CA;
672 strscpy(ibdev->node_desc, BNXT_RE_DESC " HCA",
673 strlen(BNXT_RE_DESC) + 5);
674 ibdev->phys_port_cnt = 1;
676 addrconf_addr_eui48((u8 *)&ibdev->node_guid, rdev->netdev->dev_addr);
678 ibdev->num_comp_vectors = rdev->num_msix - 1;
679 ibdev->dev.parent = &rdev->en_dev->pdev->dev;
680 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;
682 if (IS_ENABLED(CONFIG_INFINIBAND_USER_ACCESS))
683 ibdev->driver_def = bnxt_re_uapi_defs;
685 ib_set_device_ops(ibdev, &bnxt_re_dev_ops);
686 ret = ib_device_set_netdev(&rdev->ibdev, rdev->netdev, 1);
690 dma_set_max_seg_size(&rdev->en_dev->pdev->dev, UINT_MAX);
691 ibdev->uverbs_cmd_mask |= BIT_ULL(IB_USER_VERBS_CMD_POLL_CQ);
692 return ib_register_device(ibdev, "bnxt_re%d", &rdev->en_dev->pdev->dev);
695 static struct bnxt_re_dev *bnxt_re_dev_add(struct bnxt_aux_priv *aux_priv,
696 struct bnxt_en_dev *en_dev)
698 struct bnxt_re_dev *rdev;
700 /* Allocate bnxt_re_dev instance here */
701 rdev = ib_alloc_device(bnxt_re_dev, ibdev);
703 ibdev_err(NULL, "%s: bnxt_re_dev allocation failure!",
704 ROCE_DRV_MODULE_NAME);
708 rdev->nb.notifier_call = NULL;
709 rdev->netdev = en_dev->net;
710 rdev->en_dev = en_dev;
711 rdev->id = rdev->en_dev->pdev->devfn;
712 INIT_LIST_HEAD(&rdev->qp_list);
713 mutex_init(&rdev->qp_lock);
714 atomic_set(&rdev->qp_count, 0);
715 atomic_set(&rdev->cq_count, 0);
716 atomic_set(&rdev->srq_count, 0);
717 atomic_set(&rdev->mr_count, 0);
718 atomic_set(&rdev->mw_count, 0);
719 atomic_set(&rdev->ah_count, 0);
720 atomic_set(&rdev->pd_count, 0);
721 rdev->cosq[0] = 0xFFFF;
722 rdev->cosq[1] = 0xFFFF;
727 static int bnxt_re_handle_unaffi_async_event(struct creq_func_event
730 switch (unaffi_async->event) {
731 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR:
733 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR:
735 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR:
737 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR:
739 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR:
741 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR:
743 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR:
745 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR:
747 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR:
749 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR:
751 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR:
759 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event,
760 struct bnxt_re_qp *qp)
762 struct ib_event event;
765 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR &&
766 rdma_is_kernel_res(&qp->ib_qp.res)) {
767 flags = bnxt_re_lock_cqs(qp);
768 bnxt_qplib_add_flush_qp(&qp->qplib_qp);
769 bnxt_re_unlock_cqs(qp, flags);
772 memset(&event, 0, sizeof(event));
773 if (qp->qplib_qp.srq) {
774 event.device = &qp->rdev->ibdev;
775 event.element.qp = &qp->ib_qp;
776 event.event = IB_EVENT_QP_LAST_WQE_REACHED;
779 if (event.device && qp->ib_qp.event_handler)
780 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context);
785 static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async,
792 return rc; /* QP was already dead, still return success */
794 event = affi_async->event;
795 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) {
796 struct bnxt_qplib_qp *lib_qp = obj;
797 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp,
799 rc = bnxt_re_handle_qp_async_event(affi_async, qp);
804 static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw,
805 void *aeqe, void *obj)
807 struct creq_qp_event *affi_async;
808 struct creq_func_event *unaffi_async;
812 type = ((struct creq_base *)aeqe)->type;
813 if (type == CREQ_BASE_TYPE_FUNC_EVENT) {
815 rc = bnxt_re_handle_unaffi_async_event(unaffi_async);
818 rc = bnxt_re_handle_affi_async_event(affi_async, obj);
824 static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq,
825 struct bnxt_qplib_srq *handle, u8 event)
827 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq,
829 struct ib_event ib_event;
831 ib_event.device = &srq->rdev->ibdev;
832 ib_event.element.srq = &srq->ib_srq;
833 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT)
834 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED;
836 ib_event.event = IB_EVENT_SRQ_ERR;
838 if (srq->ib_srq.event_handler) {
839 /* Lock event_handler? */
840 (*srq->ib_srq.event_handler)(&ib_event,
841 srq->ib_srq.srq_context);
846 static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq,
847 struct bnxt_qplib_cq *handle)
849 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq,
852 if (cq->ib_cq.comp_handler) {
853 /* Lock comp_handler? */
854 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context);
860 #define BNXT_RE_GEN_P5_PF_NQ_DB 0x10000
861 #define BNXT_RE_GEN_P5_VF_NQ_DB 0x4000
862 static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx)
864 return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
865 (rdev->is_virtfn ? BNXT_RE_GEN_P5_VF_NQ_DB :
866 BNXT_RE_GEN_P5_PF_NQ_DB) :
867 rdev->en_dev->msix_entries[indx].db_offset;
870 static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev)
874 for (i = 1; i < rdev->num_msix; i++)
875 bnxt_qplib_disable_nq(&rdev->nq[i - 1]);
877 if (rdev->qplib_res.rcfw)
878 bnxt_qplib_cleanup_res(&rdev->qplib_res);
881 static int bnxt_re_init_res(struct bnxt_re_dev *rdev)
883 int num_vec_enabled = 0;
887 bnxt_qplib_init_res(&rdev->qplib_res);
889 for (i = 1; i < rdev->num_msix ; i++) {
890 db_offt = bnxt_re_get_nqdb_offset(rdev, i);
891 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1],
892 i - 1, rdev->en_dev->msix_entries[i].vector,
893 db_offt, &bnxt_re_cqn_handler,
894 &bnxt_re_srqn_handler);
896 ibdev_err(&rdev->ibdev,
897 "Failed to enable NQ with rc = 0x%x", rc);
904 for (i = num_vec_enabled; i >= 0; i--)
905 bnxt_qplib_disable_nq(&rdev->nq[i]);
909 static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev)
914 for (i = 0; i < rdev->num_msix - 1; i++) {
915 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
916 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
917 bnxt_qplib_free_nq(&rdev->nq[i]);
918 rdev->nq[i].res = NULL;
922 static void bnxt_re_free_res(struct bnxt_re_dev *rdev)
924 bnxt_re_free_nq_res(rdev);
926 if (rdev->qplib_res.dpi_tbl.max) {
927 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
928 &rdev->dpi_privileged);
930 if (rdev->qplib_res.rcfw) {
931 bnxt_qplib_free_res(&rdev->qplib_res);
932 rdev->qplib_res.rcfw = NULL;
936 static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
938 struct bnxt_re_ring_attr rattr = {};
939 int num_vec_created = 0;
943 /* Configure and allocate resources for qplib */
944 rdev->qplib_res.rcfw = &rdev->rcfw;
945 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
950 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev,
951 rdev->netdev, &rdev->dev_attr);
955 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res,
956 &rdev->dpi_privileged,
957 rdev, BNXT_QPLIB_DPI_TYPE_KERNEL);
961 for (i = 0; i < rdev->num_msix - 1; i++) {
962 struct bnxt_qplib_nq *nq;
965 nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
966 rc = bnxt_qplib_alloc_nq(&rdev->qplib_res, &rdev->nq[i]);
968 ibdev_err(&rdev->ibdev, "Alloc Failed NQ%d rc:%#x",
972 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
973 rattr.dma_arr = nq->hwq.pbl[PBL_LVL_0].pg_map_arr;
974 rattr.pages = nq->hwq.pbl[rdev->nq[i].hwq.level].pg_count;
976 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX;
977 rattr.depth = BNXT_QPLIB_NQE_MAX_CNT - 1;
978 rattr.lrid = rdev->en_dev->msix_entries[i + 1].ring_idx;
979 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &nq->ring_id);
981 ibdev_err(&rdev->ibdev,
982 "Failed to allocate NQ fw id with rc = 0x%x",
984 bnxt_qplib_free_nq(&rdev->nq[i]);
991 for (i = num_vec_created - 1; i >= 0; i--) {
992 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
993 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
994 bnxt_qplib_free_nq(&rdev->nq[i]);
996 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
997 &rdev->dpi_privileged);
999 bnxt_qplib_free_res(&rdev->qplib_res);
1002 rdev->qplib_res.rcfw = NULL;
1006 static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp,
1007 u8 port_num, enum ib_event_type event)
1009 struct ib_event ib_event;
1011 ib_event.device = ibdev;
1013 ib_event.element.qp = qp;
1014 ib_event.event = event;
1015 if (qp->event_handler)
1016 qp->event_handler(&ib_event, qp->qp_context);
1019 ib_event.element.port_num = port_num;
1020 ib_event.event = event;
1021 ib_dispatch_event(&ib_event);
1025 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev,
1026 struct bnxt_re_qp *qp)
1028 return (qp->ib_qp.qp_type == IB_QPT_GSI) ||
1029 (qp == rdev->gsi_ctx.gsi_sqp);
1032 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev)
1034 int mask = IB_QP_STATE;
1035 struct ib_qp_attr qp_attr;
1036 struct bnxt_re_qp *qp;
1038 qp_attr.qp_state = IB_QPS_ERR;
1039 mutex_lock(&rdev->qp_lock);
1040 list_for_each_entry(qp, &rdev->qp_list, list) {
1041 /* Modify the state of all QPs except QP1/Shadow QP */
1042 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) {
1043 if (qp->qplib_qp.state !=
1044 CMDQ_MODIFY_QP_NEW_STATE_RESET &&
1045 qp->qplib_qp.state !=
1046 CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1047 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp,
1048 1, IB_EVENT_QP_FATAL);
1049 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask,
1054 mutex_unlock(&rdev->qp_lock);
1057 static int bnxt_re_update_gid(struct bnxt_re_dev *rdev)
1059 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
1060 struct bnxt_qplib_gid gid;
1064 if (!ib_device_try_get(&rdev->ibdev))
1067 for (index = 0; index < sgid_tbl->active; index++) {
1068 gid_idx = sgid_tbl->hw_id[index];
1070 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
1071 sizeof(bnxt_qplib_gid_zero)))
1073 /* need to modify the VLAN enable setting of non VLAN GID only
1074 * as setting is done for VLAN GID while adding GID
1076 if (sgid_tbl->vlan[index])
1079 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid));
1081 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx,
1082 rdev->qplib_res.netdev->dev_addr);
1085 ib_device_put(&rdev->ibdev);
1089 static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev)
1091 u32 prio_map = 0, tmp_map = 0;
1092 struct net_device *netdev;
1095 netdev = rdev->netdev;
1097 memset(&app, 0, sizeof(app));
1098 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
1099 app.protocol = ETH_P_IBOE;
1100 tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1103 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM;
1104 app.protocol = ROCE_V2_UDP_DPORT;
1105 tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1106 prio_map |= tmp_map;
1111 static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev)
1115 /* Get priority for roce */
1116 prio_map = bnxt_re_get_priority_mask(rdev);
1118 if (prio_map == rdev->cur_prio_map)
1120 rdev->cur_prio_map = prio_map;
1121 /* Actual priorities are not programmed as they are already
1122 * done by L2 driver; just enable or disable priority vlan tagging
1124 if ((prio_map == 0 && rdev->qplib_res.prio) ||
1125 (prio_map != 0 && !rdev->qplib_res.prio)) {
1126 rdev->qplib_res.prio = prio_map ? true : false;
1128 bnxt_re_update_gid(rdev);
1134 static void bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev *rdev)
1136 struct bnxt_en_dev *en_dev = rdev->en_dev;
1137 struct hwrm_ver_get_output resp = {};
1138 struct hwrm_ver_get_input req = {};
1139 struct bnxt_qplib_chip_ctx *cctx;
1140 struct bnxt_fw_msg fw_msg = {};
1143 bnxt_re_init_hwrm_hdr((void *)&req, HWRM_VER_GET);
1144 req.hwrm_intf_maj = HWRM_VERSION_MAJOR;
1145 req.hwrm_intf_min = HWRM_VERSION_MINOR;
1146 req.hwrm_intf_upd = HWRM_VERSION_UPDATE;
1147 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
1148 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
1149 rc = bnxt_send_msg(en_dev, &fw_msg);
1151 ibdev_err(&rdev->ibdev, "Failed to query HW version, rc = 0x%x",
1156 cctx = rdev->chip_ctx;
1157 cctx->hwrm_intf_ver =
1158 (u64)le16_to_cpu(resp.hwrm_intf_major) << 48 |
1159 (u64)le16_to_cpu(resp.hwrm_intf_minor) << 32 |
1160 (u64)le16_to_cpu(resp.hwrm_intf_build) << 16 |
1161 le16_to_cpu(resp.hwrm_intf_patch);
1163 cctx->hwrm_cmd_max_timeout = le16_to_cpu(resp.max_req_timeout);
1165 if (!cctx->hwrm_cmd_max_timeout)
1166 cctx->hwrm_cmd_max_timeout = RCFW_FW_STALL_MAX_TIMEOUT;
1169 static int bnxt_re_ib_init(struct bnxt_re_dev *rdev)
1174 /* Register ib dev */
1175 rc = bnxt_re_register_ib(rdev);
1177 pr_err("Failed to register with IB: %#x\n", rc);
1180 dev_info(rdev_to_dev(rdev), "Device registered with IB successfully");
1181 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags);
1183 event = netif_running(rdev->netdev) && netif_carrier_ok(rdev->netdev) ?
1184 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
1186 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, event);
1191 static void bnxt_re_dev_uninit(struct bnxt_re_dev *rdev)
1196 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags))
1197 cancel_delayed_work_sync(&rdev->worker);
1199 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED,
1201 bnxt_re_cleanup_res(rdev);
1202 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags))
1203 bnxt_re_free_res(rdev);
1205 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) {
1206 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw);
1208 ibdev_warn(&rdev->ibdev,
1209 "Failed to deinitialize RCFW: %#x", rc);
1210 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1211 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx);
1212 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1213 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1214 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type);
1215 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1217 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags))
1220 bnxt_re_destroy_chip_ctx(rdev);
1221 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags))
1222 bnxt_unregister_dev(rdev->en_dev);
1225 /* worker thread for polling periodic events. Now used for QoS programming*/
1226 static void bnxt_re_worker(struct work_struct *work)
1228 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev,
1231 bnxt_re_setup_qos(rdev);
1232 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1235 static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 wqe_mode)
1237 struct bnxt_qplib_creq_ctx *creq;
1238 struct bnxt_re_ring_attr rattr;
1244 /* Registered a new RoCE device instance to netdev */
1245 memset(&rattr, 0, sizeof(rattr));
1246 rc = bnxt_re_register_netdev(rdev);
1248 ibdev_err(&rdev->ibdev,
1249 "Failed to register with netedev: %#x\n", rc);
1252 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
1254 rc = bnxt_re_setup_chip_ctx(rdev, wqe_mode);
1256 bnxt_unregister_dev(rdev->en_dev);
1257 clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
1258 ibdev_err(&rdev->ibdev, "Failed to get chip context\n");
1262 /* Check whether VF or PF */
1263 bnxt_re_get_sriov_func_type(rdev);
1265 if (!rdev->en_dev->ulp_tbl->msix_requested) {
1266 ibdev_err(&rdev->ibdev,
1267 "Failed to get MSI-X vectors: %#x\n", rc);
1271 ibdev_dbg(&rdev->ibdev, "Got %d MSI-X vectors\n",
1272 rdev->en_dev->ulp_tbl->msix_requested);
1273 rdev->num_msix = rdev->en_dev->ulp_tbl->msix_requested;
1274 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags);
1276 bnxt_re_query_hwrm_intf_version(rdev);
1278 /* Establish RCFW Communication Channel to initialize the context
1279 * memory for the function and all child VFs
1281 rc = bnxt_qplib_alloc_rcfw_channel(&rdev->qplib_res, &rdev->rcfw,
1283 BNXT_RE_MAX_QPC_COUNT);
1285 ibdev_err(&rdev->ibdev,
1286 "Failed to allocate RCFW Channel: %#x\n", rc);
1290 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1291 creq = &rdev->rcfw.creq;
1292 rattr.dma_arr = creq->hwq.pbl[PBL_LVL_0].pg_map_arr;
1293 rattr.pages = creq->hwq.pbl[creq->hwq.level].pg_count;
1295 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX;
1296 rattr.depth = BNXT_QPLIB_CREQE_MAX_CNT - 1;
1297 rattr.lrid = rdev->en_dev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx;
1298 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &creq->ring_id);
1300 ibdev_err(&rdev->ibdev, "Failed to allocate CREQ: %#x\n", rc);
1303 db_offt = bnxt_re_get_nqdb_offset(rdev, BNXT_RE_AEQ_IDX);
1304 vid = rdev->en_dev->msix_entries[BNXT_RE_AEQ_IDX].vector;
1305 rc = bnxt_qplib_enable_rcfw_channel(&rdev->rcfw,
1307 &bnxt_re_aeq_handler);
1309 ibdev_err(&rdev->ibdev, "Failed to enable RCFW channel: %#x\n",
1314 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
1319 bnxt_re_set_resource_limits(rdev);
1321 rc = bnxt_qplib_alloc_ctx(&rdev->qplib_res, &rdev->qplib_ctx, 0,
1322 bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx));
1324 ibdev_err(&rdev->ibdev,
1325 "Failed to allocate QPLIB context: %#x\n", rc);
1328 rc = bnxt_re_net_stats_ctx_alloc(rdev,
1329 rdev->qplib_ctx.stats.dma_map,
1330 &rdev->qplib_ctx.stats.fw_id);
1332 ibdev_err(&rdev->ibdev,
1333 "Failed to allocate stats context: %#x\n", rc);
1337 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx,
1340 ibdev_err(&rdev->ibdev,
1341 "Failed to initialize RCFW: %#x\n", rc);
1344 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags);
1346 /* Resources based on the 'new' device caps */
1347 rc = bnxt_re_alloc_res(rdev);
1349 ibdev_err(&rdev->ibdev,
1350 "Failed to allocate resources: %#x\n", rc);
1353 set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags);
1354 rc = bnxt_re_init_res(rdev);
1356 ibdev_err(&rdev->ibdev,
1357 "Failed to initialize resources: %#x\n", rc);
1361 set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags);
1363 if (!rdev->is_virtfn) {
1364 rc = bnxt_re_setup_qos(rdev);
1366 ibdev_info(&rdev->ibdev,
1367 "RoCE priority not yet configured\n");
1369 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker);
1370 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags);
1371 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1373 * Use the total VF count since the actual VF count may not be
1374 * available at this point.
1376 bnxt_re_vf_res_config(rdev);
1381 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1383 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx);
1385 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1387 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1388 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type);
1390 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1392 bnxt_re_dev_uninit(rdev);
1397 static int bnxt_re_add_device(struct auxiliary_device *adev, u8 wqe_mode)
1399 struct bnxt_aux_priv *aux_priv =
1400 container_of(adev, struct bnxt_aux_priv, aux_dev);
1401 struct bnxt_en_dev *en_dev;
1402 struct bnxt_re_dev *rdev;
1405 /* en_dev should never be NULL as long as adev and aux_dev are valid. */
1406 en_dev = aux_priv->edev;
1408 rdev = bnxt_re_dev_add(aux_priv, en_dev);
1409 if (!rdev || !rdev_to_dev(rdev)) {
1414 rc = bnxt_re_dev_init(rdev, wqe_mode);
1416 goto re_dev_dealloc;
1418 rc = bnxt_re_ib_init(rdev);
1420 pr_err("Failed to register with IB: %s",
1421 aux_priv->aux_dev.name);
1424 auxiliary_set_drvdata(adev, rdev);
1429 bnxt_re_dev_uninit(rdev);
1431 ib_dealloc_device(&rdev->ibdev);
1436 static void bnxt_re_setup_cc(struct bnxt_re_dev *rdev, bool enable)
1438 struct bnxt_qplib_cc_param cc_param = {};
1440 /* Do not enable congestion control on VFs */
1441 if (rdev->is_virtfn)
1444 /* Currently enabling only for GenP5 adapters */
1445 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))
1449 cc_param.enable = 1;
1450 cc_param.cc_mode = CMDQ_MODIFY_ROCE_CC_CC_MODE_PROBABILISTIC_CC_MODE;
1453 cc_param.mask = (CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_CC_MODE |
1454 CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_ENABLE_CC |
1455 CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_TOS_ECN);
1457 if (bnxt_qplib_modify_cc(&rdev->qplib_res, &cc_param))
1458 ibdev_err(&rdev->ibdev, "Failed to setup CC enable = %d\n", enable);
1462 * "Notifier chain callback can be invoked for the same chain from
1463 * different CPUs at the same time".
1465 * For cases when the netdev is already present, our call to the
1466 * register_netdevice_notifier() will actually get the rtnl_lock()
1467 * before sending NETDEV_REGISTER and (if up) NETDEV_UP
1470 * But for cases when the netdev is not already present, the notifier
1471 * chain is subjected to be invoked from different CPUs simultaneously.
1473 * This is protected by the netdev_mutex.
1475 static int bnxt_re_netdev_event(struct notifier_block *notifier,
1476 unsigned long event, void *ptr)
1478 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr);
1479 struct bnxt_re_dev *rdev;
1481 real_dev = rdma_vlan_dev_real_dev(netdev);
1485 if (real_dev != netdev)
1488 rdev = bnxt_re_from_netdev(real_dev);
1497 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
1498 netif_carrier_ok(real_dev) ?
1499 IB_EVENT_PORT_ACTIVE :
1505 ib_device_put(&rdev->ibdev);
1510 #define BNXT_ADEV_NAME "bnxt_en"
1512 static void bnxt_re_remove(struct auxiliary_device *adev)
1514 struct bnxt_re_dev *rdev = auxiliary_get_drvdata(adev);
1519 mutex_lock(&bnxt_re_mutex);
1520 if (rdev->nb.notifier_call) {
1521 unregister_netdevice_notifier(&rdev->nb);
1522 rdev->nb.notifier_call = NULL;
1524 /* If notifier is null, we should have already done a
1525 * clean up before coming here.
1529 bnxt_re_setup_cc(rdev, false);
1530 ib_unregister_device(&rdev->ibdev);
1531 bnxt_re_dev_uninit(rdev);
1532 ib_dealloc_device(&rdev->ibdev);
1534 mutex_unlock(&bnxt_re_mutex);
1537 static int bnxt_re_probe(struct auxiliary_device *adev,
1538 const struct auxiliary_device_id *id)
1540 struct bnxt_re_dev *rdev;
1543 mutex_lock(&bnxt_re_mutex);
1544 rc = bnxt_re_add_device(adev, BNXT_QPLIB_WQE_MODE_STATIC);
1546 mutex_unlock(&bnxt_re_mutex);
1550 rdev = auxiliary_get_drvdata(adev);
1552 rdev->nb.notifier_call = bnxt_re_netdev_event;
1553 rc = register_netdevice_notifier(&rdev->nb);
1555 rdev->nb.notifier_call = NULL;
1556 pr_err("%s: Cannot register to netdevice_notifier",
1557 ROCE_DRV_MODULE_NAME);
1561 bnxt_re_setup_cc(rdev, true);
1562 mutex_unlock(&bnxt_re_mutex);
1566 mutex_unlock(&bnxt_re_mutex);
1567 bnxt_re_remove(adev);
1572 static int bnxt_re_suspend(struct auxiliary_device *adev, pm_message_t state)
1574 struct bnxt_re_dev *rdev = auxiliary_get_drvdata(adev);
1579 mutex_lock(&bnxt_re_mutex);
1580 /* L2 driver may invoke this callback during device error/crash or device
1581 * reset. Current RoCE driver doesn't recover the device in case of
1582 * error. Handle the error by dispatching fatal events to all qps
1583 * ie. by calling bnxt_re_dev_stop and release the MSIx vectors as
1584 * L2 driver want to modify the MSIx table.
1587 ibdev_info(&rdev->ibdev, "Handle device suspend call");
1588 /* Check the current device state from bnxt_en_dev and move the
1589 * device to detached state if FW_FATAL_COND is set.
1590 * This prevents more commands to HW during clean-up,
1591 * in case the device is already in error.
1593 if (test_bit(BNXT_STATE_FW_FATAL_COND, &rdev->en_dev->en_state))
1594 set_bit(ERR_DEVICE_DETACHED, &rdev->rcfw.cmdq.flags);
1596 bnxt_re_dev_stop(rdev);
1597 bnxt_re_stop_irq(rdev);
1598 /* Move the device states to detached and avoid sending any more
1601 set_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags);
1602 set_bit(ERR_DEVICE_DETACHED, &rdev->rcfw.cmdq.flags);
1603 wake_up_all(&rdev->rcfw.cmdq.waitq);
1604 mutex_unlock(&bnxt_re_mutex);
1609 static int bnxt_re_resume(struct auxiliary_device *adev)
1611 struct bnxt_re_dev *rdev = auxiliary_get_drvdata(adev);
1616 mutex_lock(&bnxt_re_mutex);
1617 /* L2 driver may invoke this callback during device recovery, resume.
1618 * reset. Current RoCE driver doesn't recover the device in case of
1619 * error. Handle the error by dispatching fatal events to all qps
1620 * ie. by calling bnxt_re_dev_stop and release the MSIx vectors as
1621 * L2 driver want to modify the MSIx table.
1624 ibdev_info(&rdev->ibdev, "Handle device resume call");
1625 mutex_unlock(&bnxt_re_mutex);
1630 static const struct auxiliary_device_id bnxt_re_id_table[] = {
1631 { .name = BNXT_ADEV_NAME ".rdma", },
1635 MODULE_DEVICE_TABLE(auxiliary, bnxt_re_id_table);
1637 static struct auxiliary_driver bnxt_re_driver = {
1639 .probe = bnxt_re_probe,
1640 .remove = bnxt_re_remove,
1641 .shutdown = bnxt_re_shutdown,
1642 .suspend = bnxt_re_suspend,
1643 .resume = bnxt_re_resume,
1644 .id_table = bnxt_re_id_table,
1647 static int __init bnxt_re_mod_init(void)
1651 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version);
1652 rc = auxiliary_driver_register(&bnxt_re_driver);
1654 pr_err("%s: Failed to register auxiliary driver\n",
1655 ROCE_DRV_MODULE_NAME);
1661 static void __exit bnxt_re_mod_exit(void)
1663 auxiliary_driver_unregister(&bnxt_re_driver);
1666 module_init(bnxt_re_mod_init);
1667 module_exit(bnxt_re_mod_exit);