1 // SPDX-License-Identifier: GPL-2.0
3 * This file is part the core part STM32 DFSDM driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
6 * Author(s): Arnaud Pouliquen <arnaud.pouliquen@st.com> for STMicroelectronics.
10 #include <linux/iio/iio.h>
11 #include <linux/iio/sysfs.h>
12 #include <linux/interrupt.h>
13 #include <linux/module.h>
14 #include <linux/of_device.h>
15 #include <linux/pinctrl/consumer.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/regmap.h>
18 #include <linux/slab.h>
20 #include "stm32-dfsdm.h"
22 struct stm32_dfsdm_dev_data {
23 unsigned int num_filters;
24 unsigned int num_channels;
25 const struct regmap_config *regmap_cfg;
28 #define STM32H7_DFSDM_NUM_FILTERS 4
29 #define STM32H7_DFSDM_NUM_CHANNELS 8
30 #define STM32MP1_DFSDM_NUM_FILTERS 6
31 #define STM32MP1_DFSDM_NUM_CHANNELS 8
33 static bool stm32_dfsdm_volatile_reg(struct device *dev, unsigned int reg)
35 if (reg < DFSDM_FILTER_BASE_ADR)
39 * Mask is done on register to avoid to list registers of all
42 switch (reg & DFSDM_FILTER_REG_MASK) {
43 case DFSDM_CR1(0) & DFSDM_FILTER_REG_MASK:
44 case DFSDM_ISR(0) & DFSDM_FILTER_REG_MASK:
45 case DFSDM_JDATAR(0) & DFSDM_FILTER_REG_MASK:
46 case DFSDM_RDATAR(0) & DFSDM_FILTER_REG_MASK:
53 static const struct regmap_config stm32h7_dfsdm_regmap_cfg = {
56 .reg_stride = sizeof(u32),
57 .max_register = 0x2B8,
58 .volatile_reg = stm32_dfsdm_volatile_reg,
62 static const struct stm32_dfsdm_dev_data stm32h7_dfsdm_data = {
63 .num_filters = STM32H7_DFSDM_NUM_FILTERS,
64 .num_channels = STM32H7_DFSDM_NUM_CHANNELS,
65 .regmap_cfg = &stm32h7_dfsdm_regmap_cfg,
68 static const struct regmap_config stm32mp1_dfsdm_regmap_cfg = {
71 .reg_stride = sizeof(u32),
72 .max_register = 0x7fc,
73 .volatile_reg = stm32_dfsdm_volatile_reg,
77 static const struct stm32_dfsdm_dev_data stm32mp1_dfsdm_data = {
78 .num_filters = STM32MP1_DFSDM_NUM_FILTERS,
79 .num_channels = STM32MP1_DFSDM_NUM_CHANNELS,
80 .regmap_cfg = &stm32mp1_dfsdm_regmap_cfg,
84 struct platform_device *pdev; /* platform device */
86 struct stm32_dfsdm dfsdm; /* common data exported for all instances */
88 unsigned int spi_clk_out_div; /* SPI clkout divider value */
89 atomic_t n_active_ch; /* number of current active channels */
91 struct clk *clk; /* DFSDM clock */
92 struct clk *aclk; /* audio clock */
95 static inline struct dfsdm_priv *to_stm32_dfsdm_priv(struct stm32_dfsdm *dfsdm)
97 return container_of(dfsdm, struct dfsdm_priv, dfsdm);
100 static int stm32_dfsdm_clk_prepare_enable(struct stm32_dfsdm *dfsdm)
102 struct dfsdm_priv *priv = to_stm32_dfsdm_priv(dfsdm);
105 ret = clk_prepare_enable(priv->clk);
106 if (ret || !priv->aclk)
109 ret = clk_prepare_enable(priv->aclk);
111 clk_disable_unprepare(priv->clk);
116 static void stm32_dfsdm_clk_disable_unprepare(struct stm32_dfsdm *dfsdm)
118 struct dfsdm_priv *priv = to_stm32_dfsdm_priv(dfsdm);
121 clk_disable_unprepare(priv->aclk);
122 clk_disable_unprepare(priv->clk);
126 * stm32_dfsdm_start_dfsdm - start global dfsdm interface.
128 * Enable interface if n_active_ch is not null.
129 * @dfsdm: Handle used to retrieve dfsdm context.
131 int stm32_dfsdm_start_dfsdm(struct stm32_dfsdm *dfsdm)
133 struct dfsdm_priv *priv = to_stm32_dfsdm_priv(dfsdm);
134 struct device *dev = &priv->pdev->dev;
135 unsigned int clk_div = priv->spi_clk_out_div, clk_src;
138 if (atomic_inc_return(&priv->n_active_ch) == 1) {
139 ret = pm_runtime_get_sync(dev);
141 pm_runtime_put_noidle(dev);
145 /* select clock source, e.g. 0 for "dfsdm" or 1 for "audio" */
146 clk_src = priv->aclk ? 1 : 0;
147 ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
148 DFSDM_CHCFGR1_CKOUTSRC_MASK,
149 DFSDM_CHCFGR1_CKOUTSRC(clk_src));
153 /* Output the SPI CLKOUT (if clk_div == 0 clock if OFF) */
154 ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
155 DFSDM_CHCFGR1_CKOUTDIV_MASK,
156 DFSDM_CHCFGR1_CKOUTDIV(clk_div));
160 /* Global enable of DFSDM interface */
161 ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
162 DFSDM_CHCFGR1_DFSDMEN_MASK,
163 DFSDM_CHCFGR1_DFSDMEN(1));
168 dev_dbg(dev, "%s: n_active_ch %d\n", __func__,
169 atomic_read(&priv->n_active_ch));
174 pm_runtime_put_sync(dev);
176 atomic_dec(&priv->n_active_ch);
180 EXPORT_SYMBOL_GPL(stm32_dfsdm_start_dfsdm);
183 * stm32_dfsdm_stop_dfsdm - stop global DFSDM interface.
185 * Disable interface if n_active_ch is null
186 * @dfsdm: Handle used to retrieve dfsdm context.
188 int stm32_dfsdm_stop_dfsdm(struct stm32_dfsdm *dfsdm)
190 struct dfsdm_priv *priv = to_stm32_dfsdm_priv(dfsdm);
193 if (atomic_dec_and_test(&priv->n_active_ch)) {
194 /* Global disable of DFSDM interface */
195 ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
196 DFSDM_CHCFGR1_DFSDMEN_MASK,
197 DFSDM_CHCFGR1_DFSDMEN(0));
201 /* Stop SPI CLKOUT */
202 ret = regmap_update_bits(dfsdm->regmap, DFSDM_CHCFGR1(0),
203 DFSDM_CHCFGR1_CKOUTDIV_MASK,
204 DFSDM_CHCFGR1_CKOUTDIV(0));
208 pm_runtime_put_sync(&priv->pdev->dev);
210 dev_dbg(&priv->pdev->dev, "%s: n_active_ch %d\n", __func__,
211 atomic_read(&priv->n_active_ch));
215 EXPORT_SYMBOL_GPL(stm32_dfsdm_stop_dfsdm);
217 static int stm32_dfsdm_parse_of(struct platform_device *pdev,
218 struct dfsdm_priv *priv)
220 struct device_node *node = pdev->dev.of_node;
221 struct resource *res;
222 unsigned long clk_freq, divider;
223 unsigned int spi_freq, rem;
229 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
231 dev_err(&pdev->dev, "Failed to get memory resource\n");
234 priv->dfsdm.phys_base = res->start;
235 priv->dfsdm.base = devm_ioremap_resource(&pdev->dev, res);
238 * "dfsdm" clock is mandatory for DFSDM peripheral clocking.
239 * "dfsdm" or "audio" clocks can be used as source clock for
240 * the SPI clock out signal and internal processing, depending
243 priv->clk = devm_clk_get(&pdev->dev, "dfsdm");
244 if (IS_ERR(priv->clk)) {
245 dev_err(&pdev->dev, "No stm32_dfsdm_clk clock found\n");
249 priv->aclk = devm_clk_get(&pdev->dev, "audio");
250 if (IS_ERR(priv->aclk))
254 clk_freq = clk_get_rate(priv->aclk);
256 clk_freq = clk_get_rate(priv->clk);
258 /* SPI clock out frequency */
259 ret = of_property_read_u32(pdev->dev.of_node, "spi-max-frequency",
262 /* No SPI master mode */
266 divider = div_u64_rem(clk_freq, spi_freq, &rem);
267 /* Round up divider when ckout isn't precise, not to exceed spi_freq */
271 /* programmable divider is in range of [2:256] */
272 if (divider < 2 || divider > 256) {
273 dev_err(&pdev->dev, "spi-max-frequency not achievable\n");
277 /* SPI clock output divider is: divider = CKOUTDIV + 1 */
278 priv->spi_clk_out_div = divider - 1;
279 priv->dfsdm.spi_master_freq = clk_freq / (priv->spi_clk_out_div + 1);
282 dev_warn(&pdev->dev, "SPI clock not accurate\n");
283 dev_warn(&pdev->dev, "%ld = %d * %d + %d\n",
284 clk_freq, spi_freq, priv->spi_clk_out_div + 1, rem);
290 static const struct of_device_id stm32_dfsdm_of_match[] = {
292 .compatible = "st,stm32h7-dfsdm",
293 .data = &stm32h7_dfsdm_data,
296 .compatible = "st,stm32mp1-dfsdm",
297 .data = &stm32mp1_dfsdm_data,
301 MODULE_DEVICE_TABLE(of, stm32_dfsdm_of_match);
303 static int stm32_dfsdm_probe(struct platform_device *pdev)
305 struct dfsdm_priv *priv;
306 const struct stm32_dfsdm_dev_data *dev_data;
307 struct stm32_dfsdm *dfsdm;
310 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
316 dev_data = of_device_get_match_data(&pdev->dev);
318 dfsdm = &priv->dfsdm;
319 dfsdm->fl_list = devm_kcalloc(&pdev->dev, dev_data->num_filters,
320 sizeof(*dfsdm->fl_list), GFP_KERNEL);
324 dfsdm->num_fls = dev_data->num_filters;
325 dfsdm->ch_list = devm_kcalloc(&pdev->dev, dev_data->num_channels,
326 sizeof(*dfsdm->ch_list),
330 dfsdm->num_chs = dev_data->num_channels;
332 ret = stm32_dfsdm_parse_of(pdev, priv);
336 dfsdm->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "dfsdm",
338 dev_data->regmap_cfg);
339 if (IS_ERR(dfsdm->regmap)) {
340 ret = PTR_ERR(dfsdm->regmap);
341 dev_err(&pdev->dev, "%s: Failed to allocate regmap: %d\n",
346 platform_set_drvdata(pdev, dfsdm);
348 ret = stm32_dfsdm_clk_prepare_enable(dfsdm);
350 dev_err(&pdev->dev, "Failed to start clock\n");
354 pm_runtime_get_noresume(&pdev->dev);
355 pm_runtime_set_active(&pdev->dev);
356 pm_runtime_enable(&pdev->dev);
358 ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
362 pm_runtime_put(&pdev->dev);
367 pm_runtime_disable(&pdev->dev);
368 pm_runtime_set_suspended(&pdev->dev);
369 pm_runtime_put_noidle(&pdev->dev);
370 stm32_dfsdm_clk_disable_unprepare(dfsdm);
375 static int stm32_dfsdm_core_remove(struct platform_device *pdev)
377 struct stm32_dfsdm *dfsdm = platform_get_drvdata(pdev);
379 pm_runtime_get_sync(&pdev->dev);
380 of_platform_depopulate(&pdev->dev);
381 pm_runtime_disable(&pdev->dev);
382 pm_runtime_set_suspended(&pdev->dev);
383 pm_runtime_put_noidle(&pdev->dev);
384 stm32_dfsdm_clk_disable_unprepare(dfsdm);
389 static int __maybe_unused stm32_dfsdm_core_suspend(struct device *dev)
391 struct stm32_dfsdm *dfsdm = dev_get_drvdata(dev);
392 struct dfsdm_priv *priv = to_stm32_dfsdm_priv(dfsdm);
395 ret = pm_runtime_force_suspend(dev);
399 /* Balance devm_regmap_init_mmio_clk() clk_prepare() */
400 clk_unprepare(priv->clk);
402 return pinctrl_pm_select_sleep_state(dev);
405 static int __maybe_unused stm32_dfsdm_core_resume(struct device *dev)
407 struct stm32_dfsdm *dfsdm = dev_get_drvdata(dev);
408 struct dfsdm_priv *priv = to_stm32_dfsdm_priv(dfsdm);
411 ret = pinctrl_pm_select_default_state(dev);
415 ret = clk_prepare(priv->clk);
419 return pm_runtime_force_resume(dev);
422 static int __maybe_unused stm32_dfsdm_core_runtime_suspend(struct device *dev)
424 struct stm32_dfsdm *dfsdm = dev_get_drvdata(dev);
426 stm32_dfsdm_clk_disable_unprepare(dfsdm);
431 static int __maybe_unused stm32_dfsdm_core_runtime_resume(struct device *dev)
433 struct stm32_dfsdm *dfsdm = dev_get_drvdata(dev);
435 return stm32_dfsdm_clk_prepare_enable(dfsdm);
438 static const struct dev_pm_ops stm32_dfsdm_core_pm_ops = {
439 SET_SYSTEM_SLEEP_PM_OPS(stm32_dfsdm_core_suspend,
440 stm32_dfsdm_core_resume)
441 SET_RUNTIME_PM_OPS(stm32_dfsdm_core_runtime_suspend,
442 stm32_dfsdm_core_runtime_resume,
446 static struct platform_driver stm32_dfsdm_driver = {
447 .probe = stm32_dfsdm_probe,
448 .remove = stm32_dfsdm_core_remove,
450 .name = "stm32-dfsdm",
451 .of_match_table = stm32_dfsdm_of_match,
452 .pm = &stm32_dfsdm_core_pm_ops,
456 module_platform_driver(stm32_dfsdm_driver);
458 MODULE_AUTHOR("Arnaud Pouliquen <arnaud.pouliquen@st.com>");
459 MODULE_DESCRIPTION("STMicroelectronics STM32 dfsdm driver");
460 MODULE_LICENSE("GPL v2");