1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2018 Jernej Skrabec <jernej.skrabec@siol.net>
6 #include <linux/component.h>
7 #include <linux/module.h>
8 #include <linux/of_device.h>
9 #include <linux/platform_device.h>
11 #include <drm/drm_crtc_helper.h>
12 #include <drm/drm_of.h>
13 #include <drm/drm_simple_kms_helper.h>
15 #include "sun8i_dw_hdmi.h"
16 #include "sun8i_tcon_top.h"
18 static void sun8i_dw_hdmi_encoder_mode_set(struct drm_encoder *encoder,
19 struct drm_display_mode *mode,
20 struct drm_display_mode *adj_mode)
22 struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder);
24 if (hdmi->quirks->set_rate)
25 clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000);
28 static const struct drm_encoder_helper_funcs
29 sun8i_dw_hdmi_encoder_helper_funcs = {
30 .mode_set = sun8i_dw_hdmi_encoder_mode_set,
33 static enum drm_mode_status
34 sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data,
35 const struct drm_display_info *info,
36 const struct drm_display_mode *mode)
38 if (mode->clock > 297000)
39 return MODE_CLOCK_HIGH;
44 static enum drm_mode_status
45 sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data,
46 const struct drm_display_info *info,
47 const struct drm_display_mode *mode)
50 * Controller support maximum of 594 MHz, which correlates to
51 * 4K@60Hz 4:4:4 or RGB. However, for frequencies greater than
52 * 340 MHz scrambling has to be enabled. Because scrambling is
53 * not yet implemented, just limit to 340 MHz for now.
55 if (mode->clock > 340000)
56 return MODE_CLOCK_HIGH;
61 static bool sun8i_dw_hdmi_node_is_tcon_top(struct device_node *node)
63 return IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP) &&
64 !!of_match_node(sun8i_tcon_top_of_table, node);
67 static u32 sun8i_dw_hdmi_find_possible_crtcs(struct drm_device *drm,
68 struct device_node *node)
70 struct device_node *port, *ep, *remote, *remote_port;
73 remote = of_graph_get_remote_node(node, 0, -1);
77 if (sun8i_dw_hdmi_node_is_tcon_top(remote)) {
78 port = of_graph_get_port_by_id(remote, 4);
82 for_each_child_of_node(port, ep) {
83 remote_port = of_graph_get_remote_port(ep);
85 crtcs |= drm_of_crtc_port_mask(drm, remote_port);
86 of_node_put(remote_port);
90 crtcs = drm_of_find_possible_crtcs(drm, node);
99 static int sun8i_dw_hdmi_find_connector_pdev(struct device *dev,
100 struct platform_device **pdev_out)
102 struct platform_device *pdev;
103 struct device_node *remote;
105 remote = of_graph_get_remote_node(dev->of_node, 1, -1);
109 if (!of_device_is_compatible(remote, "hdmi-connector")) {
114 pdev = of_find_device_by_node(remote);
123 static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
126 struct platform_device *pdev = to_platform_device(dev), *connector_pdev;
127 struct dw_hdmi_plat_data *plat_data;
128 struct drm_device *drm = data;
129 struct device_node *phy_node;
130 struct drm_encoder *encoder;
131 struct sun8i_dw_hdmi *hdmi;
134 if (!pdev->dev.of_node)
137 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
141 plat_data = &hdmi->plat_data;
142 hdmi->dev = &pdev->dev;
143 encoder = &hdmi->encoder;
145 hdmi->quirks = of_device_get_match_data(dev);
147 encoder->possible_crtcs =
148 sun8i_dw_hdmi_find_possible_crtcs(drm, dev->of_node);
150 * If we failed to find the CRTC(s) which this encoder is
151 * supposed to be connected to, it's because the CRTC has
152 * not been registered yet. Defer probing, and hope that
153 * the required CRTC is added later.
155 if (encoder->possible_crtcs == 0)
156 return -EPROBE_DEFER;
158 hdmi->rst_ctrl = devm_reset_control_get(dev, "ctrl");
159 if (IS_ERR(hdmi->rst_ctrl)) {
160 dev_err(dev, "Could not get ctrl reset control\n");
161 return PTR_ERR(hdmi->rst_ctrl);
164 hdmi->clk_tmds = devm_clk_get(dev, "tmds");
165 if (IS_ERR(hdmi->clk_tmds)) {
166 dev_err(dev, "Couldn't get the tmds clock\n");
167 return PTR_ERR(hdmi->clk_tmds);
170 hdmi->regulator = devm_regulator_get(dev, "hvcc");
171 if (IS_ERR(hdmi->regulator)) {
172 dev_err(dev, "Couldn't get regulator\n");
173 return PTR_ERR(hdmi->regulator);
176 ret = sun8i_dw_hdmi_find_connector_pdev(dev, &connector_pdev);
178 hdmi->ddc_en = gpiod_get_optional(&connector_pdev->dev,
179 "ddc-en", GPIOD_OUT_HIGH);
180 platform_device_put(connector_pdev);
182 if (IS_ERR(hdmi->ddc_en)) {
183 dev_err(dev, "Couldn't get ddc-en gpio\n");
184 return PTR_ERR(hdmi->ddc_en);
188 ret = regulator_enable(hdmi->regulator);
190 dev_err(dev, "Failed to enable regulator\n");
191 goto err_unref_ddc_en;
194 gpiod_set_value(hdmi->ddc_en, 1);
196 ret = reset_control_deassert(hdmi->rst_ctrl);
198 dev_err(dev, "Could not deassert ctrl reset control\n");
199 goto err_disable_ddc_en;
202 ret = clk_prepare_enable(hdmi->clk_tmds);
204 dev_err(dev, "Could not enable tmds clock\n");
205 goto err_assert_ctrl_reset;
208 phy_node = of_parse_phandle(dev->of_node, "phys", 0);
210 dev_err(dev, "Can't found PHY phandle\n");
211 goto err_disable_clk_tmds;
214 ret = sun8i_hdmi_phy_probe(hdmi, phy_node);
215 of_node_put(phy_node);
217 dev_err(dev, "Couldn't get the HDMI PHY\n");
218 goto err_disable_clk_tmds;
221 drm_encoder_helper_add(encoder, &sun8i_dw_hdmi_encoder_helper_funcs);
222 drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
224 sun8i_hdmi_phy_init(hdmi->phy);
226 plat_data->mode_valid = hdmi->quirks->mode_valid;
227 plat_data->use_drm_infoframe = hdmi->quirks->use_drm_infoframe;
228 sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data);
230 platform_set_drvdata(pdev, hdmi);
232 hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data);
235 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
236 * which would have called the encoder cleanup. Do it manually.
238 if (IS_ERR(hdmi->hdmi)) {
239 ret = PTR_ERR(hdmi->hdmi);
240 goto cleanup_encoder;
246 drm_encoder_cleanup(encoder);
247 sun8i_hdmi_phy_remove(hdmi);
248 err_disable_clk_tmds:
249 clk_disable_unprepare(hdmi->clk_tmds);
250 err_assert_ctrl_reset:
251 reset_control_assert(hdmi->rst_ctrl);
253 gpiod_set_value(hdmi->ddc_en, 0);
254 regulator_disable(hdmi->regulator);
257 gpiod_put(hdmi->ddc_en);
262 static void sun8i_dw_hdmi_unbind(struct device *dev, struct device *master,
265 struct sun8i_dw_hdmi *hdmi = dev_get_drvdata(dev);
267 dw_hdmi_unbind(hdmi->hdmi);
268 sun8i_hdmi_phy_remove(hdmi);
269 clk_disable_unprepare(hdmi->clk_tmds);
270 reset_control_assert(hdmi->rst_ctrl);
271 gpiod_set_value(hdmi->ddc_en, 0);
272 regulator_disable(hdmi->regulator);
275 gpiod_put(hdmi->ddc_en);
278 static const struct component_ops sun8i_dw_hdmi_ops = {
279 .bind = sun8i_dw_hdmi_bind,
280 .unbind = sun8i_dw_hdmi_unbind,
283 static int sun8i_dw_hdmi_probe(struct platform_device *pdev)
285 return component_add(&pdev->dev, &sun8i_dw_hdmi_ops);
288 static int sun8i_dw_hdmi_remove(struct platform_device *pdev)
290 component_del(&pdev->dev, &sun8i_dw_hdmi_ops);
295 static const struct sun8i_dw_hdmi_quirks sun8i_a83t_quirks = {
296 .mode_valid = sun8i_dw_hdmi_mode_valid_a83t,
300 static const struct sun8i_dw_hdmi_quirks sun50i_h6_quirks = {
301 .mode_valid = sun8i_dw_hdmi_mode_valid_h6,
302 .use_drm_infoframe = true,
305 static const struct of_device_id sun8i_dw_hdmi_dt_ids[] = {
307 .compatible = "allwinner,sun8i-a83t-dw-hdmi",
308 .data = &sun8i_a83t_quirks,
311 .compatible = "allwinner,sun50i-h6-dw-hdmi",
312 .data = &sun50i_h6_quirks,
316 MODULE_DEVICE_TABLE(of, sun8i_dw_hdmi_dt_ids);
318 static struct platform_driver sun8i_dw_hdmi_pltfm_driver = {
319 .probe = sun8i_dw_hdmi_probe,
320 .remove = sun8i_dw_hdmi_remove,
322 .name = "sun8i-dw-hdmi",
323 .of_match_table = sun8i_dw_hdmi_dt_ids,
326 module_platform_driver(sun8i_dw_hdmi_pltfm_driver);
328 MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
329 MODULE_DESCRIPTION("Allwinner DW HDMI bridge");
330 MODULE_LICENSE("GPL");